Power line acquisition card and power line detection system

Abstract

This application relates to a power line acquisition card and a power line detection system, belonging to the field of power line detection technology. The power line acquisition card includes: a power line interface; a communication circuit; a clock circuit for generating time data; a transceiver circuit for supporting signal transmission and reception; and a control circuit connected to the communication circuit, transceiver circuit, and clock circuit, respectively. This control circuit configures the power line acquisition card as a transmitter according to a transmission configuration command issued by a host computer, and controls the transceiver circuit to send detection signals to other power line acquisition cards via the power line according to a test command issued by the host computer, and controls the clock circuit to generate transmission time data. The transmission time data indicates the time of transmission of the detection signal. Other power line acquisition cards are configured as receivers. The communication circuit also reports the transmitted detection signals and transmission time data to the host computer to determine the power line fault detection result. This application can improve the efficiency of power line detection.

Description

Technical Field

[0001] This application relates to the field of power line detection technology, and in particular to a power line acquisition card and a power line detection system. Background Technology

[0002] Current low-voltage residential power line inspection technology mainly relies on manual inspections, which suffers from low efficiency, poor real-time performance, and difficulty in location. Existing power line inspection equipment is mostly stand-alone, making it difficult to collaborate with cloud-based or other intelligent terminals to achieve advanced intelligent inspection functions. Summary of the Invention

[0003] Therefore, it is necessary to provide a power line acquisition card and a power line detection system to improve the efficiency and accuracy of power line detection.

[0004] A power line acquisition card for a power line detection system, wherein the power line acquisition card is applied to the power line detection system, and the power line detection system includes a power line, a host computer, and multiple power line acquisition cards; each power line acquisition card is deployed at a different location on the power line; the power line acquisition card includes:

[0005] A power line interface for connecting to the power line;

[0006] Communication circuitry for connecting to the host computer;

[0007] Clock circuit, used to generate time data;

[0008] A transceiver circuit, connected to the power line interface, is used to support the transmission and reception of signals;

[0009] A control circuit, connected to the communication circuit, the transceiver circuit, and the clock circuit, is used to configure the power line acquisition card as a transmitter card according to the transmission configuration command issued by the host computer, control the transceiver circuit to send detection signals to other power line acquisition cards through the power line according to the test command issued by the host computer, and control the clock circuit to generate transmission time data; the transmission time data is used to represent the time of sending the detection signal; other power line acquisition cards are configured as receiver cards.

[0010] The communication circuit is also used to report the detection signal and the transmission time data to the host computer in order to determine the fault detection result of the power line.

[0011] In one embodiment, the control circuit is further configured to configure the power line acquisition card as a receiving card according to the receiving configuration instruction issued by the host computer, control the transceiver circuit to receive the detection signal sent by the transmitting card through the power line, and control the clock circuit to generate receiving time data; the receiving time data is used to represent the time of receiving the detection signal; one of the other power line acquisition cards is a transmitting card, and the remaining power line acquisition cards are receiving cards;

[0012] The communication circuit is also used to report the received detection signal and the reception time data to the host computer in order to determine the fault detection result of the power line.

[0013] In one embodiment, the control circuit is further configured to control the clock circuit to perform clock calibration processing according to the clock calibration command issued by the host computer; wherein the clock calibration command is sent based on the transmission time data and the reception time data reported by other power line acquisition cards, and the reception time data is used to indicate the time when other power line acquisition cards receive the detection signal.

[0014] In one embodiment, the control circuit is further configured to, when the power line acquisition card is a transmitting card, control the clock circuit to generate a trigger signal according to the test command issued by the host computer, and control the transceiver circuit to sequentially send the trigger signal and the detection signal to other power line acquisition cards; the trigger signal is used to instruct other power line acquisition cards to enter the receiving state to receive the detection signal; the transmission time interval between the trigger signal and the detection signal is a preset time interval.

[0015] In one embodiment, the transceiver circuit includes:

[0016] A transmitting module, connected to the control circuit, is used to support the transmission processing of signals in order to send the detection signal;

[0017] A receiving module, connected to the control circuit, is used to support the receiving and processing of signals in order to receive the detection signal;

[0018] The path switching module is connected to the transmitting module, the receiving module, the power line interface, and the control circuit, respectively, and is used to select and connect the paths between the transmitting module and the receiving module and the power line interface, respectively, under the control of the control circuit.

[0019] In one embodiment, the transmitting module includes: a digital-to-analog converter unit connected to the control circuit for supporting digital-to-analog conversion of signals from the control circuit; and a transmitting unit connected to both the digital-to-analog converter unit and the path switching module for supporting transmission processing of the digital-to-analog converted signals to send the detection signal.

[0020] The receiving module includes: a receiving unit connected to the path switching module, used to support the receiving and processing of detection signals from the power line; and an analog-to-digital conversion unit connected to the receiving unit and the control circuit, used to support the analog-to-digital conversion of the detection signals from the receiving unit and to send the analog-to-digital converted detection signals to the control circuit.

[0021] In one embodiment, the power line acquisition card further includes:

[0022] A status detection circuit, connected to the power line interface and the transceiver circuit, is used to detect the line status of the power line through the power line interface and control the on / off state between the power line interface and the transceiver circuit according to the line status.

[0023] In one embodiment, the power line acquisition card further includes:

[0024] A surge protection circuit is connected to the power line interface and the transceiver circuit respectively. In the event of a transient surge on the power line side, it disconnects the transceiver path between the power line interface and the transceiver circuit, and opens the discharge path between the power line interface and the ground wire in the power line, so as to discharge the surge current to the ground wire through the discharge path.

[0025] In one embodiment, the power acquisition card further includes a power supply circuit, the power supply circuit comprising:

[0026] Power interface, used for connecting to an external power source;

[0027] An AC-DC conversion module, connected to the power interface, is used to convert AC power supplied by the external power source into DC power.

[0028] The power supply management module, connected to the communication circuit, the clock circuit, the transceiver circuit, and the control circuit respectively, is used to provide a power supply voltage based on the DC power.

[0029] An isolation module is connected to both the AC-DC conversion module and the power supply management module to support electrical isolation between them.

[0030] A power line detection system, comprising:

[0031] Power lines, at least for transmitting detection signals;

[0032] The host computer is used at least to issue launch configuration commands and test commands;

[0033] Multiple power line acquisition cards as described above are deployed at different locations on the power line. Each power line acquisition card is used to connect to the power line and the host computer. The power line acquisition card is configured as a transmitter according to the transmission configuration command, and sends the detection signal to other power line acquisition cards through the power line according to the test command, and reports the detection signal and transmission time data to the host computer to determine the fault detection result of the power line. The transmission time data is used to indicate the time of sending the detection signal.

[0034] The aforementioned power line acquisition card and power line detection system utilize a modular design that integrates power line interfaces, communication circuits, clock circuits, transceiver circuits, and control circuits. Relying on host computer instructions, it enables flexible configuration of transmitting and receiving cards. In transmitting card mode, it can accurately send detection signals and generate precise transmission time data via the clock circuit, simultaneously reporting it to the host computer. Combined with signal reception and data collaboration with other receiving cards, it not only achieves integrated and controllable detection signal transmission and reception and time data acquisition, ensuring the accuracy of detection results, but also enhances the targeting and reliability of power line detection through the collaborative division of labor among multiple acquisition cards. This effectively supports the host computer in quickly and accurately determining power line fault conditions and the latency performance of each acquisition card, thus optimizing the overall detection efficiency, data accuracy, and configuration flexibility of the power line detection system, meeting the core requirements of power line detection for precision, collaboration, and controllability. This solution eliminates the need for manual inspections, fundamentally reducing the safety risks of inspection operations. It can also receive and report data in real time via a host computer, enabling rapid response and early warning of faults. It solves the pain points of insufficient real-time performance and delayed fault handling in manual periodic inspections. Overall, it exhibits disruptive advantages in detection efficiency, data accuracy, operational safety, maintenance costs, and real-time response capabilities, fully meeting the core needs of power line detection to transform towards automation, precision, safety, and efficiency. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1This is a schematic diagram of the structure of a power line detection system according to one embodiment;

[0037] Figure 2 This is a schematic diagram of the structure of a power line acquisition card according to one embodiment;

[0038] Figure 3 This is a schematic diagram of the structure of a power line acquisition card according to another embodiment.

[0039] Explanation of reference numerals in the attached figures:

[0040] 10. Power line acquisition card; 20. Power line; 30. Host computer; 40. Cloud platform; 11. Power line interface; 12. Communication circuit; 13. Clock circuit; 14. Transceiver circuit; 15. Control circuit; 16. Status detection circuit; 17. Surge protection circuit; 18. Power supply circuit; 19. Storage circuit; 141. Transmitting module; 1411. Digital-to-analog converter unit; 1412. Transmitting unit; 142. Receiving module; 1421. Receiving unit; 1422. Analog-to-digital converter unit; 143. Path switching module; 181. Power interface; 182. AC-DC conversion module; 183. Power supply management module; 184. Isolation module. Detailed Implementation

[0041] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0043] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, circuits, units, etc., have electrical signal or data transmission between them.

[0044] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0045] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0046] In some embodiments, such as Figures 1 to 3 As shown, a power line acquisition card 10 is provided for a power line detection system. This power line acquisition card 10 is applied to the power line detection system. The power line detection system includes a power line 20, a host computer 30, and multiple power line acquisition cards 10. The power line 20 is the power line to be detected, which can be any line in the power grid system that requires detection, such as a transmission line in a distribution network system. The power line to be tested 20 can be meshed and can be connected to multiple terminal devices, including but not limited to distribution terminals, load terminals, and user equipment. Furthermore, the terminal devices in the power grid can be electrically connected through different power line 20 ports to achieve communication. In practical applications, the power line detection system can include at least one power line 20, which can be configured accordingly according to detection requirements. For ease of explanation, this embodiment uses one power line to be tested 20 as an example. The power line 20 can include a live wire (L), a neutral wire (N), and a ground wire (PE).

[0047] The host computer 30 can communicate with each power line acquisition card 10. The host computer 30 can also communicate with the cloud platform 40 via Bluetooth, mobile data, Wi-Fi, or other connection methods. In practical applications, the communication protocols between the host computer 30 and the cloud platform 40 can be Hypertext Transfer Protocol (HTTP), Hypertext Transfer Protocol Secure (HTTPS), Secure File Transfer Protocol (SFTP), or Message Queuing Telemetry Transport (MQTT) based on a publish-subscribe model. Optionally, the host computer 30 can be, but is not limited to, various personal computers, laptops, smartphones, tablets, and IoT devices; the cloud platform 40 can be a cloud server providing cloud computing services; for example, in this embodiment, the power line 20 detection host computer 30 can be a device with display functionality. The host computer 30 can have an application installed, and when the application on the host computer 30 is running, it detects the power line 20 based on the data acquired by each power acquisition card. The host computer 30 can also work with the cloud platform 40 to support the detection of the power line 20.

[0048] Each power line data acquisition card 10 is deployed at a different location on the power line 20. Figure 1 This example illustrates a scenario involving n power line acquisition cards 10, where n is greater than or equal to 2. Each power line acquisition card 10 is used to connect to a power line 20. That is, each power line acquisition card 10 is connected to a different location on the power line 20.

[0049] Please continue reading. Figures 1 to 3 Each power line acquisition card 10 includes a power line interface 11, a communication circuit 12, a clock circuit 13, a transceiver circuit 14, and a control circuit 15.

[0050] The power line interface 11 is used to connect to the power line 20. The power line interface 11 can be a detachable plug / socket to connect to the power line 20 to be tested. The power line interface 11 may include a live wire interface, a neutral wire interface, and a ground wire interface, wherein the live wire interface is connected to the live wire L in the power line 20, the neutral wire interface is connected to the neutral wire N in the power line 20, and the ground wire interface is connected to the ground wire PE in the power line 20.

[0051] The communication circuit 12 is used to connect to the host computer 30. The communication circuit 12 may include a wireless communication module and / or a wired communication module. The wireless communication module can wirelessly connect to the host computer 30, including but not limited to a Wi-Fi module, which may be a Wi-Fi chip. The wired communication module can connect to the host computer 30 via the wired interface of the power line acquisition card 10, wherein the wired interface includes but is not limited to a USB (Universal Serial Bus) interface. In practical applications, the power line acquisition card 10 has a power-on self-test function. Before responding to corresponding commands after power-on, the power line acquisition card 10 can automatically detect whether it is communicating with the host computer 30 and whether it is physically connected to the power line 20 under test, and send the connection detection results to the host computer 30, instructing the host computer 30 to output and display the connection detection results.

[0052] Clock circuit 13 is used to generate time data. Exemplarily, clock circuit 13 includes a crystal oscillator unit, a counting unit, and a clock unit. The signal output terminal of the crystal oscillator unit can be electrically connected to the clock signal input terminal of the counting unit, and can be used to provide a reference clock pulse for the counting unit. The crystal oscillator unit can be a passive or active crystal oscillator, selected according to the actual application scenario. The crystal oscillator unit can output a pulse signal of a fixed frequency through its internal resonance characteristics. Its frequency stability directly determines the time measurement accuracy of clock circuit 13, and can be set according to the clock accuracy requirements of power line acquisition card 10, ensuring the accuracy of time calculations by subsequent counting and clock units. The data output terminal of the counting unit is electrically connected to the counting signal input terminal of the clock unit, and can be used to accumulate and count the reference clock pulses output by the crystal oscillator unit, and transmit the accumulated pulse count data to the clock unit. The counting unit may include a counter. The control signal input terminal of the clock unit is electrically connected to the clock control output terminal of the control circuit 15, and the time data output terminal of the clock unit is electrically connected to the data input terminal of the control circuit 15. This allows the clock unit to trigger a counting and reading operation of the counting unit after receiving a delay test command from the control circuit 15, obtaining the pulse count value at the corresponding moment, converting the pulse count value of the counting unit into transmission time data in a preset format, and responding to the command from the control circuit 15 to generate and output the time data. The clock unit may include a clock chip.

[0053] The transceiver circuit 14 is connected to the power line interface 11. The transceiver circuit 14 supports the transmission and reception of signals. It supports signal transmission processing for transmission via the power line 20 to other power line acquisition cards 10; that is, the power line acquisition card 10 can inject signals into the power line 20 through the transceiver circuit 14. The transceiver circuit 14 also supports the reception processing of signals transmitted by other power line acquisition cards 10 via the power line 20. These signals may include detection signals, which can be high-frequency broadband modulated pulses.

[0054] The control circuit 15 is connected to the communication circuit 12, the transceiver circuit 14, and the clock circuit 13, respectively. The control circuit 15 is used to configure the power line acquisition card 10 as a transmitter card according to the transmission configuration command issued by the host computer 30. The transmission configuration command may carry a transmission identifier. The transmission configuration command is used to instruct the control circuit 15 to configure the power line acquisition card 10 as a transmitter card. A transmitter card can be understood as a signal injection device, that is, a device that injects pulse signals into the power line 20. In some other embodiments, the power line acquisition card 10 can also be used as a receiver card, that is, to receive pulse signals sent by other power line acquisition cards 10 through the power line 20. For details, please refer to the relevant description below. The control circuit 15 includes, but is not limited to, MCU (Microcontroller Unit), FPGA (Field Programmable Gate Array), etc.

[0055] The control circuit 15 is also used to, when the power line acquisition card 10 is a transmitter card, control the transceiver circuit 14 to send detection signals to other power line acquisition cards 10 via the power line 20 according to the test instructions issued by the host computer 30, and control the clock circuit 13 to generate transmission time data. The test instructions are used to instruct the control circuit 15 to detect the power line 20. The test instructions may include fault detection instructions and / or delay detection instructions, wherein the fault detection instructions instruct the power line acquisition card 10 to perform fault detection on the power line 20, and the delay detection instructions instruct the power line acquisition card 10 to perform delay detection. The detection signals are used to detect the fault condition of the power line 20 and / or the delay condition of the power line acquisition card 10. The transmission time data is used to represent the time of sending the detection signal. In some embodiments, the detection signal may carry transmission time data. In other embodiments, the detection signal may not carry transmission time data. When the power line acquisition card 10 is a transmitting card, other power line acquisition cards 10 among the multiple power line acquisitions 20 connected to it are configured as receiving cards. The specific configuration process is detailed in the following description. For example, the power line acquisition cards 10 connected to the power line 20 include A1, A2, and A3, where power line acquisition card A1 is a transmitting card, and power line acquisition cards A2 and A3 are both receiving cards.

[0056] The communication circuit 12 is also used to report the transmitted detection signals and transmission time data to the host computer 30 to determine the fault detection result of the power line 20. The fault detection result includes, but is not limited to, the real-time status of the power line 20, whether it is faulty, the fault location, and the fault type. The detection signals and transmission time data can be used to determine the fault detection result of the power line 20. In the application, the signals used to determine the fault detection result include the detection signals and transmission time data transmitted by the transmitting card, and may also include the detection signals and reception time data received by each receiving card. The transmission time data can also be used to determine the delay test result of each power line acquisition card 10. In the application, the data used to determine the delay test result includes the transmission time data, and may also include the reception time data of each receiving card receiving the detection signals. For example, the detection signals and transmission time data can also be used to determine the delay detection result of the power line acquisition card 10, which can be used to indicate whether the reference clock of the clock circuit 13 of the power line acquisition card 10 is synchronized with other power line acquisition cards 10. In the application, the fault detection result and the delay test result can be determined through the host computer 30 and / or the cloud platform 40. The cloud platform 40 can receive signals and data sent by the host computer 30 for detection.

[0057] In the application, when the power line acquisition card 10 is a transmitting card, the control circuit 15 can also be used to control the transceiver circuit 14 to receive the fault test signal after sending the detection signal. The fault test signal can be understood as the signal reflected back from the fault point by the detection signal sent by the power line acquisition card 10. If there is a fault point in the line, the transceiver circuit 14 can receive the fault test signal, and can report the fault test signal to the host computer 30 through the communication module.

[0058] The power line acquisition card 10 provided in this application embodiment, through a modular design integrating a power line interface 11, a communication circuit 12, a clock circuit 13, a transceiver circuit 14, and a control circuit 15, achieves flexible configuration of the transmitting and receiving cards based on instructions from the host computer 30. In the transmitting card mode, it can accurately send detection signals and generate accurate transmission time data through the clock circuit 13 and simultaneously report it to the host computer 30. In conjunction with the signal reception and data collaboration of other receiving cards, it not only realizes the integration and controllability of detection signal transmission and reception and time data acquisition, ensuring the accuracy of delay test results, but also improves the pertinence and reliability of power line 20 fault detection through the collaborative division of labor of multiple acquisition cards. It effectively supports the host computer 30 to quickly and accurately determine the fault status of power line 20 and the delay performance of each acquisition card, and optimizes the detection efficiency, data accuracy, and configuration flexibility of the power line detection system as a whole, meeting the core requirements of power line 20 detection for accuracy, collaboration, and controllability.

[0059] Compared to manual inspection, the power line acquisition card 10 provided in this embodiment integrates multiple modules to automate the transmission and reception of detection signals, acquisition of time data, and collaborative management with the host computer 30. This not only completely eliminates the reliance on labor costs for manual inspection and significantly improves the detection efficiency of 20 long-distance, multi-branch power lines (eliminating the need for manual segment-by-segment inspection, achieving rapid inspection of the entire line through multi-card collaboration), but also avoids problems such as missed detection of hidden faults and misjudgment of fault locations caused by reliance on experience-based judgment in manual inspection through the precise timing of the clock circuit 13 and the standardized transmission of detection signals. This significantly improves the accuracy of latency testing and fault detection. Simultaneously, the solution eliminates the need for manual entry into hazardous working environments such as high altitudes and remote areas, fundamentally reducing the safety risks of inspection operations. Furthermore, it can receive and report data in real time via a host computer, enabling rapid fault response and early warning. This addresses the pain points of insufficient real-time performance and delayed fault handling in manual periodic inspections. Overall, it exhibits disruptive advantages in detection efficiency, data accuracy, operational safety, maintenance costs, and real-time response capabilities, fully meeting the core needs of power line inspection's transformation towards automation, precision, safety, and efficiency.

[0060] In some embodiments, the control circuit 15 is further configured to configure the power line acquisition card 10 as a receiving card according to a receiving configuration instruction issued by the host computer 30. The receiving configuration instruction may carry a receiving identifier. The receiving configuration instruction is used to instruct the control circuit 15 to configure the power line acquisition card 10 as a receiving card. The receiving card can be understood as a signal receiving device, that is, receiving pulse signals injected by the transmitting card through the power line 20. For example, in the aforementioned example, the power line acquisition card 10 connected to the power line 20 includes A1, A2, and A3. Power line acquisition card A1 can also be a receiving card, and one of power line acquisition cards A2 and A3 can be a transmitting card and the other a receiving card.

[0061] The control circuit 15 is also used to control the transceiver circuit 14 to receive the detection signal sent by the transmitting card through the power line 20 when the power line acquisition card 10 is a receiving card, and to control the clock circuit 13 to generate reception time data. The reception time data represents the time of receiving the detection signal. When the power line acquisition card 10 is a receiving card, one of the other power line acquisition cards 10 is a transmitting card, and the remaining power lines 20 are used as receiving cards. In some other embodiments, when the power line acquisition card 10 is a receiving card, the control circuit 15 can control the transceiver circuit 14 to receive the detection signal according to the test command issued by the host computer 30.

[0062] The communication circuit 12 is also used to report the received detection signals and reception time data to the host computer 30 to determine the fault detection result of the power line 20. Taking the power line acquisition card 10, which includes A1 and A2, as an example, in one detection process, power line acquisition card A1 is configured as a transmitting card and power line acquisition card A2 is configured as a receiving card. Power line acquisition card A1 injects a detection signal into the power line 20, and power line acquisition card A2 receives the detection signal injected by A1. Thus, power line acquisition card A1 reports its own transmitted detection signal and corresponding transmission time data to the host computer 30, and power line acquisition card A2 reports the received detection signal and corresponding reception time data to the host computer 30. Therefore, the host computer 30 can determine the fault detection result of the power line 20 based on the detection signals and time data reported by the two acquisition cards.

[0063] The host computer 30 can determine the fault detection result of the power line 20 using the time-delay ranging method. It is understood that the transmission speed of signals (such as high-frequency carrier waves and pulse signals) in the power line 20 is determined by the line characteristics (conductor material, distributed capacitance, inductance). Under normal conditions where the line is uniform, without impedance abrupt changes, and without strong external interference, the signal transmission speed can be considered a stable value. Therefore, based on the distance between each power line acquisition card 10 and the signal transmission speed, the ideal signal delay between the transmitting card and the receiving card can be obtained. This signal delay can be calibrated after actual measurement. Based on this, in application, the time when the transmitting card sends the detection signal (transmission time T0) can be determined based on the transmission time data, and the time when the receiving card receives the detection signal (reception time T1) can be determined based on the reception time data. Thus, the actual time delay between reception time T1 and transmission time T0 can be obtained. If the line is normal, i.e., power line 20 is fault-free, the deviation between the actual and ideal time delays can be controlled within a very small range. Therefore, if the deviation between the actual and ideal time delays is less than a preset threshold, power line 20 can be identified as normal. If the deviation exceeds the preset threshold, it indicates that the line condition has disrupted the uniform transmission conditions, and power line 20 has a fault point. The fault point (such as short circuit, open circuit, insulation aging, etc.) causes impedance changes, leading to signal transmission changes. In this case, power line 20 can be identified as faulty. In application, the host computer 30 can also perform fault detection based solely on the detection signals reported by the transceiver, for example, based on the frequency, phase, spectrum, and other characteristics of the detection signals. Furthermore, the host computer 30 can also use other preset algorithms to perform fault detection, such as multi-point cross-validation, etc., without further limitations. Further, the host computer 30 can locate the fault location and identify the fault type based on the detection signals and time data reported by each power line acquisition card 10. Specific settings can be configured according to detection requirements, without further limitations.

[0064] In the application, all power line acquisition cards 10 can be configured as transmitters in turn, meaning each power line acquisition card 10 is designated to send a detection signal at one time. Taking power line acquisition cards A1 and A2 as examples, power line acquisition card A1 is configured as a transmitter and power line acquisition card A2 is configured as a receiver for fault detection. After completing one detection, power line acquisition card A2 is configured as a transmitter and power line acquisition card A1 is configured as a receiver for a second detection. Since multiple power line acquisition cards 10 are distributed at different locations on the power line 20, when they take turns as transmitters, each transmitter can cover a certain range of the line section around it (the signal strength near the transmitter is high and the anti-interference ability is strong). Through the segmented coverage and superposition complementarity of multiple transmitters, full-line detection without blind spots is achieved, avoiding fault omissions caused by insufficient coverage of a single transmitter.

[0065] In some embodiments, the control circuit 15 is further configured to control the clock circuit 13 to perform clock calibration processing according to a clock calibration command issued by the host computer 30. The clock calibration command is sent based on transmission time data and reception time data reported by other power line acquisition cards 10, where the reception time data indicates the time when the other power line acquisition cards 10 receive the detection signal. The clock calibration command may include compensation parameters. The compensation parameters include at least one of phase compensation parameters and frequency compensation parameters. The clock circuit 13 can perform clock calibration (including phase calibration and / or frequency calibration) according to these compensation parameters. Exemplarily, the clock circuit 13 may also include a calibration unit, which can perform clock calibration under the control of the control circuit 15.

[0066] In the application, the host computer 30 and / or cloud platform 40 can determine the clock synchronization detection results of each power line acquisition card 10 based on the transmission time data reported by the transmitter card and the reception time data reported by the receiver card. If the clock synchronization detection results of at least one power line acquisition card 10 are out of sync, the host computer 30 can send a clock calibration command to the out-of-sync power line acquisition card 10, thereby instructing the power line acquisition card 10 to perform clock calibration processing through the clock circuit 13, and thus achieve multi-card clock synchronization calibration.

[0067] In this implementation, the control circuit 15 responds to the clock calibration command from the host computer 30, driving the clock circuit 13 to perform precise calibration processing. This effectively unifies the time reference of each power line acquisition card 10, ensuring that the clocks of the transmitting and receiving cards remain highly synchronized. This provides a reliable time reference for subsequent core detection tasks such as delay calculation and fault location, avoiding detection errors caused by clock deviations and improving the detection accuracy of the power line 20. Simultaneously, it can dynamically compensate for clock drift caused by environmental changes and hardware operation, ensuring long-term stable clock operation and improving the overall accuracy and reliability of the detection system. Furthermore, centralized calibration is achieved by issuing unified commands from the host computer 30, simplifying the control logic for multi-acquisition card collaboration, enhancing the standardization and flexibility of system clock management, and adapting to the stringent time synchronization requirements of power line 20 detection scenarios.

[0068] In some embodiments, when the power line acquisition card 10 is a transmitting card, the control circuit 15 is further configured to control the clock circuit 13 to generate a trigger signal according to the test command issued by the host computer 30, and control the transceiver circuit 14 to sequentially send trigger signals and detection signals to other power line acquisition cards 10. The trigger signal is used to instruct other power line acquisition cards 10 to enter the receiving state to receive the detection signal. The trigger signal can be a pulse signal. In applications, the receiving card can, upon triggering by the trigger signal, immediately start the receiving circuit, clock circuit 13, and other related circuits through the control circuit 15 to complete hardware warm-up, avoiding signal loss or sampling distortion due to hardware incompatibility when the detection signal arrives. The trigger signal can also carry configuration information of the detection signal, such as signal frequency, modulation method, amplitude range, etc. In applications, the transmitting card can embed the configuration information of the detection signal into the trigger signal through encoding. After parsing, the receiving card can automatically adjust the receiving parameters, thereby ensuring accurate matching between the detection signal and the receiving channel, significantly reducing the probability of false reception due to parameter mismatch.

[0069] The transmission time interval between the trigger signal and the detection signal is a preset time interval. The preset time interval represents the time interval between the transmitter card sending the trigger signal and the detection signal sequentially. It can be set according to actual conditions, such as the preparation time for the receiver card to enter the receiving state. For example, it can be 1μm, 10μm, 100μm, 1ms, or other suitable values. In application, the transmitter card can first inject a trigger signal into the power line 20, and then inject a detection signal into the power line 20 after the preset time interval. After receiving the trigger signal through the power line 20, the receiver card can complete initialization and other preparation processes to enter the receiving state, and then receive the detection signal through the power line 20.

[0070] In this embodiment, by co-injecting the trigger signal and the detection signal, the receiving card can complete wake-up, parameter configuration, and initialization preparation in advance before the detection signal arrives, ensuring accurate reception of the detection signal in the best state and avoiding signal loss or distortion due to hardware incompatibility. At the same time, the trigger signal is used as a time reference anchor point to achieve accurate synchronization between the transmitting and receiving ends, providing a reliable time reference for subsequent delay calculation and fault location, reducing the impact of synchronization deviation. In addition, the trigger signal can also guide the receiving card to switch to anti-interference reception mode in advance, effectively distinguishing between interference signals and valid detection signals, improving the system's anti-interference capability, reducing the probability of misjudgment, and eliminating the need for the host computer 30 to separately schedule each receiving card, simplifying the system control logic. It also supports low-power deployment of the receiving card, adapting to complex power line scenarios such as long distances and multiple branches 20, and comprehensively improving the reliability, flexibility, and adaptability of the detection system.

[0071] In some embodiments, the transceiver circuit 14 includes a transmitting module 141, a receiving module 142, and a path switching module 143. The transmitting module 141 is connected to the control circuit 15 and is used to support signal transmission processing to send a detection signal. The transmission processing includes, but is not limited to, digital-to-analog conversion, power amplification, filtering, and signal modulation. In application, the transmitting module 141 can process signals from the control circuit 15 to inject a detection signal into the power line 20.

[0072] The receiving module 142 is connected to the control circuit 15. The receiving module 142 supports signal reception and processing to receive detection signals. This reception processing includes, but is not limited to, low-noise amplification, filtering, signal demodulation, analog-to-digital conversion, and amplitude limiting. In application, the receiving module 142 can receive and process detection signals from the power line 20 and send them to the control circuit 15.

[0073] The path switching module 143 is connected to the transmitting module 141, the receiving module 142, the power line interface 11, and the control circuit 15, respectively. Under the control of the control circuit 15, the path switching module 143 selects and connects the transmitting module 141 and the receiving module 142 to the power line interface 11. When the power line acquisition card 10 is a transmitting card, the control circuit 15 can control the path switching module 143 to connect the transmitting path between the transmitting module 141 and the power line interface 11 to send a detection signal to the power line 20. When the power line acquisition card 10 is a receiving card, the control circuit 15 can control the path switching module 143 to connect the receiving path between the receiving module 142 and the power line interface 11 to receive the detection signal from the power line 20. The path switching module 143 includes, but is not limited to, a radio frequency switch such as an SPDT (Single Pole Double Throw) switch, or multiple radio frequency switches such as two SPST switches.

[0074] In this embodiment, the transmitting module 141 supports signal transmission processing to send detection signals, and the receiving module 142 supports signal reception processing to receive detection signals. The path switching module 143 selects the pathways between the transmitting module 141 and the receiving module 142 and the power line interface 11, respectively. Thus, by flexibly selecting the pathway between the transmitting module 141 or the receiving module 142 and the power line interface 11 through the path switching module 143, orderly switching between transmission and reception functions can be achieved, effectively avoiding mutual interference between transmitted and received signals, and ensuring stable transmission and accurate reception of detection signals. Simultaneously, the connection between the receiving module 142 and the power line interface 11 can be disconnected during transmission, preventing damage to the receiving module 142 from the high power of the transmitted signal and extending the hardware lifespan. Furthermore, there is no need to separately configure the power line interface 11 for transmission and reception functions, simplifying the hardware structure design of the acquisition card, reducing equipment complexity, and enabling rapid adaptation to alternating transmission and reception of detection signals, improving the orderly operation and reliability of the system, and providing hardware support for the efficient implementation of power line 20 fault detection.

[0075] In some embodiments, the transmitting module 141 includes a digital-to-analog converter (DAC) unit 1411 and a transmitting unit 1412. The DAC unit 1411 is connected to the control circuit 15. The DAC unit 1411 is used to support digital-to-analog conversion of signals from the control circuit 15. The DAC unit 1411 may include an analog-to-digital converter (ADC). For example, the DAC unit 1411 may use a high-precision DAC to transmit wideband pulse signals, ensuring that the transmitted signal amplitude is not less than 1.5V.

[0076] The transmitting unit 1412 is connected to both the digital-to-analog converter unit 1411 and the path switching module 143. The transmitting unit 1412 supports the transmission processing of the digital-to-analog converted signal to send a detection signal. The transmitting unit 1412 includes, but is not limited to, a power amplifier, a filter, a transmission matching network, and a coupler. The power amplifier supports power amplification of the signal. The filter supports filtering of the signal. The transmission matching network may include at least one integrated device selected from capacitors, inductors, and resistors, and can be used to achieve impedance matching between the transmitting card and the power line 20. The coupler can be used to couple the transmitted signal to achieve power detection of the transmitted signal, thereby enabling adjustment of the transmission power to obtain higher transmission efficiency.

[0077] In this embodiment, the digital signal output by the control circuit 15 is accurately converted into an analog signal adapted to the transmission of the power line 20 by the digital-to-analog converter unit 1411. Then, the analog signal is processed by the transmitting unit 1412 for targeted transmission, realizing a seamless connection from digital control commands to effective detection signals. This ensures that the waveform, amplitude, and other characteristics of the detection signal are highly consistent with the preset requirements. The specialized processing of the transmitting unit 1412 enhances the transmission driving capability of the detection signal, making it better adapted to the transmission characteristics of the power line 20, resisting interference and attenuation during line transmission, and ensuring that the signal arrives stably at the receiving end. At the same time, the standardized conversion of digital signals to analog signals and the transmission processing work together to improve the controllability and reliability of the detection signal, providing a high-quality signal foundation for subsequent signal identification, delay calculation, and fault diagnosis at the receiving end. Moreover, this architecture is adaptable to the generation and transmission requirements of different types of detection signals, enhancing the flexibility and applicability of the system.

[0078] In some embodiments, the receiving module 142 includes a receiving unit 1421 and an analog-to-digital conversion unit 1422. The receiving unit 1421 is connected to the path switching module 143. The receiving unit 1421 is used to support the reception and processing of detection signals from the power line 20. The receiving unit 1421 includes, but is not limited to, a low-noise amplifier, a filter, and a receiver matching network. The low-noise amplifier is used to support low-noise amplification of the signal. The filter supports filtering of the signal. The receiver matching network may include at least one integrated device selected from capacitors, inductors, and resistors, and can be used to achieve impedance matching between the receiving card and the power line 20.

[0079] The analog-to-digital conversion unit 1422 is connected to both the receiving unit 1421 and the control circuit 15. The analog-to-digital conversion unit 1422 supports analog-to-digital conversion of the detection signal from the receiving unit 1421 and sends the converted detection signal to the control circuit 15. The analog-to-digital conversion unit 1422 may include an analog-to-digital converter (DAC). For example, the digital-to-analog conversion unit 1411 may use an independent parallel dual-channel 14-bit high-precision ADC with a received signal resolution of less than 0.5mV and a sampling rate of not less than 250MSPS.

[0080] In this embodiment, the receiving unit 1421 performs targeted reception processing on the detection signal transmitted by the power line 20, which can effectively optimize the signal quality, resist interference and attenuation during line transmission, and provide a stable and pure signal source for subsequent analog-to-digital conversion. The analog-to-digital conversion unit 1422 accurately converts the pre-processed analog detection signal into a digital signal and transmits it to the control circuit 15. This not only meets the digital signal processing requirements of the control circuit 15, facilitating subsequent operations such as signal feature extraction, data calculation and storage, but also reduces distortion during signal transmission and ensures that the line status information carried by the detection signal is completely preserved. The overall process forms a closed-loop processing from signal reception, optimization to digital conversion, which significantly improves the reliability and processability of the detection signal, provides high-quality data support for the control circuit 15 to accurately analyze the line status and for the host computer 30 to determine the fault result, and enhances the system's adaptability and detection stability to the complex power line 20 environment.

[0081] In some embodiments, the power line acquisition card 10 further includes a status detection circuit 16. The status detection circuit 16 is connected to both the power line interface 11 and the transceiver circuit 14. The status detection circuit 16 is used to detect the line status of the power line 20 through the power line interface 11 and control the on / off state between the power line interface 11 and the transceiver circuit 14 according to the line status. The line status includes, but is not limited to, the connection status between the power line acquisition card 10 and the power line 20, and the energized state of the power line 20. For example, the line status includes a positive connection energized state, a positive connection non-energized state, a reverse connection energized state, and a reverse connection non-energized state. Exemplarily, the status detection circuit 16 may include a detection module, a sensing module, and a switching module. The detection module includes, but is not limited to, a high-impedance probe or a coupling induction device, and can acquire status parameters such as voltage, current, or frequency of the power line 20. The sensing module can determine the line status of the power line 20 based on the status parameters acquired by the detection module and control the on / off state of the switching module according to the line status. The detection module includes, but is not limited to, MCUs, FPGAs, etc. The detection module can be integrated with the aforementioned control circuit 15 into the same device, or it can be a separate device; no further limitations are imposed here. The switch module can be connected to the detection module, the power line interface 11, and the transceiver circuit 14 respectively, and can control the on / off state between the power line interface 11 and the transceiver circuit 14 under the control of the detection module. The switch module includes, but is not limited to, SPST switches. This switch module can be integrated with the aforementioned path switching module 143 into the same device, or it can be a separate device; no further limitations are imposed here.

[0082] In applications, the connection / disconnection status between the power line interface 11 and the transceiver circuit 14 can be flexibly controlled according to the line status and actual detection scenario. For example, in a detection scenario where the line is positively connected and energized, the status detection circuit 16 can be controlled by the control circuit 15 to open the path between the power line interface 11 and the transceiver circuit 14 for power line 20 detection. In non-detection scenarios and / or abnormal energized states, where non-detection scenarios include, but are not limited to, scenarios where the power line acquisition card 10 is under maintenance, incorrectly connected, or the equipment is not ready, and abnormal energized states include positively connected but not energized, reverse connected but not energized, and reverse connected but not energized, the path between the power line interface 11 and the transceiver circuit 14 can be disconnected. This ensures the safety of signal acquisition and access operations, avoids accidental contact or damage to the equipment, and improves detection safety and reliability.

[0083] In some embodiments, the power line acquisition card 10 further includes a surge protection circuit 17. The surge protection circuit 17 is connected to both the power line interface 11 and the transceiver circuit 14. In the event of a transient surge on the power line 20 side, the surge protection circuit 17 disconnects the transceiver path between the power line interface 11 and the transceiver circuit 14, and opens the discharge path between the power line interface 11 and the ground wire in the power line 20, so as to discharge the surge current to the ground wire through the discharge path. In the absence of a transient surge on the power line 20 side, the surge protection circuit 17 opens the transceiver path between the power line interface 11 and the transceiver circuit 14, and operates in a high-impedance state.

[0084] In application, under normal conditions (i.e., no transient surge occurs on the power line 20 side), the surge protection circuit 17 is in a high-impedance state, which does not affect signal acquisition. However, when a transient surge occurs on the power line 20 side, the surge protection circuit 17 responds quickly and operates in stages, diverting the surge current to the ground wire through a discharge path to prevent overvoltage from impacting subsequent circuits. Thus, the surge protection circuit protects the power line acquisition card 10 from damage caused by high-energy transient ultra-high voltage (i.e., overvoltage, such as high-voltage surges caused by lightning strikes or power grid switch operations), improving the reliability and safety of the power line acquisition card 10.

[0085] In some embodiments, the power acquisition card further includes a power supply circuit 18, which includes a power interface 181, an AC-DC conversion module 182, a power management module 183, and an isolation module 184. The power interface 181 is used to connect to an external power source and can be used for electrical signals provided by the external power source, including but not limited to AC and DC signals. When the external power source provides AC power, the power interface 181 can be a power line interface 11, directly supplied with AC power by the power line 20. When the external power source provides DC power, the power interface 181 is independent of the power line interface 11, and DC power is supplied by an external DC power source.

[0086] The AC-DC converter module 182 is connected to the power interface 181. The AC-DC converter module 182 is used to convert AC power supplied by an external power source into DC power.

[0087] The power management module 183 is connected to the communication circuit 12, clock circuit 13, transceiver circuit 14, and control circuit 15, respectively. The power management module 183 provides a power supply voltage based on DC power, enabling each circuit to operate normally under the supplied voltage. The power supply voltage for each circuit can be the same or different, depending on the circuit structure, and is not limited here. The power management module 183 can also store DC power. For example, the power management module 183 may include a battery and a power management chip. The battery can store DC power and can be charged and discharged. For example, the battery can be a 3000mAh lithium battery, capable of supporting continuous operation of the power line acquisition card 10 for at least 1 hour. The power management chip converts the DC power provided by the battery into the required power supply voltage for each circuit and outputs it to the corresponding circuit.

[0088] The isolation module 184 is connected to both the AC-DC conversion module 182 and the power management module 183. The isolation module 184 provides electrical isolation between the AC-DC conversion module 182 and the power management module 183. This effectively blocks electromagnetic interference, voltage fluctuations, and high-voltage risks from the external power supply side from being transmitted to the power management module 183, preventing interference from affecting the stability and purity of the power supply. Simultaneously, it isolates the internal low-voltage power supply system (such as the battery and power management chip) and subsequent functional circuits (communication, control, and clock circuits 13, etc.) of the data acquisition card from external high voltage, preventing equipment damage caused by high-voltage breakdown or interference, and ensuring the overall power safety and operational stability of the power supply system and the data acquisition card.

[0089] In this embodiment, the power supply circuit 18 is compatible with various types of external electrical signals through the power interface 181, adapting to different power supply scenarios and greatly improving the deployment flexibility of the acquisition card; the AC-DC conversion module 182 can accurately convert external AC power into DC power, meeting the unified power supply requirements of subsequent circuits and solving the adaptation problem of different power types; the power management module 183 can provide an appropriate power supply voltage according to the working requirements of each functional circuit, and supports the DC power storage function, ensuring that the acquisition card can continue to work when the external power supply is interrupted or abnormal, significantly enhancing the reliability of power supply; the isolation module 184 effectively blocks interference and high voltage risks from the external power supply side, ensuring the purity of the power supply system and the power safety of the internal circuits, and avoiding interference affecting the normal operation of each functional circuit; the overall architecture takes into account power supply compatibility, reliability, safety and flexibility, providing continuous, stable and adaptable power supply support for the core functions of the power line acquisition card 10 such as signal transmission and reception, data processing, and clock synchronization, ensuring that the acquisition card can still operate stably and reliably in complex power supply environments.

[0090] In some embodiments, the power line acquisition card 10 may further include a storage circuit 19, which is used to store instructions, signals (such as trigger signals and detection signals), and time data (including transmission time data and reception time data). The storage circuit 19 includes, but is not limited to, SRAM (Static Random Access Memory) and DDR (Double Data Rate Synchronous Dynamic Random Access Memory).

[0091] In some embodiments, such as Figure 1 As shown, a power line detection system is provided, including a power line 20, a host computer 30, and multiple power line acquisition cards 10. The power line acquisition cards 10 can be any of the power line acquisition cards 10 provided in the preceding embodiments, and can be used to transmit power under normal conditions. In this application, the power line acquisition cards 10 can be used at least to transmit detection signals. In some other embodiments, the power line acquisition cards 10 can be used to transmit both detection signals and trigger signals.

[0092] The host computer 30 can be used to issue transmission configuration commands and test commands. In some other embodiments, the host computer 30 can also be used to issue reception configuration commands.

[0093] Each power line acquisition card 10 is deployed at a different location on the power line 20. Each power line acquisition card 10 is used to connect to both the power line 20 and the host computer 30. The power line acquisition card 10 is configured as a transmitter according to the transmission configuration command, and sends detection signals to other power line acquisition cards 10 via the power line according to the test command, and reports the detection signals and transmission time data to the host computer 30 to determine the fault detection result of the power line 20; the transmission time data indicates the time when the detection signal was transmitted. For detailed descriptions, please refer to the foregoing descriptions, which will not be repeated here.

[0094] The host computer 30 can receive detection signals and time data (including transmission time data and reception time data) sent by the power line acquisition card 10, and determine the detection result of the power line 20. The host computer 30 can also be used to display the detection result. The host computer 30 can also send the detection signals and time data to the cloud platform 40 to complete the detection through the cloud platform 40. In some other embodiments, the power line detection system may also include a cloud platform 40, wherein the cloud platform 40 is connected to the host computer 30, and the cloud platform 40 can receive signals and data sent by the host computer 30, determine the detection result of the power line 20, and send the detection result to the host computer 30.

[0095] In some embodiments, a power line detection system is provided, which may include a power line 20, a host computer 30, and multiple power line acquisition cards 10. Each power line acquisition card 10 is deployed at different locations on the power line 20. Each power line acquisition card 10 includes a power line interface 11, a communication circuit 12, a transceiver circuit 14, a clock circuit 13, a control circuit 15, a status detection circuit 16, a surge protection circuit 17, and a power supply circuit 18.

[0096] Power line interface 11 connects to the live wire (L), neutral wire (N), and ground wire (PE) of power line 20, forming a transmission path from live wire L to ground wire PE, and also forming a transmission path from neutral wire N to ground wire PE. Power line interface 11 is directly connected to the power line under test 20, and can be used to inject detection pulses and to collect pulse signals sent by other nodes on power line 20. The reference ground wire for all transmitted or received signals is the PE line, and signal transmission or reception is conducted via the L line and N line respectively. That is, the test has two transmission lines: L-PE and N-PE.

[0097] The communication circuit 12 includes a wireless communication module, which includes a Wi-Fi chip. The communication circuit 12 is capable of wirelessly transmitting data and control commands to the host computer 30.

[0098] The transceiver circuit 14 includes a transmitting module 141, a receiving module 142, and a path switching module 143. The transmitting module 141 includes a digital-to-analog converter (DAC) unit 1411 and a transmitting unit 1412. The receiving module 142 includes a receiving unit 1421 and an analog-to-digital converter (ADC) unit 1422. The DAC unit 1411 includes a DAC. The DAC can be a high-precision DAC used to generate pulse signals, i.e., converting waveform data from the control circuit 15 to transmit broadband pulse signals, ensuring the transmitted signal amplitude is not less than 1.5V. The transmitting unit 1412 includes, but is not limited to, a power amplifier, a filter, a transmit matching network, and a coupler. The transmitting unit 1412 can appropriately amplify and filter the transmitted pulse signal before transmitting it to the power line interface 11 via the matching network. The receiving unit 1421 includes, but is not limited to, a low-noise amplifier, a filter, and a receive matching network. The receiving unit 1421 can limit the received signal before transmitting it to the ADC unit 1422 via the matching network. The ADC unit 1422 includes an analog-to-digital converter (ADC). The ADC is used to acquire pulse signals (from L-PE or N-PE lines) from the receiving unit 1421 and then send them to the control circuit 15. The ADC can use an independent parallel dual-channel 14-bit high-precision ADC with a received signal resolution of less than 0.5mV and a sampling rate of not less than 250MSPS. When acting as a transmitting detection pulse signal node, i.e., when the power line acquisition card 10 is a transmitting card, the path switching module 143 can connect the path between the transmitting module 141 and the control circuit 15 (in this case, the path between the receiving module 142 and the control circuit 15 can be kept open); when acting as a receiving node, i.e., when the power line acquisition card 10 is a receiving card, the path switching module 143 can disconnect the path between the transmitting module 141 and the control circuit 15, and the ADC synchronously receives pulse signals transmitted by other nodes.

[0099] The clock circuit 13 includes, but is not limited to, a crystal oscillator unit, a counting unit, a clock unit, and a calibration unit. The clock circuit 13 can be used to generate time data and ensure that the clock synchronization pulse edge error between different acquisition cards is within a preset error threshold, such as an error of less than 500 ns.

[0100] The control circuit 15 may include a controller and a memory, wherein the controller may be an FPGA and the memory may be DDR. The controller can integrate and logically control the functions of various parts of the acquisition card, and implement transmit / receive signal management, data buffering, timing control, digital matching / correlation algorithms, and handshake with Wi-Fi communication. It is responsible for issuing commands to the DAC / ADC configuration register and acquiring ADC data.

[0101] The power supply circuit 18 may include a power interface 181, an AC-DC conversion module 182, an isolation module 184, and a power management module 183. The power supply circuit 18 may have a built-in 3000mAh lithium battery, supporting at least 1 hour of continuous operation.

[0102] Surge protection circuit 17 can absorb high-energy surges and choke common-mode current at the coupling port to protect the equipment from high-voltage surge damage. Status detection circuit 16 can ensure real-time and rapid detection and blocking of high-voltage circuits to prevent damage from AC high-voltage surges caused by failure to disconnect when the equipment is connected to the power line 20.

[0103] In the application, all power line acquisition cards 10 can be configured as transmitter cards in turn, that is, all power line acquisition cards 10 are designated to send a detection signal once to realize the detection of power lines 20.

[0104] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0105] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0106] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A power line acquisition card for a power line detection system, characterized in that, The power line acquisition card is used in a power line detection system, and the power line detection system includes a power line, a host computer, and multiple power line acquisition cards; each power line acquisition card is deployed at a different location on the power line; the power line acquisition card includes: A power line interface for connecting to the power line; Communication circuitry for connecting to the host computer; Clock circuit, used to generate time data; A transceiver circuit, connected to the power line interface, is used to support the transmission and reception of signals; A control circuit, connected to the communication circuit, the transceiver circuit, and the clock circuit, is used to configure the power line acquisition card as a transmitter card according to the transmission configuration command issued by the host computer, control the transceiver circuit to send detection signals to other power line acquisition cards through the power line according to the test command issued by the host computer, and control the clock circuit to generate transmission time data; the transmission time data is used to represent the time of sending the detection signal; other power line acquisition cards are configured as receiver cards. The communication circuit is also used to report the detection signal and the transmission time data to the host computer in order to determine the fault detection result of the power line; The control circuit is also used to configure the power line acquisition card as a receiving card according to the receiving configuration instruction issued by the host computer, control the transceiver circuit to receive the detection signal sent by the transmitting card through the power line, and control the clock circuit to generate receiving time data; the receiving time data is used to represent the time of receiving the detection signal; one of the other power line acquisition cards is a transmitting card, and the remaining power line acquisition cards are receiving cards; The communication circuit is also used to report the received detection signal and the receiving time data to the host computer in order to determine the fault detection result of the power line; The control circuit is also used to, when the power line acquisition card is a transmitting card, control the clock circuit to generate a trigger signal according to the test command issued by the host computer, and control the transceiver circuit to send the trigger signal and the detection signal to other power line acquisition cards in sequence; the trigger signal is used to instruct other power line acquisition cards to enter the receiving state to receive the detection signal; the transmission time interval between the trigger signal and the detection signal is a preset time interval.

2. The power line acquisition card according to claim 1, characterized in that, The control circuit is also used to control the clock circuit to perform clock calibration processing according to the clock calibration command issued by the host computer; wherein, the clock calibration command is sent according to the transmission time data and the reception time data reported by other power line acquisition cards, and the reception time data is used to indicate the time when other power line acquisition cards receive the detection signal.

3. The power line acquisition card according to claim 1, characterized in that, The transceiver circuit includes: A transmitting module, connected to the control circuit, is used to support the transmission processing of signals in order to send the detection signal; A receiving module, connected to the control circuit, is used to support the receiving and processing of signals in order to receive the detection signal; The path switching module is connected to the transmitting module, the receiving module, the power line interface, and the control circuit, respectively, and is used to select and connect the paths between the transmitting module and the receiving module and the power line interface, respectively, under the control of the control circuit.

4. The power line acquisition card according to claim 3, characterized in that, The transmitting module includes: a digital-to-analog converter unit connected to the control circuit, used to support digital-to-analog conversion of signals from the control circuit; and a transmitting unit connected to both the digital-to-analog converter unit and the path switching module, used to support transmitting the digital-to-analog converted signals to send the detection signal. The receiving module includes: a receiving unit connected to the path switching module, used to support the receiving and processing of detection signals from the power line; and an analog-to-digital conversion unit connected to the receiving unit and the control circuit, used to support the analog-to-digital conversion of the detection signals from the receiving unit and to send the analog-to-digital converted detection signals to the control circuit.

5. The power line acquisition card according to claim 1, characterized in that, The power line acquisition card also includes: A status detection circuit, connected to the power line interface and the transceiver circuit, is used to detect the line status of the power line through the power line interface and control the on / off state between the power line interface and the transceiver circuit according to the line status.

6. The power line acquisition card according to claim 1, characterized in that, The power line acquisition card also includes: A surge protection circuit is connected to the power line interface and the transceiver circuit respectively. In the event of a transient surge on the power line side, it disconnects the transceiver path between the power line interface and the transceiver circuit, and opens the discharge path between the power line interface and the ground wire in the power line, so as to discharge the surge current to the ground wire through the discharge path.

7. The power line acquisition card according to claim 1, characterized in that, The power line acquisition card also includes a power supply circuit, which includes: Power interface, used for connecting to an external power source; An AC-DC conversion module, connected to the power interface, is used to convert AC power supplied by the external power source into DC power. The power supply management module, connected to the communication circuit, the clock circuit, the transceiver circuit, and the control circuit respectively, is used to provide a power supply voltage based on the DC power. An isolation module is connected to both the AC-DC conversion module and the power supply management module to support electrical isolation between them.

8. A power line detection system, characterized in that, include: Power lines, at least for transmitting detection signals; The host computer is used at least to issue launch configuration commands and test commands; Multiple power line acquisition cards as described in any one of claims 1-7, each power line acquisition card being deployed at different locations on the power line; each power line acquisition card being used to connect to the power line and the host computer respectively; each power line acquisition card being configured as a transmitter card according to the transmission configuration instruction, and sending the detection signal to other power line acquisition cards through the power line according to the test instruction, and reporting the detection signal and transmission time data to the host computer to determine the fault detection result of the power line; the transmission time data being used to indicate the time of sending the detection signal.

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