A method for improving the edge roughness of a silicon wafer

Abstract

The application discloses a kind of edge polishing methods for improving the roughness of silicon wafer edge, which comprises the following steps: (1) the V-Notch of silicon wafer is aligned with the notch polishing cloth by parameter searching treatment; (2) the V-Notch of silicon wafer is polished; (3) the silicon wafer with completed V-Notch polishing is transported to Round1 processing platform for centering treatment, and the silicon wafer with completed centering treatment is subjected to one-stage rough polishing of round edge edge, the angle of polishing drum is 35-45°, 55-75°, 90°, and the polishing pressure is 30-60N; (4) the silicon wafer with completed one-stage rough polishing of round edge edge is transported to Round2 processing platform by mechanical hand for centering treatment, and the silicon wafer with completed centering treatment is subjected to two-stage fine polishing of round edge edge, the angle of polishing drum is 25-35°, 45-65°, 90°, and the polishing pressure is 10-30N. The present application improves the round edge edge polishing process, further reduces the roughness of silicon wafer edge and improves the quality of silicon wafer edge on the basis of ensuring the removal of residual damage layer in the previous process.

Description

Technical Field

[0001] This invention relates to the field of silicon wafer processing technology, and in particular to an edge polishing method for improving the edge roughness of silicon wafers. Background Technology

[0002] As is well known, edge smoothness is a crucial characteristic parameter of single-crystal silicon wafers, the raw material for device manufacturing. With the mainstream integrated circuit process linewidths gradually entering the 28 / 14 nanometer era, higher demands are being placed on the edge quality of silicon wafers. Edge polishing, an essential process for 12-inch wafers, determines the roughness of the wafer edges. Excessively rough wafer edges can lead to residues of polishing slurry and cleaning chemicals, affecting the appearance quality.

[0003] Currently, edge polishing of 12-inch silicon wafers is mainly used to remove the damaged layer left over from previous processes, ultimately resulting in undamaged edges with low roughness and reducing the risk of particles adhering to the edges. Summary of the Invention

[0004] The purpose of this invention is to provide an edge polishing method to improve the edge roughness of silicon wafers, further optimizing the edge roughness of silicon wafers after round edge polishing in the prior art, thereby improving the yield of subsequent photolithography processes.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: An edge polishing method for improving the edge roughness of silicon wafers includes the following steps: (1) Perform parameter finding process on silicon wafer: use an edge polishing machine to find the V-Notch of the silicon wafer and align the V-Notch of the silicon wafer with the slot polishing cloth; (2) The silicon wafer that has completed parameter finding is transferred to the VN processing machine and the V-Notch of the silicon wafer is polished; (3) The silicon wafers that have completed V-Notch polishing are transported to the Round 1 processing machine for centering. The silicon wafers that have completed centering are then subjected to first-level rough polishing of the rounded edges. The polishing drum angles are 35-45°, 55-75°, and 90°, and the polishing pressure is 30-60N. (4) The silicon wafers that have completed the first-level rough polishing of the rounded edges are transported to the Round2 processing machine for centering. The silicon wafers that have completed the centering process are then subjected to the second-level fine polishing of the rounded edges. The polishing drums used have angles of 25-35°, 45-65°, and 90°, and the polishing pressure is 10-30N.

[0006] Furthermore, in step (1), the deviation between the V-Notch of the silicon wafer and the slot polishing cloth is controlled within 0.4 mm.

[0007] Furthermore, in step (2), the V-Notch polishing cloth used is a non-woven polishing cloth with a Shore hardness C of 80, a polishing pressure of 4-10 N, a rotation speed of 400-800 r / min, and a polishing time of 30-80 s.

[0008] Furthermore, in step (2), the polishing liquid used is a mixture of edge polishing stock solution and pure water in a ratio of 1:20, and the pH value is controlled within the range of 10-11; the composition of the edge polishing stock solution by mass percentage is: 27% silica particles and 73% pure water.

[0009] Furthermore, in step (3), the polishing cloth used on the polishing drum in Round 1 is a non-woven polishing cloth with a Shore hardness C of 70-100, a rotation speed of 100-400 r / min, and a polishing time of 60-180 s.

[0010] Furthermore, in step (3), the polishing liquid used is a mixture of edge polishing stock solution and pure water in a ratio of 1:20, and the pH value is controlled within the range of 10-11; the composition of the edge polishing stock solution by mass percentage is: 27% silica particles and 73% pure water.

[0011] Furthermore, in steps (3) and (4), the deviation between the center of the silicon wafer and the center of the machine is controlled within 0.2 mm.

[0012] Furthermore, in step (4), the polishing cloth used on the Round 2 polishing drum is a non-woven polishing cloth with a Shore hardness C of 50-70, a rotation speed of 100-400 r / min, and a polishing time of 60-180 s.

[0013] Furthermore, in step (4), the polishing liquid used is a mixture of edge polishing stock solution and pure water in a ratio of 1:20, and the pH value is controlled within the range of 10-11; the composition of the edge polishing stock solution by mass percentage is: 13% silica particles and 87% pure water.

[0014] The advantages of this invention are: This invention provides an edge polishing method to improve the roughness of silicon wafer edges. By improving the rounded edge polishing process, it changes the traditional method of using the same process on both Round processing stages. Instead, it uses a first-stage rough polishing process in Round 1 and a second-stage fine polishing process in Round 2, further reducing the roughness of the entire edge of the silicon wafer after removing the damaged layer. In the first-stage rough polishing stage, a larger polishing drum angle and higher polishing pressure are selected, resulting in a larger contact area between the polishing drum and the silicon wafer edge, quickly and uniformly removing the macroscopic damaged layer at the edge. In the second-stage fine polishing stage, a smaller polishing drum angle and lower polishing pressure are selected, resulting in a smaller contact area between the polishing drum and the silicon wafer edge, but creating a higher local pressure, which is more conducive to effectively removing the microscopic scratches left by the rough polishing.

[0015] This invention can effectively improve the edge quality of silicon wafers and improve the flatness of the silicon wafer edges, thereby reducing the defect rate caused by edge abnormalities in subsequent photolithography processes. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the edge polishing process in an embodiment of the present invention.

[0017] Figure 2 These are microscopic images (images) of the edge morphology of the silicon wafer before and after polishing in an embodiment of the present invention.

[0018] Figure 3 The image shows the edge morphology of the silicon wafer before and after polishing (microscopic photographs) in the comparative example. Detailed Implementation

[0019] The present invention will be further described below with reference to the accompanying drawings and embodiments, but this does not imply any limitation on the scope of protection of the present invention.

[0020] Example Experimental silicon wafer: 12-inch Czochralski lightly boron-doped silicon wafer, P-type, crystal orientation <100> , resistivity 8-12Ω·cm, thickness 775µm; quantity 24 pieces.

[0021] (1) Place the silicon wafer on the loading table of the edge polishing machine. The machine uses a robotic arm to transport the silicon wafer to the parameter-finding table to find the V-Notch of the silicon wafer, ensuring that the deviation between the V-Notch of the silicon wafer and the groove polishing cloth is controlled within 0.4mm.

[0022] (2) Transfer the silicon wafer that has completed step (1) to the VN processing machine for V-Notch polishing treatment. The polishing cloth used has a Shore C hardness of 80. The polishing liquid is formed by mixing the edge polishing stock solution (manufacturer: Fujimi, model: E308, composition: 27% silica gel particles and 73% pure water) with pure water at a ratio of 1:20, with the pH value controlled in the range of 10-11, the polishing pressure is 8N, the rotation speed is 600r / min, and the polishing time is 60s.

[0023] (3) Transfer the silicon wafer that has completed step (2) to the Round1 processing machine via a transfer manipulator to perform the first-stage rough polishing on the rounded edge of the silicon wafer. The angles of the polishing drum used are 41°, 70°, and 90°, and the polishing pressure is 50N. The polishing cloth used on the polishing drum has a Shore C hardness of 80. The polishing liquid is formed by mixing the edge polishing stock solution (manufacturer: Fujimi, model: E308, composition: 27% silica gel particles and 73% pure water) with pure water at a ratio of 1:20, with the pH value controlled in the range of 10-11, the polishing liquid flow rate is 1.5L / min, the rotation speed is 250r / min, and the polishing time is 120s.

[0024] (4) Transfer the silicon wafer that has completed step (3) to the Round2 processing machine via a transfer manipulator to perform the second-stage fine polishing on the rounded edge of the silicon wafer. The angles of the polishing drum used are 31.5°, 50°, and 90°, and the polishing pressure is 30N. The polishing cloth used on the polishing drum has a Shore C hardness of 60. The polishing liquid is formed by mixing the edge polishing stock solution (manufacturer: CMC Materials, model: EP4100, composition: 13% silica gel particles and 87% pure water) with pure water at a ratio of 1:20, with the pH value controlled in the range of 10-11, the polishing liquid flow rate is 1.5L / min, the rotation speed is 250r / min, and the polishing time is 120s.

[0025] After all 24 wafers have completed edge polishing, the silicon wafers are subjected to surface cleaning to dry the surfaces. A defect inspection apparatus (Optima RXM-1200FL) is used to detect whether there are damages or defects on the edge of the silicon wafers, and the test results are shown in Table 1.

[0026] Table 1 The test results show that there are no defects on the Edge of the products processed by the optimized edge polishing process, and all inspections are qualified (OK). At the same time, observation under a microscope shows that all the edge damage layers are removed, and the surface is relatively smooth, as Figure 2 shown in the figure.

[0027] Comparative Example Experimental silicon wafer: 12-inch Czochralski lightly boron-doped silicon wafer, P-type, crystal orientation <100> , resistivity 8-12Ω·cm, thickness 775µm, quantity 24 pieces.

[0028] (1) Place the silicon wafer on the loading table of the edge polishing machine. The machine uses a robotic arm to transport the silicon wafer to the parameter-finding table to find the V-Notch of the silicon wafer, ensuring that the deviation between the V-Notch of the silicon wafer and the groove polishing cloth is controlled within 0.4mm.

[0029] (2) The silicon wafer that has completed step (1) is transported to the VN processing machine for V-Notch polishing. The polishing cloth used has a Shore hardness of 80. The polishing liquid is made by mixing edge polishing stock solution (manufacturer Fujimi, model E308, composition: 27% silica particles and 73% pure water) and pure water in a ratio of 1:20. The pH value is controlled within the range of 10-11. The polishing pressure is 8N, the rotation speed is 600r / min, and the polishing time is 60s.

[0030] (3) The silicon wafers completed in step (2) are transported to the Round 1 processing machine via a transfer robot. The edges of the silicon wafers are polished. The polishing drums used have angles of 31.5°, 41°, and 90°, and the polishing pressure is 40N. The polishing cloth used on the polishing drum has a Shore hardness of 80. The polishing fluid is made by mixing edge polishing stock solution (manufacturer Fujimi, model E308, composition: 27% silica granules and 73% pure water) and pure water in a ratio of 1:20. The pH value is controlled within the range of 10-11. The flow rate of the polishing fluid is 1.5L / min, the rotation speed is 250r / min, and the polishing time is 120s.

[0031] (4) The silicon wafer that has completed step (3) is transported to the Round2 processing machine by a transfer robot, and the round edge of the silicon wafer is polished. The parameter settings are the same as in step (3).

[0032] After all 24 wafers were polished, the silicon wafers were cleaned and dried. A defect inspection instrument (Optima RXM-1200FL) was used to check for damage or defects on the edges of the silicon wafers. The test results are shown in Table 2.

[0033] Table 2 The test results show that the product edges processed using the traditional edge polishing process have no defects and all passed the inspection (OK). Microscopic observation also shows that the edge damage layer can be largely removed, but some minor, shallow damage may remain, such as... Figure 3 As shown.

[0034] After the silicon wafers used in the examples and comparative examples were tested for defects, the edge roughness Sa (nm) was tested using a zygo white light interferometer. The test results are shown in Table 3.

[0035] Table 3 By comparing the embodiments and comparative examples, it can be seen that the present invention improves the rounded edge polishing process, changing the traditional method of using the same processing technology for both Round processing stages. Instead, it uses a first-stage rough polishing process in Round 1 and a second-stage fine polishing process in Round 2. In the rough polishing stage, a strategy of "large contact area and high removal rate" is adopted, selecting a polishing drum with a larger angle, so that the contact between the polishing drum and the edge of the silicon wafer changes from "line contact" to a wider "surface contact". This significantly increases the instantaneous polishing area, improves the removal efficiency, and quickly and uniformly removes the macroscopic damage layer at the edge, while creating a good geometric foundation for subsequent fine polishing. In the fine polishing stage, a strategy of "small contact area and high local pressure" is adopted. The small-angle polishing drum reduces the contact area and increases the local pressure, concentrating the contact area and forming a higher local pressure, which is conducive to effectively removing the microscopic scratches left by rough polishing. In addition, the small-angle polishing drum can better fit and track the complex curvature of the edge, achieving precise polishing of these key areas, avoiding over-polishing or under-polishing, and perfectly maintaining the edge contour required by the design.

[0036] In summary, as demonstrated by the examples and comparative performance tests, the method provided by this invention can obtain silicon wafers with no edge damage and superior roughness within the same time frame, while ensuring that edge defect detection is qualified.

Claims

1. A method for edge polishing to improve the edge roughness of silicon wafers, characterized in that, Includes the following steps: (1) Perform parameter finding process on silicon wafer: use an edge polishing machine to find the V-Notch of the silicon wafer and align the V-Notch of the silicon wafer with the slot polishing cloth; (2) The silicon wafer that has completed parameter finding is transferred to the VN processing machine and the V-Notch of the silicon wafer is polished; (3) The silicon wafers that have completed V-Notch polishing are transported to the Round 1 processing machine for centering. The silicon wafers that have completed centering are subjected to first-level rough polishing of the rounded edges. The Shore hardness C of the polishing cloth used on the polishing drum is 70-100, the angle of the polishing drum is 41-45°, 70-75°, 90°, and the polishing pressure is 30-60N. (4) The silicon wafers that have completed the first-stage rough polishing of the rounded edges are transported to the Round2 processing machine for centering. The silicon wafers that have completed the centering process are then subjected to the second-stage fine polishing of the rounded edges. The Shore hardness C of the polishing cloth used on the polishing drum is 50-60, the angle of the polishing drum is 25-35°, 45-65°, or 90°, and the polishing pressure is 10-30N.

2. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In step (1), the deviation between the V-Notch of the silicon wafer and the slot polishing cloth is controlled within 0.4 mm.

3. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In step (2), the V-Notch polishing cloth used is a non-woven polishing cloth with a Shore hardness of 80, a polishing pressure of 4-10 N, a rotation speed of 400-800 r / min, and a polishing time of 30-80 s.

4. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In step (2), the polishing liquid used is a mixture of edge polishing stock solution and pure water in a ratio of 1:20, and the pH value is controlled in the range of 10-11.

5. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In step (3), the polishing cloth used on the Round 1 polishing drum is a non-woven polishing cloth, the rotation speed is 100-400r / min, and the polishing time is 60-180s.

6. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In step (3), the polishing liquid used is a mixture of edge polishing stock solution and pure water in a ratio of 1:20, and the pH value is controlled in the range of 10-11.

7. The edge polishing method for improving the edge roughness of silicon wafers according to claim 4 or 6, characterized in that, The composition of the edge polishing solution, by mass percentage, is: 27% silica particles and 73% pure water.

8. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In steps (3) and (4), the deviation between the center of the silicon wafer and the center of the machine is controlled within 0.2 mm.

9. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In step (4), the polishing cloth used on the Round 2 polishing drum is a non-woven polishing cloth, the rotation speed is 100-400r / min, and the polishing time is 60-180s.

10. The edge polishing method for improving the edge roughness of silicon wafers according to claim 1, characterized in that, In step (4), the polishing liquid used is a mixture of edge polishing stock solution and pure water in a ratio of 1:20, with the pH value controlled in the range of 10-11. The composition of the edge polishing stock solution by mass percentage is: 13% silica particles and 87% pure water.

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