Error analysis method and device for filtering loop

Abstract

The invention is suitable for the field of power system protection equipment, and provides an error analysis method and device for a filtering loop, and the method comprises the steps: constructing a simulation circuit model of the filtering loop, the simulation circuit model is a simulation model used for simulating the filtering loop, and the filtering loop is used for filtering an analog signal before sampling of an analog-to-digital converter; according to a to-be-processed target filtering loop, configuring element parameters of at least one circuit element in the simulation circuit model to obtain a target simulation circuit model; performing simulation by using the target simulation circuit model to obtain a simulation result; the simulation result is analyzed, an error analysis result corresponding to the target filtering loop is obtained, and the error analysis result comprises delay information when the analog signal passes through the target filtering loop. The working state of the filtering loop in a real environment can be simulated through the simulation model, and the delay and error of the filtering loop can be determined.

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