A multi-material composite substrate and method of making the same

Abstract

The application discloses a multi-material composite substrate and a preparation method thereof, and the composite substrate comprises a substrate, a reflective layer deposited on the substrate, the reflective layer being a metal material or an alloy material, a hetero layer deposited on the reflective layer, the hetero layer being an inorganic non-metal light-transmitting material, and a composite dielectric layer deposited on the hetero layer, the composite dielectric layer being sequentially composed of a thermal diffusion barrier layer, a carrier barrier layer and a nucleation layer from inside to outside; wherein the substrate, the reflective layer and the hetero layer are integrated into a periodic pattern structure through a one-time etching forming process. The surface of the substrate is modified through tackiness treatment, so that the interface is firmly combined, the light extraction efficiency is improved, and the performance of the multi-material composite substrate is significantly improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and specifically to a multi-material composite substrate and its preparation method. Background Technology

[0002] Gallium nitride (GaN)-based light-emitting diodes (LEDs) have become a core technology in the field of solid-state lighting and displays due to their advantages such as high efficiency, low power consumption, and long lifespan. Because the fabrication of GaN bulk single crystals is difficult and costly, the industry generally uses heteroepitaxial growth technology to grow GaN thin films on this material.

[0003] Among various substrates, sapphire is the most widely used substrate material due to its excellent chemical stability, high hardness, and good light transmittance. Patterned sapphire substrate (PSS) technology is particularly crucial, as its surface-designed micro / nano structures effectively guide the lateral epitaxial growth of GaN crystals, significantly reducing dislocation density and thus greatly improving crystal quality. Simultaneously, this structure utilizes the refractive index difference between GaN and sapphire to alter the photon propagation path and emission angle at the interface, increasing the light extraction efficiency of LED chips by 30% to 50%.

[0004] To continuously optimize device performance, multi-material composite substrate (MMS) technology has emerged as a new development direction. This technology constructs a three-dimensional micro-nano composite structure by integrating a silicon dioxide (SiO2) functional layer on a sapphire substrate. Through gradient refractive index design, photon behavior can be more precisely controlled, causing more laterally propagating guided modes to be converted into vertically emitted radiation modes, thereby further improving light extraction efficiency.

[0005] Currently, composite substrate technology is evolving towards multifunctional integration. Its core research goal has always revolved around how to more effectively suppress lattice defects and maximize the escape probability of photons in order to drive continuous breakthroughs in GaN LED performance. Summary of the Invention

[0006] The purpose of this invention is to provide a multi-material composite substrate and its preparation method. By modifying the substrate surface through adhesive treatment, the interfacial bonding is ensured to be strong and the light extraction efficiency is increased, thereby achieving a significant improvement in the performance of the multi-material composite substrate.

[0007] As one of the objectives of this invention, this invention provides a multi-material composite substrate, comprising: Substrate; The reflective layer is deposited on the substrate; A heterogeneous layer is deposited on the reflective layer, wherein the heterogeneous layer is an inorganic non-metallic light-transmitting material; A composite dielectric layer is deposited on a heterogeneous layer, wherein the composite dielectric layer consists of a thermal diffusion barrier layer, a carrier barrier layer and a nucleation layer from the inside out. The substrate, reflective layer, and heterogeneous layer are formed into an integrated periodic pattern structure through a single etching process.

[0008] Preferably, the substrate is sapphire with a surface roughness Ra of 0.1 nm to 0.7 nm.

[0009] Preferably, the height H1 of the etched protrusions on the substrate is 50nm to 100nm; the aspect ratio of the pattern is 0.63-0.65, and the ratio of the bottom width of the pattern to the period is controlled between 0.8 and 0.9; more preferably, the bottom width of the substrate is 670-720nm, and the period is 750-800nm; even more preferably, the total height of the pattern is 600-650nm, the bottom width is 700nm, and the period is 800nm.

[0010] Preferably, the reflective layer material is Pt, and the layer thickness is 40-80 nm.

[0011] Preferably, the heterolayer material comprises silicon oxide and silicon nitride, and the height of the heterolayer is 350-450 nm.

[0012] Preferably, the thermal diffusion barrier layer is an AlN layer, the carrier barrier layer is an AlxOy layer, and the nucleation layer is an AlON layer.

[0013] Preferably, the thickness of the composite dielectric layer on the sidewall of the pattern is greater than its thickness at the bottom; more preferably, the thickness of the thermal diffusion barrier layer in the sidewall is 15-25 nm, the thickness of the carrier barrier layer is 5-10 nm, the thickness of the nucleation layer is 10-15 nm, and the total thickness is controlled between 30-50 nm; the thickness of the thermal diffusion barrier layer at the bottom is 2-4 nm, the thickness of the carrier barrier layer is 2-4 nm, the thickness of the nucleation layer is 10-15 nm, and the total thickness is controlled between 14-23 nm.

[0014] As a second objective of this invention, this invention provides a method for preparing the above-mentioned multi-material composite substrate, comprising the following steps: S1: The substrate surface is modified by etching with chlorine gas (Cl2); S2: Deposit a reflective layer on the substrate surface; S3: Deposit a heterogeneous layer on top of the reflective layer; S4: Dry etching is performed on the composite substrate obtained in step S3 to form several raised patterned structures on the surface to form a patterned composite substrate. S5: Nitriding and pickling treatment of the composite substrate; S6: Sequentially deposit a thermal diffusion barrier layer, a carrier barrier layer, and a nucleation layer to form a composite dielectric layer on the outer surface of the composite substrate.

[0015] Preferably, S1 includes the following steps: The etching process employs inductively coupled plasma (ICP) etching, using chlorine as the sole process gas with a flow rate controlled at 60-100 sccm. The upper RF power is 1000-1600W, the lower RF power is 200-400W, the reaction chamber pressure is maintained at 2.8-3.0 Torr, the chuck temperature is cooled to 5-10℃, and the etching time is no less than 300s.

[0016] Preferably, S2 includes the following steps: (1) Pretreatment of the substrate: Place the substrate that has completed step S1 into the PVD reaction chamber, control the substrate heating temperature to 500-650℃, preheat for 3 minutes to evaporate the surface water vapor, select a Pt target with a purity of 99.999%, control the sputtering distance to 5-8 mm, and the pressure should be lower than 10. -7 Torr, the magnetron speed is 90 r / min; (2) Preparation of bonding layer: control the sputtering conditions as follows: sputtering power 5-10kw, 0-50bias, substrate heating temperature 300℃, sputtering 40-60s, so that the thickness of sputtered Pt film is 2-5nm; (3) Preparation of high-quality Pt layer: control the sputtering conditions as follows: sputtering power 10-15kw, 100-200bias, substrate heating temperature 500-650℃, sputtering 300-500s, so that the sputtered Pt film thickness is 38-78nm, the Pt film thickness uniformity is within 2%, and the surface roughness Ra is less than 0.5nm.

[0017] Preferably, S3 includes the following steps: Heterogeneous layers were deposited using the PECVD method, with the deposition temperature controlled at 280-300℃, the RF power at 500-1000W, the deposition time at 750-900s, and the film thickness at 500-600nm.

[0018] Preferably, S4 includes the following steps: The mask was prepared using an imprinting method; a dry etching process was employed, with the etching gas being pure BCl3 at a flow rate of 80-120 sccm, the substrate etching temperature at 5-15℃, the pressure at 1.8-2.0 Torr, the upper RF power at 1400-1800 W, the lower RF power at 400-600 W, and the etching time at 650-930 s, to etch the target pattern.

[0019] Preferably, the nitriding process in S5 includes the following steps: using plasma nitriding technology, setting the source RF power to 1400-1600W, turning off the bias RF, and introducing 150-200 sccm of nitrogen gas into the reaction chamber, with the etching time controlled at 30-60s. Under this environment, the nitrogen gas is ionized to form plasma, which gently bombards and reacts with the exposed reflective layer surface of the pattern sidewall, generating a metal nitriding film in situ to facilitate subsequent acid pickling.

[0020] Preferably, the pickling process in S5 includes the following steps: Prepare an SPM solution with a volume ratio of H2O2:H2SO4 of 1:3, and immerse the wafer in the solution for 600-700 seconds at a high temperature of 80-100℃.

[0021] Preferably, S6 includes the following steps: (1) Substrate pretreatment: Select a high-purity Al target with a purity of 99.9999%. Place the substrate in the PVD reaction chamber and control the substrate heating temperature to 500-650℃. Preheat for 3 minutes to evaporate surface water vapor. The substrate pressure must be below 10. -7 Torr, the magnetron speed is 40 r / min; (2) Preparation of thermal diffusion barrier layer: control nitrogen flow rate to 150-200 sccm, argon flow rate to 5-10 sccm, substrate heating temperature to 150-200℃, sputtering power to 300-500w, and sputtering time to 60-80s; (3) Carrier blocking layer preparation: oxygen is used as the reaction gas, with a flow rate of 150-200 sccm, argon flow rate of 5-10 sccm, sputtering power of 4000-5000W, substrate heating temperature of 600-700℃, sputtering distance of 5-8mm, sputtering pressure of 3.5-3.8 Torr, and sputtering time of 20-30s; (4) Preparation of nucleation layer: control the nitrogen flow rate to be 100-150 sccm, the argon flow rate to be 100-150 sccm, the oxygen flow rate to be 1.0-2.5 sccm, the substrate heating temperature to be 700-800℃, the sputtering distance to be 1.5-3.5 mm, the sputtering pressure to be 2.5-3 Torr, the sputtering power to be 5500-6000 W, and the sputtering time to be 25-40 s.

[0022] Compared with the prior art, the present invention has the following beneficial effects: (1) The present invention uses a Pt reflective layer combined with a patterned sapphire substrate with a specific period / depth. The reflected light and the patterned sidewalls will produce specific interference and scattering effects. This synergistic effect exceeds the simple superposition effect of combining the reflective layer with a planar substrate or a common patterned substrate, and improves the light extraction efficiency of the LED chip by more than 10% compared with the prior art. (2) The present invention uses chlorine-based plasma to pretreat the surface of sapphire substrate. The surface roughness is improved to a certain extent by physical bombardment, which is beneficial to reduce the diffuse reflection loss of subsequent optical film layers. At the same time, a high density of dangling chlorine bonds is introduced on the surface through strong chemical reaction. These highly active dangling chlorine bonds will become strong chemical anchoring points during subsequent film deposition, which improves the adhesion of the reflective layer and improves the yield. (3) In this invention, the reflective layer, the heterogeneous layer and the substrate material are integrally formed by etching in one step, which helps to simplify the manufacturing process and reduce the manufacturing cost. At the same time, it helps to increase the reflective area and reduce the area of ​​light leakage. (4) This invention helps to vertically emit light by precisely controlling the thickness of each functional layer, especially the thickness of the heterogeneous layer. (5) The present invention creatively designs a composite dielectric layer, which is composed of functional layers stacked in a certain order. The composite dielectric layer is part of the composite substrate and is also the intermediate layer between the composite pattern layer and the epitaxial layer. It not only impounds the thermal diffusion of metal atoms at high temperature, but also prevents leakage of the back-end LED chip or becomes a non-radiative recombination site, and provides better bonding sites for GaN epitaxy. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the process flow of the present invention; Figure 2 This is a schematic diagram of the composite substrate of the present invention; Figure 3 This is a scanning electron microscope image of the composite substrate of Example 1; Figure 4 This is a light distribution diagram of the composite substrate applied to the chip in Example 1; Figure 5 The image shows the light intensity at the bottom of the chip when the composite substrate is applied in Example 1. Figure 6 This is a photograph of the product after the reflective layer was deposited in Comparative Example 1. Figure 7 The light distribution diagram is shown for the composite substrate applied to the chip in Comparative Example 2. Figure 8 Comparative Example 2: Light intensity diagram of the composite substrate applied to the top of the chip; Figure 9 The image shows the light intensity at the bottom of the chip when the composite substrate is applied as a comparative example. Detailed Implementation

[0024] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] Example 1 This embodiment provides a multi-material composite substrate and its preparation method, the preparation process and structure of which are as follows: Figure 1-2 As shown. This multi-material composite substrate comprises, from bottom to top: a substrate, a reflective layer, a heterogeneous layer, and a composite dielectric layer.

[0026] The following details each functional layer and its fabrication process: In this embodiment, a sapphire substrate is used. To achieve a strong bond between the optical film and the sapphire substrate, the sapphire substrate is first subjected to a surface adhesion enhancement treatment. The core of this treatment lies in modifying both the physical morphology and chemical state of the sapphire substrate surface through a specific dry etching process.

[0027] The specific steps are as follows: Inductively Coupled Plasma (ICP) etching technology is used, with high-purity chlorine (Cl2) as the sole process gas, and the flow rate is controlled at 75 sccm. Process parameters are set as follows: upper RF power (source power) 1400W for efficient generation of high-density plasma; lower RF power (bias power) 200W for guiding ions to directionally bombard the substrate surface. The reaction chamber pressure is maintained at 2.8 Torr, the chuck temperature is cooled to 10°C, and the etching time is 380s.

[0028] Under these conditions, chlorine-based plasma exerts two key effects on the sapphire surface: first, it improves surface roughness to a certain extent through physical bombardment, which helps reduce diffuse reflection losses in subsequent optical films; second, it introduces a high density of dangling chlorine bonds into the surface through intense chemical reactions. XPS surface analysis confirmed that the concentration of dangling chlorine bonds on the treated surface can stably reach over 10 at.%. These highly reactive dangling chlorine bonds will serve as strong chemical anchoring points for subsequent film deposition, which is crucial for achieving excellent adhesion.

[0029] The reflective layer material of the present invention preferably meets the following conditions: ① the purpose is to improve light extraction efficiency, and the reflective layer is a metallic or alloy material; ② it is stable in solid state at 500℃~1500℃ and will not liquefy or vaporize; ③ it is not corroded in high-temperature SPM (sulfuric acid and hydrogen peroxide mixture) solution; ④ it has high light reflection properties and low light absorption properties. As a preferred embodiment, platinum (Pt) is selected as the material of the reflective layer in this embodiment.

[0030] This invention discovers that by combining a Pt reflective layer that meets the above conditions with a patterned sapphire substrate of a specific period / depth, a specific interference and scattering effect will be generated between the reflected light and the patterned sidewalls. This synergistic effect goes beyond the simple superposition effect of combining the reflective layer with a planar substrate or a common patterned substrate, thereby achieving an unexpected gain in light extraction efficiency.

[0031] To achieve the aforementioned synergistic effect, this invention precisely designs and optimizes the structure of the patterned composite substrate. The pattern is composed of three layers: a heterogeneous layer, a Pt reflective layer, and sapphire, from top to bottom. It is important to note that the reflective layer, heterogeneous layer, and substrate layer are etched together in a single process, without any embedded layers. This means a single etching process eliminates the need for additional chemical etching or multiple etching-deposition-etching cycles. This simplifies the manufacturing process, reduces manufacturing costs, and simultaneously increases the reflective area while minimizing light leakage.

[0032] It should be noted that the specific parameter ranges for the graphics are limited as follows: ① Bottom Pattern Layer: The height H1 of the etched protrusions in the sapphire material is 50nm~100nm, balancing the complete etching of all points on the wafer with etching efficiency (if the etching is too deep, the etching efficiency will decrease significantly). The difference in the uniformity of plasma etching within the wafer results in a difference of 50nm~100nm in the etching depth at various points within the wafer. This condition is set to ensure that the reflective layer and the heterostructure layer are etched through. If the reflective layer is not etched through, it will directly lead to abnormal GaN nucleation during epitaxial growth.

[0033] In this embodiment, the height of the boss H1 = 50.8 nm.

[0034] ②Reflective layer: A Pt metal film is deposited on the patterned sapphire surface, with the thickness H2 strictly controlled at 41.3 nm. This thickness range is designed to ensure the film is continuous and free of pinholes, so as to achieve extremely high reflectivity while perfectly fitting and covering the undulating contours of the sapphire pattern. In addition, if the layer is too thick, the cost will be too high and the etching difficulty will be too great.

[0035] ③ Heterogeneous layer: The height of the heterogeneous layer is H3 = 447.2 nm.

[0036] ④ The design of the pattern's base width and period: The base width of the pattern should conform to a composite aspect ratio within the range of 0.63-0.65. Based on the thickness of the aforementioned material, the base width range is 670-720nm. The sapphire pattern's period design requires the ratio of base width to period to be controlled between 0.8 and 0.9, thus the period needs to be set to 750-800nm. Preferably, the total height of the pattern can be set to 600-650nm, the base width to approximately 700nm, and the period to 800nm.

[0037] The core mechanism of this invention lies in the fact that the aforementioned specific parameter combination constructs a highly efficient microcavity interference and directional scattering synergistic model between the Pt high-reflectivity substrate and the patterned sidewalls. When light generated by the active layer strikes the substrate, the following processes occur: ① Microcavity interference effect: A low-Q Fabry-Perot microcavity with a specific resonance mode is formed between the Pt reflective layer and the patterned sidewalls. Light satisfying the constructive interference condition is greatly enhanced. Its interference phase condition is given by formula 2neffd + =mλ, where neff is the equivalent refractive index of the "heterolayer / GaN" hybrid region, d is the effective optical cavity length, and d is related to the pattern height and the SiOx layer thickness. λ is the phase jump of light reflected at the Pt interface, m is the interference order, and λ is the target wavelength. By designing the pattern height and period within the specified range, effective constructive interference of light in the target wavelength band within the cavity is ensured. ② Directional scattering disrupts total internal reflection. The light field, after interference modulation, is incident on the sidewall of the pattern with a specific tilt angle. Its scattering direction is approximately described by the grating equation nsin(θout) = nsin(θin) + mλ / T, where n is the refractive index of the medium, θin and θout are the incident and exit angles, respectively, and T is the pattern period. This invention designs the period to be smaller than or close to the wavelength of light in the medium (750-800nm), which ensures that only the zeroth and first order diffracted light exists, thereby effectively scattering the light that would otherwise be restricted by total internal reflection into the escape cone angle. The above two effects are not simply superimposed but coupled together. The microcavity interference pre-selects and enhances light at a specific angle and wavelength, and then feeds this enhanced light into the scattering structure; the scattering structure then efficiently redirects this light to the exit direction. This cascade effect of interference enhancement and directional scattering results in a significant performance improvement in the final light extraction efficiency gain.

[0038] In this embodiment, a two-step PVD growth method is preferably used to prepare the Pt layer: First, the substrate is pretreated: the sapphire substrate that has undergone chlorination "surface adhesion modification" is placed in the PVD reaction chamber, and the substrate heating temperature is controlled at 650°C for 3 minutes to evaporate surface moisture and improve film quality; a high-purity Pt target (99.999% purity) is selected, the sputtering distance is controlled at 8 mm, and the pressure needs to be below 10.-7 Torr, the magnetron speed is 90 r / min.

[0039] Secondly, the bonding layer was prepared: the sputtering conditions were controlled as follows: sputtering power 8 kW, 25 bias, substrate heating temperature 300℃, sputtering for 40 s, resulting in a sputtered Pt film thickness of 2 nm. Under these sputtering conditions, the Pt atoms exhibited low mobility but high activity, enabling them to bind with dangling chlorine bonds on the substrate surface to form stable PtCl2, thus binding the Pt onto the sapphire and preventing detachment. This layer cannot be too thin, as this would result in incomplete reaction, insufficient adhesion, and detachment during subsequent processing steps; conversely, it cannot be too thick, as this would affect the surface roughness of the film, leading to diffuse reflection in subsequent processes.

[0040] Next, a high-quality Pt layer was prepared: the sputtering conditions were controlled as follows: sputtering power 15 kW, 125 bias, substrate heating temperature 650 ℃, sputtering for 350 s, so that the sputtered Pt film thickness was 39.3 nm. Under these conditions, the uniformity of Pt film thickness was within 1.7%, and the surface roughness Ra was 0.21 nm.

[0041] In this embodiment, the total thickness H2 of the Pt metal film is 41.3 nm.

[0042] The heterolayer of this invention is selected from inorganic non-metallic transparent materials, such as silicon oxide and silicon nitride, which are resistant to high temperatures and have stable physicochemical properties. In this embodiment, silicon nitride is selected as the heterolayer material.

[0043] In this embodiment, the heterolayer is prepared using PECVD, with the deposition temperature controlled at 290°C, the radio frequency power controlled at 500W, and 200 sccm of nitrous oxide, 50 sccm of silane, and 200 sccm of nitrogen introduced. The deposition time is controlled at 750s, resulting in a silicon oxide film thickness of 600nm.

[0044] Due to the presence of the reflective functional layer, an exposure route would present anomalies; therefore, an imprinting route was used to fabricate the mask. A dry etching machine was used for single-pass etching, controlling the etching gas to be pure BCl3 at a flow rate of 90 sccm, the substrate etching temperature to be 10°C, the pressure to be 2.0 Torr, the upper RF power to be 1600 W, the lower RF power to be 600 W, and the etching time to be 780 s; thus, the target pattern was etched.

[0045] After the etching process, the Pt layer on the patterned sidewalls is exposed, requiring an additional reactive plasma nitriding step. The control parameters for this step are as follows: source RF power is set to 1400W, bias RF is turned off, and nitrogen gas at 200 sccm is introduced into the cavity. The etching time is controlled at 60 seconds. Under these conditions, the nitrogen gas is ionized to form plasma, which gently bombards and reacts with the Pt film on the patterned sidewalls, generating a platinum nitride thin film in situ. This film serves as a high-quality passivation layer and can be effectively used in subsequent acid pickling processes.

[0046] The pickling process employs SPM wet cleaning, the core purpose of which is to remove byproducts and contaminants while ensuring that Pt does not react to form light-absorbing platinum oxide. Specifically, an SPM solution with a volume ratio of 1:3 (H2O2:H2SO4) is used, and the wafer is immersed in the solution at 100°C for 680 seconds. In this high-temperature, high-oxidation environment, the PtN on the sidewalls undergoes a chemical transformation: the highly reactive oxygen species generated by the decomposition of hydrogen peroxide oxidizes the nitrogen in the PtN to NO2 gas, releasing it, while simultaneously reducing the film to pure metallic Pt. After treatment, the wafer is rinsed with deionized water and spun dry at high speed to obtain a clean patterned composite substrate. Throughout the process, the inherent excellent chemical inertness of metallic platinum and its strong adhesion to the substrate ensure the integrity of the patterned structure, effectively preventing material detachment and unnecessary side reactions.

[0047] The dielectric layer is both part of the composite substrate and an intermediate layer between the composite patterned layer and the epitaxial layer. It confines the thermal diffusion of metal atoms at high temperatures, prevents leakage current in the downstream LED chip or serves as a non-radiative recombination site, and provides better bonding sites for GaN epitaxy. It is important to note that the dielectric layer is formed by a thermal diffusion barrier layer (AlN), a carrier barrier layer (AlxOy), and a nucleation layer (AlON). Please refer to [reference needed]. Figure 2 As shown, D1 needs to be smaller than D2. In D2, the thickness of AlN is 15-25 nm, the thickness of AlxOy is 5-10 nm, and the thickness of AlON is 10-15 nm. The total thickness of D2 needs to be 30-50 nm. For D1, the thickness of AlN is 2-4 nm, the thickness of AlxOy is 2-4 nm, and the thickness of AlON is 10-15 nm. The total thickness of D1 needs to be 14-23 nm.

[0048] The preparation process of the dielectric layer is as follows: (1) Wafer preprocessing: A high-purity Al target (99.9999% purity) was selected. The substrate was placed in the PVD reaction chamber, and the substrate heating temperature was controlled at 650℃ for 3 minutes to evaporate surface moisture and improve film quality. The substrate pressure needed to be below 10.-7 Torr, the magnetron speed is 40 r / min.

[0049] (2) Preparation of the thermal diffusion barrier layer: This layer is defined as a low-mass AlN thermal diffusion barrier layer with specific morphological requirements. The primary reason for choosing AlN as the core material is its inherent high thermal stability, which allows it to maintain excellent chemical and structural stability under the high-temperature, low-pressure environments encountered during subsequent epitaxial growth, providing a reliable growth interface for the upper layer materials. More importantly, its main function is to act as an effective physical barrier, completely preventing cavity contamination and epitaxial layer defects caused by the volatilization and migration of Pt atoms from the pattern sidewalls during the high-temperature epitaxial process. By constructing this stable protective layer on the sidewalls, the epitaxial process can be ensured to take place in a pure and controllable environment, thereby guaranteeing the integrity of the final device structure.

[0050] This invention requires controlling the low crystal quality and asymmetric thickness distribution of the AlN layer: a thinner layer at the bottom of the pattern and a thicker layer on the sidewalls. The mechanism for achieving this unique morphology lies in the synergistic control of atomic mobility and incident angle during deposition. First, by reducing the energy of the deposited atoms and controlling the process conditions, Al and N atoms achieve low surface migration rates. This means that after reaching the substrate surface, the atoms have limited lateral diffusion capabilities, making it difficult for them to migrate in large quantities from the sidewalls to the bottom of the pattern, thus laying the foundation for spatially uneven deposition. Second, by employing large-angle sputtering, the sputtered particle stream is not incident perpendicularly but at a large tilt angle towards the substrate. This geometric relationship results in the bottom region of the pattern being severely obscured by the sidewalls, forming a "shadow effect," leading to an extremely low deposition rate at the bottom; while the sidewalls are directly exposed to the particle stream, becoming the main deposition area. The superposition of these two effects ultimately achieves an ideal structure with a bottom thickness of only 2-4 nm and a sidewall thickness of 15-25 nm.

[0051] To achieve the aforementioned control over morphology and quality, a series of sputtering process parameters need to be precisely set. The process is carried out in a high nitrogen atmosphere with a flow rate set to 200 sccm. The nitrogen atmosphere primarily participates in the reaction to form AlN and utilizes its high mass to collide with and scatter sputtered particles, reducing their energy and thus inhibiting atomic migration, promoting the growth of low-mass, high-barrier films. Argon is used as the sputtering gas, with its flow rate strictly controlled at a low level of 10 sccm. This aims to reduce the continuous bombardment of the grown film by high-energy particles, avoiding lattice damage and atomic re-migration caused by excessive bombardment, which is also crucial for obtaining low-crystal-quality films. The substrate heating temperature is set at a low range of 200°C. This aims to provide sufficient surface activity to promote film formation while avoiding excessively high temperatures that could impart excessive migration capabilities to the deposited atoms, thereby damaging the morphology of the sidewall thick film. The shorter sputtering distance and higher process gas pressure work together to enhance the collision between the plasma and the reactive gas, further reducing the energy of the deposited particles and reinforcing the aforementioned large-angle tilt deposition effect. These are indispensable conditions for accurately achieving the desired asymmetric thickness distribution. In addition, the sputtering power needs to be controlled at 300-500W. Lower sputtering power results in a larger sputtering angle, which can effectively create a shadow effect; the sputtering time should be controlled at 60-80s.

[0052] In this embodiment, the AlN layer has a bottom thickness of 3.1 nm and a sidewall thickness of 19.7 nm.

[0053] (3) Preparation of carrier blocking layer: This layer is defined as an AlxOy carrier blocking layer with a specific morphology and high-quality crystallinity, where x = 1.7-2.7 and y = 2.0-2.5. The primary reason for choosing AlxOy as the core material is its wide bandgap and high insulating properties, which effectively block current. During the operation of the subsequent LED device, its main function is to prevent electrons and holes (charge carriers) from penetrating and reaching the underlying Pt metal layer, thereby completely avoiding luminous efficiency attenuation caused by non-radiative recombination of charge carriers in the metal, as well as leakage problems caused by metal pathways, ensuring the device's luminous efficiency and electrical stability. Simultaneously, the high-quality crystallinity ensures that this thin film has a dense microstructure, excellent chemical stability, and ideal dielectric strength, capable of withstanding high electric fields without breakdown, providing a reliable physical basis for carrier blocking, and also adapting to the crystal quality of the underlying AlN.

[0054] The key to preparing the AlxOy layer in this invention lies in its high-quality crystallinity and asymmetric thickness distribution: an extremely thin bottom (2-4 nm) is required, while an effective blocking thickness (5-10 nm) is needed on the sidewalls. The mechanism for achieving this special morphology lies in the synergistic control of atomic mobility and film adhesion during deposition. First, to achieve high-quality crystallinity, the process increases the substrate temperature to 600-700°C, giving Al and O atoms a sufficiently high surface migration rate, allowing them to find suitable lattice positions and arrange themselves in an orderly manner during deposition, thus forming a high-quality film with few defects and high density. However, high surface mobility usually leads to isotropic deposition, which is not conducive to forming a morphology with thick sidewalls and a thin bottom. At this point, Al… X The high adhesion of the Oy material itself plays a crucial role. Atoms with high adhesion have a lower tendency for secondary migration or reflection after impacting the substrate surface, making them more likely to "adhere" to the initial contact location. This exposes the sidewalls of the patterned structure directly to the particle flow, making them the primary deposition areas; while the bottom of the pattern is severely obstructed by the sidewalls (i.e., the "shadowing effect"), allowing only a small number of particles to reach it. High adhesion ensures that particles reaching the sidewalls are firmly captured and form a thick film, while particles reaching the limited area at the bottom are also effectively fixed, but due to the extremely low flux, only a very thin coating can be formed.

[0055] The sidewall thickness is 5-10 nm, a critical thickness for achieving effective electron blocking. If the film is too thin (e.g., <5 nm), charge carriers may tunnel through the barrier, causing blocking failure. A thickness of 5-10 nm constructs a sufficiently wide and high barrier for charge carriers, reducing their tunneling probability to a negligible level, thus achieving reliable insulating blocking. The bottom thickness is controlled at 2-4 nm. This design aims for epitaxial compatibility, as the nucleus needs to form on the dielectric layer at the bottom of the pattern during subsequent epitaxial growth. If this dielectric layer is too thick, the large lattice mismatch and difference in thermal expansion coefficients between it and the semiconductor epitaxial layer will introduce numerous defects, severely degrading the quality of the epitaxial crystal. The bottom Al... X By controlling Oy to an ultrathin state of 2-4nm, its amplification effect on lattice strain can be minimized, creating favorable conditions for high-quality epitaxial nucleation and growth.

[0056] To achieve the aforementioned high-quality crystallization and specific morphology control, a series of sputtering process parameters need to be precisely set. A high oxygen flow rate, with oxygen as the reactant gas, at 150 sccm, ensures a sufficient oxidation reaction, forming Al with a near-ideal stoichiometric ratio. XOy is fundamental for achieving high-quality crystal structures and excellent insulation properties. Low argon flow rate combined with high power—argon flow rate controlled at a relatively low level of 10 sccm, combined with a high sputtering power of 4000-5000W—aims to create a high-density plasma and ensure that the sputtered Al atoms possess high kinetic energy, providing the initial energy for sufficient migration to the substrate surface. A substrate heating temperature of 700°C is crucial, providing the necessary thermal energy for the deposited atoms, greatly promoting their migration and ordered arrangement on the surface, a core condition for achieving high-quality crystallization. Short distance and specific gas pressure are also essential: a short sputtering distance of 5mm and a process gas pressure of 3.5 Torr. A very short sputtering time of 30 seconds allows for direct and precise control of the deposition thickness, ensuring that at high deposition rates, the 5-10nm sidewall requirement is met while preventing excessive thickening of the bottom due to prolonged accumulation.

[0057] In this embodiment, Al X The Oy layer has a bottom thickness of 2.3 nm and a sidewall thickness of 9.8 nm.

[0058] (4) Preparation of nucleation layer: This layer is mainly a high-quality AlON layer. Its purpose is to improve the crystal quality of the C-plane, control the growth of GaN epitaxial growth at the C-plane position, and control the growth of heterogeneous sidewalls to control dislocation generation. The requirement for this film layer is that the thickness of the C-plane and the sidewalls are the same, and the thickness of AlON is 10-15nm.

[0059] The sputtering conditions for preparing this layer were as follows: nitrogen flow rate of 100-150 sccm, oxygen flow rate of 1.3 sccm, argon flow rate of 100 sccm, substrate heating temperature of 700-800℃, sputtering distance of 1.5-3.5 mm, process gas pressure of 2.5 Torr, sputtering power of 5500 W, and sputtering time of 32 s.

[0060] In this embodiment, the thickness of the AlON layer is 11.4 nm.

[0061] like Figure 3 As shown in the figure, this figure illustrates the microstructure of the composite substrate finally obtained in Example 1.

[0062] The composite substrate prepared in this embodiment was subjected to relevant optical tests. Figure 4 To illustrate the light distribution pattern of the composite substrate used in chip fabrication, the figure shows that, due to the reflective layer in Example 1 and the precise design and optimization of the patterned composite substrate structure, light is emitted only above the substrate during the entire test, demonstrating its excellent light extraction efficiency. Figure 5 It can be seen that its light intensity is also relatively high. According to the test, its top LEE value is 47.167%.

[0063] Comparative Example 1 This comparative example primarily investigates the impact of surface-adhesive treatment on subsequent film deposition on sapphire substrates. Unmodified sapphire substrates were placed in a PVD reaction chamber, and the substrate heating temperature was controlled at 650℃ for 3 minutes to evaporate surface moisture and improve film quality. A high-purity Pt target (99.999% purity) was used, the sputtering distance was controlled at 8 mm, and the pressure needed to be below 10. -7 Torr, the magnetron rotation speed is 90 r / min. The subsequent sputtering method for the Pt layer is the same as in Example 1. Figure 6 As shown, after sputtering, it was found that due to weak adhesion, there were problems such as failure to form a film and poor film quality.

[0064] Comparative Example 2 This comparative example is identical to Example 1 except for the deposition of a reflective layer. Optical tests were performed on the composite substrate prepared in this comparative example, and the results are as follows: Figure 7-8 As shown. Because Comparative Example 2 lacks a reflective layer, light emission occurs at both its top and bottom, and the light rays are scattered. See [reference needed]. Figure 7 .from Figure 8 It can be seen that the brightness of the light from the top and bottom is also not high. The test results show that the top LEE value is 7.9958%, the bottom LEE value is 8.3022%, and the total axial LEE value is 16.298%. It is evident that its light emission intensity is far lower than that of Example 1.

[0065] The above embodiments are merely illustrative examples of preferred embodiments of the present invention and do not encompass all possible implementations. Any modifications and refinements made by those skilled in the art without departing from the spirit and scope of the present invention are considered to fall within the protection scope of the claims.

Claims

1. A multi-material composite substrate, characterized in that, include: Substrate; The reflective layer is deposited on the substrate; A heterogeneous layer is deposited on the reflective layer, wherein the heterogeneous layer is an inorganic non-metallic light-transmitting material; The substrate, reflective layer, and heterostructure are formed into an integrated periodic pattern structure through a single etching process. A composite dielectric layer is deposited on the outer surface of the integrated periodic pattern structure. The composite dielectric layer consists of a thermal diffusion barrier layer, a carrier barrier layer, and a nucleation layer from the inside to the outside. The reflective layer is a Pt layer; The heat diffusion barrier layer is an AlN layer; the charge carrier barrier layer is Al x O y Layers, where x = 1.7-2.7, y = 2.0-2.5; the nucleation layer is an AlON layer; The heterogeneous layer is selected from inorganic non-metallic transparent materials.

2. The multi-material composite substrate according to claim 1, characterized in that, The substrate is sapphire, and the roughness Ra of its upper surface is 0.1 nm to 0.7 nm; The thickness of the reflective layer is 40-80 nm; The heterolayer material includes silicon oxide and silicon nitride, and the height of the heterolayer is 350-450 nm.

3. The multi-material composite substrate according to claim 1, characterized in that, The height H1 of the etched protrusions on the substrate is 50nm to 100nm; the aspect ratio of the pattern is 0.63-0.65, and the ratio of the bottom width of the pattern to the period is controlled between 0.8 and 0.

9.

4. The multi-material composite substrate according to claim 3, characterized in that, The substrate width ranges from 670 to 720 nm, and the period ranges from 750 to 800 nm.

5. The multi-material composite substrate according to claim 4, characterized in that, The total height of the pattern is 600-650nm, the bottom width of the pattern is 700nm, and the period is 800nm.

6. The multi-material composite substrate according to claim 1, characterized in that, The thickness of the composite medium layer on the sidewall of the pattern is greater than its thickness at the bottom.

7. The multi-material composite substrate according to claim 6, characterized in that, The thickness of the heat diffusion barrier layer in the sidewall is 15-25 nm, the thickness of the carrier barrier layer is 5-10 nm, the thickness of the nucleation layer is 10-15 nm, and the total thickness is controlled between 30-50 nm. The thickness of the bottom heat diffusion barrier layer is 2-4 nm, the thickness of the carrier barrier layer is 2-4 nm, the thickness of the nucleation layer is 10-15 nm, and the total thickness is controlled between 14-23 nm.

8. The method for preparing the multi-material composite substrate according to any one of claims 1-7, characterized in that, Includes the following steps: S1: The substrate surface is modified by etching with chlorine gas (Cl2); S2: Deposit a reflective layer on the substrate surface; S3: Deposit a heterogeneous layer on top of the reflective layer; S4: Dry etching is performed on the composite substrate obtained in step S3 to form several raised patterned structures on the surface to form a patterned composite substrate. S5: Nitriding and pickling treatment of the composite substrate; S6: Sequentially deposit a thermal diffusion barrier layer, a carrier barrier layer, and a nucleation layer to form a composite dielectric layer on the outer surface of the composite substrate.

9. The preparation method according to claim 8, characterized in that, S1 includes the following steps: The etching process employs inductively coupled plasma (ICP) etching, using chlorine as the sole process gas with a flow rate controlled at 60-100 sccm. The upper RF power is 1000-1600W, the lower RF power is 200-400W, the reaction chamber pressure is maintained at 2.8-3.0 Torr, the chuck temperature is cooled to 5-10℃, and the etching time is no less than 300s.

10. The preparation method according to claim 8, characterized in that, S2 includes the following steps: (1) Pretreatment of the substrate: Place the substrate that has completed step S1 into the PVD reaction chamber, control the substrate heating temperature to 500-650℃, preheat for 3 minutes to evaporate the surface water vapor, select a 99.999% pure Pt target, control the sputtering distance to 5-8 mm, and the pressure should be below 10. -7 Torr, the magnetron speed is 90 r / min; (2) Preparation of bonding layer: control the sputtering conditions as follows: sputtering power 5-10kw, 0-50bias, substrate heating temperature 300℃, sputtering 40-60s, so that the thickness of sputtered Pt film is 2-5nm; (3) Preparation of high-quality Pt layer: control the sputtering conditions as follows: sputtering power 10-15kw, 100-200bias, substrate heating temperature 500-650℃, sputtering 300-500s, so that the thickness of sputtered Pt film is 38-78nm, the uniformity of Pt film thickness is within 2%, and the surface roughness Ra is less than 0.5nm; S3 includes the following steps: The heterostructure was deposited using PECVD, wherein the deposition temperature was controlled at 280-300℃, the radio frequency power at 500-1000w, the deposition time at 750-900s, and the film thickness at 500-600nm. S4 includes the following steps: The mask was prepared using an imprinting method; a dry etching process was employed, with the etching gas being pure BCl3 at a flow rate of 80-120 sccm, the substrate etching temperature at 5-15℃, the pressure at 1.8-2.0 Torr, the upper RF power at 1400-1800 W, the lower RF power at 400-600 W, and the etching time at 650-930 s, to etch the target pattern.

11. The preparation method according to claim 8, characterized in that, The nitriding process in S5 includes the following steps: using plasma nitriding technology, setting the source RF power to 1400-1600W, turning off the bias RF, and introducing 150-200sccm of nitrogen gas into the reaction chamber. The etching time is controlled at 30-60s. Under this environment, the nitrogen gas is ionized to form plasma, which gently bombards and reacts with the exposed reflective layer surface on the pattern sidewall, generating a metal nitriding film in situ to facilitate subsequent acid pickling. The pickling process in S5 includes the following steps: Prepare an SPM solution with a volume ratio of H2O2:H2SO4 of 1:3, and immerse the wafer in the solution for 600-700 seconds at a high temperature of 80-100℃.

12. The preparation method according to claim 8, characterized in that, S6 includes the following steps: (1) Substrate pretreatment: Select a high-purity Al target with a purity of 99.9999%. Place the substrate in the PVD reaction chamber and control the substrate heating temperature to 500-650℃. Preheat for 3 minutes to evaporate surface water vapor. The substrate pressure must be below 10. -7 Torr, the magnetron speed is 40 r / min; (2) Preparation of thermal diffusion barrier layer: control nitrogen flow rate to 150-200 sccm, argon flow rate to 5-10 sccm, substrate heating temperature to 150-200℃, sputtering power to 300-500w, and sputtering time to 60-80s; (3) Carrier blocking layer preparation: oxygen is used as the reaction gas, with a flow rate of 150-200 sccm, argon flow rate of 5-10 sccm, sputtering power of 4000-5000W, substrate heating temperature of 600-700℃, sputtering distance of 5-8mm, sputtering pressure of 3.5-3.8 Torr, and sputtering time of 20-30s; (4) Preparation of nucleation layer: control the nitrogen flow rate to be 100-150 sccm, the argon flow rate to be 100-150 sccm, the oxygen flow rate to be 1.0-2.5 sccm, the substrate heating temperature to be 700-800℃, the sputtering distance to be 1.5-3.5 mm, the sputtering pressure to be 2.5-3 Torr, the sputtering power to be 5500-6000 W, and the sputtering time to be 25-40 s.

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