Silicon wafer and preparation method thereof

Abstract

The embodiment of the invention relates to the technical field of Czochralski silicon single crystals, and provides a silicon wafer and a preparation method of the silicon wafer, the resistivity deviation on the diagonal line of the silicon wafer is less than or equal to 10%, the silicon wafer comprises an arsenic element, the concentration range of the arsenic element is 1.38 E + 15 at / cm < 3 >-1.56 E + 16 at / cm < 3 >, and the oxygen content of the silicon wafer is less than or equal to 2.5 E + 17 at / cm < 3 >. According to the embodiment of the invention, the electrical performance and quality of the silicon wafer are improved.

Description

Technical Field

[0001] This application relates to the field of Czochralski silicon single crystal technology, and in particular to a silicon wafer and a method for preparing the silicon wafer. Background Technology

[0002] In the field of semiconductor material fabrication, the growth process of single-crystal silicon rods, especially doped single-crystal silicon rods, is crucial for ensuring the performance and reliability of semiconductor devices. In existing technologies, the dopant elements are unevenly distributed along the axial direction of the single-crystal silicon rod, which affects the resistivity distribution of the rod and makes resistivity control difficult. Summary of the Invention

[0003] This application provides a silicon wafer and a method for preparing the silicon wafer, which at least helps to improve the electrical performance and quality of the silicon wafer.

[0004] According to some embodiments of this application, one embodiment provides a silicon wafer with a resistivity deviation of less than or equal to 10% along its diagonal, the silicon wafer including arsenic with a concentration range of 1.38E+15 at / cm². 3 ~1.56E+16at / cm 3 The oxygen content of the silicon wafer is less than or equal to 2.5E+17 at / cm. 3 .

[0005] According to some embodiments of this application, another aspect of this application provides a method for preparing a silicon wafer. The method includes: obtaining a first relationship and a diffusion coefficient of a dopant in a silicon melt under predetermined growth conditions; the first relationship being the correspondence between the resistivity and the equal diameter length of a single-crystal silicon rod under multiple furnace pressures during historical equal-diameter stages; the predetermined growth conditions being the single-crystal silicon rod growth conditions that affect the diffusion coefficient; determining the correspondence between the evaporation parameters of the dopant and the equal diameter length based on the diffusion coefficient and the predetermined growth conditions to obtain a second relationship; preparing a single-crystal silicon rod using the predetermined growth conditions during the equal-diameter stage; and controlling the actual furnace pressure of the single-crystal furnace according to the first relationship, the second relationship, and the actual equal diameter length of the single-crystal silicon rod to control the actual resistivity of the single-crystal silicon rod within a predetermined range to obtain a target single-crystal silicon rod; and cutting the target single-crystal silicon rod to obtain multiple silicon wafers.

[0006] In some embodiments, the predetermined growth conditions include the pulling speed of the single-crystal silicon rod and the initial concentration of the dopant. Obtaining the diffusion coefficient of the dopant in the silicon melt under the predetermined growth conditions includes: obtaining the resistivity of the single-crystal silicon rod during the historical process of preparing the single-crystal silicon rod using the predetermined growth conditions, and converting the resistivity of the single-crystal silicon rod into a first doping concentration; calculating the effective segregation coefficient of the dopant based on the initial concentration and the first doping concentration; and calculating the diffusion coefficient using the BPS model based on the effective segregation coefficient, the equilibrium segregation coefficient of the dopant, the pulling speed, and the boundary layer thickness of the dopant at the solid-liquid interface.

[0007] In some embodiments, determining the correspondence between the evaporation parameters of the dopant and the constant diameter length based on the diffusion coefficient and the predetermined growth conditions to obtain a second relationship includes: establishing a predetermined model, wherein the predetermined model is a crystal rod growth model that considers the segregation behavior of the dopant but does not consider the evaporation behavior of the dopant; configuring the model parameters of the predetermined model based on the diffusion coefficient and the predetermined growth conditions, and using the configured predetermined model to simulate the correspondence between the resistivity of the single crystal silicon rod and the constant diameter length to obtain a third relationship; obtaining the correspondence between the resistivity of the single crystal silicon rod and the constant diameter length during the historical process of preparing the single crystal silicon rod using the predetermined growth conditions to obtain a fourth relationship; and determining the correspondence between the evaporation amount and / or evaporation constant of the dopant and the constant diameter length based on the third relationship and the fourth relationship to obtain the second relationship.

[0008] In some embodiments, determining the correspondence between the evaporation amount and / or evaporation constant of the dopant and the constant diameter length based on the third relationship and the fourth relationship includes: converting the resistivity of the single-crystal silicon rod in the third relationship into the doping concentration of the dopant to obtain a second doping concentration correspondence with the constant diameter length; converting the resistivity of the single-crystal silicon rod in the fourth relationship into the doping concentration of the dopant to obtain a third doping concentration correspondence with the constant diameter length; and calculating the evaporation amount and / or the evaporation constant based on the difference between the second doping concentration and the third doping concentration to obtain a correspondence between the evaporation amount and / or the evaporation constant and the constant diameter length.

[0009] In some embodiments, controlling the actual furnace pressure of a single crystal furnace according to the first relationship, the second relationship, and the actual constant diameter length of the single crystal silicon rod to control the actual resistivity of the single crystal silicon rod within a predetermined range includes: determining a target furnace pressure from a plurality of furnace pressures according to the first relationship and determining the relationship between the evaporation effect of the dopant and the furnace pressure; setting the actual furnace pressure of the single crystal furnace to the target furnace pressure, and adjusting the actual furnace pressure based on the target furnace pressure according to the actual constant diameter length, the second relationship, and the relationship between the evaporation effect and the furnace pressure to compensate for the evaporation behavior of the dopant and control the actual resistivity within the predetermined range.

[0010] In some embodiments, determining a target furnace pressure from a plurality of furnace pressures and determining the relationship between the evaporation effect of the dopant and the furnace pressure according to the first relationship includes: determining, according to the first relationship, that the evaporation effect increases as the furnace pressure decreases; calculating, according to the first relationship, the average rate of change of resistivity corresponding to each furnace pressure, and determining the furnace pressure with the smallest average rate of change of resistivity as the target furnace pressure.

[0011] In some embodiments, the relationship between the evaporation effect and the furnace pressure is that the evaporation effect increases as the furnace pressure decreases. Adjusting the actual furnace pressure based on the actual constant diameter length, the second relationship, and the relationship between the evaporation effect and the furnace pressure, with the target furnace pressure as a reference, includes: determining, based on the second relationship, the changing trend of the evaporation parameters corresponding to the growth from the actual constant diameter length to the constant diameter length at a future time; determining the adjustment direction of the actual furnace pressure based on the changing trend and the relationship between the evaporation effect and the furnace pressure; and adjusting the actual furnace pressure based on the target furnace pressure according to the adjustment direction during the growth of the monocrystalline silicon rod from the actual constant diameter length to the constant diameter length at the future time.

[0012] In some embodiments, during the growth of the monocrystalline silicon rod from the actual constant diameter length to the constant diameter length at the future time, adjusting the actual furnace pressure according to the adjustment direction and with the target furnace pressure as a reference includes one of the following: during the growth of the monocrystalline silicon rod from the actual constant diameter length to the constant diameter length at the future time, adjusting the actual furnace pressure once every predetermined time interval according to the adjustment direction and a preset step value, with the target furnace pressure as a reference, until the actual constant diameter length reaches the constant diameter length at the future time; or during the growth of the monocrystalline silicon rod from the actual constant diameter length to the constant diameter length at the future time, adjusting the actual furnace pressure at a uniform speed according to the adjustment direction and the adjustment value, with the target furnace pressure as a reference, wherein the adjustment value is determined based on the change amount corresponding to the change trend and the relationship between the evaporation effect and the furnace pressure.

[0013] In some embodiments, determining the adjustment direction of the actual furnace pressure based on the changing trend and the relationship between the evaporation effect and the furnace pressure includes: when the changing trend is increasing, determining the adjustment direction to increase the actual furnace pressure based on the relationship between the evaporation effect and the furnace pressure; and when the changing trend is decreasing, determining the adjustment direction to decrease the actual furnace pressure based on the relationship between the evaporation effect and the furnace pressure.

[0014] In some embodiments, the target furnace pressure is 0.5~12 Torr.

[0015] The technical solution provided in this application has at least the following advantages: In this application, the resistivity deviation between any two locations along the diagonal of the silicon wafer is less than or equal to 10%. This means that the resistivity variation of the silicon wafer is strictly controlled within a small range, thus ensuring relatively consistent electrical performance and good resistance uniformity, which is beneficial for improving the electrical performance and quality of the silicon wafer. Furthermore, the arsenic concentration range of the silicon wafer is set to 1.38E+15at / cm². 3 Up to 1.56E+16at / cm 3 Within this range, doping efficiency and material properties can be balanced, avoiding crystal defects caused by excessively high doping concentrations while ensuring sufficient conductivity to meet the requirements of silicon wafer applications. The oxygen content of the silicon wafer is controlled to be less than or equal to 2.5E+17 at / cm². 3 This can effectively alleviate the internal stress and crystal defects in silicon wafers caused by high oxygen content, thereby further improving the quality of silicon wafers. Attached Figure Description

[0016] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the drawings in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this application or in the conventional art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart illustrating a method for preparing a silicon wafer according to one embodiment of this application;

[0018] Figure 2 This is a diagram showing the relationship between the constant diameter length and resistivity under different furnace pressures, provided in one embodiment of this application.

[0019] Figure 3This is a graph showing the correspondence between the constant diameter length of a 1 Torr furnace under pressure and the simulated resistivity and the measured resistivity, provided in one embodiment of this application.

[0020] Figure 4 This is a diagram showing the relationship between constant diameter length and resistivity in one embodiment of this application, considering only the evaporation behavior.

[0021] Figure 5 This is an axial resistivity distribution diagram of a single crystal silicon rod prepared under optimized furnace pressure and 1 Torr furnace pressure, provided in one embodiment of this application. Detailed Implementation

[0022] The inventors discovered that during the Czochralski method for growing single-crystal silicon rods, the distribution of Group III and Group V dopants in the crystal is affected by their diffusion coefficients and evaporation constants, leading to uneven distribution of dopant along the crystal growth axis, which in turn affects the resistivity distribution of the single-crystal silicon rod. Furthermore, due to a lack of accurate understanding of the relationship between dopant evaporation parameters and constant diameter length, it is difficult to precisely control the amount of dopant evaporation during crystal growth, resulting in significant resistivity deviations between the head and tail of the single-crystal silicon rod. All of these factors affect the electrical properties and crystal quality of the material.

[0023] To address the aforementioned problems, this application provides a silicon wafer and a method for preparing the silicon wafer. The silicon wafer has a first surface and a second surface opposite each other along its thickness direction, the resistivity deviation between the first surface and the second surface being less than or equal to 10%, and the silicon wafer includes arsenic with a concentration in the range of 1.38E+15 at / cm². 3 ~1.56E+16at / cm 3 The oxygen content of the silicon wafer is less than or equal to 2.5E+17 at / cm. 3 .

[0024] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0025] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0026] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. In addition, the character " / " in this document generally indicates that the related objects before and after it have an "or" relationship.

[0027] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0028] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0029] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the terms in the embodiments of this application can be understood according to the specific circumstances.

[0030] In the accompanying drawings corresponding to the embodiments of this application, the thickness and area of ​​the layers are enlarged for better understanding and ease of description. When describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component may be "directly" located on the surface of the other component, or there may be a third component between the two components. Conversely, when describing a component on the surface of another component, or when another component is formed or disposed on the surface of a component, it indicates that there is no third component between the two components. Furthermore, when describing a component as being "generally" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0031] In the description of the embodiments of this application, when a component "includes" another component, other components are not excluded unless otherwise stated, and other components may be further included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on / located" on another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components between them), or another component may be present therein. Moreover, when a component such as a layer, film, region, or plate is "directly located" on another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it indicates that no other components are located therein.

[0032] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "part" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.

[0033] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0034] One embodiment of this application provides a silicon wafer with a resistivity deviation of less than or equal to 10% along its diagonal direction. The silicon wafer includes arsenic, and the concentration of the arsenic is in the range of 1.38E+15 at / cm². 3 ~1.56E+16at / cm 3 The oxygen content of the silicon wafer is less than or equal to 2.5E+17 at / cm. 3 .

[0035] In the embodiments described in this application, the resistivity deviation between any two locations along the diagonal of the silicon wafer is less than or equal to 10%. This means that the resistivity variation of the silicon wafer is strictly controlled within a small range, ensuring relatively consistent electrical performance and good resistance uniformity, which is beneficial to improving the electrical performance and quality of the silicon wafer. Furthermore, the arsenic concentration range of the silicon wafer is set to 1.38E+15at / cm². 3 Up to 1.56E+16at / cm 3 Within this range, doping efficiency and material properties can be balanced, avoiding crystal defects caused by excessively high doping concentrations while ensuring sufficient conductivity to meet the requirements of silicon wafer applications. The oxygen content of the silicon wafer is controlled to be less than or equal to 2.5E+17 at / cm². 3This can effectively alleviate the internal stress and crystal defects in silicon wafers caused by high oxygen content, thereby further improving the quality of silicon wafers.

[0036] According to some embodiments of this application, the resistivity deviation of the first surface relative to the second surface is greater than or equal to 0%. Specifically, the resistivity deviation of the first surface relative to the second surface may be 1%, 2%, 5%, 7%, 9%, or 10%, etc.

[0037] In other embodiments, the concentration of arsenic may be 1.38E+15 at / cm³. 3 1.4E+16at / cm 3 1.45E+16at / cm 3 1.5E+16at / cm 3 Or 1.56E+16at / cm 3 wait.

[0038] In some other embodiments, the oxygen content of the silicon wafer is greater than 0 at / cm. 3 For example, the oxygen content of the silicon wafer can be 2.5E+17 at / cm. 3 2.2E+17at / cm 3 2E+17at / cm 3 1.8E+17at / cm 3 Or 1.5E+17at / cm 3 wait.

[0039] Furthermore, the resistivity deviation between any two locations in the silicon wafer is greater than or equal to 0% and less than or equal to 10%.

[0040] In one embodiment, the specific testing process for the resistivity deviation of the silicon wafer can be as follows: First, use a suitable solvent and cleaning procedure to remove contaminants and oxide layers from the surface of the silicon wafer to ensure the accuracy of resistivity measurement; if necessary, the surface of the silicon wafer can be slightly etched to eliminate the influence of the surface damage layer; then, select multiple test points (≥2) along the diagonal of the silicon wafer. These points should generally be evenly distributed. Use a four-probe resistivity meter or sheet resistance meter to measure the resistivity at the selected test points and record the resistivity reading at each point to obtain multiple resistivity data; select a maximum resistivity value and a minimum resistivity value from the multiple resistivity data, and calculate the resistivity deviation of the minimum resistivity value relative to the maximum resistivity value, i.e., resistivity deviation = (maximum resistivity value - minimum resistivity value) / maximum resistivity value.

[0041] Furthermore, during the testing process, the number of test points on the diagonal of the silicon wafer can be selected as 3, 5, 7, or other numbers.

[0042] In one embodiment, the process of testing the arsenic doping concentration in the silicon wafer may include: cutting the silicon wafer sample to ensure the sample surface is clean and flat; cleaning the sample with a suitable solvent (such as acetone or isopropanol) and then drying it to prevent surface moisture from affecting the measurement results; calibrating the SIMS (Secondary Ion Mass Spectrometry) instrument using a standard sample containing a known arsenic concentration, then placing the sample into the SIMS instrument and setting the parameters of the ion source and detector; bombarding the sample surface with a focused heavy ion beam to generate secondary ions, including arsenic ions, and collecting and analyzing these secondary ions to generate a depth profile of arsenic; and calculating the arsenic concentration based on the relationship between the signal intensity measured by the SIMS and the previously calibrated standard sample.

[0043] In another embodiment, the process of testing the arsenic doping concentration in the silicon wafer may include: placing four probes on the surface of the silicon wafer, typically with equal spacing between the probes to form a rectangle; using a four-probe resistivity meter to measure the current flowing through the silicon wafer at a specific voltage, thereby calculating the resistivity; moving the probes to perform multi-point measurements along the surface of the silicon wafer to obtain resistivity distribution data; and calculating the arsenic concentration based on the measured resistivity data and a specific dopant-resistivity conversion relationship.

[0044] For example, the oxygen content testing process in the silicon wafer can be as follows: clean the silicon wafer surface with a cleaning agent (such as acetone or isopropanol) to remove possible contaminants and grease layers; dry the sample with dry nitrogen or oil-free air to avoid residual moisture affecting the test results; turn on the IR spectrometer and ensure it is fully preheated to a stable state; calibrate the instrument using a silicon wafer standard with known oxygen content to ensure measurement accuracy; select the infrared absorption spectroscopy mode and set the test parameters, such as scan range and resolution; place the prepared silicon wafer on the instrument's sample holder, ensuring the sample surface is aligned with the detector; start the test, allowing infrared light to pass through the silicon wafer, and record the infrared absorption spectrum data corresponding to the oxygen content of the silicon wafer; analyze the collected infrared absorption spectrum, where the oxygen absorption peak in silicon typically appears at 1107 cm⁻¹. -1 Nearby, by measuring the light absorption intensity at a specific frequency and combining it with a calibrated standard curve, the oxygen concentration in the silicon wafer is calculated.

[0045] It should be noted that the resistivity of silicon wafers is affected by temperature; therefore, the testing process must be conducted at a constant temperature, typically room temperature or a specific temperature range. Furthermore, the contact conditions of the four probes (such as pressure and cleanliness of the contact points) will affect the measurement results; therefore, it is crucial to ensure consistent contact conditions for each measurement. To ensure the reliability of the results, multiple measurements should be taken and the average value calculated.

[0046] Another aspect of this application embodiment provides a method for preparing a silicon wafer, the method being used to prepare the aforementioned silicon wafer. Figure 1 This is a flowchart of a silicon wafer fabrication method according to an embodiment of this application. For example... Figure 1 As shown, the method for preparing the silicon wafer includes:

[0047] Step S201: Obtain the first relationship and the diffusion coefficient of the dopant in the silicon melt under the predetermined growth conditions. The first relationship is the correspondence between the resistivity and the constant diameter length of the single crystal silicon rod under multiple furnace pressures in the historical constant diameter stage. The predetermined growth conditions are the single crystal silicon rod growth conditions that affect the diffusion coefficient.

[0048] Specifically, the furnace pressure refers to the pressure inside the single-crystal furnace. The first relationship refers to the correspondence between the axial resistivity and the constant diameter length of the single-crystal silicon rod under multiple different furnace pressure conditions during the historical constant diameter stage. The constant diameter length refers to the growth length of the single-crystal silicon rod during the historical constant diameter stage. The predetermined growth conditions refer to a series of control parameters set during the growth of the single-crystal silicon rod, which directly affect the diffusion behavior of dopants in the silicon melt.

[0049] Step S202: Based on the diffusion coefficient and the predetermined growth conditions, determine the correspondence between the evaporation parameters of the dopant and the constant diameter length to obtain the second relationship;

[0050] Optionally, the evaporation parameters may include at least one of the evaporation rate constant and the evaporation amount, which directly determine the amount of dopant lost during the isodiameter stage.

[0051] Step S203: In the constant diameter stage, a single crystal silicon rod is prepared using the predetermined growth conditions. Based on the first relationship, the second relationship, and the actual constant diameter length of the single crystal silicon rod, the actual furnace pressure of the single crystal furnace is controlled to control the actual resistivity of the single crystal silicon rod within a predetermined range, thereby obtaining the target single crystal silicon rod.

[0052] Specifically, the first relationship reflects the correspondence between resistivity and constant diameter length under multiple furnace pressure conditions in historical data, while the second relationship reflects the correspondence between evaporation parameters and constant diameter length. Combining this information, the actual furnace pressure that the single-crystal furnace should possess to achieve the target resistivity distribution under the current constant diameter length can be determined. The head of the single-crystal silicon rod refers to the starting growth end of the single-crystal silicon rod, i.e., the part that is first pulled out, specifically the starting growth end in the constant diameter stage. The tail of the single-crystal silicon rod is the part where the single-crystal silicon rod finally grows, specifically the part grown before the end of the constant diameter stage. The predetermined range is set according to actual design needs, and those skilled in the art can flexibly set its specific range value.

[0053] Step S204: Cut the target single-crystal silicon rod to obtain multiple silicon wafers.

[0054] Through the aforementioned embodiments, this application first obtains a first relationship between the resistivity and the equal-diameter length of a single-crystal silicon rod under different furnace pressures during the historical equal-diameter stage. Then, it determines a second relationship between the dopant evaporation parameters and the equal-diameter length. Based on these two relationships and the actual equal-diameter length of the single-crystal silicon rod during the equal-diameter stage, the furnace pressure of the single-crystal furnace is controlled. The furnace pressure is used to compensate for the dopant evaporation behavior, ensuring that the resistivity of the single-crystal silicon rod during the equal-diameter stage remains within a predetermined range. This allows the single-crystal silicon rod to achieve axial uniformity of resistivity during growth, thereby significantly reducing the resistivity deviation between the head and tail of the single-crystal silicon rod and ensuring the resistivity uniformity of the single-crystal silicon rod. Finally, the single-crystal silicon rod is cut to obtain multiple silicon wafers, ensuring that the electrical properties of the silicon wafers are relatively consistent in the axial direction and that the resistance uniformity is good, which is beneficial to improving the electrical performance and quality of the silicon wafers. Highly uniform resistivity silicon wafers, as the basic material for high-performance semiconductor devices, can significantly improve the overall performance of devices. Whether it is integrated circuits, microprocessors or solar cells, the resistivity uniformity of silicon wafers is one of the key factors affecting the final device performance. The silicon wafers prepared by this method have more stable device performance, higher reliability, and can maintain good working condition in various extreme environments.

[0055] In one embodiment, in step S203, the actual resistivity of the single-crystal silicon rod is controlled within a predetermined range, such that the resistivity deviation between the head and tail of the single-crystal silicon rod is less than or equal to 10%.

[0056] For example, the dopant may specifically be arsenic.

[0057] Optionally, the control parameters in the predetermined growth conditions may be, but are not limited to, the pulling speed of the single crystal silicon rod, the furnace temperature, the furnace pressure, the purity of silicon, the purity of the dopant, and the initial solubility of the dopant.

[0058] It should be noted that, apart from the different furnace pressures, the historical equal diameter stages corresponding to multiple furnace pressures have the same control parameters, and these control parameters are the same as the control parameters corresponding to the predetermined growth conditions.

[0059] In one specific embodiment, the silicon wafer is used as a substrate for a solar cell.

[0060] According to an optional embodiment of this application, the predetermined growth conditions include the pulling speed of the single-crystal silicon rod and the initial concentration of the dopant. Obtaining the diffusion coefficient of the dopant in the silicon melt under the predetermined growth conditions includes: obtaining the resistivity of the single-crystal silicon rod during the historical process of preparing the single-crystal silicon rod using the predetermined growth conditions, and converting the resistivity of the single-crystal silicon rod into a first doping concentration; calculating the effective segregation coefficient of the dopant based on the initial concentration and the first doping concentration; and calculating the diffusion coefficient using the BPS model (Boltzmann-Primakov-Slichter model, a theoretical model describing the segregation behavior of impurities during crystal growth) based on the effective segregation coefficient, the equilibrium segregation coefficient of the dopant, the pulling speed, and the boundary layer thickness of the dopant at the solid-liquid interface.

[0061] In the aforementioned embodiment, real-time resistivity data of a single-crystal silicon rod under fixed predetermined growth conditions is acquired and converted into a first doping concentration. The effective segregation coefficient of the dopant is then calculated. Combined with the equilibrium segregation coefficient of the dopant, the pulling speed, and the boundary layer thickness at the solid-liquid interface, the diffusion coefficient is calculated using the BPS model. This further ensures that the diffusion coefficient is not only based on theory but also fully considers the parameters in the actual growth process, thereby improving the accuracy and applicability of the diffusion coefficient calculation results.

[0062] This application, by accurately calculating the diffusion coefficient of the dopant, enables more precise prediction of the dopant's behavior during growth, including its diffusion and evaporation in the silicon melt. This provides a scientific basis for designing and optimizing the growth parameters of single-crystal silicon rods, significantly reducing the resistivity difference between the head and tail of the rod, further optimizing the axial resistivity of the single-crystal silicon rod, and improving the electrical properties and overall quality of the crystal material.

[0063] In practical applications, the diffusion coefficient of dopants is based on values ​​measured in solid silicon at 1200℃. For example, the diffusion coefficient for As dopants is 1.50E-13cm. 2 / s. However, in the actual Czochralski process of growing single-crystal silicon rods, the temperature at which dopants are incorporated into the molten silicon reaches over 1400℃, leading to a decrease in the applicability of conventionally used dopant diffusion coefficients, and consequently affecting the accuracy of resistivity control in the single-crystal silicon rod during the Czochralski process. The embodiments described in this application, by analyzing historical growth data, convert resistivity into doping concentration, calculate the effective segregation coefficient, and combine it with the BPS model, can accurately calculate the diffusion coefficient of the dopant in the silicon melt under predetermined growth conditions. This process makes the prediction of dopant behavior more accurate, thereby enabling effective control of its distribution in the single-crystal silicon rod.

[0064] In this application, the initial concentration refers to the concentration of the dopant element in the melt (such as molten silicon) before crystal growth begins. The predetermined growth conditions refer to growth conditions that include specific values ​​for the pulling speed and the initial concentration.

[0065] For example, taking arsenic as the dopant, the specific process of obtaining the diffusion system in the embodiment may include: firstly, preparing an arsenic-containing silicon single crystal, which is usually achieved by the Czochralski method. In this process, a certain amount of arsenic (arsenic-doped silicon wafer) is added to the silicon melt as a dopant and incorporated into the silicon lattice during crystal growth. After diffusion treatment, the silicon single crystal is slowly cooled to fix the distribution of arsenic atoms in the lattice. Subsequently, the silicon single crystal is cut into a series of thin slices, which will be used for subsequent resistivity measurements. Using a four-probe resistivity or sheet resistance meter, resistivity data of the slice profiles are collected. This data is used to calculate the diffusion coefficient of arsenic, which usually involves calculations such as effective segregation. The diffusion coefficient is determined by fitting the test data with theoretical values, and finally, the diffusion coefficient of arsenic in molten silicon is obtained as 1.5E-5 cm⁻¹. 2 / s. To ensure the accuracy of the experimental results, multiple experiments were conducted (with the predetermined growth conditions maintained consistent across different experiments) to verify the repeatability of the data. The effects of experimental conditions (such as pulling speed, temperature, pressure, and the purity of silicon and arsenic) on the diffusion coefficient were considered, and the diffusion coefficient of arsenic in molten silicon was determined to be 1.5E-5cm. 2 / s can meet the current mass production needs.

[0066] Furthermore, the specific process of converting the resistivity of the single-crystal silicon rod into the first doping concentration may include: converting the resistivity into the doping concentration according to the content of GBT 13389-2014 Conversion Procedure for Resistivity and Dopant Concentration of Boron-Doped, Phosphorus-Doped, and Arsenic-Doped Silicon Single Crystals to obtain the first doping concentration.

[0067] Further, calculating the effective segregation coefficient of the dopant based on the initial concentration and the first doping concentration may include: calculating the difference between the initial concentration and the first doping concentration; and determining the effective segregation coefficient corresponding to the difference in the correspondence between the concentration difference and the effective segregation coefficient.

[0068] Further, based on the effective segregation coefficient, the equilibrium segregation coefficient of the dopant, the pulling speed, and the boundary layer thickness of the dopant at the solid-liquid interface, the diffusion coefficient is calculated using the BPS model, including: according to the formula k_eff = / [ +(1- ) The diffusion coefficient is calculated by taking the effective segregation coefficient, the equilibrium segregation coefficient, the pulling speed, and the boundary layer thickness of the dopant at the solid-liquid interface as exp(-vδ / D)], where k_eff is the effective segregation coefficient; The equilibrium segregation coefficient is a constant (the equilibrium segregation coefficient of As is generally taken as 0.35); v is the pulling speed; δ is the boundary layer thickness of the dopant at the solid-liquid interface, which is generally taken as 0.001; D is the diffusion coefficient.

[0069] According to some embodiments of this application, during the constant diameter growth process, the pulling speed is 100~110 mm / h, and the initial concentration of the dopant is 1.53E+15~1.038E+16 at / cm. 3 The furnace pressure range is 0.5~12 Torr, the rotation speed of the single crystal silicon rod is 6~12 rpm, and the crucible rotation speed is 4.5~10 rpm.

[0070] In some embodiments, determining the correspondence between the evaporation parameters of the dopant and the constant diameter length based on the diffusion coefficient and the predetermined growth conditions to obtain a second relationship includes: establishing a predetermined model, wherein the predetermined model is a crystal rod growth model that considers the segregation behavior of the dopant but does not consider the evaporation behavior of the dopant; configuring the model parameters of the predetermined model based on the diffusion coefficient and the predetermined growth conditions, and using the configured predetermined model to simulate the correspondence between the resistivity of the single crystal silicon rod and the constant diameter length to obtain a third relationship; obtaining the correspondence between the resistivity of the single crystal silicon rod and the constant diameter length during the historical process of preparing the single crystal silicon rod using the predetermined growth conditions to obtain a fourth relationship; and determining the correspondence between the evaporation amount and / or evaporation constant of the dopant and the constant diameter length based on the third relationship and the fourth relationship to obtain the second relationship.

[0071] In the aforementioned embodiment, based on the diffusion coefficient of the dopant and the growth conditions, a crystal rod growth model considering the segregation of the dopant without regard to its evaporation characteristics is constructed. This model simulates the third relationship of resistivity distribution with length during crystal growth, and obtains the relationship of actual resistivity distribution with length of single-crystal silicon rods obtained under the same predetermined growth conditions in historical production processes, thus obtaining a fourth relationship. By analyzing the third and fourth relationships, the evaporation amount and / or evaporation constant of the dopant are accurately calculated, and a second relationship between the dopant and the constant diameter length is constructed. This allows for a precise correspondence between the constant diameter length and the evaporation parameters of the dopant. Based on this correspondence, the evaporation data of the dopant during the growth of the single-crystal silicon rod can be accurately grasped, thereby enabling precise control of the dopant distribution in the single-crystal silicon rod. This greatly improves the control capability of the dopant distribution during single-crystal growth and ensures the uniformity of the axial resistivity of the crystal.

[0072] The evaporation constant refers to the evaporation rate constant.

[0073] For example, the model parameters of the predetermined model include the diffusion coefficient of the dopant, the initial concentration, and the pulling speed of the single-crystal silicon rod. By configuring these parameters, they are made consistent with the diffusion coefficient calculated in this application and its corresponding predetermined growth conditions. Since the diffusion coefficient is a key parameter describing the diffusion ability of the dopant in the melt, and the predetermined growth conditions directly affect the diffusion coefficient, inputting these precisely measured or calculated parameters into the model can improve the prediction accuracy of the model and make it closer to the impurity distribution in the actual growth process. The configured model can more accurately reflect the impurity behavior under the growth conditions, providing a theoretical basis for the optimization of the growth process.

[0074] According to some embodiments of this application, determining the correspondence between the evaporation amount and / or evaporation constant of the dopant and the constant diameter length based on the third and fourth relationships includes: converting the resistivity of the single-crystal silicon rod in the third relationship into the doping concentration of the dopant to obtain a second doping concentration correspondence with the constant diameter length; converting the resistivity of the single-crystal silicon rod in the fourth relationship into the doping concentration of the dopant to obtain a third doping concentration correspondence with the constant diameter length; calculating the evaporation amount and / or the evaporation constant based on the difference between the second and third doping concentrations to obtain a correspondence between the evaporation amount and / or the evaporation constant and the constant diameter length. In this embodiment, the resistivity-constant diameter length relationship (third relationship) obtained based on a predetermined model and the actual grown resistivity-constant diameter length relationship (fourth relationship) are converted into a doping concentration-constant diameter length relationship (second and third doping concentration relationships). By directly comparing the concentration differences, the specific values ​​of the evaporation amount and evaporation constant as a function of the constant diameter length are obtained. This means that at any stage of crystal growth, the impurity loss due to evaporation can be clearly known, and growth conditions can be dynamically adjusted based on these parameters, such as increasing the dopant dosage, adjusting the gas pressure or gas flow rate, to compensate for the concentration reduction caused by evaporation and ensure the target doping level. The method in this application enhances the controllability and predictability of the crystal growth process. By understanding the relationship between evaporation parameters and constant diameter length, growth strategies can be planned in advance, ensuring the stability of the entire growth process and batch-to-batch consistency of the product.

[0075] In the aforementioned embodiment, the resistivity can be converted to the corresponding doping concentration by referring to the content of GBT 13389-2014, which specifies the conversion between resistivity and dopant concentration of boron-doped, phosphorus-doped, and arsenic-doped silicon single crystals.

[0076] Further, the evaporation amount and / or the evaporation constant are calculated based on the difference between the second doping concentration and the third doping concentration. Specifically, this may include: multiplying the difference by the volume of a single silicon crystal rod per unit length to obtain the evaporation amount; and calculating the evaporation constant based on the evaporation amount.

[0077] Furthermore, in some other embodiments, calculating the evaporation amount and / or the evaporation constant based on the difference between the second doping concentration and the third doping concentration may further include: calculating the evaporation constant based on the difference; and calculating the evaporation amount as N=E based on the evaporation constant. v AC1, where A is the melt evaporation surface area; C1 is the impurity concentration in the melt; E v ν is the evaporation constant of the dopant, expressed in cm / s.

[0078] In the embodiment, calculating the difference between the second doping concentration and the third doping concentration can be viewed as a process of curve fitting the curve corresponding to the fourth relationship to the curve corresponding to the third relationship, such that the fitting degree is ≥99.9%, thereby obtaining the correspondence between the difference and the equal diameter relationship. The difference is then converted into evaporation amount and / or evaporation constant to obtain the correspondence between these two and the equal diameter length.

[0079] According to another specific implementation of this application, controlling the actual furnace pressure of the single crystal furnace based on the first relationship, the second relationship, and the actual constant diameter length of the single crystal silicon rod to control the actual resistivity of the single crystal silicon rod within a predetermined range includes: determining a target furnace pressure from a plurality of furnace pressures based on the first relationship and determining the relationship between the evaporation effect of the dopant and the furnace pressure; setting the actual furnace pressure of the single crystal furnace as the target furnace pressure, and adjusting the actual furnace pressure based on the actual constant diameter length, the second relationship, and the relationship between the evaporation effect and the furnace pressure, using the target furnace pressure as a reference, to compensate for the evaporation behavior of the dopant and control the actual resistivity within the predetermined range.

[0080] In this embodiment, based on a first relationship, the optimal furnace pressure is selected from multiple furnace pressures as the target furnace pressure and used as the initial actual furnace pressure. Combining the actual constant diameter length of the single-crystal silicon rod, the correspondence between resistivity and constant diameter length, and the correspondence between evaporation parameters and constant diameter length, the actual furnace pressure is dynamically adjusted based on the target furnace pressure. This effectively compensates for the evaporation behavior of the dopant, ensuring that the dopant distribution in the crystal meets expectations, thereby achieving stable resistivity. This scheme utilizes the first and second relationships to control the actual resistivity of the single-crystal silicon rod within a predetermined range, achieving optimized axial resistivity distribution. This means that even if the dopant concentration changes due to evaporation during the entire crystal growth process, the crystal growth environment can be adjusted by precisely controlling the furnace pressure to achieve an ideal resistivity distribution, improving the uniformity and performance of the crystal material.

[0081] Furthermore, the embodiments described above reduce the number of defective or substandard products caused by improper parameter adjustments through precise parameter control, thereby further saving production costs.

[0082] For example, the target furnace pressure is 0.5~12 Torr. In this application, by setting the target furnace pressure to 0.5~12 Torr, a larger range of furnace pressure adjustment is allowed during the constant diameter growth stage, thereby better compensating for the problem of uneven axial resistivity of the crystal rod caused by the evaporation effect of the dopant. Furthermore, in a low furnace pressure environment, the exchange between the molten silicon and the external gas is reduced, which helps to reduce the solubility of oxygen in the crystal. This is crucial for controlling the oxygen content, avoiding oxygen back-cutting and high tail oxygen levels, and improving the electrical properties and crystal quality of the single crystal silicon rod.

[0083] Furthermore, the target furnace pressure can be set to 1 Torr.

[0084] In some exemplary embodiments, determining a target furnace pressure from among multiple furnace pressures and determining the relationship between the evaporation effect of the dopant and the furnace pressure based on the first relationship includes: determining, based on the first relationship, that the evaporation effect increases as the furnace pressure decreases; calculating, based on the first relationship, the average rate of change of resistivity corresponding to each furnace pressure, and determining the furnace pressure with the smallest average rate of change of resistivity as the target furnace pressure. This application, based on the first relationship between resistivity and constant diameter length under different furnace pressures, discovers that the evaporation effect increases as the furnace pressure decreases. This provides a basis and direction for adjusting the actual furnace pressure based on the target furnace pressure, making the adjustment of furnace pressure during production more streamlined, further ensuring the accuracy and speed of adjustment, and enabling the adjusted resistivity to quickly and accurately return to the predetermined range. Furthermore, this application calculates the average rate of change of resistivity under different furnace pressures and finds the point with the smallest rate of change as the target furnace pressure. This process ensures that the fluctuation of axial resistivity is minimized during the growth process, further improving the resistivity uniformity of the single crystal silicon rod. Moreover, the determination of the target furnace pressure helps to maintain the stability of growth conditions and reduce fluctuations during the growth process, thereby improving the growth rate and production efficiency.

[0085] In some embodiments, the relationship between the evaporation effect and the furnace pressure is that the evaporation effect increases as the furnace pressure decreases. Adjusting the actual furnace pressure based on the actual constant diameter length, the second relationship, and the relationship between the evaporation effect and the furnace pressure, with the target furnace pressure as a reference, includes: determining the trend of change of the evaporation parameters corresponding to the growth from the actual constant diameter length to the constant diameter length at a future time, based on the second relationship; determining the adjustment direction of the actual furnace pressure based on the trend of change and the relationship between the evaporation effect and the furnace pressure; and adjusting the actual furnace pressure based on the target furnace pressure according to the adjustment direction during the growth of the single-crystal silicon rod from the actual constant diameter length to the constant diameter length at the future time. In this application, based on the principle that the evaporation effect of the dopant is significantly enhanced when the furnace pressure decreases and weakened when it increases, a furnace pressure adjustment strategy is proposed. This strategy can adjust the furnace pressure according to the trend of change of the dopant evaporation parameters and this principle to suppress or promote arsenic evaporation, thereby compensating for the effects of evaporation. By implementing this strategy, the furnace pressure will change along a specific adjustment direction from the initial constant diameter length of the crystal to the preset constant diameter length at a future time. This process ensures the precise distribution of doped elements in the crystal, further achieving optimized control of the axial resistivity of the crystal rod, making the axial resistivity distribution of the crystal rod more uniform.

[0086] In one specific implementation, determining the adjustment direction of the actual furnace pressure based on the changing trend and the relationship between the evaporation effect and the furnace pressure includes: when the changing trend is increasing, determining the adjustment direction to increase the actual furnace pressure based on the relationship between the evaporation effect and the furnace pressure to reduce the impact of the increased evaporation parameters on the axial resistivity of the monocrystalline silicon rod; when the changing trend is decreasing, determining the adjustment direction to decrease the actual furnace pressure based on the relationship between the evaporation effect and the furnace pressure to reduce the impact of the decreased evaporation parameters on the axial resistivity of the monocrystalline silicon rod.

[0087] In some optional embodiments, during the growth of the single-crystal silicon rod from the actual constant diameter length to the future constant diameter length, the actual furnace pressure is adjusted according to the adjustment direction and based on the target furnace pressure. This includes: during the growth of the single-crystal silicon rod from the actual constant diameter length to the future constant diameter length, the actual furnace pressure is adjusted every predetermined time interval according to the adjustment direction and a preset step value, based on the target furnace pressure, until the actual constant diameter length reaches the future constant diameter length. In this embodiment, during crystal growth, the actual furnace pressure is adjusted every fixed time interval according to a preset adjustment direction and step value until the predetermined constant diameter length is reached. This strategy, through periodic fine-tuning, can effectively compensate for dopant evaporation losses and maintain the target resistivity distribution.

[0088] In other optional embodiments, during the growth of the single-crystal silicon rod from the actual constant diameter length to the future constant diameter length, the actual furnace pressure is adjusted according to the adjustment direction and based on the target furnace pressure. This includes: during the growth of the single-crystal silicon rod from the actual constant diameter length to the future constant diameter length, the actual furnace pressure is adjusted uniformly according to the adjustment direction and adjustment value, based on the target furnace pressure. The adjustment value is determined based on the change amount corresponding to the change trend and the relationship between the evaporation effect and the furnace pressure. In this embodiment, as the crystal constant diameter length increases, the actual furnace pressure is adjusted uniformly according to the change trend of the dopant evaporation parameters and the relationship between the evaporation effect and the furnace pressure. This adjustment method can more smoothly respond to the evaporation effect, ensuring the uniformity and controllability of the dopant concentration throughout the entire growth cycle.

[0089] According to one specific implementation of this application, the specific preparation process of the single-crystal silicon rod used to prepare silicon wafers in this application is as follows:

[0090] Charging and Melting: High-purity polycrystalline silicon raw material is crushed, cleaned, and loaded into a crucible. Arsenic dopant is added simultaneously. After evacuating the single-crystal furnace, high-purity argon gas is introduced, and the crucible is heated to above 1420℃ to completely melt the polycrystalline silicon and form a melt. The concentration of arsenic dopant is 1.53E+15~1.038E+16 at / cm³. 3 ;

[0091] Crystal introduction: After preheating the seed crystal, slowly immerse it into the molten silicon surface, control the crucible rotation speed to 4.5~10 rpm, the crystal rotation speed to 6~12 rpm, the crystal pulling speed to 50~500 mm / h, and the fine crystal diameter to 5~7 mm; the heater power to 65~75 kW, to form the initial solid-liquid interface;

[0092] Shoulder formation: Control the crucible rotation speed to 4.5~10 rpm, the crystal rotation speed to 6~12 rpm, the crystal pulling speed to 50~500 mm / h, the fine crystal diameter to 5~7 mm, and the heater power to 65~75 kW, so that the crystal diameter gradually increases to the target size;

[0093] Constant diameter growth: Control the heater power to be 52~62kw, the pulling speed to be 100~110mm / h, the single crystal silicon rotation speed to be 6~12rpm, the crucible rotation speed to be 4.5~10rpm, and the actual furnace pressure to be the target furnace pressure. Based on the first relationship, the second relationship, and the actual constant diameter length of the single crystal silicon rod, adjust the actual furnace pressure of the single crystal furnace from the target furnace pressure to make the resistivity deviation of the head to the tail of the single crystal silicon rod less than or equal to 10%, until the constant diameter length meets the set requirements.

[0094] Finishing: Control the heater power to 1.1 to 1.2 times the power before finishing, and control the crystal pulling speed to 90 to 120 mm / h, so that the crystal forms a conical tail, thereby obtaining a complete single crystal silicon rod.

[0095] In some exemplary embodiments of this application, taking arsenic as a dopant as an example, the implementation process of the preparation method of this application is specifically described:

[0096] Step S1: Prepare silicon single crystals containing arsenic, which is usually achieved by the Czochralski method. In this process, a certain amount of arsenic is added to the silicon melt as a dopant and is incorporated into the silicon lattice during crystal growth.

[0097] Step S2: After diffusion treatment, the silicon single crystal is slowly cooled to fix the distribution of arsenic atoms in the crystal lattice. Subsequently, the silicon single crystal is cut into a series of thin slices, which will be used for subsequent resistivity measurements.

[0098] Step S3: Using a four-probe resistivity / sheet resistance meter, collect resistivity data from the cross-section. This data will be used to calculate the diffusion coefficient of arsenic. This typically involves calculations such as effective segregation. The diffusion coefficient is determined by fitting the test data with theoretical values. The diffusion coefficient of arsenic in molten silicon is found to be 1.5E-5 cm⁻¹. 2 / s;

[0099] Step S4: Prepare silicon single crystals containing arsenic, which is usually achieved by the Czochralski method. In this process, a certain amount of arsenic is added to the silicon melt as a dopant and is incorporated into the silicon lattice during crystal growth. The process is verified by three furnace pressure processes: 1 Torr, 4 Torr and 7 Torr.

[0100] Step S5: Using a portable four-probe measuring instrument, measure and collect the axial resistivity data of the pulled crystal ingot at three points every 50mm with an included angle of 120°. The corresponding relationship between the constant diameter length and resistivity under different furnace pressures is shown in the figure below. Figure 2 As shown, Figure 2 In the diagram, the horizontal axis represents the length of the constant diameter in mm, and the vertical axis represents the resistivity in Ω·cm. Figure 2 Analysis of the data shows that at a furnace pressure of 7 Torr, the resistivity of the single crystal pulled from arsenic-doped single crystals matches the resistivity curve after arsenic segregation, meaning that the evaporation rate is close to 0. As the furnace pressure is further reduced, it is found that the evaporation effect of arsenic gradually increases with the decrease of the single crystal furnace pressure, and is greater than the segregation effect of arsenic. In other words, the evaporation effect of arsenic can be enhanced or suppressed by changing the furnace pressure. Therefore, the evaporation of arsenic can be controlled by preset furnace pressure and argon parameters. The preset furnace pressure parameter for subsequent experiments is 1 Torr.

[0101] Step S6: Fit the measured axial resistivity data of the crystal rod into a smooth curve, and introduce the calculation formulas and logic for the evaporation constant and evaporation amount into the conventional doping calculation. Using the arsenic diffusion constant obtained in the first step, simulate the distribution of axial resistivity of the crystal rod caused by arsenic segregation (1 Torr furnace pressure) under the condition of consistent head-controlled resistivity, and obtain the following results: Figure 3 The graph shown is a graph showing the relationship between the constant diameter length under 1 Torr furnace pressure and the simulated resistivity and the measured resistivity (i.e., the curves of the third and fourth relationships). Figure 3 In the diagram, the horizontal axis represents the length of the constant diameter in mm, and the vertical axis represents the resistivity in Ω·cm.

[0102] Step S7: [The sentence is incomplete and requires more context to be translated accurately.] Figure 3 The constant diameter length was fitted to both the simulated resistivity curve and the measured resistivity curve, achieving a fit of ≥99.9%, to obtain the following results: Figure 4 The diagram shown illustrates the relationship between constant diameter length and resistivity when only considering evaporation behavior. Figure 4 In the diagram, the horizontal axis represents the length of the constant diameter in mm, and the vertical axis represents the resistivity in Ω·cm. It should be noted that... Figure 4 In the process, through fitting, the simulated resistivity curve and the actual resistivity curve basically coincide, therefore... Figure 4 Only one curve is displayed;

[0103] Step S8: According to Figure 5 The graph shows the relationship between constant diameter length and resistivity when only considering evaporation behavior. The relationship between the evaporation amount of arsenic and constant diameter length is calculated, and then the evaporation constant of arsenic is calculated using the evaporation amount calculation formula.

[0104] Step S9: Based on the relationship obtained in the above steps, adjust the furnace pressure parameters to obtain the control table of growth parameters for the constant diameter stage shown in Table 1. The axial resistivity distribution of single crystal silicon rods prepared under the optimized furnace pressure and the 1 Torr furnace pressure shown in Table 1 is as follows. Figure 5 As shown, Figure 5 In the experiment, the ratio of head-to-tail resistivity of the monocrystalline silicon rod obtained under 1 Torr furnace pressure was 1.22, which was reduced to 1.03 after optimization. The uniformity of axial resistivity of the crystal rod was improved by 15.1%, showing significant results. The maximum liquid level control value in Table 1 refers to the adjustment rate of the liquid outlet distance during the process of adjusting the actual liquid outlet distance to the target liquid outlet distance value.

[0105] Table 1

[0106]

[0107] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0108] As can be seen from the above description, the embodiments described in this application achieve the following technical effects:

[0109] The resistivity deviation of the silicon wafer in this application along the thickness direction (i.e., from the first surface to the second surface) is less than or equal to 10%. This means that the resistivity variation from the front to the back of the silicon wafer is strictly controlled within a small range, thus ensuring that the electrical properties of the silicon wafer are relatively consistent in the axial direction, with good resistance uniformity, which is beneficial to improving the electrical performance and quality of the silicon wafer. Furthermore, the arsenic concentration range of the silicon wafer is set to 1.38E+15at / cm². 3 Up to 1.56E+16at / cm 3Within this range, doping efficiency and material properties can be balanced, avoiding crystal defects caused by excessively high doping concentrations while ensuring sufficient conductivity to meet the requirements of silicon wafer applications. The oxygen content of the silicon wafer is controlled to be less than or equal to 2.5E+17 at / cm². 3 This can effectively alleviate the internal stress and crystal defects in silicon wafers caused by high oxygen content, thereby further improving the quality of silicon wafers.

[0110] Those skilled in the art will understand that the various embodiments described are specific examples of implementing this application, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of this application. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.

Claims

1. A silicon wafer, characterized by, The resistivity deviation on the diagonal of the silicon wafer is less than or equal to 10%, the silicon wafer includes an arsenic element, the concentration of the arsenic element ranges from 1.38E+15 at / cm 3 1.56E+16 at / cm 3 , and the oxygen content of the silicon wafer is less than or equal to 2.5E+17 at / cm 3 .

2. A method for producing a silicon wafer for use in the production of the silicon wafer according to claim 1, characterized by, The method for preparing the silicon wafer comprises: obtaining a first relationship and a diffusion coefficient of a dopant in a silicon melt under a predetermined growth condition, the first relationship being a corresponding relationship between resistivity and equal-diameter length of a single crystal silicon rod under a plurality of furnace pressures in a historical equal-diameter stage, and the predetermined growth condition being a single crystal silicon rod growth condition affecting the diffusion coefficient; determining a corresponding relationship between evaporation parameters of the dopant and the equal-diameter length according to the diffusion coefficient and the predetermined growth condition, to obtain a second relationship; preparing a single crystal silicon rod in an equal-diameter stage by using the predetermined growth condition, and controlling an actual furnace pressure of a single crystal furnace according to the first relationship, the second relationship and an actual equal-diameter length of the single crystal silicon rod, to control an actual resistivity of the single crystal silicon rod within a predetermined range, to obtain a target single crystal silicon rod; cutting the target single crystal silicon rod to obtain a plurality of silicon wafers.

3. The method of claim 2, wherein the silicon wafer is prepared by a method comprising: The predetermined growth condition comprises a pulling speed of the single crystal silicon rod and an initial concentration of the dopant, and the diffusion coefficient of the dopant in the silicon melt under the predetermined growth condition is obtained by comprising: ​ obtaining resistivity of the single crystal silicon rod in a historical process of preparing the single crystal silicon rod by using the predetermined growth condition, and converting the resistivity of the single crystal silicon rod into a first doping concentration; calculating an effective segregation coefficient of the dopant according to the initial concentration and the first doping concentration; calculating the diffusion coefficient by using a BPS model according to the effective segregation coefficient, a balance segregation coefficient of the dopant, the pulling speed and a boundary layer thickness of the dopant at a solid-liquid interface.

4. The method of claim 2, wherein the silicon wafer is prepared by a method comprising: The corresponding relationship between the evaporation parameters of the dopant and the equal-diameter length is determined according to the diffusion coefficient and the predetermined growth condition, to obtain a second relationship, comprising: ​ establishing a predetermined model, the predetermined model being a crystal rod growth model considering segregation behavior of the dopant and not considering evaporation behavior of the dopant; configuring model parameters of the predetermined model according to the diffusion coefficient and the predetermined growth condition, and simulating a corresponding relationship between resistivity of the single crystal silicon rod and the equal-diameter length by using the configured predetermined model, to obtain a third relationship; obtaining a corresponding relationship between resistivity of the single crystal silicon rod and the equal-diameter length in a historical process of preparing the single crystal silicon rod by using the predetermined growth condition, to obtain a fourth relationship; determining a corresponding relationship between evaporation amount and / or evaporation constant of the dopant and the equal-diameter length according to the third relationship and the fourth relationship, to obtain the second relationship.

5. The method of claim 4, wherein the silicon wafer is prepared by a method comprising: The corresponding relationship between the evaporation amount and / or the evaporation constant of the dopant and the equal-diameter length is determined according to the third relationship and the fourth relationship, comprising: ​ converting the resistivity of the single crystal silicon rod in the third relationship into a doping concentration of the dopant, to obtain a corresponding relationship between a second doping concentration and the equal-diameter length; converting the resistivity of the single crystal silicon rod in the fourth relationship into a doping concentration of the dopant, to obtain a corresponding relationship between a third doping concentration and the equal-diameter length; According to a difference between the second doping concentration and the third doping concentration, the evaporation amount and / or the evaporation constant is calculated to obtain a corresponding relationship between the evaporation amount and / or the evaporation constant and the constant diameter length.

6. The method of claim 2, wherein the silicon wafer is prepared by the steps of: According to the first relationship, the second relationship and the actual constant diameter length of the single crystal silicon rod, an actual furnace pressure of the single crystal furnace is controlled to control the actual resistivity of the single crystal silicon rod within a predetermined range, including: ​ According to the first relationship, a target furnace pressure is determined from a plurality of the furnace pressures and a relationship between the evaporation effect of the dopant and the furnace pressure is determined; The actual furnace pressure of the single crystal furnace is set to the target furnace pressure, and according to the actual constant diameter length, the second relationship and the relationship between the evaporation effect and the furnace pressure, the actual furnace pressure is adjusted based on the target furnace pressure to compensate for the evaporation behavior of the dopant, so as to control the actual resistivity within the predetermined range.

7. The method of claim 6, wherein the silicon wafer is prepared by a method comprising: According to the first relationship, a target furnace pressure is determined from a plurality of the furnace pressures and a relationship between the evaporation effect of the dopant and the furnace pressure is determined, including: ​ According to the first relationship, it is determined that the relationship between the evaporation effect and the furnace pressure is that the evaporation effect increases as the furnace pressure decreases; According to the first relationship, the average change rate of the resistivity corresponding to each of the furnace pressures is calculated, and the furnace pressure with the minimum average change rate of the resistivity is determined as the target furnace pressure.

8. The method of claim 6, wherein the silicon wafer is prepared by a method comprising: The relationship between the evaporation effect and the furnace pressure is that the evaporation effect increases as the furnace pressure decreases, and according to the actual constant diameter length, the second relationship and the relationship between the evaporation effect and the furnace pressure, the actual furnace pressure is adjusted based on the target furnace pressure, including: ​ According to the second relationship, a change trend of the evaporation parameter corresponding to the constant diameter length at a future time from the actual constant diameter length is determined; According to the change trend and the relationship between the evaporation effect and the furnace pressure, a direction of adjustment of the actual furnace pressure is determined; During the process of growing the single crystal silicon rod from the actual constant diameter length to the constant diameter length at the future time, the actual furnace pressure is adjusted based on the target furnace pressure according to the direction of adjustment.

9. The method of claim 8, wherein the silicon wafer is prepared by a method comprising: During the process of growing the single crystal silicon rod from the actual constant diameter length to the constant diameter length at the future time, the actual furnace pressure is adjusted based on the target furnace pressure according to the direction of adjustment, including one of: ​ During the process of growing the single crystal silicon rod from the actual constant diameter length to the constant diameter length at the future time, the actual furnace pressure is adjusted based on the target furnace pressure according to the direction of adjustment and a preset step value every predetermined time interval until the actual constant diameter length reaches the constant diameter length at the future time; During the process of growing the single crystal silicon rod from the actual constant diameter length to the constant diameter length at the future time, the actual furnace pressure is adjusted based on the target furnace pressure according to the direction of adjustment and an adjustment value at a constant speed, and the adjustment value is determined according to a change amount corresponding to the change trend and the relationship between the evaporation effect and the furnace pressure.

10. The method of claim 8, wherein the silicon wafer is prepared by a method comprising: According to the change trend and the relationship between the evaporation effect and the furnace pressure, a direction of adjustment of the actual furnace pressure is determined, including: ​ In a case where the change trend is increasing, according to the relationship between the evaporation effect and the furnace pressure, the direction of adjustment is determined as increasing the actual furnace pressure; In a case where the change trend is decreasing, according to the relationship between the evaporation effect and the furnace pressure, the direction of adjustment is determined as decreasing the actual furnace pressure.

11. The method of claim 6, wherein the silicon wafer is prepared by a method comprising: The target furnace pressure is 0.5-12 Torr. ​

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