Multiplexed add-drop circulator structure with interdigital capacitance compensation

CN121642498BActive Publication Date: 2026-09-22ZHEJIANG UNIV
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Patent Information

Application Number
CN202511809787.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-03
Publication Date
2026-09-22
Estimated Expiration
2045-12-03

AI Technical Summary

Technical Problem

但是该结构一方面由于加抗电路较窄的金属线条会引入较大的损耗,另一方面其尺寸仍然较大,难以满足现有通信系统,尤其是毫米波通信系统小型化集成化要求

Benefits of technology

[0022]如上所述,本发明的带叉指电容补偿的多路加抗环行器结构,通过将每一组微带线组的所有微带线远离中心圆盘的一端设置为向内凹陷的第一叉指部,将第二接地金属层朝向中心圆盘的一侧设置为凸出的第二叉指部,并第一叉指部与第二叉指部相互交错伸入,构成叉指电容结构,从而非互易中心结结构可主要看做由中心圆盘与末端带有叉指电容的加抗枝节(即第一叉指部)并通过接地叉指电容(即第二叉指部)进行电容补偿构成,通过该第一叉指电容结构可在同等带宽要求下大幅度减少多路加抗器结构的尺寸,同时在一定程度上还可减小多路加抗器结构的整体损耗,主要是导体损耗及辐射损耗;另外,通过第一叉指电容结构进行补偿增加了多路加抗环行器结构自由度,使得该结构方便针对不同指标的环行器进行调节,方便实现更大的带宽拓展或带外抑制,在卫星通信,雷达,电子对抗等领域有着良好的应用前景,再者,本实施例的带叉指电容补偿的多路加抗环行器结构能够兼容多种工艺,例如PCB,共烧陶瓷等,但由于其对线条精度要求较高,因此更合适用于MEMS或其他高精度工艺。

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Abstract

The application provides a multi-path add-drop ring oscillator structure with interdigital capacitance compensation, wherein all microstrip lines of each group of microstrip line groups are arranged as inwardly recessed first interdigital parts at one end away from a center disc, a second ground metal layer is arranged as a protruding second interdigital part at one side of the center disc, and the first interdigital part and the second interdigital part are staggered and protrude into each other to form an interdigital capacitance structure. The first interdigital capacitance structure can greatly reduce the size of the multi-path add-drop ring oscillator structure under the same bandwidth requirement, and can also reduce the overall loss of the multi-path add-drop ring oscillator structure to a certain extent. In addition, the compensation by the first interdigital capacitance structure increases the degree of freedom of the multi-path add-drop ring oscillator structure, so that the structure is convenient for adjusting the ring oscillator with different indicators, and is convenient for realizing greater bandwidth expansion or out-of-band suppression. The structure has good application prospects in the fields of satellite communication, radar, electronic countermeasure and the like.
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Description

Technical Field

[0001] This invention relates to the field of microwave integrated devices, and in particular to a multi-channel anti-circuit structure with interdigitated capacitance compensation. Background Technology

[0002] Circulators are key passive components in communication, radar, and test and measurement systems, widely used in communication base stations and radar components. Their core function is to achieve signal isolation, impedance matching, and antenna sharing between channels, thereby ensuring the stable operation of a co-frequency duplex system. Compared to RF switches, circulators utilize the non-reciprocal properties of gyromagnetic materials to achieve unidirectional signal transmission, effectively avoiding the power amplifier load pulling effect caused by impedance mismatch, thus significantly improving system performance and reliability.

[0003] Currently, common circular isolators mainly include waveguide and microstrip types. In addition, self-biased material circulators and time-limited mechanism-based circulators are also used. These two types do not require permanent magnets, but their insertion loss is too high and the bandwidth is too narrow, so they are generally less commonly used. Waveguide circulators are based on metal waveguide cavities and ferrite loading structures, utilizing the non-reciprocal transmission characteristics of TE mode electromagnetic waves to achieve isolation. They have the advantages of low loss and high power capacity, but their large size makes it difficult to meet the miniaturization, lightweighting, and planar integration requirements of modern systems. Therefore, smaller and easier-to-integrate microstrip circulators have become the mainstream technology direction. Microstrip circulators adopt a planar design, achieving non-reciprocal transmission through electromagnetic coupling between the microstrip line and the ferrite substrate. The non-reciprocal center junction of mainstream microstrip circulators generally uses a common disk junction or double Y junction. This structure is simple to calculate but usually has low bandwidth and large size. The non-reciprocal center junction of the multi-path reactive structure is introduced by connecting multiple branches in parallel with the disk junction, introducing additional resonant response and further improving the bandwidth. However, this structure introduces significant losses due to the narrow metal lines of the reactive circuit, and its size remains relatively large, making it difficult to meet the miniaturization and integration requirements of existing communication systems, especially millimeter-wave communication systems.

[0004] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating the understanding of those skilled in the art. It should not be assumed that the above technical solutions are known to those skilled in the art simply because these solutions have been described in the background section of this application. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a multi-channel reactive circulator structure with interdigitated capacitance compensation, which solves the problem that the multi-channel reactive structure with non-reciprocal center junction in the microstrip circulator has a large size and is difficult to meet the miniaturization requirements of the device.

[0006] To achieve the above and other related objectives, the present invention provides a multi-channel circulator structure with interdigitated capacitance compensation, wherein the multi-channel circulator structure comprises, from bottom to top along the thickness direction:

[0007] A magnetically conductive metal layer and a first grounded metal layer disposed on the magnetically conductive metal layer;

[0008] A dielectric substrate disposed on the surface of the first grounding metal layer, wherein a patterned metal layer is disposed on the upper surface of the dielectric substrate;

[0009] A conductive pillar penetrating the dielectric substrate, one end of which is electrically connected to the first grounded metal layer;

[0010] A ferrite substrate extends through the dielectric substrate, with one end of the ferrite substrate electrically connected to the magnetically conductive metal layer and the other end electrically connected to the patterned metal layer.

[0011] A permanent magnet, electrically insulatingly disposed above the patterned metal layer, and the horizontal projection of the permanent magnet covers the ferrite substrate;

[0012] The patterned metal layer includes a second ground metal layer and a circulator. The circulator includes a non-reciprocal central junction structure, which includes a multi-path reactive circuit structure, input / output ports, and a matching network that matches the input / output ports. The multi-path reactive circuit structure includes a central disk and three sets of microstrip lines connected at equal intervals around the outer periphery of the central disk. The end of the microstrip line in each set away from the central disk is configured as an inwardly recessed first interdigitated part. The side of the second ground metal layer facing the central disk is configured as a protruding second interdigitated part. All the first interdigitated parts and all the second interdigitated parts extend into each other in an alternating manner to form a first interdigitated capacitor structure. The other end of the conductive post is electrically connected to the second ground metal layer.

[0013] Optionally, each group of microstrip lines includes the same number of microstrip lines; each group of microstrip lines includes two or more microstrip lines and the microstrip lines are distributed in parallel.

[0014] Optionally, the matching network employs capacitive-inductive matching or quarter-wavelength matching.

[0015] Furthermore, the inductors after the first stage in the matching network are bent microstrip lines; the capacitors in the matching network are second interdigitated capacitor structures, and the interdigitated grounding electrode of the second interdigitated capacitor structure is disposed in the region of the second grounding metal layer, and the interdigitated working electrode of the second interdigitated capacitor structure is disposed in the region where the matching network is located.

[0016] Furthermore, a slot is provided on the side of the second interdigital capacitor structure where the interdigital working electrode is connected to the inductor, and the inductor is connected to the interdigital working electrode of the second interdigital capacitor structure in the slotted area.

[0017] Optionally, the magnetically conductive metal layer and the first grounded metal layer are connected by a conductive adhesive layer.

[0018] Optionally, the permanent magnet is disposed above the patterned metal layer via an insulating pad.

[0019] Further, the dielectric substrate is a first high-resistivity silicon substrate; a second high-resistivity silicon substrate is disposed on the upper surface of the patterned metal layer, and the upper surface of the second high-resistivity silicon substrate is connected to the insulating pad layer; the patterned metal layer includes a first patterned metal layer, a bonding metal layer and a second patterned metal layer from bottom to top along the thickness direction, and the other end of the ferrite substrate is electrically connected to the second patterned metal layer, and a portion of the area where the second ground metal layer is located includes a portion of the overlapping area of ​​the first patterned metal layer, the bonding metal layer and the second patterned metal layer.

[0020] Optionally, the input / output ports are in the form of coplanar waveguides or microstrip lines.

[0021] Optionally, the material of the dielectric substrate is PCB board, ceramic, ferrite, or glass.

[0022] As described above, the multi-channel reactive circulator structure with interdigitated capacitor compensation of the present invention is constructed by setting the end of all microstrip lines in each group of microstrip lines away from the central disk as an inwardly recessed first interdigitated portion, and setting the side of the second ground metal layer facing the central disk as a protruding second interdigitated portion. The first and second interdigitated portions extend into each other in an alternating manner to form an interdigitated capacitor structure. Thus, the non-reciprocal central junction structure can be mainly regarded as being composed of a central disk and reactive stubs (i.e., first interdigitated portions) with interdigitated capacitors at the ends, and capacitor compensation is achieved through grounded interdigitated capacitors (i.e., second interdigitated portions). This first interdigitated capacitor structure can significantly reduce the number of multi-channel reactive circulators under the same bandwidth requirements. The structure's dimensions are reduced, and to some extent, the overall loss of the multi-channel reactive circulator structure can be reduced, mainly conductor loss and radiation loss. Furthermore, compensation via the first interdigital capacitor structure increases the structural freedom of the multi-channel reactive circulator, making it easy to adjust for circulators with different performance characteristics. This facilitates greater bandwidth expansion or out-of-band suppression, showing promising application prospects in satellite communication, radar, and electronic countermeasures. Moreover, the multi-channel reactive circulator structure with interdigital capacitor compensation in this embodiment is compatible with various processes, such as PCB and co-fired ceramics. However, due to its high requirements for line precision, it is more suitable for MEMS or other high-precision processes. Attached Figure Description

[0023] Figure 1 The diagram shown is a cross-sectional view of a first example of the multi-channel anti-circuit circulator structure with interdigitated capacitor compensation according to the present invention.

[0024] Figure 2 The diagram shown is a cross-sectional view of a second example of the multi-channel anti-circuit circulator structure with interdigitated capacitor compensation according to the present invention.

[0025] Figure 3 The diagram shown is a top view of an example of the multi-channel anti-circuit circulator structure with interdigitated capacitor compensation according to the present invention.

[0026] Figure 4 The figure shown is an insertion loss data graph from a three-dimensional electromagnetic simulation of the multi-channel anti-circulator structure with interdigitated capacitor compensation according to the present invention.

[0027] Figure 5 The image shown is a return loss data graph from a three-dimensional electromagnetic simulation of the multi-channel anti-circulator structure with interdigitated capacitor compensation according to the present invention.

[0028] Figure 6 The diagram shows the isolation data of the three-dimensional electromagnetic simulation of the multi-channel reactive circulator structure with interdigitated capacitor compensation according to the present invention.

[0029] Component designation explanation

[0030] 10 Magnetic metal layer 11 conductive adhesive layer 12 First grounding metal layer 13 dielectric substrate 130 First high-resistivity silicon substrate 14 Patterned metal layer 140 Second grounding metal layer 141 First patterned metal layer 142 Bonded metal layer 143 Second patterned metal layer 144 Input / output ports 145 Matching Network 146 inductance 147 Second interdigital capacitor structure 147a interdigital grounding electrode 147b interdigitated working electrode 15 Conductive pillar 16 Ferrite substrate 17 permanent magnet 18 Insulating pad 19 Second high-resistivity silicon substrate 200 Central disk 201 microstrip line 202 microstrip line 203 First interdigital region 204 Second interdigital region 205 First interdigital capacitor structure Detailed Implementation

[0031] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0032] In the detailed description of embodiments of the present invention, for ease of explanation, the schematic diagrams illustrating the device structure may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0033] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” “upper”, etc., may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the accompanying drawings for devices in use or operation.

[0034] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0035] Please see Figures 1 to 6 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0036] like Figures 1 to 3 As shown, this embodiment provides a multi-channel circulator structure with interdigitated capacitance compensation. The multi-channel circulator structure includes, from bottom to top along the thickness direction:

[0037] A magnetically conductive metal layer 10 and a first grounded metal layer 12 disposed on the magnetically conductive metal layer 10;

[0038] A dielectric substrate 13 is disposed on the surface of the first grounded metal layer 12, and a patterned metal layer 14 is disposed on the upper surface of the dielectric substrate 13.

[0039] A conductive post 15 penetrates the dielectric substrate 13, and one end of the conductive post 15 is electrically connected to the first grounded metal layer 12.

[0040] A ferrite substrate 16 penetrates the dielectric substrate 13, and one end of the ferrite substrate 16 is electrically connected to the magnetically conductive metal layer 10, and the other end is electrically connected to the patterned metal layer 14.

[0041] A permanent magnet 17 is electrically insulated above the patterned metal layer 14, and the horizontal projection of the permanent magnet 17 covers the ferrite substrate 16.

[0042] The patterned metal layer 14 includes a second ground metal layer 140 and a circulator. The circulator includes a non-reciprocal central junction structure, which includes a multi-path reactive circuit structure, an input / output port 144, and a matching network 145 that matches the input / output port 144. The multi-path reactive circuit structure includes a central disk 200 and three sets of microstrip line groups 201 that are equally spaced around the outer periphery of the central disk 200. The end of the microstrip line 202 of each set of microstrip line groups 201 that is away from the central disk 200 is configured as an inwardly recessed first interdigitated portion 203. The side of the second ground metal layer 140 facing the central disk 200 is configured as a protruding second interdigitated portion 204. All the first interdigitated portions 203 and all the second interdigitated portions 204 extend into each other in an alternating manner to form a first interdigitated capacitor structure 205. The other end of the conductive post 15 is electrically connected to the second ground metal layer 140.

[0043] It should be noted here that, for ease of understanding and definition, the vertical relationship of the thickness direction of the multi-channel anti-circulation device structure is defined by the placement method of the multi-channel anti-circulation device structure shown in the attached figure.

[0044] The multi-channel reactive circulator structure with interdigitated capacitor compensation in this embodiment is constructed by setting the ends of all microstrip lines in each microstrip line group away from the central disk as inwardly recessed first interdigitated portions, and setting the side of the second ground metal layer facing the central disk as protruding second interdigitated portions. The first and second interdigitated portions extend into each other in an alternating manner to form an interdigitated capacitor structure. Thus, the non-reciprocal central junction structure can be mainly regarded as being composed of a central disk and reactive stubs with interdigitated capacitors at the ends (i.e., the first interdigitated portions), with capacitance compensation through grounded interdigitated capacitors (i.e., the second interdigitated portions). This first interdigitated capacitor structure can significantly reduce the number of multi-channel reactive circulator structures under the same bandwidth requirements. The size of the multi-channel reactive circulator is reduced, and the overall loss of the multi-channel reactive circulator structure is also reduced to a certain extent, mainly conductor loss and radiation loss. In addition, the compensation through the first interdigital capacitor structure increases the degree of freedom of the multi-channel reactive circulator structure, making it easy to adjust the structure for circulators with different performance indicators, and to achieve greater bandwidth expansion or out-of-band suppression. It has good application prospects in satellite communication, radar, electronic countermeasures and other fields. Furthermore, the multi-channel reactive circulator structure with interdigital capacitor compensation in this embodiment is compatible with various processes, such as PCB, co-fired ceramics, etc., but because it has high requirements for line accuracy, it is more suitable for MEMS or other high-precision processes.

[0045] The length parameters of the first interdigital capacitor structure 205 and the second interdigital capacitor structure 204, as well as the interval parameters between the first interdigital capacitor structure 203 and the second interdigital capacitor structure 204, can be freely adjusted according to actual needs.

[0046] In one embodiment, the material of the magnetically conductive metal layer 10 can be a Kovar alloy, such as an Fe-Ni-Co alloy, whose composition is generally Fe (54% wet), Ni (29% wet), Co (17% wet), and trace amounts of other components such as Si and Mn, but it is not limited to this. Other magnetically conductive metal materials are also acceptable, such as iron, nickel, and their alloys. The thickness of the magnetically conductive metal layer 10 is 50 μm to 300 μm, for example, it can be 50 μm, 150 μm, 250 μm, or 300 μm. The specific thickness of the magnetically conductive metal layer 10 can be set according to the size of the multi-channel anti-circuit circulator structure required by actual needs, and is not limited here.

[0047] like Figure 1 As shown in the figure, as an example, the magnetically conductive metal layer 10 and the first grounded metal layer 12 are connected by a conductive adhesive layer 11. The material of the conductive adhesive layer 11 includes, but is not limited to, metal solder and conductive adhesive, such as silver, gold or other conductive metals. The conductive adhesive layer 11 and the magnetically conductive metal layer 10 have good electrical and thermal conductivity and a low coefficient of thermal expansion. The thickness of the conductive adhesive layer 11 is 10μm to 50μm, for example, it can be 10μm, 30μm or 50μm, and there is no limitation here.

[0048] like Figure 1 and Figure 2 As shown, as an example, the permanent magnet 17 is disposed above the patterned metal layer 14 via an insulating pad 18. The material of the insulating pad 18 can be, for example, ceramic, polyimide, or other insulating materials. The permanent magnet 17, the insulating pad 18, and the ferrite substrate 16 are coaxially arranged in the thickness direction. The thickness of the insulating pad 18 is 50μm to 400μm; the permanent magnet 17 provides a constant bias magnetic field, thereby achieving a signal loop effect and ultimately enabling low-loss signal transmission. Its material can be selected from materials capable of providing a bias magnetic field, such as samarium cobalt alloy or neodymium iron boron alloy, and its thickness is selected from 400μm to 3000μm.

[0049] Three groups of microstrip line groups 201 are equally spaced and connected to the outer periphery of the central disk 200, meaning the three groups of microstrip line groups 201 are distributed at 120° angles. As an example, each group of microstrip line groups 201 includes the same number of microstrip lines 202, and each group of microstrip line groups 201 includes two or more microstrip lines 202, which are distributed parallel to each other. Figure 3 As shown, in this embodiment, each group of microstrip lines 201 includes 5 microstrip lines 202, and the 5 microstrip lines 202 are distributed in parallel with each other.

[0050] As an example, the matching network 145 employs capacitor-inductor matching. Specifically, the matching structure and method can be flexibly adjusted according to the bandwidth and size requirements of the multi-channel circulator structure. For example, it can be first-order LC matching, second-order LC matching, LCL matching, quarter-wavelength matching, etc. Figure 3 As shown in this embodiment, a second-order LC matching is illustrated, wherein the inductors 146 after the first stage in the matching network 145, for example... Figure 3 The second-stage inductor 146 is a bent microstrip line to reduce the inductor size; the capacitor in the matching network 145 is a second interdigital capacitor structure 147, and the interdigital ground electrode 147a of the second interdigital capacitor structure 147 is disposed in the region of the second ground metal layer 140, and the interdigital working electrode 147b of the second interdigital capacitor structure 147 is disposed in the region of the matching network 145. The interdigital structure significantly increases the capacitance density, thereby effectively reducing the capacitor area. Based on this, as a further preferred embodiment, such as... Figure 3 As shown, a slot 148 is provided on the side of the second interdigital capacitor structure 147 where the interdigital working electrode 147b is connected to the inductor 146. The inductor 146 is connected to the interdigital working electrode 147b of the second interdigital capacitor structure 147 in the slot 148 area, which allows the inductor and capacitor to share space to a certain extent, thereby effectively reducing the size of the matching network 145.

[0051] The form of the input / output port 144 is not overly restricted; it can be selected according to actual needs, such as a coplanar waveguide, a microstrip line, etc. Figure 3 As shown, the input / output port 144 is selected as a coplanar waveguide.

[0052] As described above, the multi-channel circulator structure with interdigitated capacitance compensation in this embodiment is compatible with various processes, such as PCB, co-fired ceramics, etc. Therefore, the material of the dielectric substrate 13 can be selected as PCB board, ceramic, ferrite material, glass, or high-resistivity silicon material. Figure 1 As shown, when the dielectric substrate 13 is made of ceramic, the dielectric substrate 13 and the ferrite substrate 16 can be formed using a co-fired ceramic process. Since the multi-channel circulator structure with interdigitated capacitance compensation in this embodiment has high requirements for microstrip line precision, it is more suitable to use MEMS or other high-precision processes. For example, in MEMS processes, two high-resistivity silicon substrates are bonded together, and insulating adhesive is used to fix the permanent magnet and insulating pad to one of the high-resistivity silicon substrates. The ferrite substrate is then fixed to the underlying magnetically conductive metal layer via a conductive adhesive layer before being connected to the other high-resistivity silicon substrate. Specifically... Figure 2As shown, a two-layer high-resistivity silicon substrate is used, consisting of a lower first high-resistivity silicon substrate 130 and an upper second high-resistivity silicon substrate 19 bonded together. An insulating adhesive (not shown) is used to fix the permanent magnet 17 and the insulating pad layer 18 onto the second high-resistivity silicon substrate 19. A ferrite substrate 16 is fixed to the lower magnetically conductive metal layer 10 via a conductive adhesive layer 11 and then connected to the second high-resistivity silicon substrate 19 via a patterned metal layer 14. The patterned metal layer 14 between the first high-resistivity silicon substrate 130 and the second high-resistivity silicon substrate 19 requires two metal layers to be bonded together. The patterned metal layer 14, from bottom to top along its thickness direction, includes a first patterned metal layer 141, a bonding metal layer 142, and a second patterned metal layer 143. The bonding metal layer 142 bonds the first patterned metal layer 141 to the second patterned metal layer 143. The other end of the ferrite substrate 16 is electrically connected to the second patterned metal layer 143. A portion of the area where the second grounded metal layer 140 is located includes a portion of the overlapping area of ​​the first patterned metal layer 141, the bonding metal layer 142, and the second patterned metal layer 143. Additionally... Figure 2 The second ground metal layer 140 on the right-hand conductive pillar 15 is merely the first patterned metal layer 141, serving as the ground terminal of the output / output port 144 in the form of a coplanar waveguide. In this embodiment, the thickness of the first high-resistivity silicon substrate 130 is selected to be 50μm~600μm, for example 250μm; the thickness of the second high-resistivity silicon substrate 19 is 50μm~400μm, for example 250μm; the thickness of the first ground metal layer 12 is 2μm~20μm, for example 6μm; the thickness of the first patterned metal layer 141 is 2μm~20μm, for example 6μm; the thickness of the bonding metal layer 142 is 2μm~30μm, for example 9μm; and the thickness of the second patterned metal layer 143 is 2μm~20μm, for example 6μm.

[0053] As an example, the material of the conductive post 15 includes, but is not limited to, copper, gold or other metals, and the diameter of the conductive post is selected from 10μm to 200μm, which is set according to actual needs and process capabilities.

[0054] As an example, the material of the patterned metal layer 14 includes, but is not limited to, copper, gold, or other metals.

[0055] like Figures 4 to 6 As shown, it displays the S-parameter simulation results obtained after performing a three-dimensional electromagnetic simulation of the multi-channel reactive circulator structure with interdigitated capacitor compensation in this embodiment. Figure 4 It can be seen that within the 31.5GHz~38.5GHz frequency band, the insertion loss is less than 0.75dB; from Figure 5 It can be seen that within the 32GHz~38GHz frequency band, the return loss is better than 17dB; from Figure 6 It can be seen that the isolation is better than 17.5dB within the 31.5GHz~38.5GHz frequency band. Moreover, the size of the entire structure is only 3mm×3mm.

[0056] In summary, this invention provides a multi-path reactive circulator structure with interdigitated capacitor compensation. By designating the ends of all microstrip lines in each microstrip line group furthest from the central disk as inwardly recessed first interdigitated portions, and the side of the second ground metal layer facing the central disk as protruding second interdigitated portions, the first and second interdigitated portions extend alternately to form an interdigitated capacitor structure. Thus, the non-reciprocal central junction structure can be primarily viewed as consisting of a central disk and reactive stubs (i.e., first interdigitated portions) with interdigitated capacitors at their ends, with capacitance compensation achieved through grounded interdigitated capacitors (i.e., second interdigitated portions). This first interdigitated capacitor structure can significantly reduce the multi-path reactive load under the same bandwidth requirements. The size of the device structure is reduced, and the overall loss of the multi-channel reactance circulator structure can be reduced to a certain extent, mainly conductor loss and radiation loss. Furthermore, compensation through the first interdigital capacitor structure increases the structural freedom of the multi-channel reactance circulator, making it easy to adjust the structure for circulators with different performance characteristics, facilitating greater bandwidth expansion or out-of-band suppression. This has promising application prospects in satellite communication, radar, electronic countermeasures, and other fields. Moreover, the multi-channel reactance circulator structure with interdigital capacitor compensation in this embodiment is compatible with various processes, such as PCB and co-fired ceramics. However, due to its high requirements for line precision, it is more suitable for MEMS or other high-precision processes. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0057] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A multi-channel reactive circulator structure with interdigitated capacitor compensation, characterized in that, The multi-channel anti-circuit circulator structure includes, from bottom to top, the following components along the thickness direction: A magnetically conductive metal layer and a first grounded metal layer disposed on the magnetically conductive metal layer; A dielectric substrate disposed on the surface of the first grounding metal layer, wherein a patterned metal layer is disposed on the upper surface of the dielectric substrate; A conductive pillar penetrating the dielectric substrate, one end of which is electrically connected to the first grounded metal layer; A ferrite substrate extends through the dielectric substrate, with one end of the ferrite substrate electrically connected to the magnetically conductive metal layer and the other end electrically connected to the patterned metal layer. A permanent magnet, electrically insulatingly disposed above the patterned metal layer, and the horizontal projection of the permanent magnet covers the ferrite substrate; The patterned metal layer includes a second ground metal layer and a circulator. The circulator includes a non-reciprocal central junction structure, which includes a multi-path reactive circuit structure, input / output ports, and a matching network that matches the input / output ports. The multi-path reactive circuit structure includes a central disk and three sets of microstrip lines connected at equal intervals around the outer periphery of the central disk. The end of the microstrip line in each set away from the central disk is configured as an inwardly recessed first interdigitated part. The side of the second ground metal layer facing the central disk is configured as a protruding second interdigitated part. All the first interdigitated parts and all the second interdigitated parts extend into each other in an alternating manner to form a first interdigitated capacitor structure. The other end of the conductive post is electrically connected to the second ground metal layer. The matching network employs capacitor-inductor matching; the inductors in the matching network after the first stage are bent microstrip lines; the capacitors in the matching network are second interdigitated capacitors, and the interdigitated ground electrode of the second interdigitated capacitor is disposed in the second ground metal layer region, and the interdigitated working electrode of the second interdigitated capacitor is disposed in the region where the matching network is located; a slot is provided on the side of the interdigitated working electrode of the second interdigitated capacitor that is connected to the inductor, and the inductor is connected to the interdigitated working electrode of the second interdigitated capacitor in the slot region.

2. The multi-channel circulator structure with interdigitated capacitance compensation according to claim 1, characterized in that: Each group of microstrip lines includes the same number of microstrip lines; each group of microstrip lines includes two or more microstrip lines and the microstrip lines are distributed in parallel.

3. The multi-channel circulator structure with interdigitated capacitor compensation according to claim 1, characterized in that: The magnetically conductive metal layer is connected to the first grounded metal layer through a conductive adhesive layer.

4. The multi-channel circulator structure with interdigitated capacitor compensation according to claim 1, characterized in that: The permanent magnet is disposed above the patterned metal layer through an insulating pad.

5. The multi-channel circulator structure with interdigitated capacitor compensation according to claim 4, characterized in that: The dielectric substrate is a first high-resistivity silicon substrate; a second high-resistivity silicon substrate is disposed on the upper surface of the patterned metal layer, and the upper surface of the second high-resistivity silicon substrate is connected to the insulating pad layer; the patterned metal layer includes a first patterned metal layer, a bonding metal layer and a second patterned metal layer from bottom to top along the thickness direction; the other end of the ferrite substrate is electrically connected to the second patterned metal layer; a portion of the area where the second ground metal layer is located includes a portion of the overlapping area of ​​the first patterned metal layer, the bonding metal layer and the second patterned metal layer.

6. The multi-channel circulator structure with interdigitated capacitor compensation according to claim 1, characterized in that: The input / output ports are in the form of coplanar waveguides or microstrip lines.

7. The multi-channel circulator structure with interdigitated capacitance compensation according to claim 1, characterized in that: The substrate material is PCB board, ceramic, ferrite, or glass.

Citation Information

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