Small-sized wide instantaneous bandwidth radio frequency receiving front-end sip module based on hccc

Abstract

The application discloses a kind of small wide instantaneous bandwidth radio frequency receiving front-end SiP module based on HTCC, belong to microwave and radio frequency technical field.The radio frequency receiving front-end based on the SiP module of HTCC, by high local oscillator dual-frequency conversion mode, far away from radio frequency signal spectrum with image frequency, and the stray component generated by mixing is moved to the high frequency area outside intermediate frequency passband, realize wide instantaneous bandwidth and high spur suppression.The application realizes the miniaturization of SiP module based on HTCC process;Combined with the architecture of secondary frequency conversion superheterodyne circuit and high local oscillator design, the instantaneous operating bandwidth is widened to 4GHz, and high spur suppression is realized simultaneously;In addition, the vertical interconnection structure is improved in the application Design, realizes long distance low-loss transmission of radio frequency signal, and further reduces size.The application has the advantages of miniaturization, wide instantaneous bandwidth, low noise amplification and high spur suppression, and provides a solution for the miniaturization and low-cost mass production of ultra-wideband radio frequency system.

Description

Technical Field

[0001] This invention belongs to the field of microwave and radio frequency technology, specifically relating to a small wide instantaneous bandwidth radio frequency receiver front-end SiP module based on high temperature co-fired ceramic (HTCC) technology. Background Technology

[0002] The 2-18 GHz frequency band is the core spectrum for radar, satellite communication, and 5G millimeter-wave technology. Its radio frequency (RF) receiver front-end is a key module in wireless systems and is widely used in radar detection, wireless communication, satellite navigation, and military defense. With the increasing complexity of the electromagnetic environment and the surge in transmission capacity requirements, stringent requirements have been placed on the RF receiver front-end, including wide instantaneous bandwidth, low noise figure, high spurious suppression, and wideband high-density integration.

[0003] Early RF receivers employed discrete components and hybrid module designs. While achieving functional integration, they suffered from low efficiency, insufficient integration density, and long signal transmission paths, making it difficult to meet the performance requirements of high-frequency broadband applications. SiP (System-in-Package) technology, through heterogeneous integration and three-dimensional stacking, efficiently integrates active / passive components manufactured using different processes, providing crucial support for high-performance integrated transceivers. In packaging technology, high-temperature co-fired ceramic (HTCC) technology has become an ideal choice for high-density system integration due to its high thermal conductivity, good solder joint reliability, low material cost, and support for multi-layer three-dimensional architectures and high-density interconnects.

[0004] However, existing RF receiver front-ends typically have limited instantaneous bandwidth. To enhance instantaneous bandwidth while maintaining good harmonic and spurious suppression performance, increasing the local oscillator (LO) frequency is often employed. However, designing interconnect structures with low-loss characteristics and high-performance filtered transmission lines at high LO frequencies presents significant technical challenges.

[0005] In summary, in order to simultaneously meet the application requirements of wide instantaneous bandwidth, low noise figure, high spurious suppression, and wideband high-density integration, there is an urgent need for a new type of RF front-end SiP module that can achieve innovation in size, circuit architecture, and broadband high-frequency transmission interconnection structure, solve many problems existing in the current RF front-end, and provide an innovative solution for the miniaturization and low-cost mass production of ultra-wideband RF front-end systems. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention provides a small, wide instantaneous bandwidth RF receiver front-end SiP module based on HTCC (High-Temperature Compactor). This invention effectively solves the aforementioned technical challenges through innovative circuit design, architecture design, and five matching wideband, low-loss transmission interconnect structures across three main categories. Specifically, leveraging the advantages of HTCC technology, such as support for multi-layer three-dimensional architecture and high-density interconnects, enables the miniaturization of the SiP module. Combining a double-conversion superheterodyne circuit architecture and a high local oscillator design, the instantaneous operating bandwidth is broadened to 4GHz, while simultaneously achieving spurious rejection exceeding 50dBc. Based on impedance / mode matching methods and parity-mode constraint principles, a multi-functional transmission interconnect structure for surface-layer high-frequency ultra-wideband zigzag substrate integrated waveguides (SIW) and an inter-layer coaxial vertical interconnect structure are designed, achieving long-distance, low-loss transmission of RF signals. Furthermore, this interconnect system is integrated with the SiP module, further reducing its size. This invention features miniaturization, wide instantaneous bandwidth, low-noise amplification, and high spurious rejection, providing an innovative solution for the miniaturization and low-cost mass production of ultra-wideband RF systems.

[0007] The specific technical solution adopted in this invention is as follows:

[0008] A small, highly integrated radio frequency receiver front-end (SiP) module based on HTCC is characterized in that the radio frequency receiver front-end is implemented based on the HTCC SiP module, and the radio frequency receiver front-end uses a high local oscillator dual-frequency conversion method to move the image frequency away from the radio frequency signal spectrum and shift the spurious components generated by mixing to a high-frequency region outside the intermediate frequency (IF) passband, thereby achieving wide instantaneous bandwidth and high spurious suppression.

[0009] Preferably, the radio frequency receiving front end includes a radio frequency signal pre-processing module, a switch, a direct output module, a frequency conversion output module, a first-stage local oscillator signal generation module, and a second-stage local oscillator signal generation module;

[0010] The radio frequency signal pre-processing module is used to preprocess the wideband input radio frequency signal and input it to the subsequent module through a switch;

[0011] The switch, based on the frequency band of the input radio frequency signal, inputs radio frequency signals of 4 GHz and below to the direct output module, and inputs radio frequency signals above 4 GHz to the frequency conversion output module;

[0012] The first-stage local oscillator signal generation module is used to generate a first-stage high-frequency local oscillator signal and input it to the frequency conversion output module;

[0013] The second-stage local oscillator signal generation module is used to generate a second-stage high-frequency local oscillator signal and input it to the frequency conversion output module;

[0014] The pass-through output module passes through and outputs the input 4 GHz and below radio frequency signals;

[0015] The frequency conversion output module performs secondary mixing on radio frequency signals above 4 GHz based on the first-level high-frequency local oscillator signal and the second-level high-frequency local oscillator signal, converts the frequency into an intermediate frequency signal, and outputs it.

[0016] Preferably, the first-stage local oscillator signal generation module takes LO1 signal as input signal, and the LO1 signal is amplified once, tripled, filtered, and amplified twice to generate the first-stage high-frequency local oscillator signal.

[0017] The second-stage local oscillator signal generation module takes the LO2 signal as input. The LO2 signal is amplified, tripled, and filtered in sequence to generate the second-stage high-frequency local oscillator signal.

[0018] The frequency conversion output module mixes a 4 GHz instantaneous bandwidth radio frequency signal above 4 GHz with a first-stage high-frequency local oscillator signal for the first time, and up-converts it into an IF1 signal. After filtering and amplification, the IF1 signal is mixed with a second-stage high-frequency local oscillator signal for the second time, and up-converted into an IF2 signal. After filtering and amplification, the IF2 signal is used to obtain the final output intermediate frequency signal.

[0019] Preferably, the filters in the first-stage local oscillator signal generation module and the second-stage local oscillator signal generation module are SIW filters; in the frequency conversion output module, the first filter through which the IF1 signal passes is a SIW filter; the purpose of using a SIW filter is to achieve high-frequency filtering.

[0020] Preferably, the SiP module is electrically interconnected with the PCB via BGA solder balls.

[0021] Preferably, the wiring architecture of the SiP module adopts a microstrip-strip-microstrip vertical interconnect structure to achieve a layered isolation layout, thereby reducing signal interference and increasing layout density.

[0022] Preferably, in the microstrip-stripline-microstrip vertical interconnect structure, microstrips and striplines in different layers are interconnected through signal vias; the signal vias are equivalent to several inductors in series, which will introduce significant parasitic inductance. To suppress this effect, a capacitance compensation method is used to cancel the inductance: (1) a matching pad is added in the middle of the signal via, and the matching capacitance formed by the matching pad and the surrounding ground shield vias is used; (2) the distance between the signal via and the adjacent ground shield via is reduced to increase the inherent capacitance between the two vias; (3) the area of ​​the pad at the connection between the microstrip line and the signal via is increased to increase the capacitance between the pad and the ground layer.

[0023] Preferably, the mixers in the radio frequency receiving front end are all double-balanced mixers. Utilizing their symmetrical cancellation characteristics, they generate only one-quarter of the spurious components of a single-balanced mixer, effectively suppressing all spurious components generated by the combination of even harmonics of RF and LO signals.

[0024] The design principle of this invention is as follows:

[0025] The receiver front end first filters and amplifies the received radio frequency signal. For the frequency range of 2-4 GHz (inclusive), the second harmonic of 2 GHz is located in the passband and is difficult to filter out with a filter. Therefore, in order to meet the requirements of 4 GHz instantaneous bandwidth and high spurious suppression, the system outputs the 2-4 GHz frequency band signal through the direct-through output module and outputs the 4-18 GHz frequency band (excluding 4 GHz) signal through the frequency conversion output module.

[0026] The 4-18 GHz RF signal enters the conversion channel: the LO1 input is tripled to generate a 72-82 GHz LO1, and the 4 GHz instantaneous bandwidth RF input in the 4-18 GHz range is up-converted to a 64-68 GHz IF1 after the first mixing. After filtering and amplification of the IF1 signal, a second mixing is performed, where the LO2 input is tripled to generate a 58.8 GHz LO2, which is mixed with IF1 to produce the final IF output of 5.2-9.2 GHz. Internally, the module uses HTCC technology to achieve 11 layers of alumina dielectric stacked (0.1 mm per layer), with an overall size of 40 mm × 26 mm × 2.1 mm, a size reduction of over 60% compared to the receiver front-end implemented using PCB technology. A cavity is provided on the module surface for conductive bonding of the MMIC bare chip, enabling monolithic integration of the RF front-end. A soldered Kovar alloy package provides isolation and shielding to suppress environmental interference, crosstalk, and self-oscillation. BGA pads are located on the bottom of the module for heat dissipation and electrical interconnection with the PCB. The module's wiring architecture adopts a layered isolation design: DC power is distributed through metallized vias and gold wire bonding on the 6th dielectric layer; RF signals are transmitted through three optimized paths: microstrip-stripline structure (spanning the 4th dielectric layer), SIW transmission line (utilizing the 8th / 11th metal ground layer and vias on layers 9-11), and PCB-SiP vertical interconnect (achieving cross-board transmission through BGA balls and vias).

[0027] To achieve low-loss, wideband, long-distance transmission under high wiring density and minimize inter-transmission line interference, this invention designs surface and inter-layer interconnect structures based on impedance / mode matching methods and parity-mode constraint principles.

[0028] Surface-layer multi-functional transmission lines: For three high-frequency signal paths—LO1 (72–82 GHz), first intermediate frequency (64–68 GHz), and LO2 (58.8 GHz)—integrated transmission lines based on SIW structures were designed, combining bandpass filtering and signal transmission capabilities. To accommodate the space constraints of the die layout within the SiP module, a 90° folded SIW structure was introduced at the filter output, and impedance matching was achieved by placing metallized vias in the bending area, effectively suppressing signal reflection. This design ultimately achieves low-loss transmission and high-selectivity filtering of high-frequency signals, ensuring the system's high-frequency signal processing requirements are met while maintaining compact integration.

[0029] Low-loss vertical interconnect structure between layers: To address the interconnection requirements between different layers, an ultra-wideband vertical interconnect structure between layers was designed. In this vertical interconnect structure, the long metal vias used for signal transmission are equivalent to a series of inductors, which introduce significant parasitic inductance. To suppress this effect, this design employs three capacitance compensation methods to offset it: (1) Adding matching pads at the signal vias to neutralize part of the inductance using the matching capacitance formed by the pads and the surrounding ground shield vias; (2) Increasing the inherent capacitance between the vias by reducing the spacing between the signal vias and adjacent ground shield vias, and further enhancing the compensation by utilizing the corner capacitance between the signal vias and the ground layer; (3) Enlarging the area of ​​the matching pads at the vertical transition between the microstrip line and the signal vias to increase the capacitance between the pads and the ground layer, thereby maximizing the offsetting of parasitic inductance. Through the above methods, low-loss, wideband, long-distance interlayer signal transmission was finally achieved, realizing a multi-level low-loss (<1.5 dB) interconnect system.

[0030] The present invention has the following beneficial effects:

[0031] First, high integration and miniaturization. By adopting HTCC technology and SiP three-dimensional integration scheme, high-density heterogeneous integration of complex multi-chip RF links is achieved, and the size is significantly reduced compared to traditional PCB solutions.

[0032] Second, ultra-wideband and high instantaneous bandwidth. Operating frequency covers 2-18 GHz, with an instantaneous bandwidth reaching 4 GHz, meeting the requirements of modern broadband communication systems.

[0033] Third, excellent spurious suppression performance. Through the use of a high local oscillator dual-frequency conversion architecture and a dual-balanced mixer, spurious suppression exceeds 50 dBc, ensuring signal quality.

[0034] Fourth, low-loss transmission. The innovative surface SIW filter transmission line and interlayer vertical interconnect structure ensure low loss (<1.5 dB) and high fidelity signal transmission within the module and between the module and the PCB.

[0035] Fifth, high reliability. The HTCC substrate has good thermal stability and mechanical strength, and the Kovar alloy shielding effectively suppresses electromagnetic interference, improving the reliability of the module in complex environments. Attached Figure Description

[0036] Figure 1 This is a block diagram of the RF receiver front-end system circuit architecture.

[0037] Figure 2 This is a schematic diagram of the layered structure of the 2-18 GHz radio frequency receiver front-end SiP module in the embodiment.

[0038] Figure 3 This illustrates the surface cavity layout and key component integration locations of the 2-18 GHz radio frequency receiver front-end SiP module in this embodiment.

[0039] Figure 4 The diagram shows the structural layout and simulation response curves of the 72–82 GHz embedded SIW filter in the embodiment.

[0040] Figure 5 The diagram shows the structural layout and simulation response curves of the 58.8 GHz embedded SIW filter in the embodiment.

[0041] Figure 6 The diagram shows the structural layout and simulation response curves of the 64–68 GHz embedded SIW filter in the embodiment.

[0042] Figure 7 This is a schematic diagram and schematic diagram of a structure that uses capacitor compensation to cancel out inductance.

[0043] Figure 8 The actual model of the microstrip-stripline-microstrip vertical interconnection structure in this embodiment, along with simulation and measurement results, are presented.

[0044] Table 1 shows the measured frequency response and dynamic performance curves of the RF receiver front end, including noise figure and spurious rejection level, which intuitively verifies the overall performance of the module in the 2–18 GHz band. Detailed Implementation

[0045] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0046] To facilitate a thorough understanding of the technical solutions of this invention by those skilled in the art, specific embodiments of this invention will now be described in detail with reference to the accompanying drawings. It should be particularly noted that the following embodiments are merely illustrative of the technical principles and implementation methods of this invention and do not constitute any limitation on the scope of protection of this invention. Based on the fundamental principles of this invention, any equivalent modifications or improvements made by those skilled in the art without creative effort should be included within the scope of protection of this invention. In the specific description, to avoid redundant descriptions of common knowledge affecting the understanding of the core technology of this invention, some conventional technical details will be appropriately omitted.

[0047] The accompanying drawings of this invention illustrate relevant structural diagrams. It should be noted that the drawings are not strictly to scale; some details have been appropriately enlarged for clarity, and some non-critical details may be simplified. The functional areas, structural layers, and their relative dimensions and positional relationships shown in the drawings are for illustrative purposes only, and reasonable deviations may exist in actual implementation due to process tolerances or technical limitations. Those skilled in the art can adaptively adjust the shape, size, and spatial layout of the illustrated structures according to specific application requirements; all such reasonable modifications should fall within the protection scope of this invention.

[0048] This invention provides a high-density system-in-package (SiP) module for ultra-wideband radio frequency receiving applications in the 2-18 GHz range, implemented using HTCC technology.

[0049] like Figure 1 As shown, the RF receiver front end includes an RF signal pre-processing module, a single-pole double-throw switch, a direct-output module, a frequency conversion output module, a first-stage local oscillator signal generation module, and a second-stage local oscillator signal generation module.

[0050] The radio frequency signal pre-processing module includes a limiter, a first low-noise amplifier, a first bandpass filter, a first attenuator, a second low-noise amplifier, and a second attenuator connected in series. It is used to preprocess the 2-18 GHz input radio frequency signal and input it to the subsequent module through a single-pole double-throw switch.

[0051] The switch, based on the frequency band of the input radio frequency signal, inputs radio frequency signals of 4 GHz and below to the direct output module, and inputs radio frequency signals above 4 GHz to the frequency conversion output module.

[0052] The first-stage local oscillator signal generation module includes a third low-noise amplifier, a first frequency multiplier, a first SIW bandpass filter, and a fourth low-noise amplifier connected in series. After the 24-27.3333GHz LO1 signal is input into the first-stage local oscillator signal generation module, it undergoes amplification, frequency tripleting, filtering, and secondary amplification in sequence to generate a 72-82GHz first-stage high-frequency local oscillator signal, which is then input to the frequency conversion output module.

[0053] The second-stage local oscillator signal generation module includes a sixth low-noise amplifier, a second frequency multiplier, and a third SIW bandpass filter connected in series. After the 19.6GHz LO2 signal is input into the second-stage local oscillator signal generation module, it is amplified, tripled, and filtered in sequence to generate a 58.8GHz second-stage high-frequency local oscillator signal, which is then input to the frequency conversion output module.

[0054] The pass-through output module includes a second bandpass filter, which is used to filter and pass-through the input RF signals of 4 GHz and below.

[0055] The frequency conversion output module includes, in series, a first mixer, a second SIW bandpass filter, a fifth low-noise amplifier, a second mixer, a first high-pass filter, a seventh low-noise amplifier, a second high-pass filter, an eighth low-noise amplifier, a low-pass filter, a π-type attenuator, and a third high-pass filter. The 4 GHz instantaneous bandwidth radio frequency signal (4-18 GHz) and the first-stage high-frequency local oscillator signal are first mixed in the first mixer, up-converted to an IF1 signal of 64-68 GHz. The IF1 signal, after filtering and amplification, enters the second mixer and is mixed a second time with the second-stage high-frequency local oscillator signal, up-converted to an IF2 signal of 5.2-9.2 GHz. The IF2 signal, after filtering and amplification, yields the final intermediate frequency output signal.

[0056] In this embodiment, the RF receiving front-end adopts a double-conversion superheterodyne receiver architecture. Through high local oscillator dual-frequency conversion, the mirror frequency is moved away from the RF signal spectrum, and spurious components generated by mixing are shifted to a higher frequency region outside the intermediate frequency (IF) passband. This architecture has a first-stage LO frequency in the 72-82 GHz range and a second-stage LO frequency of 58.8 GHz, achieving an instantaneous bandwidth of 4 GHz within an ultra-wide operating bandwidth of 2-18 GHz, with spurious suppression exceeding 50 dBc. Within the 2-4 GHz frequency range (inclusive), the second harmonic of 2 GHz lies within the passband and is difficult to filter out. Therefore, to meet the requirements of 4 GHz instantaneous bandwidth and high spurious suppression, a direct-through link outputs signals in the 2-4 GHz band, while a frequency-conversion link outputs signals in the 4-18 GHz band (excluding 4 GHz).

[0057] For the aforementioned RF receiver front-end, this embodiment uses a SIP module for encapsulation and implementation; such as Figure 2-3 As shown, the module internally employs HTCC technology to achieve 11 layers of alumina dielectric stacked (0.1 mm per layer), with overall dimensions of 40 mm × 26 mm × 2.1 mm. Compared to the receiver front-end implemented using PCB technology, the size is reduced by more than 60%. A cavity is provided on the module surface for conductive bonding of the bare MMIC chip, enabling monolithic integration of the RF front-end. A soldered Kovar alloy package provides isolation and shielding, suppressing environmental interference, crosstalk, and self-oscillation. BGA solder balls are located on the bottom of the module for heat dissipation and electrical interconnection with the PCB.

[0058] The SiP module's wiring architecture employs a layered isolation design: DC power is distributed through metallized vias and gold wire bonding on the 6th dielectric layer. RF signals are transmitted via three optimized paths: microstrip-stripline structure (spanning the 4th dielectric layer), SIW transmission lines (utilizing the 8th / 11th metal ground layers and metal vias on layers 9-11), and PCB-SiP vertical interconnects (achieving cross-board transmission via BGA balls and vias).

[0059] To further achieve low-loss, wideband, long-distance transmission under high wiring density and minimize inter-transmission line interference, this embodiment optimizes the design of the surface layer and inter-layer interconnect structure based on impedance / mode matching method and parity mode constraint principle.

[0060] Surface-layer multi-functional transmission lines: For the three high-frequency signal paths LO1 (72–82 GHz), first intermediate frequency (64–68 GHz), and LO2 (58.8 GHz), integrated transmission lines based on SIW structures, combining bandpass filtering and signal transmission capabilities, were designed. To accommodate the space constraints of the die layout within the SiP module, a 90° folded SIW filter structure was introduced at the filter output, such as... Figure 4-6 As shown, impedance matching is achieved by arranging metallized vias in the bending region, effectively suppressing signal reflection. This design ultimately achieves low-loss transmission and high-selectivity filtering of high-frequency signals, ensuring the system's high-frequency signal processing requirements are met while maintaining compact integration.

[0061] Low-loss vertical interconnect structure between layers: To address the interconnection requirements between different layers, a microstrip-stripline-microstrip ultra-wideband vertical interconnect structure was designed. In this vertical interconnect structure, the signal vias used for signal transmission are equivalent to a series of inductors, which introduce significant parasitic inductance. To suppress this effect, three capacitance compensation methods are used to offset it: (1) adding a matching pad in the middle of the signal via, utilizing the matching capacitance formed by the matching pad and the surrounding ground shield vias; (2) reducing the spacing between the signal via and the adjacent ground shield via to increase the inherent capacitance between the two types of vias; (3) increasing the pad area at the connection between the microstrip line and the signal via to increase the capacitance between the pad and the ground layer. Through the above methods, low-loss, wideband, long-distance interlayer signal transmission was finally achieved, realizing a multi-level low-loss (<1.5 dB) interconnect system.

[0062] Furthermore, all mixers in this embodiment are double-balanced mixers. Utilizing their symmetrical cancellation characteristics, they generate only one-quarter of the spurious components of a single-balanced mixer, effectively suppressing all spurious components generated by the combination of even harmonics of RF and LO signals.

[0063] The structure in the embodiment was simulated and calculated using the commercial finite element electromagnetic simulation software ANSYS Electronics 2021R1.

[0064] refer to Figure 4 The horizontal axis represents frequency, and the vertical axis represents S-parameters. As shown in the simulation results, the filter operates at a frequency of 72 GHz-82 GHz, and the maximum insertion loss is 2.1 dB. This is due to the parasitic inductance effect of the gold wire bonding of the bare die in the high-frequency band. At the same time, the in-band ripple is less than 1.1 dB, which can ensure the efficient transmission of the target frequency band signal.

[0065] refer to Figure 5 As shown in the simulation results, the filter operates at a frequency of 58.8 GHz with an insertion loss of 2.5 dB. The local oscillator 2 signal input to the SiP module is 19.6 GHz, which is multiplied by 3 to obtain a local oscillator 2 frequency of 58.8 GHz. The frequency multiplier generates the 2nd and 4th harmonics at the input frequency of 19.6 GHz. The filter exhibits a suppression degree greater than 51 dBc for the 2nd harmonic at 39.2 GHz, and the frequency multiplier itself also provides a suppression degree of 40 dBc for the 2nd harmonic, thus meeting the suppression requirements. Similarly, the filter exhibits a suppression degree greater than 56 dBc for the 4th harmonic at 78.4 GHz, and the frequency multiplier itself provides a suppression degree of 30 dBc for the 4th harmonic, also meeting the suppression requirements for the 4th harmonic.

[0066] refer to Figure 6As shown in the simulation results, the filter operates at a frequency of 64-68 GHz with an insertion loss of 3.7 dB and an in-band ripple of less than 1.0 dB, ensuring efficient transmission of signals in the target frequency band. The filter's suppression efficiency in the first-stage local oscillator range is greater than 40 dBc, which satisfies the requirement for suppressing leakage from the first-stage local oscillator.

[0067] Based on the above design model, a radio frequency receiver front-end SiP module and a vertical interconnect structure were fabricated, and the fabricated finished product was tested.

[0068] The top and side views of the finished vertical interconnect structure in this embodiment are as follows: Figure 8 (a) Figure 8 As shown in (b), the simulation results are as follows: Figure 8 As shown in (c), its insertion loss is less than 0.5 dB and return loss is greater than 15 dB in the 2-18 GHz operating frequency range. Actual test results are shown in the figure. Figure 8 As shown in (d), the test curve and the simulation curve have a high degree of agreement. The measured insertion loss is less than 2.5 dB (including 2 dB loss introduced by the RF connector during the test), and the measured return loss is greater than 12 dB. This indicates that the vertical interconnect structure can meet the requirements of vertical interconnection between bare chips and PCB motherboard in the SiP module of this solution.

[0069] The measured results of the RF receiver front-end SiP module in this embodiment are shown in Table 1, which displays the measured frequency response and dynamic performance curves of the RF receiver front-end, including noise figure and spurious suppression level, and intuitively verifies the overall performance of the module in the 2–18 GHz frequency band.

[0070] Table 1

[0071] RF input (straight-through) 2-4GHz 2-4GHz 2-4GHz RF input (frequency conversion) 4-18GHz 4-18GHz 4-18GHz IF Output (Straight Through) 2-4GHz 2-4GHz 2-4GHz IF Output (Variable Frequency) 7.2GHz 7.2GHz 7.2GHz Instantaneous bandwidth ≥4GHz 4.2GHz 4.2GHz Intraband fluctuations ≤5dB ≤3dB ≤4.9dB Gain 30±5dB 35dB 29.2dB Noise figure ≤5dB 4.46dB 4.86dB stray suppression ≥50dBc ≥50dBc 51.12dB

[0072] Referring to Table 1, the actual test results of this SiP module meet the design goals. It has two operating modes: pass-through 2-4 GHz and frequency conversion 5.2-9.2 GHz. At the same time, the instantaneous bandwidth reaches 4.2 GHz, the in-band ripple is less than or equal to 4.9 dB, the overall link gain reaches 29.2 dB, the noise figure is less than 4.86 dB across the entire frequency band, and the spurious suppression is less than 51.12 dB across the entire frequency band.

[0073] In summary, this invention presents a 2–18 GHz ultra-wideband RF receiver front-end system-in-package (SiP) module based on high-temperature co-fired ceramic (HTCC) technology. This module integrates a three-dimensional vertical interconnect structure, a multi-functional filter transmission line, and a double-conversion superheterodyne architecture, achieving miniaturization (40 mm × 26 mm × 2.1 mm, more than 60% smaller than PCB solutions), wide bandwidth (2–18 GHz operating bandwidth, 4 GHz instantaneous bandwidth), high spurious rejection (>50 dBc), and low transmission loss (<1.5 dB). This significantly improves the system's integration, stability, and anti-interference capabilities, providing key technical support for the miniaturization and high reliability applications of 5G / 6G communication, radar, and satellite systems.

[0074] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A small, highly integrated radio frequency receiver front-end SiP module based on HTCC, characterized in that, The radio frequency receiving front end is implemented through an HTCC-based SiP module. At the same time, the radio frequency receiving front end uses a high local oscillator dual-frequency conversion method to move the image frequency away from the radio frequency signal spectrum and shift the spurious components generated by mixing to the high-frequency region outside the intermediate frequency passband, thereby achieving wide instantaneous bandwidth and high spurious suppression. The radio frequency receiving front end includes a radio frequency signal pre-processing module, a switch, a direct output module, a frequency conversion output module, a first-stage local oscillator signal generation module, and a second-stage local oscillator signal generation module; The radio frequency signal pre-processing module is used to preprocess the wideband input radio frequency signal and input it to the subsequent module through a switch; the switch, based on the frequency band of the input radio frequency signal, inputs radio frequency signals of 4 GHz and below to the direct output module, and inputs radio frequency signals above 4 GHz to the frequency conversion output module; The first-stage local oscillator signal generation module is used to generate a first-stage high-frequency local oscillator signal and input it to the frequency conversion output module; The second-stage local oscillator signal generation module is used to generate a second-stage high-frequency local oscillator signal and input it to the frequency conversion output module; The pass-through output module passes through and outputs the input 4 GHz and below radio frequency signals; The frequency conversion output module performs secondary mixing on radio frequency signals above 4 GHz based on the first-level high-frequency local oscillator signal and the second-level high-frequency local oscillator signal, converts the frequency into an intermediate frequency signal and outputs it. The wiring architecture of the SiP module adopts a microstrip-strip-microstrip vertical interconnect structure to achieve layered isolation layout, thereby reducing signal interference and increasing layout density. In the microstrip-strip-microstrip vertical interconnect structure, microstrips and striplines in different layers are interconnected through signal vias. The signal vias are equivalent to several series inductors, and the inductance is offset by a capacitance compensation method: (1) a matching pad is added in the middle of the signal via, and the matching pad and the surrounding ground shield vias form a matching capacitor; (2) the distance between the signal via and the adjacent ground shield via is reduced to increase the inherent capacitance between the two vias; (3) the area of ​​the pad at the connection between the microstrip line and the signal via is increased to increase the capacitance between the pad and the ground layer.

2. The small, highly integrated radio frequency receiver front-end SiP module based on HTCC as described in claim 1, characterized in that, The first-stage local oscillator signal generation module takes LO1 signal as input. After the LO1 signal is amplified once, tripled, filtered, and amplified twice, the first-stage high-frequency local oscillator signal is generated. The second-stage local oscillator signal generation module takes the LO2 signal as input. The LO2 signal is amplified, tripled, and filtered in sequence to generate the second-stage high-frequency local oscillator signal. The frequency conversion output module mixes a 4 GHz instantaneous bandwidth radio frequency signal above 4 GHz with a first-stage high-frequency local oscillator signal for the first time, and up-converts it into an IF1 signal. After filtering and amplification, the IF1 signal is mixed with a second-stage high-frequency local oscillator signal for the second time, and up-converted into an IF2 signal. After filtering and amplification, the IF2 signal is used to obtain the final output intermediate frequency signal.

3. The small, highly integrated radio frequency receiver front-end SiP module based on HTCC as described in claim 2, characterized in that, The filters in the first-stage local oscillator signal generation module and the second-stage local oscillator signal generation module are SIW filters; in the frequency conversion output module, the first filter through which the IF1 signal passes is an SIW filter.

4. The small, highly integrated radio frequency receiver front-end SiP module based on HTCC as described in claim 3, characterized in that, The SiP module is electrically interconnected with the PCB via BGA solder balls.

5. A small, highly integrated radio frequency receiver front-end SiP module based on HTCC as described in claim 4, characterized in that, The mixers in the radio frequency receiving front end are all double-balanced mixers.

Images