Signal cancellation circuit, signal cancellation method, and interface circuit

Abstract

The application discloses a signal elimination circuit, a signal elimination method and an interface circuit. The signal elimination circuit comprises a signal suppression unit connected with an input end of a receiver, configured to provide a reverse suppression signal to the input end of the receiver according to an input signal; and a residual error calibration unit configured to obtain a residual error signal between a first channel signal and the reverse suppression signal in a calibration stage, and to feed back and adjust an amplitude of the reverse suppression signal according to a characteristic value of a deviation of the residual error signal. The residual error calibration unit comprises a conversion module configured to convert a single-end residual error signal into a differential residual error signal, and the residual error calibration unit obtains the characteristic value of the deviation according to the differential residual error signal. Through the feedback adjustment of the reverse suppression signal, the communication quality can be improved.

Description

Technical Field

[0001] This application relates to the field of electronic and electrical technology, and in particular to a signal cancellation circuit, a signal cancellation method, and an interface circuit. Background Technology

[0002] A full-duplex transmit / receive circuit is a circuit capable of simultaneously transmitting and receiving signals. Specifically, a full-duplex transmit / receive circuit typically includes a first interface circuit and a second interface circuit connected via a communication link.

[0003] Figure 1 A schematic structural diagram of any interface circuit 10 in the prior art is shown. For example... Figure 1 As shown, the first and / or second interface circuits have a transmitter 11 and a receiver 12. The transmitter 11 is used to provide a first channel signal to the communication link 13 according to the input signals TX-IN and TX-IP, and the receiver 12 is used to receive a second channel signal through the communication link 13. The first channel signal and the second channel signal are transmitted in opposite directions, thus enabling bidirectional communication.

[0004] For example Figure 1 The single-ended communication interface circuit shown has one output terminal of transmitter 11 connected to communication link 13, and the other output terminal grounded to GND via resistor Rg. Similarly, one input terminal of receiver 12 is connected to communication link 13, and the other input terminal is grounded to GND via resistor Rg. Since both transmitter 11 and receiver 12 are connected to communication link 13, the first channel signal transmitted by transmitter 11 will cause self-interference to the second channel signal received by receiver 12. In the prior art, interface circuit 10 also has a signal cancellation circuit 14 to eliminate this self-interference.

[0005] like Figure 1 As shown, the signal cancellation circuit 14 includes a pair of resistors R1 and R2, a pair of transistors M1 and M2, and a current source I1. The signal cancellation circuit 14 generates a reverse rejection signal based on the input signals TX-IN and TX-IP. The signal cancellation circuit 14 is connected to the input terminal of the receiver 12 and cancels the first channel signal in the signal received by the receiver 12 through the reverse rejection signal.

[0006] However, due to factors such as device mismatch, temperature drift, and process deviation, the reverse suppression signal is difficult to completely match the actual interference of the first channel signal on the second channel signal, which greatly affects the communication quality. Summary of the Invention

[0007] In view of the above problems, the purpose of this application is to provide a signal cancellation circuit, a signal cancellation method and an interface circuit, which can improve communication quality.

[0008] According to one aspect of the present invention, a signal cancellation circuit for a full-duplex transmit-receive circuit for single-ended communication is provided. The full-duplex transmit-receive circuit includes a transmitter and a receiver. The transmitter is used to provide a first channel signal to a communication link according to an input signal, and the receiver is used to receive a second channel signal through the communication link. The signal cancellation circuit includes: a signal suppression unit connected to the input terminal of the receiver, used to provide a reverse suppression signal to the input terminal of the receiver according to the input signal; and a residual calibration unit, used to obtain a residual signal between the first channel signal and the reverse suppression signal during a calibration phase, and to adjust the amplitude of the reverse suppression signal based on the offset characteristic value of the residual signal. The residual calibration unit includes a conversion module, used to convert the single-ended residual signal into a differential residual signal, and the residual calibration unit obtains the offset characteristic value based on the differential residual signal.

[0009] Optionally, during the calibration phase, the second channel signal is a common-mode signal, the received signal of the receiver is the residual signal, and the residual calibration unit is connected between the signal suppression unit and the input terminal of the receiver to receive the residual signal.

[0010] Optionally, the residual calibration unit includes: a signal inversion module for inverting negative polarity waveforms in a plurality of residual signals into positive polarity waveforms to obtain a detection signal with all positive polarity waveforms; a comparison module for comparing the offset of the peak value of each positive polarity waveform in the detection signal relative to a reference value, and using the maximum / minimum / median / mean value among them as the offset feature value; and an adjustment module for providing an adjustment signal according to the offset feature value, the adjustment signal being used to adjust the current source in the signal suppression unit.

[0011] Optionally, the signal cancellation circuit further includes: a first amplification module, used to provide the amplified residual signal to the signal inversion module.

[0012] Optionally, the signal cancellation circuit further includes a filtering module for filtering the offset feature value.

[0013] Optionally, the signal inversion module operates in the analog domain, the comparison module and the adjustment module operate in the digital domain, and the signal cancellation circuit further includes: an analog-to-digital conversion module, used to convert the analog signal type of the signal to be detected into the digital signal type of the signal to be detected.

[0014] Optionally, the signal cancellation circuit further includes a second amplification module for amplifying the signal to be detected before analog-to-digital conversion.

[0015] Optionally, the signal suppression unit includes: the current source; a differential pair transistor, including a first transistor and a second transistor, wherein a first terminal of the first transistor is connected to one input terminal of the receiver, and a control terminal is connected to one of the input signals; a first terminal of the second transistor is connected to the other input terminal of the receiver, and a control terminal is connected to the other of the input signals; the second terminals of the first transistor and the second transistor are connected together and connected to the current source; a first resistor, wherein the first terminal of the first transistor is connected to one output terminal of the transmitter via the first resistor; and a second resistor, wherein the first terminal of the second transistor is connected to the other output terminal of the transmitter via the second resistor, wherein one output terminal of the transmitter is connected to the communication link and the residual calibration unit, and the other output terminal is grounded.

[0016] According to another aspect of the present invention, an interface circuit for a full-duplex transmit-receive circuit for single-ended communication is provided, comprising: a transmitter for providing a first channel signal to a communication link according to an input signal; a receiver for receiving a second channel signal through the communication link; and the aforementioned signal cancellation circuit connected between the communication link and the receiver for providing the reverse suppression signal to the input terminal of the receiver, the reverse suppression signal being used to cancel the first channel signal mixed in the second channel signal, wherein the first channel is a forward channel and the second channel is a reverse channel.

[0017] According to another aspect of the present invention, an interface circuit for a full-duplex transmit-receive circuit for single-ended communication is provided, comprising: a transmitter for providing a first channel signal to a communication link according to an input signal; a receiver for receiving a second channel signal through the communication link; and the aforementioned signal cancellation circuit, connected between the communication link and the receiver, for providing the reverse suppression signal to the input terminal of the receiver, the reverse suppression signal being used to cancel the first channel signal mixed in the second channel signal, wherein the first channel is a reverse channel and the second signal is a forward channel.

[0018] According to another aspect of the present invention, a signal cancellation method is provided for a full-duplex transmit-receive circuit for single-ended communication. The full-duplex transmit-receive circuit includes a transmitter and a receiver. The transmitter is used to provide a first channel signal to a communication link according to an input signal, and the receiver is used to receive a second channel signal through the communication link. The signal cancellation method includes: providing a reverse suppression signal to the input terminal of the receiver according to the input signal; obtaining a single-ended residual signal between the first channel signal and the reverse suppression signal during a calibration phase; converting the single-ended residual signal into a differential residual signal; and adjusting the amplitude of the reverse suppression signal based on the offset characteristic value of the differential residual signal.

[0019] Optionally, the step of obtaining the residual signal includes: providing a common-mode signal as the second channel signal during the calibration phase; and using the received signal of the receiver as the residual signal.

[0020] Optionally, the step of obtaining the offset feature value includes: flipping the negative polarity waveforms in the plurality of residual signals into positive polarity waveforms to obtain a detection signal with all positive polarity waveforms; comparing the offset of the peak value of each positive polarity waveform in the detection signal relative to a reference value, and using the maximum / minimum / median / mean value among them as the offset feature value.

[0021] According to the signal cancellation circuit, signal cancellation method, and interface circuit provided in this application, the amplitude of the reverse suppression signal is dynamically adjusted by detecting the offset characteristic value of the residual signal, thereby achieving high-precision interference cancellation and improving the anti-interference capability of the communication system. In particular, it can reduce the impact of environmental factors such as temperature changes on communication quality. Furthermore, for single-ended communication systems, converting the single-ended signal into a differential signal before performing residual detection and amplitude adjustment further improves the accuracy of amplitude adjustment. Attached Figure Description

[0022] The above and other objects, features and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0023] Figure 1 A schematic structural diagram of an interface circuit in the prior art is shown;

[0024] Figure 2 A schematic structural diagram of the full-duplex transmit and receive circuit for single-ended communication according to this application is shown.

[0025] Figure 3 A schematic structural diagram of the signal cancellation circuit of this application is shown;

[0026] Figure 4 A schematic circuit diagram of the signal cancellation circuit of this application is shown;

[0027] Figure 5 A schematic flowchart of the signal cancellation method of this application is shown. Detailed Implementation

[0028] Various embodiments of the present application will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0029] Furthermore, certain terms are used in this specification and claims to refer to specific components. Those skilled in the art will understand that manufacturers may use different names to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in function.

[0030] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0031] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0032] It should also be noted that in the various methods and processes of this application, the order of the steps does not imply the order of execution, nor does it constitute any limitation on the implementation process of the embodiments of this application.

[0033] Figure 2 A schematic structural diagram of the full-duplex transmit and receive circuit for single-ended communication according to this application is shown. (Reference) Figure 2 The single-ended full-duplex transmit and receive circuit includes a first interface circuit 20, a second interface circuit 30, and a communication link 40 between them. The first interface circuit 20 provides a forward signal and receives a reverse signal, while the second interface circuit 30 provides a reverse signal and receives a forward signal. The first interface circuit 20 and the second interface circuit 30 are communicatively connected via the communication link 40.

[0034] Each interface circuit includes a transmitter and a receiver. In each interface circuit, the transmitter provides a first channel signal to the communication link based on the input signal, which is the transmit signal of the interface circuit. The receiver receives a second channel signal through the communication link, which is the receive signal of the interface circuit.

[0035] Specifically, in Figure 2 In the first interface circuit 20, a transmitter 21 and a receiver 22 are included. The second interface circuit 30 includes a receiver 31 and a transmitter 32. It should be understood that for the first interface circuit 20, the first channel is a forward channel, and the first channel signal is the aforementioned forward signal; the second channel is a reverse channel, and the second channel signal is the aforementioned reverse signal. For the second interface circuit 30, the first channel is a reverse channel, and the first channel signal is the aforementioned reverse signal; the second channel is a forward channel, and the second channel signal is the aforementioned forward signal.

[0036] The transmitter 21 in the first interface circuit 20 provides a forward transmission signal TX-OP based on a pair of input signals TX-IP and TX-IN. This forward transmission signal TX-OP is transmitted via the communication link 40 to the receiver 31 of the second interface circuit 30, thereby obtaining the forward signals RX-OP and RX-ON received by the second interface circuit 30.

[0037] Similarly, the transmitter 32 in the second interface circuit 30 provides a reverse transmission signal BCTX-OP based on a pair of input signals BCTX-IP and BCTX-IN. This reverse transmission signal BCTX-OP is transmitted via the communication link 40 to the receiver 22 of the first interface circuit 20 to obtain the reverse signals BCRX-OP and BCRX-ON received by the first interface circuit 20.

[0038] In some embodiments, the transmission rate of the forward signal is greater than the transmission rate of the reverse signal. In still other embodiments, the forward signal includes high-speed data and low-speed data, and the reverse signal includes low-speed data. In yet other embodiments, the full-duplex transmit / receive circuit described above can be applied to an in-vehicle system. For example, the high-speed data in the forward signal is video data and / or audio data captured by an in-vehicle camera, and the low-speed data in both the forward and reverse signals is control data between the in-vehicle camera and the processor. Furthermore, the full-duplex transmit / receive circuit provided in this application can also be applied to other fields, such as communications and consumer electronics.

[0039] In a full-duplex transmit / receive circuit for single-ended communication, the communication link 40 includes a single signal line. This signal line connects the first signal terminal of the first interface circuit 20 and the first signal terminal of the second interface circuit 30. The second signal terminal of the first interface circuit 20 is grounded to GND via resistor Rg1, and the second signal terminal of the second interface circuit 30 is grounded to GND via resistor Rg2. The single-ended communication link 40 can be implemented, for example, using a coaxial cable (COAX). It should be understood that each signal terminal of each interface circuit is connected to the communication link 40 via a corresponding DC blocking capacitor or grounded via a corresponding resistor. These DC blocking capacitors... Figure 2 The components are labeled C1, C2, C1', and C2'. By using DC blocking capacitors, the DC components mixed in with the first and second channel signals can be filtered out, reducing common-mode noise interference with the forward and reverse signals.

[0040] For each interface circuit, its transmitted signal can cause self-interference with the received signal, especially at high frequencies. Therefore, in the embodiments of this application, the interface circuit further includes a signal cancellation circuit to eliminate the first channel signal mixed in the received signal, thereby improving communication quality.

[0041] Specifically, such as Figure 2 As shown, the first interface circuit 20 also includes a signal cancellation circuit 23, which is connected between the communication link 40 and the receiver 22. The second interface circuit 30 also includes a signal cancellation circuit 33, which is connected between the communication link 40 and the receiver 31.

[0042] It should be understood that signal cancellation circuits 23 and 33 operate on the same principle. Therefore, in Figure 3 and Figure 4 The diagram below shows a schematic structural diagram and circuit diagram of the signal cancellation circuit according to an embodiment of this application, using signal cancellation circuit 23 as an example. The following section, in conjunction with... Figures 2 to 4 The signal cancellation circuit of the embodiments of this application will be described in detail.

[0043] refer to Figure 3 The signal cancellation circuit 23 is connected to the communication link 40. Specifically, the signal cancellation circuit 23 is connected between the transmitter 21 and the receiver 22, and the common node of the signal cancellation circuit 23 and the transmitter 21 is connected to the communication link 40 through corresponding DC blocking capacitors C1 and C2 or grounded to GND through resistor Rg1. The signal cancellation circuit 23 includes a signal suppression unit 200. The signal suppression unit 200 is connected to the input terminal of the receiver 22 and is used to provide a reverse suppression signal to the input terminal of the receiver 22 according to the input signals TX-IN and TX-IP.

[0044] Combination Figure 3 and Figure 4 For ease of understanding, transmitter 21 is used as an example, comprising a pair of resistors Rfa and Rfb, a pair of transistors Ma and Mb, and a current source Ia. Resistor Rfa is coupled between the power supply voltage VDD and the first terminal of transistor Ma, resistor Rfb is coupled between the power supply voltage VDD and the first terminal of transistor Mb, and the second terminals of transistors Ma and Mb are connected and grounded via current source Ia. One of the input signals TX-IN and TX-IP (e.g., TX-IN) is applied to the control terminal of transistor Ma, and the other (e.g., TX-IP) is applied to the control terminal of transistor Mb. The first signal terminal 24 of the first interface circuit 20 is connected to the first terminal of transistor Ma to extract a forward signal, such as TX-OP. This forward signal TX-OP is connected to the communication link 40 via DC blocking capacitor C1, and the second signal terminal 25 is connected to the first terminal of transistor Mb. The second signal terminal 25 is also grounded to GND via DC blocking capacitor C2 and resistor Rg1. However, it should be understood that the operating principle of transmitter 21 is well known to those skilled in the art and can be implemented using any related technology.

[0045] The signal suppression unit 200 is connected between the first signal terminal 24, the second signal terminal 25 and the input terminal of the receiver 22, and includes a first resistor R1, a second resistor R2, a differential pair transistor having a first transistor M1 and a second transistor M2 and a current source I1.

[0046] The first terminal of the first transistor M1 is connected to one input terminal of the receiver 22, and the control terminal is connected to one of the input signals, such as TX-IN; the first terminal of the second transistor M2 is connected to the other input terminal of the receiver 22, and the control terminal is connected to the other input signal, such as TX-IP; the second terminal of the first transistor M1 and the second terminal of the second transistor M2 are connected together and grounded through the current source I1.

[0047] The first terminal of the first transistor M1 is also connected to the second signal terminal 25 via the first resistor R1, which is one output terminal of the transmitter 21. The first terminal of the second transistor M2 is also connected to the first signal terminal 24 via the second resistor R2, which is the other output terminal of the transmitter 21.

[0048] Under the control of the input signals TX-IN and TX-IP, the signal cancellation circuit 23 can provide a reverse suppression signal to the input terminal of the receiver 22 to eliminate the forward signal mixed in the reverse signal.

[0049] exist Figure 4In the examples, transistors Ma, Mb, M1, and M2 are all N-type field-effect transistors (MOSFETs). It should be understood that a MOSFET consists of a first terminal, a second terminal, and a control terminal. When the MOSFET is turned on, current flows from the first terminal to the second terminal. For an N-type MOSFET, the first terminal is the drain, the second terminal is the source, and the control terminal is the gate. For a P-type MOSFET, the first terminal is the source, the second terminal is the drain, and the control terminal is the gate.

[0050] It should be pointed out that, in cases such as Figure 4 In the illustrated embodiment, the signal suppression unit 200 provides a reverse suppression signal through the first resistor R1, the second resistor R2, the first transistor M1, the second transistor M2, and the current source I1. However, this application is not limited thereto. In some other embodiments, the signal suppression unit 200 further includes a mirror structure. The mirror structure is used to mirror the received signal of the receiver 22 and / or the first channel signal, and to eliminate interference in the received signal of the receiver 22 through a differential circuit. Related mirror structures should also be well known to those skilled in the art, and will not be described in detail here.

[0051] In actual operation, the reverse suppression signal provided by the signal cancellation circuit can be deflected by factors such as device mismatch, temperature drift, and process deviation, and thus cannot completely cancel the transmitted signal. To solve this problem, the signal cancellation circuit 23 of this application also includes a residual calibration unit 100. The residual calibration unit 100 is used to obtain the residual signal between the first channel signal and the reverse suppression signal during the calibration stage, and to adjust the amplitude of the reverse suppression signal based on the offset characteristic value of the residual signal, so as to improve the matching accuracy between the reverse suppression signal and the actual interference of the transmitted signal, thereby improving the communication quality.

[0052] In some embodiments, the calibration phase described above occurs before the full-duplex transmit / receive circuit operates normally, or when the operating environment of the full-duplex transmit / receive circuit changes. For example, the amplitude calibration described above is performed whenever the operating temperature changes. Therefore, this application is particularly applicable to avoiding the negative effects of environmental factors such as temperature on the signal cancellation circuit.

[0053] In a preferred embodiment, during the calibration phase, the transmitter 21 of the current interface circuit transmits a sample signal and sends a common-mode signal to the transmitter 32 of the interface circuit. This allows the residual signal to be directly obtained through signal sampling, which is more conducive to simplifying the circuit structure of the residual calibration unit. The sample signal can be a clock pattern, a pseudo-random bit sequence pattern, a custom pattern, or other types of data samples.

[0054] More specifically, multiple residual signals are obtained through multiple data transmissions to obtain offset characteristic values ​​(which will be described in detail below).

[0055] Combination Figure 3 and Figure 4 The residual calibration unit 100 includes: a conversion module 110, a first amplification module 120, a signal inversion module 130, a filtering module 140, a second amplification module 150, an analog-to-digital conversion module 160, a comparison module 170, and an adjustment module 180.

[0056] The conversion module 110 is connected to the first signal terminal 24 and the second signal terminal 25 to convert the single-ended residual signal into a differential residual signal, which is more conducive to improving the accuracy of the residual signal. In some other embodiments, the conversion module 110 may be connected to only one signal terminal and connected to the communication link 40 through that signal terminal.

[0057] The first amplification module 120 is used to initially amplify the residual signal to improve the sensitivity and accuracy of subsequent processing, ensuring that weak residual signals can be effectively captured. The residual signal represents the transmitted signal remaining in the signal received by the receiver 22, that is, the transmitted signal that has not been canceled.

[0058] When the peer interface circuit sends a common-mode signal, the DC blocking capacitor connected to the communication link 40 isolates the DC common-mode signal. Therefore, ideally, the second channel signal received by the receiver 22 should be "0". However, when the reverse suppression signal cannot completely cancel the transmitted signal, the signal cancellation circuit 23 will send the uncancelled forward signal to the receiver 22. In other words, when the peer interface circuit sends a common-mode signal, the signal received by the receiver 22 is the residual signal.

[0059] The residual signal can be represented by positive and negative waveforms. Specifically, a positive waveform indicates that the actual received signal exceeds the reference value, i.e., the "0" value mentioned above, while a negative waveform indicates that the actual received signal is less than the reference value.

[0060] The signal inversion module 130 is used to invert negative polarity waveforms in multiple residual signals into positive polarity waveforms to obtain a detection signal with all positive polarity waveforms. Inverting the residual signals reduces the detection complexity of the comparison module and improves the accuracy of peak capture. It also ensures that all fluctuations participate in subsequent peak judgment, avoiding detection omissions due to different polarities, thereby achieving complete tracking and accurate response to offset feature values.

[0061] The filtering module 140 filters the received signal to be detected to eliminate fluctuations caused by noise or transient interference, ensuring the stability and reliability of the signal to be detected. The filtering unit 140 can be implemented, for example, by an RC filtering unit.

[0062] The comparison module 170 is used to compare the peak value of each positive polarity waveform in the signal to be detected with the reference value, that is, the offset of the "0" value, and use the maximum / minimum / median / mean value as the offset feature value.

[0063] The adjustment module 180 provides an adjustment signal based on the offset characteristic value. This adjustment signal is used to adjust the amplitude of the reverse suppression signal, thereby making the reverse suppression signal more closely match the actual interference of the transmitted signal. More specifically, in conjunction with... Figure 4 Specifically, the adjustment signal is used to adjust the bias current provided by the current source I1 to adjust the amplitude of the reverse suppression signal, thereby adjusting the strength of interference elimination.

[0064] In some embodiments, the conversion module 110, the first amplification module 120, the signal inversion module 130, and the filtering module 140 operate in the analog domain to ensure real-time signal processing and low latency. The comparison module 170 and the adjustment module 180 operate in the digital domain, generating corresponding digital adjustment signals to improve processing speed and adjustment accuracy. Therefore, an analog-to-digital conversion module 160 is also provided between the filtering module 140 and the comparison module 170. The analog-to-digital conversion module 160 converts the analog signal to be detected into a digital signal, facilitating subsequent analysis and processing by the digital domain adjustment module 180 to provide adjustment signals for precise adjustment of the current source I1.

[0065] Furthermore, in order to adapt to the input range of the analog-to-digital conversion module 160, a second amplification module 150 is provided between the filtering module 140 and the analog-to-digital conversion module 160 for amplifying the signal to be detected with adjustable gain before analog-to-digital conversion.

[0066] This application also provides an interface circuit that includes the signal cancellation circuit described in the above embodiment. This interface circuit is, for example, a... Figure 2 The first interface circuit 20 and / or the second interface circuit 30 in the full-duplex transmit and receive circuit shown.

[0067] This application also provides a signal cancellation method for a full-duplex transmit and receive circuit. Figure 5 This diagram illustrates a schematic flowchart of a signal cancellation method according to an embodiment of this application. The full-duplex transmit / receive circuit is, for example, described above. Figure 2 The details are omitted here. The signal cancellation method provided in this application can be implemented, for example, using the signal cancellation circuit provided in this application. Figure 5 As shown, the signal cancellation method includes:

[0068] In step S11, a reverse suppression signal is provided to the input terminal of the receiver according to the input signal.

[0069] The transmitter of any interface circuit in a full-duplex transmit / receive circuit provides the first channel signal of that interface circuit according to the corresponding input signal. The reverse suppression signal specifically refers to the signal that is the reverse of the first channel signal.

[0070] In step S12, a single-ended residual signal between the first channel signal and the reverse suppression signal is obtained during the calibration phase.

[0071] The calibration phase specifically occurs before the full-duplex transmit / receive circuit operates normally, or when the operating environment of the full-duplex transmit / receive circuit changes. For example, the amplitude calibration described above is performed whenever the operating temperature changes. Therefore, this application is particularly applicable to avoiding the negative impact of environmental factors such as temperature on the signal cancellation circuit.

[0072] In a preferred embodiment, during the calibration phase, the transmitter of the current interface circuit can transmit a sample signal and send a common-mode signal to the transmitter of the interface circuit. This allows the residual signal to be directly obtained through signal sampling, simplifying the circuit structure of the residual calibration unit. The sample signal can be a clock pattern, a pseudo-random bit sequence pattern, a custom pattern, or other types of data samples.

[0073] In other words, in some embodiments, step S12 specifically includes: providing a common-mode signal as a second channel signal during the calibration phase; and using the receiver's received signal as a residual signal.

[0074] In step S13, the single-ended residual signal is converted into a differential residual signal. This improves the accuracy of the residual signal.

[0075] In step S14, the amplitude of the reverse suppression signal is adjusted based on the offset characteristic value of the differential residual signal.

[0076] When the peer interface circuit sends a common-mode signal, the DC blocking capacitor connected to the communication link isolates the DC common-mode signal. Therefore, ideally, the second channel signal received by the receiver should be "0". However, if the reverse suppression signal cannot completely cancel the transmitted signal, the signal cancellation circuit will send the uncancelled forward signal to the receiver. In other words, when the peer interface circuit sends a common-mode signal, the signal received by the receiver is the residual signal.

[0077] The residual signal can be represented as positive and negative waveforms. Specifically, a positive waveform indicates that the actual received signal exceeds a reference value (i.e., the aforementioned "0" value), while a negative waveform indicates that the actual received signal is less than the reference value. In some embodiments, the step of obtaining the offset feature value specifically includes: flipping the negative waveforms in multiple residual signals to positive waveforms to obtain a detection signal with all positive waveforms; comparing the offset of the peak value of each positive waveform in the detection signal relative to the reference value, i.e., the offset relative to the "0" value, and using the maximum / minimum / median / mean value as the offset feature value.

[0078] Flipping the residual signal reduces the complexity of the comparison module and improves the accuracy of peak capture. It also ensures that all fluctuations participate in subsequent peak determination, avoiding detection omissions due to different polarities, thus achieving complete tracking and accurate response to offset feature values.

[0079] In some embodiments, the adjustment signal specifically adjusts the amplitude of the reverse suppression signal by adjusting the bias current provided by the current source in the signal elimination circuit.

[0080] According to the signal cancellation circuit, signal cancellation method, and interface circuit provided in this application, the amplitude of the reverse suppression signal is dynamically adjusted by detecting the offset characteristic value of the residual signal, thereby achieving high-precision interference cancellation and improving the anti-interference capability of the communication system. In particular, it can reduce the impact of environmental factors such as temperature changes on communication quality. Furthermore, for single-ended communication systems, converting the single-ended signal into a differential signal before performing residual detection and amplitude adjustment further improves the accuracy of amplitude adjustment.

[0081] As described above, these embodiments of this application do not exhaustively cover all details, nor do they limit this application to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. The scope of protection of this application should be determined by the scope defined in the claims of this application.

Claims

1. A signal cancellation circuit for a full-duplex transmit-receive circuit for single-ended communication, the full-duplex transmit-receive circuit comprising a transmitter and a receiver, the transmitter being used to provide a first channel signal to a communication link according to an input signal, and the receiver being used to receive a second channel signal through the communication link, wherein... The signal cancellation circuit includes: A signal suppression unit, connected to the input terminal of the receiver, includes a current source and a differential pair transistor. The differential pair transistor is used to provide a reverse suppression signal to the input terminal of the receiver based on the input signal and the bias current provided by the current source. The residual calibration unit is used to obtain the residual signal between the first channel signal and the reverse suppression signal during the calibration phase, and to adjust the current value of the current source based on the offset characteristic value of the residual signal, thereby adjusting the amplitude of the reverse suppression signal. The residual calibration unit includes: A conversion module is used to convert the single-ended residual signal into a differential residual signal, and the residual calibration unit obtains the offset characteristic value based on the differential residual signal. The signal inversion module operates in the analog domain and is used to invert the negative polarity waveforms of multiple residual signals into positive polarity waveforms to obtain a detection signal with all positive polarity waveforms. The comparison module is used to compare the offset of the peak value of each positive polarity waveform in the signal to be detected relative to a reference value, and use the maximum / minimum / median / mean value as the offset feature value; and An adjustment module is used to provide an adjustment signal based on the offset characteristic value, the adjustment signal being used to adjust the current source in the signal suppression unit.

2. The signal cancellation circuit according to claim 1, wherein, During the calibration phase, the second channel signal is a common-mode signal, and the received signal from the receiver is the residual signal. The residual calibration unit is connected between the signal suppression unit and the input of the receiver to receive the residual signal.

3. The signal cancellation circuit according to claim 2, wherein, The signal cancellation circuit further includes: The first amplification module is used to provide the amplified residual signal to the signal inversion module.

4. The signal cancellation circuit according to claim 2, wherein, The signal cancellation circuit further includes: The filtering module is used to filter the offset feature value.

5. The signal cancellation circuit according to claim 2, wherein, The comparison module and the adjustment module operate in the digital domain. The signal cancellation circuit further includes: An analog-to-digital converter module is used to convert the signal to be detected, which is of analog signal type, into the signal to be detected, which is of digital signal type.

6. The signal cancellation circuit according to claim 5, wherein, The signal cancellation circuit further includes: The second amplification module is used to amplify the signal to be detected before analog-to-digital conversion.

7. The signal cancellation circuit according to claim 2, wherein, The signal suppression unit includes: The current source; The differential pair includes a first transistor and a second transistor. The first terminal of the first transistor is connected to one input terminal of the receiver, and the control terminal is connected to one of the input signals. The first terminal of the second transistor is connected to the other input terminal of the receiver, and the control terminal is connected to the other input signal. The second terminals of the first transistor and the second transistor are connected together and connected to the current source. A first resistor, wherein a first terminal of the first transistor is connected via the first resistor to an output terminal of the transmitter; and The second resistor connects the first terminal of the second transistor to the other output terminal of the transmitter. One output of the transmitter is connected to the communication link and the residual calibration unit, while the other output is grounded.

8. An interface circuit for a full-duplex transmit / receive circuit for single-ended communication, wherein, include: A transmitter, used to provide a first channel signal to a communication link based on an input signal; A receiver, used to receive a second channel signal via the communication link; as well as The signal cancellation circuit as described in any one of claims 1-7 is connected between the communication link and the receiver, and is used to provide the reverse suppression signal to the input terminal of the receiver, the reverse suppression signal being used to cancel the first channel signal mixed in the second channel signal. The first channel is the forward channel, and the second channel is the reverse channel.

9. An interface circuit for a full-duplex transmit / receive circuit for single-ended communication, wherein, include: A transmitter, used to provide a first channel signal to a communication link based on an input signal; A receiver, used to receive a second channel signal via the communication link; as well as The signal cancellation circuit as described in any one of claims 1-7 is connected between the communication link and the receiver, and is used to provide the reverse suppression signal to the input terminal of the receiver, the reverse suppression signal being used to cancel the first channel signal mixed in the second channel signal. The first channel is the reverse channel, and the second channel is the forward channel.

10. A signal cancellation method for a full-duplex transmit-receive circuit for single-ended communication, the full-duplex transmit-receive circuit comprising a transmitter and a receiver, the transmitter being used to provide a first channel signal to a communication link according to an input signal, and the receiver being used to receive a second channel signal through the communication link, wherein... The signal cancellation method includes: The differential pair provides a reverse rejection signal to the input of the receiver based on the input signal and the bias current provided by the current source; During the calibration phase, a single-ended residual signal is obtained between the first channel signal and the reverse suppression signal; Convert the single-ended residual signal into a differential residual signal; and The current value of the current source is adjusted based on the offset characteristic value of the differential residual signal to regulate the amplitude of the reverse suppression signal. The step of obtaining the offset feature value includes: The negative polarity waveforms in the multiple residual signals are flipped into positive polarity waveforms to obtain a detection signal with a fully positive polarity waveform; The offset of the peak value of each positive polarity waveform in the signal to be detected relative to the reference value is compared, and the maximum / minimum / median / mean value is used as the offset feature value.

11. The signal cancellation method according to claim 10, wherein, The steps for obtaining the residual signal include: During the calibration phase, a common-mode signal is provided as the second channel signal; and The received signal from the receiver is used as the residual signal.

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