Printed circuit board and method for manufacturing the same

Abstract

The application discloses a printed circuit board and a preparation method thereof. The preparation method comprises the following steps: providing a laminated board; the laminated board comprises at least one inner core board, and insulating bonding sheets and outer conductive foils which are sequentially laminated on at least one side of the at least one inner core board, and the inner core board is provided with an inner circuit pattern; an outer circuit pattern is formed on the outer conductive foils by using a mask process; the mask process forms a to-be-cut copper-free area on the peripheral area of the laminated board, and the to-be-cut copper-free area surrounds the area of the outer circuit pattern; laser drilling is performed on the laminated board to form blind holes on the laminated board; mechanical drilling is performed on the laminated board to form through holes on the laminated board; the to-be-cut copper-free area of the laminated board is removed; and deburring treatment is performed on the laminated board. The embodiment of the application can effectively improve the reliability of the product.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board technology, and in particular to a printed circuit board and its manufacturing method. Background Technology

[0002] Currently, in the manufacturing process of printed circuit boards (PCBs), after the inner core board and outer conductive foil are laminated, the outer circuit pattern is initially formed on the outer conductive foil using a mask process. The mask process includes dry film lamination and etching. Because the lamination machine cannot achieve 100% coverage of the board surface, copper-free areas exist along the edges of the PCB after etching. After forming blind and through vias, copper plating is required across the entire surface. However, due to poor adhesion between the plated copper layer and the exposed copper-free areas, the plated copper in these areas tends to curl up. This can lead to the accumulation of plating solutions during subsequent pretreatment processes. In subsequent masking processes, this results in insufficient film adhesion and etching during exposure and development, ultimately leading to decreased product reliability and, in severe cases, product scrap. Summary of the Invention

[0003] This invention provides a printed circuit board and its manufacturing method to solve the problem that the current manufacturing process of printed circuit boards ultimately leads to a decrease in reliability or even scrapping.

[0004] In a first aspect, the present invention provides a method for manufacturing a printed circuit board, the method comprising: A laminated board is provided; the laminated board includes at least one inner core board, and an insulating bonding sheet and an outer conductive foil sequentially laminated on at least one side of the at least one inner core board, wherein an inner circuit pattern is formed on the inner core board; The outer layer circuit pattern is formed on the outer conductive foil using a masking process; the masking process forms a copper-free area to be cut in the outer area of ​​the laminate, and the copper-free area to be cut surrounds the area of ​​the outer layer circuit pattern. Laser drilling is performed on the laminate to create blind holes in the laminate; Mechanical drilling is performed on the laminated board to create through holes; Remove the copper-free areas to be cut from the laminate; Deburring is performed on the laminated board.

[0005] Optionally, after deburring the laminated board, the process further includes: Inspect through holes and blind holes; The laminated board is subjected to copper plating to form a conductive seed layer inside the vias and blind vias and on the surface of the outer conductive foil; the conductive seed layer covers the outer circuit pattern and the exposed insulating bonding sheet; Electroplating is performed on the conductive seed layer to increase the copper layer thickness on the inner and outer conductive foil surfaces of through holes and blind holes.

[0006] Optionally, before electroplating on the conductive seed layer, the process further includes: Obtain the dimensions of the laminate after removing the copper-free areas to be cut; The compensation value of the vertical continuous electroplating line float is determined based on the dimensions of the laminate to be cut to remove the copper-free area, so as to determine the final electroplating process parameters. Electroplating is performed on the conductive seed layer, including: Electroplating is performed on the conductive seed layer according to the final electroplating process parameters.

[0007] Optionally, after electroplating on the conductive seed layer, the process further includes: An electroplating mask is formed on the surface of the electroplated copper layer. The electroplating mask includes an electroplating channel that exposes a portion of the electroplated copper layer. The vertical projection of the electroplated copper layer exposed by the electroplating channel onto the insulating bonding sheet coincides with the vertical projection of the outer layer circuit pattern onto the insulating bonding sheet. The thickness of the exposed electroplated copper layer is increased again using an electroplating process; An etching barrier layer is formed on the exposed surface of the electroplated copper layer; Remove the electroplating mask; Remove the electroplated copper layer not covered by the etch barrier layer and the conductive seed layer corresponding to the uncovered electroplated copper layer. Remove the etch barrier layer to increase the thickness of the outer circuit pattern.

[0008] Optionally, a laminated board is provided, comprising: Provide at least one inner core board, on which an inner layer circuit pattern is formed; An insulating bonding sheet and an outer conductive foil are sequentially stacked on at least one side of the inner core board to form a laminated structure; The laminated structure is pressed together to form a laminated plate.

[0009] Optionally, an outer layer circuit pattern is formed on the outer conductive foil using a masking process, including: A dry film is applied to the side of the outer conductive foil away from the insulating bonding sheet; Etched through-holes are formed on the dry film using exposure and development processes, exposing part of the outer conductive foil; The exposed outer conductive foil is removed using an acid etching process; Remove the dry film to form the outer layer circuit pattern.

[0010] Optionally, an electroplating mask is formed on the surface of the electroplated copper layer, including: An electroplating mask is formed on the entire surface of the electroplated copper layer; Electroplating channels are formed on an electroplating mask using exposure and development processes.

[0011] Optionally, the copper-free areas of the laminate to be cut are removed, including: The copper-free area to be cut is located at the edges of the laminate, and the area where the outer layer circuit pattern is located is adjacent to the copper-free area to be cut. Along the direction parallel to the laminate, while removing the copper-free area to be cut, a portion of the area where the outer layer circuit pattern is located adjacent to the copper-free area to be cut is also removed, with a width of a preset safety margin.

[0012] Optionally, the preset safety margin is 1mm.

[0013] Secondly, the present invention provides a printed circuit board, which is manufactured using the printed circuit board preparation method provided in any embodiment of the present invention.

[0014] The technical solution of this invention removes the copper-free areas to be cut around the outer layer circuit pattern area after forming blind and through vias. This effectively avoids the copper layer from curling up on the surface of the copper-free areas after electroplating the entire surface in subsequent processes. This prevents the presence of plating solutions during pretreatment, which can lead to insufficient adhesion of the film in subsequent masking processes and ultimately etching during exposure and development. This invention effectively improves product reliability and significantly reduces the scrap rate.

[0015] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart of a method for manufacturing a printed circuit board according to an embodiment of the present invention; Figures 2-5 This is a schematic diagram of the structure corresponding to each step in a method for manufacturing a printed circuit board provided in an embodiment of the present invention; Figure 6 This is a flowchart of another method for preparing a printed circuit board provided in an embodiment of the present invention; Figure 7 This is a flowchart of another method for preparing a printed circuit board provided in an embodiment of the present invention; Figure 8 This is a flowchart of another method for manufacturing a printed circuit board provided in an embodiment of the present invention; Figures 9-11 This is a schematic diagram of some steps in another method for manufacturing a printed circuit board provided in this embodiment of the invention. Figure 12 This is a flowchart of another method for preparing a printed circuit board provided in an embodiment of the present invention. Detailed Implementation

[0018] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0019] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or apparatuses is not necessarily limited to those explicitly listed, but may include other steps or apparatuses not explicitly listed or inherent to such processes, methods, products, or apparatuses.

[0020] Figure 1 This is a flowchart of a method for manufacturing a printed circuit board according to an embodiment of the present invention. Figures 2-5 This is a schematic diagram of the structure corresponding to each step in a method for manufacturing a printed circuit board according to an embodiment of the present invention, as shown below. Figure 1 As shown, the preparation method includes: S100: Provides a laminated board; the laminated board includes at least one inner core board, and an insulating bonding sheet and an outer conductive foil sequentially pressed onto at least one side of the at least one inner core board, wherein an inner circuit pattern is formed on the inner core board.

[0021] Specifically, such as Figure 2As shown, the laminate 1 may include at least one inner core board 11, an insulating bonding sheet 12 disposed on at least one side of the inner core board 11, and an outer conductive foil 13. For example, the inner core board 11 may include an insulating substrate and copper foil covering both sides of the insulating substrate. The copper foil covering both sides of the insulating substrate may be provided with the desired inner layer circuit pattern. The laminate 1 may include one or more inner core boards 11, and multiple inner core boards 11 may be bonded together by an insulating adhesive layer. For example, the insulating adhesive layer may include a prepreg. Figure 2 The example shows that the laminate 1 includes two inner core boards 11. In some embodiments of the present invention, the laminate 1 may also include one inner core board 11, or more than two inner core boards 11, without being specifically limited here.

[0022] An insulating bonding sheet 12 and an outer conductive foil 13 are sequentially disposed on one or both sides of at least one inner core board 11. For example, the insulating bonding sheet 12 may include a prepreg, and the outer conductive foil 13 may include a copper foil. The inner core board 11, the insulating bonding sheet 12, and the outer conductive foil 13 are pressed together using a pressing process to form a laminate 1.

[0023] S110: The outer layer circuit pattern is formed on the outer conductive foil using a masking process; the masking process forms a copper-free area to be cut in the outer area of ​​the laminate, and the copper-free area to be cut surrounds the area of ​​the outer layer circuit pattern.

[0024] Specifically, such as Figure 3 As shown, an outer layer circuit pattern 131 is prepared on an outer conductive foil 13 using a mask process. The mask process may include processes such as film application and acid etching. Since the film application cannot completely cover the surface of the outer conductive foil 13, that is, the edges of the surface of the outer conductive foil 13 cannot be covered by the dry film, the uncovered edges of the outer conductive foil 13 will be etched away in the subsequent acid etching process, thereby forming a copper-free area 132 to be cut around the area where the outer circuit pattern 131 is located.

[0025] S120: Laser drilling is performed on the laminate to create blind holes in the laminate.

[0026] Specifically, such as Figure 4 As shown, blind holes 14 can be formed on the laminate 1 using laser drilling. The number, location, and depth of the blind holes 14 can be arbitrarily set according to product requirements. Figure 4 An exemplary illustration shows that the laminate 1 is formed with two blind holes 14 by laser drilling. However, in some embodiments of the present invention, the number, location, and depth of the blind holes 14 may differ from those of the other blind holes. Figure 4 The blind hole 14 shown is not specifically limited here.

[0027] S130: Mechanically drill holes in the laminate to create through holes in the laminate.

[0028] Specifically, such as Figure 4 As shown, through holes 15 can be formed on the laminate 1 using mechanical drilling. The number, location, and other parameters of the through holes 15 can be arbitrarily set according to product requirements. Figure 4 An exemplary illustration shows a through hole 15 formed in the laminate 1 by mechanical drilling. However, in some embodiments of the present invention, the number, location, and other parameters of the through holes 15 may differ. Figure 4 The through hole 15 shown is not specifically limited here.

[0029] In S110, the outer layer circuit pattern is first precisely formed using a masking process. When forming blind vias 14 and through vias 15 in the future, the precise outer layer circuit pattern can be used as a reference to perform high-precision drilling alignment, ensuring the accuracy of the position of blind vias 14 and through vias 15.

[0030] S140: Remove the copper-free area to be cut from the laminate.

[0031] Specifically, such as Figure 4 and Figure 5 As shown, the copper-free area 132 to be cut is removed around the area where the outer circuit pattern 131 is located. This can effectively prevent the copper layer on the surface of the copper-free area 132 from curling up after the entire surface is electroplated with copper in the subsequent process. This would result in the presence of chemical residue during the subsequent pretreatment of the board surface, which would lead to insufficient adhesion of the film in the subsequent mask process and ultimately cause corrosion during exposure and development processes.

[0032] S150: Deburring of laminated boards.

[0033] Specifically, such as Figure 5 As shown, the laminate 1 undergoes deburring treatment to remove burrs generated during drilling and wash them away with water, thereby removing burrs from blind holes 14 and through holes 15. Simultaneously, after cutting away the copper-free area 132, burrs remain on the edge of the laminate 1. Deburring after removing the copper-free area 132 effectively removes these burrs from the edge of the laminate 1, improving the quality of the laminate 1's edge.

[0034] In this embodiment of the invention, the removal of the copper-free area 132 to be cut is performed after the blind hole 14 and through hole 15 are formed. This effectively avoids the problem of inaccurate positioning of the blind hole 14 and through hole 15 caused by removing the positioning holes of the laminate 1 when removing the copper-free area 132. Furthermore, removing the copper-free area 132 before deburring ensures that the edge quality is not perfect after edge trimming, even if the edge quality cannot be perfect after deburring and subsequent brushing.

[0035] The technical solution of this invention, after forming blind vias 14 and through vias 15, removes the copper-free area 132 surrounding the outer layer circuit pattern 131. This effectively avoids the copper layer from curling up on the surface of the copper-free area 132 after electroplating the entire surface in subsequent processes. This prevents the presence of plating solution during subsequent pretreatment of the board surface, which can lead to insufficient adhesion of the film in subsequent masking processes and ultimately etching during exposure and development. This invention effectively improves product reliability and significantly reduces product scrap rate.

[0036] Optionally, based on the above embodiments, Figure 6 This is a flowchart of another method for fabricating a printed circuit board provided in an embodiment of the present invention, such as... Figure 6 As shown, the preparation method includes: S200: Provides a laminate; the laminate includes at least one inner core board, and an insulating bonding sheet and an outer conductive foil sequentially pressed onto at least one side of the at least one inner core board, wherein an inner circuit pattern is formed on the inner core board.

[0037] S210: The outer layer circuit pattern is formed on the outer conductive foil using a masking process; the masking process forms a copper-free area to be cut in the outer area of ​​the laminate, and the copper-free area to be cut surrounds the area of ​​the outer layer circuit pattern.

[0038] S220: Laser drilling is performed on the laminate to create blind holes in the laminate.

[0039] S230: Mechanically drill holes in the laminate to create through holes in the laminate.

[0040] S240: Remove the copper-free area to be cut from the laminate.

[0041] S250: Deburring process for laminated boards.

[0042] S260: Inspect through holes and blind holes.

[0043] Specifically, such as Figure 5 As shown, the blind holes 14 and through holes 15 are cleaned and inspected to ensure their quality.

[0044] S270: The laminate is subjected to copper plating to form a conductive seed layer on the surface of the outer conductive foil inside the vias and blind vias; the conductive seed layer covers the outer circuit pattern and the exposed insulating bonding sheet.

[0045] Specifically, such as Figure 5 As shown, in order to achieve the metallization of blind vias 14 and through vias 15, copper plating can be performed first in the through vias 15 and blind vias 14, as well as on the side of the outer layer circuit pattern 131 away from the inner core board 11 and on the side of the exposed insulating bonding sheet 12 of the outer layer circuit pattern 131 away from the inner core board 11, to form a conductive seed layer.

[0046] S280: Get the dimensions of the laminate after removing the copper-free areas to be cut.

[0047] Specifically, in the existing PCB manufacturing process, after forming the conductive seed layer, an electroplating process is needed to plate a copper layer on the surface of the conductive seed layer. The plating height is related to the product size. In conventional designs, the product size is determined at the edge-removal station. According to the design logic of the Vertical Continuous Plating Line (VCP), to ensure copper plating uniformity and product tolerance, a floating compensation design is implemented based on the line design. Data adjustments are made based on uniformity. That is, a floating compensation value for the vertical continuous plating line is determined based on the product size, thereby determining the electroplating process parameters and ensuring plating uniformity.

[0048] like Figure 5 As shown, in this embodiment of the invention, the copper-free area to be cut is removed after the blind vias 14 and through vias 15 are formed. This means that the dimensions of the PCB board are adjusted during the manufacturing process. If electroplating is performed directly according to the original dimensions without removing the copper-free area, edge burning will occur. Edge burning not only causes poor quality but also alters the copper plating lattice, leading to copper foil curling after grinding. Therefore, in this embodiment, before electroplating the copper layer, the dimensions of the laminate 1 with the copper-free area removed are obtained again to acquire the latest dimensions of the laminate 1.

[0049] S290: Determine the vertical continuous electroplating line float compensation value based on the dimensions of the laminated board to be cut to remove the copper-free area, in order to determine the final electroplating process parameters.

[0050] Specifically, such as Figure 5 As shown, the compensation value of the vertical continuous electroplating line float is determined based on the latest dimensions of the laminate 1 in order to determine the final electroplating process parameters.

[0051] S291: Electroplating is performed on the conductive seed layer according to the final electroplating process parameters to increase the copper layer thickness on the inner and outer conductive foil surfaces of through holes and blind holes.

[0052] Specifically, such as Figure 5 As shown, electroplating is performed on the conductive seed layer according to the final electroplating process parameters to increase the copper layer thickness on the inner and outer circuit patterns 131 of the through holes 15 and blind holes 14, as well as the surface of the exposed insulating bonding sheet 12, thereby achieving vertical interconnection of the laminate 1. For example, a resin-filled via plating (POFV) process can be used for copper plating.

[0053] Optionally, based on the above embodiments, Figure 7 This is a flowchart of another method for fabricating a printed circuit board provided in an embodiment of the present invention, such as... Figure 7 As shown, the preparation method includes: S300: Provides a laminate; the laminate includes at least one inner core board, and an insulating bonding sheet and an outer conductive foil sequentially laminated on at least one side of the at least one inner core board, wherein an inner circuit pattern is formed on the inner core board.

[0054] S310: The outer layer circuit pattern is formed on the outer conductive foil using a masking process; the masking process forms a copper-free area to be cut in the outer area of ​​the laminate, and the copper-free area to be cut surrounds the area of ​​the outer layer circuit pattern.

[0055] S320: Laser drilling is performed on the laminate to create blind holes in the laminate.

[0056] S330: Mechanically drill holes in the laminate to create through holes in the laminate.

[0057] S340: Remove the copper-free area to be cut from the laminate.

[0058] S350: Deburring process for laminated boards.

[0059] S360: Inspects through holes and blind holes.

[0060] S370: The laminate is subjected to copper plating to form a conductive seed layer on the surface of the outer conductive foil inside the vias and blind vias; the conductive seed layer covers the outer circuit pattern and the exposed insulating bonding sheet.

[0061] S380: Get the dimensions of the laminate after removing the copper-free areas to be cut.

[0062] S390: Determine the vertical continuous electroplating line float compensation value based on the dimensions of the laminate to be cut (excluding the copper-free area) in order to determine the final electroplating process parameters.

[0063] S391: Electroplating is performed on the conductive seed layer according to the final electroplating process parameters to increase the copper layer thickness on the inner and outer conductive foil surfaces of through holes and blind holes.

[0064] S392: An electroplating mask is formed on the entire surface of the electroplated copper layer.

[0065] Specifically, such as Figure 5 As shown, after copper layers are electroplated on the surfaces of the blind via 14, through via 15, outer layer circuit pattern 131, and exposed insulating bonding sheet 12, if the overall copper layer thickness corresponding to the outer layer circuit pattern 131 meets the requirements, the conductive seed layer and the electroplated copper layer on the side of the insulating bonding sheet 12 away from the inner core board 11 outside the area corresponding to the outer layer circuit pattern 131 can be directly etched away using the mask process, thus completing the fabrication of the outer layer circuit pattern 131. If the overall copper layer thickness corresponding to the outer layer circuit pattern 131 is thinner than the required thickness, an electroplating mask can be formed on the side of the electroplated copper layer away from the inner core board 11. For example, the electroplating mask may include a dry film.

[0066] S393: An electroplating channel is formed on an electroplating mask using exposure and development processes; the electroplating channel exposes a portion of the electroplated copper layer; the vertical projection of the electroplated copper layer exposed by the electroplating channel on the insulating bonding sheet coincides with the vertical projection of the outer layer circuit pattern on the insulating bonding sheet.

[0067] Specifically, such as Figure 5 As shown, electroplating channels are formed on an electroplating mask using processes such as exposure and development. The vertical projection of the electroplated copper layer exposed by the electroplating channels onto the insulating bonding sheet 12 coincides with the vertical projection of the outer layer circuit pattern 131 onto the insulating bonding sheet 12. That is, the electroplating channels expose the electroplated copper layer in the area corresponding to the outer layer circuit pattern 131.

[0068] S394: The thickness of the exposed electroplated copper layer is increased again using an electroplating process.

[0069] Specifically, such as Figure 5 As shown, copper is further electroplated on the exposed electroplated copper layer surface using an electroplating process to increase the thickness of the electroplated copper layer in the area corresponding to the outer circuit pattern 131.

[0070] S395: Form an etch barrier layer on the exposed surface of the electroplated copper layer.

[0071] Specifically, such as Figure 5 As shown, through the above-mentioned secondary electroplating process, the overall thickness of the copper layer in the area corresponding to the outer circuit pattern 131 meets the actual requirements. At this time, an etching barrier layer is formed on the surface of the secondary electroplated copper layer. For example, the etching barrier layer includes a tin layer.

[0072] S396: Remove electroplating mask.

[0073] Specifically, the electroplating mask is removed.

[0074] S397: Remove the electroplated copper layer not covered by the etch barrier layer and the conductive seed layer corresponding to the area of ​​the uncovered electroplated copper layer.

[0075] Specifically, such as Figure 5 As shown, the electroplated copper layer not covered by the etch barrier layer and the conductive seed layer corresponding to the uncovered electroplated copper layer are removed, leaving only the outer circuit pattern 131 and the electroplated copper layer in its corresponding area.

[0076] S398: Remove the etch barrier layer to increase the thickness of the outer circuit pattern.

[0077] Specifically, such as Figure 5 As shown, removing the etch barrier layer increases the thickness of the outer layer circuit pattern 131.

[0078] In the technical solution of this invention embodiment, after the blind hole 14 and through hole 15 are formed, the copper-free area 132 to be cut around the laminate 1 is removed, which avoids the formation of an electroplated copper layer in the copper-free area 132 to be cut during the copper plating process in S391. Furthermore, since the bonding force between the electroplated copper layer and the insulating bonding sheet 12 is poor, the electroplated copper layer in the copper-free area 132 to be cut will curl up, further avoiding the occurrence of corrosion in subsequent steps such as S393.

[0079] Optionally, based on the above embodiments, Figure 8 This is a flowchart of another method for manufacturing a printed circuit board provided in an embodiment of the present invention. Figures 9-11 This is a schematic diagram of some steps in another method for manufacturing a printed circuit board provided in this embodiment of the invention, as shown below. Figure 8 As shown, the preparation method includes: S400: Provides a laminate; the laminate includes at least one inner core board, and an insulating bonding sheet and an outer conductive foil sequentially laminated on at least one side of the at least one inner core board, wherein an inner circuit pattern is formed on the inner core board.

[0080] S410: A dry film is applied to the side of the outer conductive foil away from the insulating bonding sheet.

[0081] Specifically, such as Figure 9 and Figure 10 As shown, a dry film 16 is attached to the side of the outer conductive foil 13 away from the insulating bonding sheet 12. Figure 10 It can be seen that the first side 101 of the outer conductive foil 13 can be the film insertion edge. Due to the limitations of the current film application machine, the first side 101 and the second side 102 of the outer conductive foil 13 are both a certain distance from the edge of the dry film 16. Furthermore, due to the size limitation of the dry film, the third side 103 and the fourth side 104 of the outer conductive foil 13 are also a certain distance from the edge of the dry film 16.

[0082] S420: Using exposure and development processes, etched through-grooves are formed on the dry film, exposing part of the outer conductive foil.

[0083] Specifically, such as Figure 11 As shown, an etched groove 161 is formed on the dry film 16 using an exposure and development process, and the etched groove 161 exposes part of the outer conductive foil 13.

[0084] S430: The exposed outer conductive foil is removed using an acid etching process to form the outer circuit pattern; a copper-free area to be cut is formed in the outer area of ​​the laminate; the copper-free area to be cut surrounds the area of ​​the outer circuit pattern.

[0085] Specifically, such as Figure 3 and Figure 11 As shown, the exposed outer conductive foil 13 is removed using an acid etching process to form the outer circuit pattern 131. Simultaneously, during the acid etching process, the outer conductive foil 13 at the edges not covered by the dry film 16 is etched away, forming a copper-free area 132 to be cut in the outer region of the laminate. The copper-free area 132 to be cut surrounds the area of ​​the outer circuit pattern 131.

[0086] S440: Remove dry film.

[0087] S450: Laser drilling is performed on the laminate to create blind holes in the laminate.

[0088] S460: Mechanically drill holes in the laminate to create through holes in the laminate.

[0089] S470: Remove the copper-free area to be cut from the laminate.

[0090] S480: Deburring of laminated boards.

[0091] Optionally, based on the above embodiments, Figure 12 This is a flowchart of another method for manufacturing a printed circuit board provided in an embodiment of the present invention, such as... Figure 12 As shown, the preparation method includes: S500: Provides a laminated board; the laminated board includes at least one inner core board, and an insulating bonding sheet and an outer conductive foil sequentially laminated on at least one side of the at least one inner core board, wherein an inner circuit pattern is formed on the inner core board.

[0092] S510: The outer layer circuit pattern is formed on the outer conductive foil using a masking process; the masking process forms a copper-free area to be cut in the outer area of ​​the laminate, and the copper-free area to be cut surrounds the area of ​​the outer layer circuit pattern.

[0093] S520: Laser drilling is performed on the laminate to create blind holes in the laminate.

[0094] S530: Mechanically drill holes in the laminate to create through holes in the laminate.

[0095] S540: The copper-free area to be cut is located at the edges of the laminate, and the area containing the outer layer circuit pattern is adjacent to the copper-free area to be cut. Along the direction parallel to the laminate, while removing the copper-free area to be cut, a portion of the area containing the outer layer circuit pattern adjacent to the copper-free area to be cut, with a width equal to a preset safety margin, is also removed.

[0096] Specifically, such as Figure 10 and Figure 3 As shown, Figure 10 The area of ​​the outer conductive foil 13 not covered by the dry film 16 shown corresponds to Figure 3 The copper-free area 132 shown can be extended by a preset safety margin to the area where the outer circuit pattern 131 is located during subsequent cutting and removal of the copper-free area 132. This will remove both the copper-free area 132 and the extended preset safety margin, thus avoiding incomplete removal of the copper-free area 132, which could lead to the subsequent copper plating peeling up and ultimately corrosion.

[0097] For example, the distance between the first edge 101 of the outer conductive foil 13 and the edge of the dry film 16 can be set to 1 mm, and the distance between the second edge 102 of the outer conductive foil 13 and the edge of the dry film 16 can be set to 1 mm. By setting a 1 mm margin for both the insertion edge and the second edge 102 opposite to the insertion edge, the reduction of… Figure 3 The size of the copper-free area 132 shown should not be set too large, to avoid... Figure 3 The copper-free area 132 to be cut shown cannot be completely removed, and the remaining copper-free area 132 cannot effectively improve the problem of copper layer curling at the board edge. At the same time, the margin should not be too small to avoid excessive removal of the area containing the outer layer circuit pattern 131 during the removal of the copper-free area 132, which would prevent subsequent board processes from being completed. Due to the size limitations of the dry film 16, the distance between the third edge 103 of the outer conductive foil 13 and the edge of the dry film 16 is approximately 4mm, and the distance between the fourth edge 104 of the outer conductive foil 13 and the edge of the dry film 16 is approximately 4mm. A preset safety margin can be set to 1mm, meaning that after removing the 1mm copper-free area 132 corresponding to the first edge 101 and the second edge 102, extend 1mm into the area containing the outer layer circuit pattern 131 and remove it; similarly, after removing the 4mm copper-free area 132 corresponding to the third edge 103 and the second edge 104, extend 1mm into the area containing the outer layer circuit pattern 131 and remove it. This design allows for the removal of all copper-free areas around the entire product, ensuring the effectiveness of the board edges.

[0098] S550: Deburring process for laminated boards.

[0099] This invention provides a printed circuit board, wherein the printed circuit board is manufactured using the method for manufacturing a printed circuit board provided in any of the above embodiments of this invention, and possesses the beneficial effects of the method for manufacturing a printed circuit board provided in any of the above embodiments of this invention.

[0100] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0101] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for manufacturing a printed circuit board, characterized in that, include: Provide laminated boards; The laminate includes at least one inner core board, and an insulating bonding sheet and an outer conductive foil sequentially pressed onto at least one side of the at least one inner core board, wherein an inner circuit pattern is formed on the inner core board. An outer layer circuit pattern is formed on the outer conductive foil using a masking process; the masking process forms a copper-free area to be cut in the outer region of the laminate, and the copper-free area to be cut surrounds the area of ​​the outer layer circuit pattern. Laser drilling is performed on the laminate to form blind holes in the laminate; Mechanical drilling is performed on the laminate to form through holes in the laminate; Remove the copper-free area to be cut from the laminate; The laminated plate is deburred; After deburring the laminated plate, the process further includes: The through holes and the blind holes are inspected; The laminated board is subjected to copper plating to form a conductive seed layer in the vias and blind vias and on the surface of the outer conductive foil; the conductive seed layer covers the outer circuit pattern and the exposed insulating bonding sheet; Electroplating is performed on the conductive seed layer to increase the copper layer thickness inside the through holes and blind holes, and on the surface of the outer conductive foil.

2. The method for preparing a printed circuit board according to claim 1, characterized in that, Before electroplating on the conductive seed layer, the process further includes: Obtain the dimensions of the laminate after removing the copper-free areas to be cut; The vertical continuous electroplating line float compensation value is determined based on the dimensions of the laminated board from which the copper-free area to be cut is removed, in order to determine the final electroplating process parameters; Electroplating is performed on the conductive seed layer, including: Electroplating is performed on the conductive seed layer according to the final electroplating process parameters.

3. The method for preparing a printed circuit board according to claim 1, characterized in that, After electroplating on the conductive seed layer, the process further includes: An electroplating mask is formed on the surface of the electroplated copper layer. The electroplating mask includes an electroplating channel that exposes a portion of the electroplated copper layer. The vertical projection of the electroplated copper layer exposed by the electroplating channel onto the insulating bonding sheet coincides with the vertical projection of the outer layer circuit pattern onto the insulating bonding sheet. The thickness of the exposed electroplated copper layer is increased again using an electroplating process; An etching barrier layer is formed on the exposed surface of the electroplated copper layer; Remove the electroplating mask; Remove the electroplated copper layer not covered by the etching barrier layer and the conductive seed layer corresponding to the area of ​​the uncovered electroplated copper layer. Remove the etch barrier layer to increase the thickness of the outer circuit pattern.

4. The method for preparing a printed circuit board according to claim 1, characterized in that, Provide laminated boards, including: At least one inner core board is provided, on which the inner circuit pattern is formed; The insulating bonding sheet and the outer conductive foil are sequentially stacked on at least one side of the inner core board to form a laminated structure; The laminated structure is pressed together to form the laminated plate.

5. The method for preparing a printed circuit board according to claim 1, characterized in that, The outer layer circuit pattern is formed on the outer conductive foil using a masking process, including: A dry film is attached to the side of the outer conductive foil away from the insulating bonding sheet; An etched groove is formed on the dry film using an exposure and development process, the etched groove exposing a portion of the outer conductive foil; The exposed outer conductive foil is removed using an acid etching process; Remove the dry film to form the outer layer circuit pattern.

6. The method for preparing a printed circuit board according to claim 3, characterized in that, Forming an electroplating mask on the surface of the electroplated copper layer includes: An electroplating mask is formed on the entire surface of the electroplated copper layer; The electroplating channel is formed on the electroplating mask using exposure and development processes.

7. The method for preparing a printed circuit board according to claim 1, characterized in that, Removing the copper-free area to be cut from the laminate includes: The copper-free area to be cut is located at the perimeter of the laminate, and the area where the outer layer circuit pattern is located is adjacent to the copper-free area to be cut; along the direction parallel to the laminate, while removing the copper-free area to be cut, a portion of the area where the outer layer circuit pattern is located adjacent to the copper-free area to be cut is also removed, with a width of a preset safety margin.

8. The method for preparing a printed circuit board according to claim 7, characterized in that, The preset safety margin is 1mm.

9. A printed circuit board, characterized in that, It is manufactured using the method for preparing a printed circuit board according to any one of claims 1-8.

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