A defect distribution trend oriented process design kit parameter optimization system and method

CN121723964BActive Publication Date: 2026-08-07ZHEJIANG ICSPROUT SEMICONDUCTOR CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ZHEJIANG ICSPROUT SEMICONDUCTOR CO LTD
Filing Date
2026-02-09
Publication Date
2026-08-07

AI Technical Summary

Technical Problem

[0005]本发明要解决的技术问题在于克服现有PDK开发方法中制造反馈利用不足、优化滞后且依赖人工的缺陷,旨在通过缺陷分布与版图之间的关联学习,实时识别PDK中存在的结构敏感性区域,并给出可行的PDK参数微调建议,提出一种以缺陷分布趋势为导向的工艺设计套件参数优化系统及方法

Benefits of technology

[0023]本发明将海量、非结构化的缺陷图像数据,自动转化为针对特定设计规则的、可执行的PDK参数优化建议,可从缺陷密集位置反推出设计敏感因素,极大提升了制造反馈的利用效率,实现了制造数据到设计知识的自动化转化。

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Abstract

The application discloses a process design kit parameter optimization system and method oriented to defect distribution trend, and belongs to the field of integrated circuit design and manufacturing. The system comprises: a defect trend analysis module, which is used for mapping wafer defect data to design layout and clustering to identify defect hot spot areas; a pattern matching and PDK parameter association module, which is used for extracting pattern features in the hot spot areas and associating them to specific PDK rule parameters; and an optimal parameter combination acquisition module, which is used for generating a parameter fine-tuning scheme and performing multi-objective scoring through process simulation to output an optimal parameter combination. The method realizes automatic and closed-loop feedback optimization from manufacturing defects to design parameters, can quickly identify PDK sensitive items, shorten the modeling cycle, and reduce the dependence on artificial experience and trial-and-error costs.
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Description

Technical Field

[0001] This invention belongs to the field of semiconductor manufacturing, and in particular relates to a process design kit parameter optimization system and method guided by defect distribution trends. Background Technology

[0002] As integrated circuit process nodes continue to evolve to 3nm and more advanced levels, process variations and manufacturing defects have an increasingly significant impact on chip performance and yield. In advanced process node chip manufacturing, the Process Design Kit (PDK) serves as a bridge between design and manufacturing, providing crucial references such as electrical models, design rules, and physical layer constraints. However, the traditional PDK development process mainly relies on: simulation modeling (SPICE-based), manual calibration by process engineering, and limited test data from lithography and etching processes.

[0003] Defects frequently occur in the early stages of mass production, especially at new nodes (such as 3nm) or when new materials are introduced. Although the FAB plant collects a large number of defect distribution maps, PDK modeling does not make full use of this feedback data, resulting in: delayed convergence of PDK parameter accuracy; inability to correct modeling biases in defect-concentrated areas in a timely manner; and long PDK update cycles and high costs of repeated iterations.

[0004] Currently, only a few studies are attempting to use image recognition to assist yield analysis. A closed-loop process for optimizing PDK modeling parameters based on defect distribution trends has not yet been established, and dynamic response mechanisms and model structure integration are lacking. Therefore, there is an urgent need for a technical solution that can automatically analyze defect distribution, intelligently associate design rules, and dynamically propose PDK parameter optimization suggestions to accelerate PDK model convergence and improve chip first-pass yield and mass production yield. Summary of the Invention

[0005] The technical problem this invention aims to solve is to overcome the shortcomings of existing PDK development methods, such as insufficient utilization of manufacturing feedback, lagging optimization, and reliance on manual intervention. It aims to identify structurally sensitive regions in the PDK in real time through correlation learning between defect distribution and layout, and to provide feasible PDK parameter fine-tuning suggestions. This invention proposes a process design kit parameter optimization system and method guided by defect distribution trends. The goal is to construct a PDK-aided modeler system based on defect trends, enhancing the PDK's responsiveness to manufacturing feedback in the early design stages.

[0006] The present invention is implemented as follows: In a first aspect, the present invention provides a process design kit parameter optimization system guided by defect distribution trends, comprising:

[0007] The defect trend analysis module is used to receive wafer defect data, perform coordinate mapping and cluster analysis, and generate defect hotspot regions and corresponding weight information.

[0008] The graphic matching and PDK parameter association module is used to extract local geometric templates within the defect hotspot area and match them with a pre-set PDK rule base to determine candidate parameters of the process design kit associated with the defect.

[0009] The optimal parameter combination acquisition module is used to generate multiple candidate parameter fine-tuning parameter combinations based on the candidate parameters of the process design kit, and to score them through process simulation, selecting the parameter combination with the best score.

[0010] Preferably, the coordinate mapping is based on wafer alignment information to map defect coordinates to the design layout coordinate system.

[0011] Preferably, the graphic matching and PDK parameter association module uses graphic hashing, SURF features, or contour encoding methods to perform local geometric template matching.

[0012] Preferably, the optimal parameter combination acquisition module generates multiple candidate parameter fine-tuning versions through equidistant scanning, grid search, or Bayesian optimization, and scores them based on lithography simulation, etching simulation, or optical proximity correction simulation.

[0013] Preferably, the scoring uses scoring metrics such as defect density, critical size uniformity, or optical proximity correction cost.

[0014] Preferably, the system further includes a continuous optimization and version management module, which is used to record parameter adjustment history, support version rollback, and integrate into the process design kit development process.

[0015] Preferably, the cluster analysis uses the DBSCAN or MeanShift algorithm.

[0016] Secondly, the present invention provides a method for optimizing process design kit parameters based on defect distribution trends, characterized in that the method includes the following steps:

[0017] Acquire wafer defect data, perform coordinate mapping and cluster analysis, and identify defect hotspot regions and their corresponding weight information;

[0018] Extract local geometric templates of the layout within the defect hotspot area and match them with a pre-set PDK rule base to determine candidate parameters of the process design kit associated with the defect;

[0019] Multiple fine-tuning parameter combinations are generated based on the sensitive PDK parameters, and the optimal parameter combination is selected by scoring through process simulation.

[0020] Thirdly, the present invention provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the process design kit parameter optimization method.

[0021] Fourthly, the present invention provides a computer-readable storage medium, characterized in that it stores a computer program, which, when executed by a processor, implements the process design kit parameter optimization method.

[0022] The beneficial effects of this invention are as follows:

[0023] This invention automatically transforms massive, unstructured defect image data into executable PDK parameter optimization suggestions for specific design rules. It can deduce design-sensitive factors from defect-dense locations, greatly improving the utilization efficiency of manufacturing feedback and realizing the automated transformation of manufacturing data into design knowledge.

[0024] This invention proposes a dynamic optimization closed loop for PDK, consisting of "defect detection - image extraction - parameter fine-tuning - simulation verification - parameter optimization selection". This enables PDK to iterate and update rapidly online like software, significantly shortening the PDK model convergence cycle, reducing the number of iterations, and improving early modeling accuracy.

[0025] This invention reduces the subjectivity of manual analysis and the high cost of repeated tape-out verification through a data-driven and simulation-first strategy, making PDK optimization more scientific and efficient, and reducing reliance on experts and trial-and-error costs.

[0026] The system architecture of this invention is not dependent on specific process nodes or product types, and can be adapted to various circuit designs such as logic, memory, and analog. Furthermore, it can be flexibly expanded as new defect detection technologies and simulation tools develop. Attached Figure Description

[0027] To more clearly illustrate the technical solution of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 A flowchart of a process design kit parameter optimization system based on defect distribution trends is provided for an embodiment of the present invention.

[0029] Figure 2 This is a schematic diagram comparing the defect hotspot map and the design layout overlaid.

[0030] Definitions of abbreviations and key terms:

[0031] PDK: Process Design Kit.

[0032] Defect Map: A two-dimensional map of defect distribution generated after wafer-level inspection.

[0033] SEM: Scanning Electron Microscope.

[0034] Pattern Matching: Graphic matching.

[0035] ΔPDK: A variant of the PDK parameter with fine-tuning. Detailed Implementation

[0036] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0037] See appendix Figure 1 This embodiment provides a process design kit parameter optimization system guided by defect distribution trends. The system constructs an automated feedback closed loop from manufacturing defects to design parameter optimization, including the following modules connected in sequence:

[0038] The defect trend analysis module is responsible for transforming wafer defect information into identifiable structured information. It receives standardized defect data (such as KLARF format files, DefectMap bitmaps, or SEM images) from the wafer foundry. This data source is legal and compliant. Through the coordinate mapping unit, combined with wafer alignment information and design layout hierarchy, the module accurately maps the wafer coordinates of each defect to the corresponding integrated circuit layout coordinates (such as GDSII format). Subsequently, the clustering analysis unit uses spatial density clustering algorithms (such as DBSCAN or MeanShift) to perform high-density defect cluster analysis on the mapped defect point set, identifying "defect hotspot" regions that exhibit clustering on the layout. The module outputs a mask of hotspot regions with weighted information (such as defect density and cluster size) and a list of coordinate indices. For example, if the wafer foundry provides KLARF format defect files for a batch of wafers, the defect trend analysis module reads this file and, through its built-in coordinate transformation model (based on wafer layout and layout alignment information), maps all defect points to the corresponding chip layout (GDSII) coordinates. See Appendix. Figure 2 .

[0039] The graphic matching and PDK parameter association module is responsible for establishing a connection channel between defect distribution and specific design rules, automatically mining the graphic features that generate defects and their corresponding PDK parameters. It automatically extracts local layout geometry templates (such as metal intersections, dense grid lines, etc.) from defect hotspot areas as feature templates. Through graphic matching algorithms (such as feature point-based (SURF) matching, graphic hashing, or contour shape encoding), it establishes correspondences between these templates and pre-stored or derived PDK rule bases (such as the "Design Rule Check (DRC) rule base" and "Process Window Constraints"). After a successful match, the pattern matching and PDK parameter association module locates the specific PDK parameter most suspected of causing this type of defect, such as polysilicon gate line pitch, metal line spacing, minimum size of via covered by metal layer (MinViaEnc), and edge angle tolerance. It then establishes a parameter influence factor table and a frequency weight scoring model. The ΔPDK parameter candidate generator produces a "PDK parameter candidate list" highly correlated with the defect structure (e.g., frequency, density) for the next stage of optimization. For example, for "Metal1_Pitch", the current value is 40nm. The generator produces multiple ΔPDK variants in 2nm steps within the range [36nm, 44nm].

[0040] The optimal parameter combination acquisition module, for the PDK parameters in the candidate list, uses the current PDK parameter value as a benchmark. Within the safe range of process capability, it employs a systematic search strategy (such as isometric scanning, mesh search, or Bayesian optimization) to generate a series of parameter fine-tuning schemes. Each scheme constitutes a variant of the PDK, called "ΔPDK". Next, the simulation verification unit uses process simulation tools (such as LithoSim / SynopsysSentaurus Litho for optical lithography simulation, EtchSim for etching simulation) or optical proximity correction (OPC) simulation workflows to apply these ΔPDKs to the layout of standard cells or critical paths for virtual manufacturing. The simulation scoring selector quantitatively evaluates the effectiveness of each ΔPDK scheme in correcting target defects through simulation. Evaluation metrics include lithography yield, critical dimension uniformity (CD Uniformity), and defect density. Finally, all ΔPDK schemes are scored and ranked using a multi-objective scoring function (e.g., Score(ΔPDKᵢ) = α · Defect_Density + β · CD_err + γ · OPC_Cost, where Defect_Density represents defect density, CD_err represents critical size error, and OPC_Cost represents OPC complexity index). The PDK optimization suggestion outputs the optimal combination of one or more parameter adjustments.

[0041] Furthermore, the process design kit parameter optimization system in this embodiment can also include a continuous optimization and version management module to ensure the sustainability and traceability of the optimization process. This module primarily implements parameter version management, module integration methods, and rollback and replay mechanisms. Parameter version management is performed at the ΔPDK level (supporting Git / PVCS), automatically recording the "defect source - suggested parameters - verification feedback" path for easy tracking, comparison, and rollback. The module integration method provides standardized interfaces, supporting collaboration with the PDK manufacturer (XML / JSON import format). It can be embedded into the PDK SDK development process (e.g., based on the Synopsys iPDK environment), seamlessly integrating the finally verified and effective parameter suggestions into the PDK manufacturer's development environment or the design company's customized PDK process, completing a closed-loop feedback. The rollback and replay mechanism allows for reverting to the last optimal version if ΔPDK introduces new defects during mass production, supporting visualization of the mutation history trajectory.

[0042] Finally, the continuous optimization and version management module integrates the candidate ΔPDK parameters generated by the graph matching and PDK parameter association module, as well as the simulation and scoring results output by the optimal parameter combination acquisition module. Based on the integration results, a "Risk Monitoring and Parameter Optimization Recommendation Document," i.e., a risk monitoring change recommendation document, is generated as the final output of the system.

[0043] The risk monitoring change recommendation document is used to record the conclusions obtained from automated optimization in a structured and traceable form, providing decision-making references for the PDK team, process engineers, or design team. Specifically, the risk monitoring change recommendation document contains three parts of information:

[0044] 1. Parameter Optimization Recommendations: This section includes sensitive PDK parameters identified by the graphic matching and PDK parameter association module, and the optimal ΔPDK scheme selected by the optimal parameter combination acquisition module after simulation scoring. It records the sensitive PDK parameters identified by the system and the optimal ΔPDK scheme selected by the optimal parameter combination acquisition module after simulation scoring. This section summarizes the PDK parameter fine-tuning combinations that the system believes are most likely to improve defect distribution or manufacturing yield, and lists the corresponding suggested value ranges or recommended adjustment amounts.

[0045] 2. Risk Changes and Monitoring Items: Along with the output suggestions, the system automatically identifies potential risks related to these parameter adjustments, such as: whether the process window has narrowed; the likelihood of new defect types appearing; changes in lithography or etching stability; and an increasing trend in OPC complexity. This constitutes the "risk monitoring" section, used to alert the process or PDK development team to the cascading effects of parameter changes, achieving proactive risk monitoring.

[0046] 3. Version Tracking and History: Linked to the system's "Continuous Optimization and Version Management Module," this records the current ΔPDK version number, suggested generation time, source batch (defect data or simulation batch), and corresponding historical version differences. This is done to facilitate tracking the background of PDK adjustments and support subsequent version comparisons or rollbacks.

[0047] This embodiment also provides a method for dynamic optimization of PDK parameters based on defect distribution trends, including the following steps:

[0048] S1: Acquire wafer defect detection data, map its coordinates to the integrated circuit design layout, and perform spatial cluster analysis on the defect points to identify defect hotspot areas on the layout;

[0049] S2: Within the defect hotspot area, extract representative local layout graphic structures, and associate them with specific PDK design rules or process constraints through graphic matching technology, thereby determining the sensitive PDK parameters to be optimized;

[0050] S3: Based on the sensitive PDK parameters, generate multiple parameter fine-tuning schemes within its process feasible domain, perform process simulation for each scheme, predict its impact on defects and key process indicators, and select the optimal parameter adjustment scheme according to the preset multi-objective evaluation system.

[0051] S4: Record the optimal parameter adjustment scheme to the version management knowledge base and output it to the PDK development or update process. At the same time, use the new layout-simulation data generated by this optimization as feedback to iteratively optimize the graphics matching and evaluation model.

[0052] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A process design suite parameter optimization system guided by defect distribution trends, characterized in that, include: The defect trend analysis module is used to receive wafer defect data, perform coordinate mapping and cluster analysis, and generate defect hotspot regions and corresponding weight information. The graphic matching and PDK parameter association module is used to extract local geometric templates within the defect hotspot area and match them with a pre-set PDK rule base to establish a parameter influence factor table and a frequency weight scoring model, and determine candidate parameters of the process design kit associated with the defect. The optimal parameter combination acquisition module is used to generate multiple candidate parameter fine-tuning combinations based on the candidate parameters of the process design kit through isometric scanning, mesh search, or Bayesian optimization. These combinations are then scored using lithography simulation, etching simulation, or optical proximity correction simulation to select the optimal parameter combination. The scoring employs defect density, critical dimension uniformity, or optical proximity correction cost as evaluation metrics. The multi-objective scoring function used in the scoring satisfies Score(ΔPDK). i = α · Defect_Density + β · CD_err + γ · OPC_Cost, where Defect_Density represents the defect density, CD_err represents the critical dimension error, and OPC_Cost represents the optical proximity correction complexity index.

2. The system according to claim 1, characterized in that, The coordinate mapping is based on wafer alignment information to map defect coordinates to the design layout coordinate system.

3. The system according to claim 1, characterized in that, The graphic matching and PDK parameter association module uses graphic hashing, SURF features, or contour encoding methods to perform local geometric template matching.

4. The system according to claim 1, characterized in that, The system also includes a continuous optimization and version management module, which is used to record parameter adjustment history, support version rollback, and integrate into the process design kit development process.

5. The system according to claim 1, characterized in that, The clustering analysis uses the DBSCAN or MeanShift algorithm.

6. A method for optimizing process design suite parameters based on defect distribution trends, characterized in that, Includes the following steps: Acquire wafer defect data, perform coordinate mapping and cluster analysis, and identify defect hotspot regions and their corresponding weight information; Extract local geometric templates of the layout within the defect hotspot area and match them with a pre-set PDK rule base to establish a parameter influence factor table and a frequency weight scoring model to determine candidate parameters of the process design kit associated with the defect. Based on the candidate parameters of the aforementioned process design kit, multiple candidate parameter fine-tuning combinations are generated through isometric scanning, mesh search, or Bayesian optimization. These combinations are then evaluated using lithography simulation, etching simulation, or optical proximity correction simulation, and the optimal parameter combination is selected. The evaluation employs defect density, critical dimension uniformity, or optical proximity correction cost as evaluation metrics. The multi-objective evaluation function used satisfies Score(ΔPDK). i = α · Defect_Density +β · CD_err + γ · OPC_Cost, where Defect_Density represents the defect density, CD_err represents the critical dimension error, and OPC_Cost represents the optical proximity correction complexity index.

7. An electronic device, characterized in that, It includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method as described in claim 6.

8. A computer-readable storage medium, characterized in that, The system contains a computer program that, when executed by a processor, implements the method as described in claim 6.

Citation Information

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