A wide dynamic range high efficiency rectifier based on self-biased junction capacitor compensation technology

CN121727259BActive Publication Date: 2026-10-30HANGZHOU DIANZI UNIV +1
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Patent Information

Application Number
CN202511542026.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-10-27
Publication Date
2026-10-30
Estimated Expiration
2045-10-27

AI Technical Summary

Technical Problem

该方案存在的问题包括:1. 效率有损失:该整流器需要两个子整流器,这使得二极管开关损耗在低输入功率区域更加明显,引入了一定的插入损耗

Benefits of technology

[0018]1.拓宽输入功率动态范围:本发明通过在整流二极管并联自偏置结电容补偿电路,能够根据输出电压的变化自动调整补偿状态,实现对二极管结电容随输入功率变化的动态补偿,从而显著拓宽整流器的高效输入功率范围。实验结果表明,本发明整流器在输入功率从−2至22 dBm范围内,功率转换效率均保持在50%以上,其中效率高于70%的范围达到14 dB,远优于现有技术。

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Abstract

The application discloses a wide dynamic range high-efficiency rectifier based on a self-biased junction capacitor compensation technology; the rectifier comprises a rectifier main body and one or more junction capacitor compensation circuits; the junction capacitor compensation circuit comprises a compensation capacitor, a field effect tube and a voltage division network; the compensation capacitor and the field effect tube are connected in series and are connected in parallel to both ends of a rectifying diode in the rectifier main body. The voltage division network is connected between an output path of the rectifier main body and a ground wire. A gate of the field effect tube is connected to a voltage division output interface of the voltage division network. According to the application, the self-biased junction capacitor compensation circuit is connected in parallel to the rectifying diode, the compensation state can be automatically adjusted according to the change of the output voltage, the dynamic compensation of the diode junction capacitor with the change of the input power is realized, and therefore the high-efficiency input power range of the rectifier is significantly widened.
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Description

Technical Field

[0001] This invention belongs to the field of rectifier circuit technology, specifically relating to a wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology. Background Technology

[0002] With the rapid development of 5G communication and IoT devices, wireless power harvesting and wireless power transfer technologies have attracted widespread attention. Rectifiers, as core components in power harvesting / wireless power transfer systems, are responsible for converting radio frequency (RF) energy into DC output, and their research has received considerable attention from academia. However, in practical applications, the RF energy and load that a rectifier can harvest are usually not constant, but rather dynamically change with the operating environment. For example, the input power of rectifier antennas deployed on space-based systems or aircraft often fluctuates significantly. This fluctuation in input power and output load can lead to impedance mismatch problems due to the nonlinear characteristics of the rectifier. Therefore, as a key component of wireless power transfer systems, designing rectifiers with a wide output load range and wide dynamic adaptability to input power is crucial.

[0003] To solve the above technical problems, the following three solutions exist:

[0004] Option 1. A wide input power range rectifier based on hybrid resistance compression technology. For example... Figure 1 As shown, this rectifier performs RF-DC conversion based on a single-stage voltage multiplier structure and improves performance through hybrid resistor compression technology. Its core working principle involves using two parallel, identical rectifier branches and a special LC matching network design, so that the input impedances of the two branches exhibit opposite phase characteristics with frequency changes. When the load impedance changes, the impedance of one branch increases while the other decreases. This complementary change keeps the total input impedance of the rectifier system relatively stable, thus maintaining good impedance matching and high conversion efficiency over a wide load range. The problems with this scheme include: 1. Efficiency loss: This rectifier requires two sub-rectifiers, which makes diode switching losses more pronounced in the low input power region, introducing a certain amount of insertion loss. 2. Increased circuit complexity and cost: To implement this technology, the circuit requires two identical voltage multiplier rectifier sub-circuits and a carefully designed matching / compression network composed of multiple inductors and capacitors.

[0005] Option 2. A wide input power range rectifier based on a diode-MOSFET composite structure. For example... Figure 2As shown, this rectifier extends the dynamic operating range of traditional rectifiers by utilizing a depletion-mode MOSFET. This design introduces a depletion-mode MOSFET (threshold voltage -0.8V) into the traditional series diode rectification, forming a unique composite rectifier unit: under forward bias, the MOSFET exhibits a low-resistance state, and the combined unit maintains the low turn-on voltage (0.15V) characteristic of the diode, ensuring efficient conversion at low power; under reverse bias, the MOSFET turns off before the diode breaks down, bearing most of the reverse voltage, keeping the actual voltage across the diode always below its breakdown voltage (3.8V), thus significantly improving the system's withstand voltage and broadening the input power range. The problems with this solution include: 1. Efficiency still decreases at high input power, exhibiting a hard upper limit: Although the equivalent breakdown voltage of the diode is extended through the depletion-mode MOSFET, the overall withstand voltage of the rectifier is limited by the maximum gate-drain breakdown voltage of the MOSFET itself. When the input power exceeds approximately 15 dBm, efficiency begins to decrease because the MOSFET itself breaks down. This indicates that its high-power performance has an insurmountable hard upper limit. 2. Extremely low operating frequency, raising questions about the technology's versatility: This design was only validated at a low frequency of 50 MHz. At this low frequency, the parasitic parameters of the MOSFET (such as capacitance) have a relatively small impact. If this technology is applied to more common higher frequency bands (such as 900 MHz or 2.4 GHz), the parasitic effects of the MOSFET will become very significant.

[0006] Option 3. A wide dynamic range rectifier based on high and low power branch allocation and adaptive switching. For example... Figure 3As shown, the rectifier consists of two sub-rectifier branches with different power levels and a branch-line coupler. The input RF signal is first split into two paths by the branch-line coupler and sent to the high-power branch and the low-power branch respectively. The low-power branch uses a low-threshold, low-breakdown-voltage diode connected in series with a depletion-mode MOSFET. When the input power is low, the output voltage is small, the MOSFET remains on, and the low-power branch participates in rectification. When the input power increases to a certain value, the output voltage increases, causing the MOSFET to turn off, the low-power branch is cut off, and the high-threshold, high-breakdown-voltage diode used in the high-power branch begins to conduct and complete rectification, thus achieving automatic switching when the input power changes. The isolation port of the branch-line coupler is grounded, and the reflected power generated by the 3 dB power division and impedance mismatch is fed back to the rectifier branch for reuse through a reflection and re-injection mechanism to improve power conversion efficiency. The problems with this scheme include: 1. High structural complexity: This scheme uses two sub-rectifier branches with different power levels, a branch-line coupler, and an adaptive FET power switch, which makes the overall circuit structure significantly complex. The design and debugging process requires simultaneous optimization of multiple matching networks (T1–T4) and transmission line lengths (λ / 8, λ / 12, etc.), increasing design complexity and manufacturing costs. 2. Inherent power loss exists: Due to the characteristics of the 3 dB branch-line coupler, the input signal inevitably shares power equally between the two output ports, resulting in an initial power loss of approximately 3 dB for each branch. Although the paper compensates for this loss through a reflection-reinjection mechanism, it cannot be completely eliminated. The insertion loss of the coupler and matching network also reduces system efficiency at high frequencies and low power ranges. Summary of the Invention

[0007] The purpose of this invention is to provide a wide dynamic range high-efficiency rectifier and a rectifier diode junction capacitance compensation method based on self-biased junction capacitance compensation technology.

[0008] In a first aspect, the present invention provides a wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology, comprising a rectifier body and one or more junction capacitance compensation circuits; the junction capacitance compensation circuit includes a compensation capacitor, a field-effect transistor (FET), and a voltage divider network; the compensation capacitor and the FET, connected in series, are connected in parallel across the two ends of a rectifier diode in the rectifier body. The voltage divider network is connected between the output path (preferably the output terminal) of the rectifier body and ground. The gate of the FET is connected to the voltage divider output interface of the voltage divider network.

[0009] Preferably, the capacitance value of the compensation capacitor is the difference between the junction capacitance change of the diode under high input power and low input power and the parasitic capacitance of the field-effect transistor under high input power. The values ​​of high input power and low input power are set according to the input power range of the wide dynamic range high-efficiency rectifier.

[0010] Preferably, the low input power is taken at a point close to the lower limit of the input power range of the wide dynamic range high-efficiency rectifier; the high input power is taken at a point close to the upper limit of the input power range of the wide dynamic range high-efficiency rectifier.

[0011] Preferably, one end of the compensation capacitor is connected to the end of the rectifier diode that is away from the ground wire; the other end of the compensation capacitor is connected to the drain of the field-effect transistor; and the source of the field-effect transistor is grounded.

[0012] Preferably, there are multiple junction capacitance compensation circuits, and the voltage division ratio of the voltage divider network in some or all of the junction capacitance compensation circuits is different.

[0013] Preferably, the resistor voltage divider network includes a first resistor and a second resistor connected in series between the output terminal of the rectifier body and the ground wire; the connection point of the first resistor and the second resistor is the voltage divider output interface of the resistor voltage divider network.

[0014] Preferably, the total impedance of the voltage divider network is greater than or equal to 1000 times the load impedance. Preferably, the rectifier body includes a DC blocking capacitor, a compensation inductor, and a rectifier diode connected sequentially between the input signal and ground. The DC filter and the load are connected sequentially between the DC blocking capacitor and ground.

[0015] Secondly, the present invention provides a method for compensating the junction capacitance of a rectifier diode, characterized in that: a wide dynamic range high-efficiency rectifier is used; the voltage divider signal output from the voltage divider network in the junction capacitance compensation circuit is input to the gate of the field-effect transistor; as the power of the input signal to the rectifier increases, the voltage divider signal output from the voltage divider network increases. When the voltage divider signal output from the voltage divider network is less than the on-state voltage of the field-effect transistor, the field-effect transistor is turned off, and the compensation capacitor is disconnected from the rectifier diode; when the voltage divider signal output from the voltage divider network is greater than or equal to the on-state voltage of the field-effect transistor, the field-effect transistor is turned on, and the compensation capacitor is connected in parallel with the rectifier diode; the compensation capacitor compensates for the decrease in junction capacitance of the rectifier diode as the input signal power increases, thereby keeping the impedance of the rectifier diode stable.

[0016] Thirdly, this invention provides a wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology, comprising a rectifier body; characterized in that it further comprises one or more junction capacitance compensation circuits; the junction capacitance compensation circuit includes an adjustable capacitor, a parameter detection module, and a controller. The parameter detection module is used to detect the output power of the rectifier. The adjustable capacitor is connected in parallel across the rectifier diodes in the rectifier body. The capacitance value of the adjustable capacitor is dynamically adjusted according to the output power of the rectifier.

[0017] The present invention has the following beneficial effects:

[0018] 1. Expanding the Dynamic Range of Input Power: This invention, by connecting a self-biased junction capacitance compensation circuit in parallel with the rectifier diodes, can automatically adjust the compensation state according to changes in output voltage, achieving dynamic compensation for changes in diode junction capacitance with input power, thereby significantly expanding the efficient input power range of the rectifier. Experimental results show that the rectifier of this invention maintains a power conversion efficiency of over 50% in the input power range from −2 to 22 dBm, with an efficiency exceeding 70% reaching 14 dB, far superior to existing technologies.

[0019] 2. Improved rectification efficiency and reduced power loss: This invention provides a dynamic junction capacitance compensation mechanism that effectively reduces impedance mismatch caused by power fluctuations, making the rectification process more stable and achieving a peak efficiency of up to 85% (@21 dBm), which is about 10% higher than that of traditional fixed-matching rectifiers. Meanwhile, the junction capacitance compensation circuit has extremely low power consumption, accounting for less than 0.2% of the output power, and its impact on the overall system efficiency is negligible.

[0020] 3. Improved Impedance Stability and Matching Performance: This invention can automatically adjust the equivalent impedance of the diode, enabling the rectifier to maintain good input matching over a wide power range. Test results show that within the input power range of −2 to 24 dBm, the reflection coefficient |S11| remains below −10 dB, significantly improving impedance matching characteristics.

[0021] 4. No external control circuit required, simple and reliable structure: The junction capacitance compensation circuit of this invention adopts a self-biased design, which directly uses the rectified output voltage to achieve automatic start and stop, without the need for additional logic control circuit or external bias power supply. The system structure is simple, with low power consumption and high reliability.

[0022] 5. Superior overall performance: The rectifier of this invention, operating at a frequency of 915 MHz, combines the advantages of high efficiency, wide input power range, low power consumption, wide load range, and simple structure. Its overall performance is significantly better than that of existing technologies, and it has high application value and promising prospects for promotion.

[0023] 6. Low power consumption of the compensation circuit: The junction capacitance compensation circuit in this invention is completely controlled by the rectified output voltage, without the need to introduce additional power loss; and the resistance value of the voltage divider resistor is much higher than that of the load resistor (about 2000 times), the current of the resistor voltage divider branch is extremely small and the energy extraction of the system is minimal, so that its static power consumption is less than 0.2% of the output power, and the impact on the overall system efficiency is negligible. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of a wide input power range rectifier based on hybrid resistance compression technology.

[0025] Figure 2This is a schematic diagram of a wide input power range rectifier based on a diode-MOSFET composite structure.

[0026] Figure 3 This is a schematic diagram of a wide dynamic range rectifier based on high and low power branch allocation and adaptive switching.

[0027] Figure 4 The schematic diagram of the rectifier provided in Embodiment 1 of the present invention.

[0028] Figure 5 This is the equivalent circuit diagram of the rectifier diode in Embodiment 1 of the present invention.

[0029] Figure 6 The flowchart shows the operation of the wide dynamic range high-efficiency rectifier provided in Embodiment 1 of the present invention.

[0030] Figure 7 This is a schematic diagram showing the relationship between the equivalent capacitance Ce and equivalent resistance Re of the diode as a function of input power in Embodiment 1 of the present invention.

[0031] Figure 8 The diagram shows the result of calculating the diode impedance using the equivalent capacitance Ce and equivalent resistance Re of the base diode in Embodiment 1 of the present invention.

[0032] Figure 9 The simulation results are shown in Embodiment 1 of the present invention, which illustrate the relationship between the compensation capacitor value, the energy loss of the junction capacitance compensation circuit, and the input power in the rectifier.

[0033] Figure 10 This is a comparison diagram of the impedance matching effect of Embodiment 1 and Comparative Example 1 of the present invention over a wide input power range.

[0034] Figure 11 This is a simulation comparison chart of the |S11| parameter and power conversion efficiency between Embodiment 1 and Comparative Example 1 of the present invention. Detailed Implementation

[0035] The present invention will be further described below with reference to the accompanying drawings.

[0036] Example 1

[0037] like Figure 4 As shown, a wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology includes a rectifier body and a junction capacitance compensation circuit. The rectifier body includes a DC blocking capacitor Cblock, a compensation inductor LM, a rectifier diode D1, and a DC filter. The junction capacitance compensation circuit includes a compensation capacitor Cc, a field-effect transistor Q1, and a resistor divider network. The junction capacitance compensation circuit is connected in parallel with the rectifier diode D1. The DC filter includes an inductor L1 and a capacitor C1.

[0038] The specific connection structure of the wide dynamic range high-efficiency rectifier provided in this embodiment is as follows: the antenna output interface is connected to one end of the compensation inductor LM and inductor L1 via a DC blocking capacitor Cblock. The other end of the compensation inductor LM is connected to the cathode of the rectifier diode D1 and one end of the compensation capacitor Cc. The other end of the compensation capacitor Cc is connected to the drain of the field-effect transistor Q1; the anode of the rectifier diode D1 and the source of the field-effect transistor Q1 are both grounded; the voltage divider output interface of the resistor voltage divider network is connected to the gate of the field-effect transistor Q1; the resistor voltage divider network includes a first resistor R1 and a second resistor R2 connected in series between the output terminal of the DC filter and the ground line; the connection point of the second resistor R2 and the first resistor R1 is the voltage divider output interface of the resistor voltage divider network.

[0039] In this embodiment, the total resistance of the resistor divider network is 2000 times the load resistance, which makes the current of the resistor divider network extremely small and the energy extraction of the system extremely small, so that its static power consumption is less than 0.2% of the output power and its impact on the overall system efficiency is negligible; thus, the junction capacitance compensation circuit in this embodiment is completely controlled by the rectified output voltage and almost no additional power loss is required.

[0040] The equivalent circuit of the rectifier diode D1 is as follows: Figure 5 As shown. Wherein, the compensation inductance L M Used to compensate for the capacitive impedance of the rectifier diode. V0 is the DC voltage output by the rectifier, which biases the junction capacitance C of the diode. j Junction capacitance C j The expression is:

[0041]

[0042] Where C0 is the zero-bias junction capacitance; V bi V0 is the built-in potential; M is the gradient coefficient. In an RF rectifier, V0 equals... , where η rec This refers to the RF-to-DC conversion efficiency. Therefore, based on the formula for junction capacitance mentioned above, when the input power P... in When it increases, the junction capacitance C j It will decrease. For ease of derivation, Figure 5 The diode impedance Z in the detailed equivalent circuit on the left d Equivalent to Figure 5 Impedance of the simplified equivalent circuit on the right And satisfy:

[0043]

[0044] make The following equation is obtained:

[0045]

[0046] in, It is the positive bias conduction angle, and it is a value that depends on V. o and R L The variable is expressed as:

[0047]

[0048] From the above expression, we can deduce that when the input power (corresponding to the DC voltage V0 output by the rectifier) ​​increases, the voltage V... O and positive bias conduction angle It will also grow larger, which in turn leads to C e and R e The decrease.

[0049] according to Figure 5 The equivalent circuit on the right yields the expression for the diode's input impedance:

[0050]

[0051] in, Let C be the angular frequency. From the above equation, it can be seen that when C... e When it increases, The real part of the diode decreases monotonically; and when the diode's equivalent capacitance C... e > 1 / (R e · When ), the denominator of the third term in the above formula will change along with C. e The increase is due to the increase in the value of , which in turn leads to The imaginary part decreases.

[0052] In low power mode, the sampling voltage obtained after the output voltage of the rectifier body passes through the resistor voltage divider network is less than the turn-on voltage of the field-effect transistor Q1. The field-effect transistor Q1 is in the off state. At this time, the compensation capacitor Cc is disconnected from the rectifier diode D1, and the junction capacitance of the rectifier diode D1 does not need to be compensated.

[0053] Under high power conditions, the sampling voltage obtained after the output voltage of the rectifier body passes through the resistor voltage divider network is greater than the turn-on voltage of the field-effect transistor Q1. At this time, the field-effect transistor Q1 is in the conducting state. The compensation capacitor Cc is connected in parallel with the rectifier diode D1. The reduced junction capacitance of the rectifier diode D1 is compensated, and the rectifier works normally.

[0054] In some embodiments, the low input power is taken as one-quarter of the input power range of the wide dynamic range high-efficiency rectifier, close to the lower limit; the high input power is taken as one-quarter of the input power range of the wide dynamic range high-efficiency rectifier, close to the upper limit.

[0055] The workflow of the wide dynamic range high-efficiency rectifier provided in this embodiment is as follows:

[0056] like Figure 6 As shown, the operation of the wide dynamic range high-efficiency rectifier is an intelligent adaptive cycle: when the input power is low, its output DC voltage is insufficient to turn on the compensation branch, and the system operates efficiently in the classic single-tube mode; once the input power increases and the output voltage exceeds the threshold, the compensation branch is automatically turned on, and the junction capacitance of the diode decreases due to the increase in power through the parallel capacitor in real time, thereby maintaining impedance matching stability.

[0057] The wide dynamic range high-efficiency rectifier provided in this embodiment is designed and simulated using ADS2020 simulation software. The simulation conditions are: 800Ω load, operating frequency 915MHz. The following components and corresponding parameters are used in this embodiment: DC blocking capacitor C. block =22 pF, compensation inductance L M =33 nH, rectifier diode D1 is selected as HSMS282, compensation capacitor C c =0.25 pF, sampling resistors R1=5.1 MΩ, R2=1 MΩ, and MOSFET Q1 is selected as ATF54143.

[0058] Simulation results for diode impedance are as follows: Figure 7 As shown, when the input power is -10 dBm, the diode's equivalent capacitance C e The initial value (red curve) is approximately 0.67 pF, then decreases monotonically with increasing RF input power, eventually dropping to 0.23 pF at 20 dBm. The diode equivalent resistance R... e It then continuously decreases as the input power increases. Diode junction capacitance C e The difference between low and high input power is 0.44pF. Considering the parasitic capacitance of the MOSFET at high frequencies is 0.15-0.2pF (taking 0.2pF), the required capacitor C for the compensation circuit can be calculated. c =0.25 pF.

[0059] like Figure 8 As shown, the real part of the diode impedance varies with C. e Increases and decreases, and C e The influence weight is greater than R e .

[0060] The simulation results of the entire wide dynamic range high-efficiency rectifier are as follows: Figure 9As shown, the junction capacitance compensation circuit turns on when the input power reaches approximately 8 dBm, effectively compensating for the change in the diode's own junction capacitance. More importantly, simulation results show that the DC power consumption of the junction capacitance compensation circuit is less than 0.2% of the output DC power, which is negligible.

[0061] This embodiment provides solutions to the following three existing problems:

[0062] 1. Narrow input power range.

[0063] In existing technologies, rectifiers have either a low upper limit or a high lower limit for input power. Excessive input power can cause MOSFET breakdown, thus reducing conversion efficiency, while insufficient input power may introduce diode switching losses, leading to insertion losses.

[0064] To address this issue, the solution in this embodiment is as follows: This embodiment abandons the complex approach of "increasing the withstand voltage of the device" or "switching the circuit structure" and instead adopts a more fundamental method: connecting a self-biased junction capacitance compensation branch in parallel across the diode to achieve adaptive dynamic adjustment of the junction capacitance, thereby improving the input power range.

[0065] 2. Lower frequency adaptability

[0066] Many existing rectifier designs, intended to extend the input power or load range, have only been proven effective at lower RF frequencies. When these designs are attempted to be applied directly to higher frequency bands, their performance degrades significantly or even fails completely.

[0067] To address this issue, the solution in this embodiment is as follows: This embodiment directly designs and simulates the circuit at a higher, commonly used frequency band of 915 MHz. The junction capacitance compensation circuit itself is connected in parallel, and its FET operates in a switching state. During the design process, the required compensation capacitor C is designed based on the parasitic parameters of the field-effect transistor. c .

[0068] 3. Structural complexity

[0069] In order to improve one or more performance indicators of a rectifier (such as input power range, load range, etc.), existing technologies have introduced additional circuit branches, active switches, control logic, or passive components, resulting in trade-offs in terms of component quantity, physical size, design difficulty, manufacturing cost, and system reliability.

[0070] To address this issue, the solution in this embodiment is as follows: This embodiment employs a core architecture with a single rectifier diode. The junction capacitance compensation circuit exists only as a simple parallel compensation branch (consisting of a FET and a small capacitor in series), rather than a complete sub-rectifier. This branch is completely shut off at low power, introducing no losses.

[0071] Comparative Example 1

[0072] A rectifier comprising only the rectifier body and excluding junction capacitance compensation circuitry.

[0073] A comparative simulation was performed on Example 1 and Comparative Example 1, and the results are as follows: Figure 10 As shown. From Figure 10 As can be seen from the data, the wide dynamic range high-efficiency rectifier provided in Example 1 has a consistently low input impedance within the range of -1dBm to 20dBm. in Maintaining a VSWR within 2 indicates good matching; however, the rectifier in Comparative Example 1 only exhibits good input impedance matching within the range of -5 to 6 dBm. It is evident that the junction capacitance compensation circuit in Example 1 significantly widens the input power range.

[0074] like Figure 11 As shown in section (a), the wide dynamic range high-efficiency rectifier provided in Example 1 maintains good impedance matching over a wide input power range. Its |S11| parameter remains well below -10 dB in the range of -2 to 24 dBm, indicating higher stability and efficiency compared to a reference design with fixed compensation. For example, the proposed self-biased junction capacitance compensation technique extends the well-matched input power range by 10 dB compared to a fixed compensation of 0.3 pF (green dashed line).

[0075] like Figure 11 As shown in section (b), the wide dynamic range high-efficiency rectifier provided in Example 1 exhibits at least a 10% efficiency improvement compared to a design using fixed compensation, an advantage that is particularly significant in both low and high input power ranges. Simulation data shows that the power conversion efficiency remains above 50% throughout the input power range of -2 to 22 dBm, reaching a peak efficiency of 85% at 21 dBm. A local efficiency drop can be observed near 8 dBm, which is due to the MOSFET operating in the ohmic region at this point.

[0076] from Figure 11 As can be seen, compared with the design using fixed compensation, the input power range is significantly improved while ensuring power conversion efficiency.

[0077] Example 2

[0078] A wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology is disclosed. The difference between this embodiment and Embodiment 1 is that the structure of the junction capacitance compensation circuit is different.

[0079] In this embodiment, the junction capacitance compensation circuit includes an adjustable capacitor, a parameter detection module, and a controller. The parameter detection module is used to detect one or more of the rectifier's output power, S11 parameter, and temperature. The adjustable capacitor is connected in parallel across the rectifier diode D1. The detection result of the parameter detection module is transmitted to the controller. The controller dynamically adjusts the capacitance value of the adjustable capacitor to compensate for changes in the junction capacitance of the rectifier diode D1.

[0080] Example 3

[0081] A wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology is disclosed. The difference between this embodiment and Embodiment 1 is that the structure of the junction capacitance compensation circuit is different.

[0082] In this embodiment, the junction capacitance compensation circuit does not use a resistor divider network; instead, a parameter detection module and a controller are used. The detection results of the parameter detection module are transmitted to the controller. The controller dynamically controls the on / off state of the field-effect transistor Q1. The controller uses a small, low-power MCU or ASIC chip.

[0083] Example 4

[0084] A wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology is disclosed. The difference between this embodiment and Embodiment 1 is that multiple junction capacitance compensation circuits are set up. The voltage division ratio of the resistor voltage divider network in each junction capacitance compensation circuit is different. As the input power changes, the field-effect transistors Q1 in different numbers of resistor voltage divider networks are turned on, achieving multi-level fine compensation of the junction capacitance of the rectifier diode D1.

Claims

1. A wide dynamic range high-efficiency rectifier based on self-biased junction capacitance compensation technology, comprising a rectifier body; characterized in that: It also includes one or more junction capacitance compensation circuits; the junction capacitance compensation circuit includes a compensation capacitor, a field-effect transistor, and a voltage divider network; the compensation capacitor and the field-effect transistor connected in series are connected in parallel across the two ends of the rectifier diode in the rectifier body; the voltage divider network is connected between the output path of the rectifier body and the ground line; the gate of the field-effect transistor is connected to the voltage divider output interface of the voltage divider network; One end of the compensation capacitor is connected to the end of the rectifier diode that is away from the ground wire; the other end of the compensation capacitor is connected to the drain of the field-effect transistor; the source of the field-effect transistor is grounded. The capacitance value of the compensation capacitor is taken as the difference between the junction capacitance change of the diode under high input power and low input power and the parasitic capacitance of the field-effect transistor under high input power; the values ​​of high input power and low input power are set according to the input power range of the wide dynamic range high efficiency rectifier. As the power of the rectifier input signal increases, the voltage divider signal output by the voltage divider network increases. When the voltage divider signal output by the voltage divider network is less than the turn-on voltage of the field-effect transistor (FET), the FET is turned off, and the compensation capacitor is disconnected from the rectifier diode. When the voltage divider signal output by the voltage divider network is greater than or equal to the turn-on voltage of the FET, the FET is turned on, and the compensation capacitor is connected in parallel with the rectifier diode. The compensation capacitor compensates for the decrease in junction capacitance of the rectifier diode as the input signal power increases.

2. The wide dynamic range high-efficiency rectifier according to claim 1, characterized in that: The low input power is taken at 1 / 4 of the input power range of the wide dynamic range high-efficiency rectifier, which is close to the lower limit; the high input power is taken at 1 / 4 of the input power range of the wide dynamic range high-efficiency rectifier, which is close to the upper limit.

3. The wide dynamic range high-efficiency rectifier according to claim 1, characterized in that: There are multiple junction capacitance compensation circuits, and the voltage division ratio of the voltage divider network in some or all of the junction capacitance compensation circuits is different.

4. The wide dynamic range high-efficiency rectifier according to claim 1, characterized in that: The voltage divider network includes a first resistor and a second resistor connected in series between the output terminal of the rectifier body and the ground wire; the connection point of the first resistor and the second resistor is the voltage divider output interface of the voltage divider network.

5. The wide dynamic range high-efficiency rectifier according to claim 4, characterized in that: The total impedance of the voltage divider network is greater than or equal to 1000 times the load impedance.

6. The wide dynamic range high-efficiency rectifier according to claim 1, characterized in that: The main body of the rectifier includes a DC blocking capacitor, a compensation inductor, and a rectifier diode connected sequentially between the input signal and the ground wire; a DC filter and a load are connected sequentially between the DC blocking capacitor and the ground wire.

7. A method for compensating the junction capacitance of a rectifier diode, characterized in that: The wide dynamic range high-efficiency rectifier as described in claim 1 is used; the voltage divider signal output from the voltage divider network in the junction capacitance compensation circuit is input to the gate of the field-effect transistor; as the power of the input signal to the rectifier increases, the voltage divider signal output from the voltage divider network increases; when the voltage divider signal output from the voltage divider network is less than the turn-on voltage of the field-effect transistor, the field-effect transistor is turned off, and the compensation capacitor is disconnected from the rectifier diode; when the voltage divider signal output from the voltage divider network is greater than or equal to the turn-on voltage of the field-effect transistor, the field-effect transistor is turned on, and the compensation capacitor is connected in parallel with the rectifier diode; the compensation capacitor provides compensation for the junction capacitance of the rectifier diode, which decreases as the input signal power increases.

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