A self-learning-based chip data self-testing method and system

CN121743112BActive Publication Date: 2026-09-18SHENZHEN YUNXINCHENG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202511975959.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-25
Publication Date
2026-09-18
Estimated Expiration
2045-12-25

AI Technical Summary

Technical Problem

芯片数据,例如指令数据、运行数据、状态数据等等时刻受到芯片运行环境数据的影响,芯片运行环境数据例如电压、温度、负载等等;对于芯片数据的变化监控通常情况下只利用传感器采集的数据对芯片数据进行监控,但传感器数据(电压、温度纹波)本身包含噪声;区分哪些是预示故障的异常前兆,哪些是允许的正常工作波动,需要非常精确的先验知识和海量的边界数据,进而导致无法精准判断芯片数据的异常性;因此,为了精准监测芯片数据的异常性,提供了基于自学习的芯片数据自检方法及系统

Benefits of technology

[0012] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention obtains the central chip state operation group by setting up an associated chip state chain; sets up an abnormal data interval chain of the associated chip state chain based on the central chip state operation group; collects chip operating environment data, and updates the abnormal data interval chain in real time according to the chip operating environment data to obtain the latest abnormal data interval chain; then performs data detection on the associated chip state chain according to the latest abnormal data interval chain to obtain abnormal operating state data; processes the abnormal operating state data; and effectively improves the ability to judge chip data anomalies.

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Abstract

This invention discloses a chip data self-testing method and system based on self-learning, relating to the field of chip data self-testing technology; it effectively improves the ability to judge chip data anomalies; the invention obtains a central chip status operation group by setting up an associated chip status chain; sets an abnormal data interval chain of the associated chip status chain based on the central chip status operation group; collects chip operating environment data, updates the abnormal data interval chain in real time according to the chip operating environment data to obtain the latest abnormal data interval chain; then performs data detection on the associated chip status chain according to the latest abnormal data interval chain to obtain abnormal operating status data; and processes the abnormal operating status data.
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Description

Technical Field

[0001] This invention relates to the field of chip data self-testing technology, specifically to a chip data self-testing method and system based on self-learning. Background Technology

[0002] Self-learning dynamically improves system performance by continuously acquiring environmental data. Its core lies in building a closed-loop mechanism of information acquisition, strategy optimization, and iterative upgrades. In intelligent manufacturing systems, this function enables equipment to autonomously enrich its knowledge base and perform decision analysis based on environmental information. Neural network technology achieves self-learning capabilities through microprocessors, forming the technological advantages of nonlinear mapping and associative memory. Self-learning systems possess autonomous information acquisition capabilities, collecting environmental data in real time through sensor networks; a dynamic strategy optimization mechanism that adjusts operating parameters based on feedback information; and continuous performance iteration characteristics, enabling the system to continuously improve decision-making accuracy during operation. Chip data, such as instruction data, operational data, and status data, is constantly affected by the chip's operating environment data, such as voltage, temperature, and load. Monitoring changes in chip data typically relies on sensor-collected data, but sensor data (voltage, temperature ripple) itself contains noise. Distinguishing between abnormal precursors indicating potential faults and permissible normal fluctuations requires highly precise prior knowledge and massive amounts of boundary data, leading to inaccurate assessments of chip data anomalies. Therefore, to accurately monitor chip data anomalies, a self-learning-based chip data self-checking method and system are provided. Summary of the Invention

[0003] The purpose of this invention is to provide a chip data self-testing method and system based on self-learning, so as to solve the problems in the background art.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a chip data self-testing method based on self-learning, the method comprising the following steps: Step S1: Set up the associated chip state chain and obtain the central chip state operation group; set up the abnormal data range chain of the associated chip state chain based on the central chip state operation group; Step S2: Collect chip operating environment data, and update the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain; Step S3: Based on the latest abnormal data interval chain, perform data detection on the associated chip state chain to obtain abnormal operating state data; Step S4: Process the abnormal operating status data.

[0005] Furthermore, the process of setting up the associated chip state chain includes: The chip's operating module is acquired, and its operation monitoring unit is set according to the monitoring points of the chip's operating module. Corresponding acquisition data is then set in the operation monitoring unit to collect the monitoring point operation data. The chip's operating module represents different functional modules within the chip, including at least the CPU core, cache, and peripheral interfaces. The monitoring points corresponding to the CPU core represent monitorable nodes of different functional modules within the chip, including at least the ALU, register file, and pipeline. The acquisition data is used to set specific acquisition time, acquisition frequency, and acquisition device according to the monitoring points. Set up chip operating status groups, and set the runtime and data acquisition cycle for each chip operating status group. Collect the operating data of each chip operating status group at each monitoring point during the runtime according to the data acquisition cycle, and integrate them to generate the operating status dataset of the chip operating status group. Set the instruction execution accuracy threshold for the chip operating status group, and obtain the instruction execution results of the chip operating status group based on the instruction execution accuracy threshold. The instruction execution results include instruction execution success and instruction execution error. Then, obtain the clock cycle deviation of each operating monitoring unit in the chip operating status group. The associated chip state chain is generated by associating the running state dataset, instruction execution result, and clock cycle deviation corresponding to the chip running state group, denoted as Chip Running State Group - Running State Data Set - Instruction Execution Result - Clock Cycle Deviation.

[0006] Furthermore, the process of obtaining the central chip status operation group includes: Set the weights of the instruction execution results and clock cycle deviations corresponding to the chip running status groups, and obtain the state weight values ​​of each chip running status group within the running acquisition cycle by performing a weighted algorithm based on the weights; set the range of state weight values ​​for the central chip running status group, and compare it with the corresponding state weight values ​​to obtain the chip running status groups within the state weight range, which are recorded as the range chip running status groups, and determine the number of range chip running status groups. If they are a group, the corresponding range chip operating status group will be marked as the central chip operating group; Conversely, the range chip operating state groups are arranged and numbered according to the state weight values ​​from largest to smallest, and are denoted as the central chip operating group n, where n represents the number of the range chip operating state group, and n = 1, 2, ... m, where m is a positive integer.

[0007] Furthermore, the process of setting up the abnormal data interval chain of the associated chip state chain based on the central chip state operation group includes: If it is a group of central chip operating status groups, the operation monitoring unit of the central chip operating status group is obtained, and then the abnormal operating status data range of the corresponding monitoring point of the operation monitoring unit is set according to the central chip operating status group and stored in the operation monitoring unit. If there are multiple central chip operating status groups, the same operating monitoring unit of each central chip operating status group is obtained simultaneously, and the abnormal operating status data range of the corresponding monitoring point of each operating monitoring unit of the central chip operating status group is set according to the central chip operating status group; then the average value of the abnormal operating status data range corresponding to the same monitoring point is obtained and recorded as the abnormal operating status data range corresponding to the monitoring point and stored in the operating monitoring unit. The abnormal operating status data range is generated by associating the operating status datasets of the monitoring points with the associated chip status chain.

[0008] Furthermore, the process of collecting chip operating environment data and updating the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain includes: According to the operation acquisition cycle, the chip operation environment data of each monitoring point of each chip operation status group corresponding to each associated chip status chain is collected and stored in the operation monitoring unit; Based on the influence weight of chip operating environment data on monitoring points obtained through autonomous learning, the range of abnormal operating state data of each abnormal operating state in the abnormal data interval chain of the operating monitoring unit is updated by the influence weight to obtain the latest abnormal operating state data range and stored in the operating monitoring unit, thereby updating the abnormal data interval chain to the latest abnormal data interval chain.

[0009] Furthermore, the process of obtaining abnormal operating state data by detecting data in the state chain of the associated chip based on the latest abnormal data interval chain includes: The execution result of the instruction to obtain the state chain of the associated chip: If the error is due to an instruction execution error, then obtain the various operational status data from the operational status dataset, schedule the latest abnormal operational status data range corresponding to the latest abnormal data interval chain of the monitoring point, and compare it with the operational status data: If there is a newer range of abnormal operating status data in the operating status data, then the corresponding operating status data will be marked as abnormal operating status data. Conversely, no action is taken; If the instruction is executed correctly, the clock cycle deviation of each operation monitoring unit is checked to determine whether the clock cycle deviation is abnormal. If an anomaly is detected, the corresponding operating status data of the operating monitoring unit is obtained and compared with the corresponding latest abnormal operating status data range. If a latest abnormal operating status data range exists, the corresponding operating monitoring unit is marked as abnormal operating status data; otherwise, it is marked as abnormal clock cycle deviation.

[0010] Furthermore, the process of processing abnormal operating status data includes: The system acquires monitoring points that provide data on abnormal operating states and processes this data based on these monitoring points.

[0011] Furthermore, it includes the following modules: Data setting module: used to set the associated chip status chain, obtain the central chip status operation group; and set the abnormal data interval chain of the associated chip status chain based on the central chip status operation group. Data update module: Collects chip operating environment data and updates the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain; Data detection module: Detects abnormal operating status data by performing data detection on the state chain of associated chips based on the latest abnormal data interval chain; Data processing module: processes data on abnormal operating states.

[0012] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention obtains the central chip state operation group by setting up an associated chip state chain; sets up an abnormal data interval chain of the associated chip state chain based on the central chip state operation group; collects chip operating environment data, and updates the abnormal data interval chain in real time according to the chip operating environment data to obtain the latest abnormal data interval chain; then performs data detection on the associated chip state chain according to the latest abnormal data interval chain to obtain abnormal operating state data; processes the abnormal operating state data; and effectively improves the ability to judge chip data anomalies. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this invention. For those skilled in the art, other drawings can be obtained based on these drawings.

[0014] Figure 1 This is a flowchart of the present invention.

[0015] Figure 2 This is a schematic diagram of the present invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0017] Please see Figure 1 As shown, a chip data self-testing method based on self-learning includes the following steps: Step S1: Set up the associated chip state chain and obtain the central chip state operation group; set up the abnormal data range chain of the associated chip state chain based on the central chip state operation group; Step S2: Collect chip operating environment data, and update the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain; Step S3: Based on the latest abnormal data interval chain, perform data detection on the associated chip state chain to obtain abnormal operating state data; Step S4: Process the abnormal operating status data.

[0018] Step S1 needs further clarification. The process of setting the associated chip state chain includes: The chip operation module is obtained, and the operation monitoring unit of the chip operation module is set according to the monitoring points of the chip operation module. Then, the corresponding acquisition data is set in the operation monitoring unit to collect the monitoring point operation data of the monitoring points through the acquisition data. Set up chip operating status groups, and set the runtime and data acquisition cycle for each chip operating status group. Collect the operating data of each chip operating status group at each monitoring point during the runtime according to the data acquisition cycle, and integrate them to generate the operating status dataset of the chip operating status group. Set the instruction execution accuracy threshold for the chip operating status group, and obtain the instruction execution results of the chip operating status group based on the instruction execution accuracy threshold. The instruction execution results include instruction execution success and instruction execution error. Then, obtain the clock cycle deviation of each operating monitoring unit in the chip operating status group. The associated chip state chain is generated by associating the running state dataset, instruction execution result and clock cycle deviation corresponding to the chip running state group, denoted as chip running state group-run state dataset-instruction execution result-clock cycle deviation. In the above embodiments, it should be further explained that the chip operation module is used to represent different functional modules inside the chip, such as CPU core, cache, peripheral interface, etc.; the monitoring point is used to represent the nodes that can be monitored by different functional modules inside the chip. For example, the monitoring points corresponding to the CPU core include, but are not limited to, ALU, register file, pipeline, etc.; the data acquisition is used to set the acquisition time, acquisition frequency, acquisition device, etc. according to the monitoring points; and the acquisition of monitoring point operation data through the data acquisition includes one or more monitoring point operation data. For example, the monitoring point operation data corresponding to the ALU includes, but is not limited to, ALU operation result verification point, register file data holding point, instruction decoder output verification point, etc. Furthermore, the chip operating state groups can be divided according to operating time, such as startup state group, short-term stable state group, long-term stable state group, shutdown state group, characteristic time state group, etc.; they can also be divided according to load level, such as ultra-low load state group, low load state group, medium load state group, high load state group, etc.; and they can also be divided according to other limiting conditions. The instruction execution accuracy threshold is used to represent the maximum instruction execution accuracy threshold set according to different states, and the instruction execution result is generated based on the instruction execution accuracy threshold. Therefore, by collecting the operating state datasets of different chip operating state groups through the operation monitoring units of each chip operating module and obtaining the instruction execution accuracy within the operating time period, and comparing it with the instruction execution accuracy threshold to obtain the instruction execution result and construct the associated chip state chain, the comprehensiveness of chip operating data collection is effectively improved.

[0019] The process of obtaining the status of the central chip operation group includes: Set the weights of the instruction execution results and clock cycle deviations corresponding to the chip running status groups, and obtain the state weight values ​​of each chip running status group within the running acquisition cycle by performing a weighted algorithm based on the weights; set the range of state weight values ​​for the central chip running status group, and compare it with the corresponding state weight values ​​to obtain the chip running status groups within the state weight range, which are recorded as the range chip running status groups, and determine the number of range chip running status groups. If they are a group, the corresponding range chip operating status group will be marked as the central chip operating group; Conversely, the range chip operating state groups are arranged and numbered according to the state weight values ​​from largest to smallest, and are denoted as the central chip operating group n, where n represents the number of the range chip operating state group, and n = 1, 2, ... m, where m is a positive integer. In the above embodiments, it should be further explained that the correct execution of instructions and the incorrect execution of instructions are set with different weights, and different numbers of central chip status operation groups set different abnormal data ranges for chip operation status groups.

[0020] The process of setting up an abnormal data interval chain based on the central chip status operation group includes: If it is a group of central chip operating status groups, the operation monitoring unit of the central chip operating status group is obtained, and then the abnormal operating status data range of the corresponding monitoring point of the operation monitoring unit is set according to the central chip operating status group and stored in the operation monitoring unit. If there are multiple central chip operating status groups, the same operating monitoring unit of each central chip operating status group is obtained simultaneously, and the abnormal operating status data range of the corresponding monitoring point of each operating monitoring unit of the central chip operating status group is set according to the central chip operating status group; then the average value of the abnormal operating status data range corresponding to the same monitoring point is obtained and recorded as the abnormal operating status data range corresponding to the monitoring point and stored in the operating monitoring unit. The abnormal operating status data range is generated by associating the operating status datasets of the monitoring points with the associated chip status chain.

[0021] Step S2 needs further clarification: the process of collecting chip operating environment data and updating the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain includes: According to the operation acquisition cycle, the chip operation environment data of each monitoring point of each chip operation status group corresponding to each associated chip status chain is collected and stored in the operation monitoring unit; Based on the influence weight of chip operating environment data on monitoring points obtained through autonomous learning, the range of abnormal operating state data of each abnormal operating state in the abnormal data interval chain of the operating monitoring unit is updated by the influence weight to obtain the latest abnormal operating state data range and stored in the operating monitoring unit, thereby updating the abnormal data interval chain to the latest abnormal data interval chain.

[0022] In the above embodiments, it is necessary to further explain that the process of updating the range of abnormal operating state data of each abnormal operating state data in the abnormal data interval chain of the operation monitoring unit by means of influence weights to obtain the latest abnormal operating state data range is as follows: First, influence weights are generated through offline pre-training and online fine-tuning: the model is trained offline using full-condition data to establish a three-dimensional initial weight library of chip operating state group-monitoring point-chip operating environment data; the weights are then fine-tuned online through autonomous learning to ensure that the weight sum is 1 and closely matches reality. Then, combined with real-time environmental data, the environmental deviation and single parameter adjustment are calculated, and the total adjustment is obtained by superimposing them. The total adjustment is then updated to the latest threshold according to the threshold type (upper limit, lower limit, bidirectional). Finally, the threshold is stored in the operation monitoring unit and synchronized to the entire system. With the assistance of weight anomaly, threshold boundary, and invalid data processing, the threshold is accurately adapted to the environment.

[0023] The process of obtaining abnormal operating status data by detecting data in the state chain of the associated chip based on the latest abnormal data interval chain includes: The execution result of the instruction to obtain the state chain of the associated chip: If the error is due to an instruction execution error, then obtain the various operational status data from the operational status dataset, schedule the latest abnormal operational status data range corresponding to the latest abnormal data interval chain of the monitoring point, and compare it with the operational status data: If there is a newer range of abnormal operating status data in the operating status data, then the corresponding operating status data will be marked as abnormal operating status data. Conversely, no action is taken; If the instruction is executed correctly, the clock cycle deviation of each operation monitoring unit is checked to determine whether the clock cycle deviation is abnormal. If an anomaly is detected, the corresponding operating status data of the operating monitoring unit is obtained and compared with the corresponding latest abnormal operating status data range. If a latest abnormal operating status data range exists, the corresponding operating monitoring unit is marked as abnormal operating status data; otherwise, it is marked as abnormal clock cycle deviation.

[0024] In the above embodiments, it should be further explained that the fault direction is initially screened based on the instruction execution result. When there is an error, the focus is on comparing the running status data with the latest interval to avoid indiscriminate detection and wasting resources. When the result is correct, the clock cycle deviation is additionally checked to prevent the omission of hidden timing anomalies.

[0025] Step S4 requires further clarification. The process of processing abnormal operating status data includes: The system acquires monitoring points that provide data on abnormal operating states and processes this data based on these monitoring points.

[0026] Please see Figure 2 As shown, the present invention also provides a chip data self-testing system based on self-learning, including the following modules: Data setting module: used to set the associated chip status chain, obtain the central chip status operation group; and set the abnormal data interval chain of the associated chip status chain based on the central chip status operation group. Data update module: Collects chip operating environment data and updates the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain; Data detection module: Detects abnormal operating status data by performing data detection on the state chain of associated chips based on the latest abnormal data interval chain; Data processing module: processes data on abnormal operating states.

[0027] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A self-learning based chip data self-checking method, characterized in that, The method includes the following steps: Step S1: Set up the associated chip state chain and obtain the central chip state operation group; set up the abnormal data range chain of the associated chip state chain based on the central chip state operation group; Step S2: Collect chip operating environment data, and update the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain; Step S3: Based on the latest abnormal data interval chain, perform data detection on the associated chip state chain to obtain abnormal operating state data; Step S4: Process abnormal operating status data; The process of setting up the associated chip state chain includes: The chip's operating module is acquired, and its operation monitoring unit is set according to the monitoring points of the chip's operating module. Corresponding acquisition data is then set in the operation monitoring unit to collect monitoring point operation data. The chip's operating module represents different functional modules within the chip, including at least the CPU core, cache, and peripheral interfaces. The monitoring points represent the nodes that can be monitored by different functional modules within the chip; the monitoring points corresponding to the CPU core include at least the ALU, register file, and pipeline. The acquisition data is used to set specific acquisition time, acquisition frequency, and acquisition device according to the monitoring points. Set up chip operating status groups, and set the runtime and data acquisition cycle for each chip operating status group. Collect the operating data of each chip operating status group at each monitoring point during the runtime according to the data acquisition cycle, and integrate them to generate the operating status dataset of the chip operating status group. Set the instruction execution accuracy threshold for the chip operating status group, and obtain the instruction execution results of the chip operating status group based on the instruction execution accuracy threshold. The instruction execution results include instruction execution success and instruction execution error. Then, obtain the clock cycle deviation of each operating monitoring unit in the chip operating status group. The associated chip state chain is generated by associating the running state dataset, instruction execution result and clock cycle deviation corresponding to the chip running state group, denoted as chip running state group-run state dataset-instruction execution result-clock cycle deviation. The process of obtaining the central chip status running group includes: Set the weights of the instruction execution results and clock cycle deviations corresponding to the chip running status groups, and obtain the state weight values ​​of each chip running status group within the running acquisition cycle by performing a weighted algorithm based on the weights; set the range of state weight values ​​for the central chip running status group, and compare it with the corresponding state weight values ​​to obtain the chip running status groups within the state weight range, which are recorded as the range chip running status groups, and determine the number of range chip running status groups. If they are a group, the corresponding range chip operating status group will be marked as the central chip operating group; Conversely, the range chip operating state groups are arranged and numbered according to the state weight values ​​from largest to smallest, and are denoted as the central chip operating group n, where n represents the number of the range chip operating state group, and n = 1, 2, ... m, where m is a positive integer.

2. The chip data self-testing method based on self-learning according to claim 1, characterized in that, The process of setting up an abnormal data range chain based on the central chip status operation group includes: If it is a group of central chip operating status groups, the operation monitoring unit of the central chip operating status group is obtained, and then the abnormal operating status data range of the corresponding monitoring point of the operation monitoring unit is set according to the central chip operating status group and stored in the operation monitoring unit. If there are multiple central chip operating status groups, the same operating monitoring unit of each central chip operating status group is obtained simultaneously, and the abnormal operating status data range of the corresponding monitoring point of each operating monitoring unit of the central chip operating status group is set according to the central chip operating status group; then the average value of the abnormal operating status data range corresponding to the same monitoring point is obtained and recorded as the abnormal operating status data range corresponding to the monitoring point and stored in the operating monitoring unit. The abnormal operating status data range is generated by associating the operating status datasets of the monitoring points with the associated chip status chain.

3. The chip data self-testing method based on self-learning according to claim 2, characterized in that, The process of collecting chip operating environment data and updating the abnormal data range chain in real time based on the chip operating environment data to obtain the latest abnormal data range chain includes: According to the operation acquisition cycle, the chip operation environment data of each monitoring point of each chip operation status group corresponding to each associated chip status chain is collected and stored in the operation monitoring unit; Based on the influence weight of chip operating environment data on monitoring points obtained through autonomous learning, the range of abnormal operating state data of each abnormal operating state in the abnormal data interval chain of the operating monitoring unit is updated by the influence weight to obtain the latest abnormal operating state data range and stored in the operating monitoring unit, thereby updating the abnormal data interval chain to the latest abnormal data interval chain.

4. The chip data self-testing method based on self-learning according to claim 3, characterized in that, The process of obtaining abnormal operating status data by detecting data in the state chain of associated chips based on the latest abnormal data interval chain includes: The execution result of the instruction to obtain the state chain of the associated chip: If the error is due to an instruction execution error, then obtain the various operational status data from the operational status dataset, schedule the latest abnormal operational status data range corresponding to the latest abnormal data interval chain of the monitoring point, and compare it with the operational status data: If there is a newer range of abnormal operating status data in the operating status data, then the corresponding operating status data will be marked as abnormal operating status data. Conversely, no action is taken; If the instruction is executed correctly, the clock cycle deviation of each operation monitoring unit is checked to determine whether the clock cycle deviation is abnormal. If an anomaly is detected, the corresponding operating status data of the operating monitoring unit is obtained and compared with the corresponding latest abnormal operating status data range. If a latest abnormal operating status data range exists, the corresponding operating monitoring unit is marked as abnormal operating status data; otherwise, it is marked as abnormal clock cycle deviation.

5. The chip data self-testing method based on self-learning according to claim 4, characterized in that, The process of processing abnormal operating status data includes: The system acquires monitoring points that provide data on abnormal operating states and processes this data based on these monitoring points.

6. A self-learning-based chip data self-testing system, applied to the self-learning-based chip data self-testing method as described in any one of claims 1 to 5, characterized in that, Includes the following modules: Data setting module: used to set the associated chip status chain, obtain the central chip status operation group; and set the abnormal data interval chain of the associated chip status chain based on the central chip status operation group. Data update module: Collects chip operating environment data and updates the abnormal data interval chain in real time based on the chip operating environment data to obtain the latest abnormal data interval chain; Data detection module: Detects abnormal operating status data by performing data detection on the state chain of associated chips based on the latest abnormal data interval chain; Data processing module: processes data on abnormal operating states.

Citation Information

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