Isolation type MOSFET driving circuit with full-range duty ratio for space navigation

Abstract

The invention discloses an astronavigation full-range duty ratio isolation type MOSFET drive circuit, which comprises a frequency division and signal splitting circuit, a forward conversion circuit and a combination and discharge circuit, and is characterized in that the frequency division and signal splitting circuit receives externally input PWM signals, splits the PWM signals into a first signal and a second signal and sends the first signal and the second signal to the forward conversion circuit; the frequencies of the first signal and the second signal are half of the frequency of the PWM signal, the high level time is equal to that of the PWM signal, and the phase difference between the first signal and the second signal is 180 degrees; the forward conversion circuit performs in-phase conversion on the split signal I and the split signal II, transmits the converted signal I and the converted signal II to the combination and leakage circuit of the secondary side, and electrically isolates the primary side and the secondary side at the same time; the combination and leakage circuit receives the first signal and the second signal after in-phase conversion, and combines the first signal and the second signal after in-phase conversion into a driving signal consistent with the PWM signal. According to the invention, the full-range duty ratio control of the MOSFET is realized, the problem that the normal opening of the MOSFET cannot be controlled is solved, the opening and closing speed is high, the driving capability is strong, and the reliability is good.

Description

Technical Field

[0001] This invention belongs to the field of aerospace power technology and relates to an isolated MOSFET driving circuit with a full range of duty cycles for aerospace applications. Background Technology

[0002] MOSFETs are circuits composed of metal-oxide-semiconductor field-effect transistors. As an important power semiconductor device, they are widely used in power supply systems due to their significant advantages such as fast switching speed, low on-resistance, and low drive power. When the source of a MOSFET is in a floating state, it is usually driven by bootstrap or isolation. In aerospace power systems, due to the complexity of the space environment, isolation is a more common choice.

[0003] MOSFET isolation drive circuits are typically implemented using isolation chips or transformers. Isolation chips require at least two isolated power supplies. If the number of MOSFETs in the system is large, the auxiliary power supply design becomes very complex and reliability is reduced. Therefore, to simplify auxiliary power supply, aerospace power supplies often use transformers to implement isolation drive.

[0004] For some Buck-Boost converters, when the input and output voltages are approximately equal, the MOSFETs need to be kept on to achieve power transfer. However, in actual designs, most MOSFET drive circuits cannot achieve full-range duty cycle control and can only achieve 0-98% duty cycle conduction. This will lead to complex control strategies and reduced converter efficiency, and may even cause system instability when switching between Buck and Boost modes. Summary of the Invention

[0005] To address the aforementioned issues, this invention proposes an isolated MOSFET drive circuit with a full-range duty cycle for aerospace applications, enabling floating-ground driving of MOSFETs in the power supply. The drive circuit allows for full-range duty cycle control of the MOSFETs and requires only one auxiliary power supply, simplifying the auxiliary power supply design of the entire power system. The specific technical solution is as follows: An isolated MOSFET driver circuit for aerospace applications with a full range of duty cycles, the driver circuit comprising a frequency divider and signal splitter circuit, a forward converter circuit, and a combination and discharge circuit, wherein: The frequency division and signal splitting circuit receives the externally input PWM signal, splits it into signal one and signal two, and sends them to the forward converter circuit. The frequencies of signal one and signal two are half the frequency of the PWM signal, the high-level time is equal to that of the PWM signal, and the phase difference between signal one and signal two is 180°. The forward converter circuit performs in-phase conversion on the split signal 1 and signal 2 and sends them to the combination and discharge circuit on the secondary side, while electrically isolating the original and secondary sides. The combined and bleedering circuit receives the in-phase transformed Signal 1 and Signal 2, combines the in-phase transformed Signal 1 and Signal 2 into a drive signal consistent with the PWM signal, and adds a bleedering circuit to realize the rapid discharge of the gate-source charge of the MOSFET, ensuring reliable turn-off.

[0006] Furthermore, the forward converter circuit includes a first forward converter circuit and a second forward converter circuit, wherein: The first forward converter circuit includes a three-winding transformer T1, a base resistor R1, a base diode D1, a pull-down resistor R2, an NPN transistor Q1, an emitter diode D3, and a magnetic reset diode D2; The three windings of the three-winding transformer T1 are the primary winding n1, the secondary winding n2, and the demagnetizing winding n3. The cathode of the base diode D1 and one end of the base resistor R1 are connected to the output terminal of the AND gate U2. The anode of the base diode D1 is connected to the other end of the base resistor R1, and simultaneously to one end of the pull-down resistor R2 and the base of the NPN transistor Q1. The emitter of the NPN transistor Q1 is simultaneously connected to the other end of the pull-down resistor R2 and the anode of the emitter diode D3. The cathode of the emitter diode D3 is grounded to GND. The collector of the NPN transistor Q1 is connected to the non-same-name terminal of the primary winding n1. The cathode of the magnetic reset diode D2 is connected to the same-name terminal of the demagnetizing winding n3. The anode of the magnetic reset diode D2 is grounded to GND. The same-name terminal of the primary winding n1 and the non-same-name terminal of the demagnetizing winding n3 are simultaneously connected to the power supply VCC. The secondary winding n2 is used as the output of the forward converter and connected to the combination and discharge circuit. The second forward converter circuit includes a three-winding transformer T2, a base resistor R5, a base diode D5, a pull-down resistor R6, an NPN transistor Q3, an emitter diode D7, and a magnetic reset diode D6; The three windings of the three-winding transformer T2 are the primary winding n4, the secondary winding n5, and the demagnetizing winding n6. The cathode of the base diode D5 and one end of the base resistor R5 are connected to the output terminal of the AND gate U3. The anode of the base diode D5 is connected to the other end of the base resistor R5, and simultaneously to one end of the pull-down resistor R6 and the base of the NPN transistor Q3. The emitter of the NPN transistor Q3 is simultaneously connected to the other end of the pull-down resistor R6 and the anode of the emitter diode D7. The cathode of the emitter diode D7 is grounded to GND. The collector of the NPN transistor Q3 is connected to the non-same-name terminal of the primary winding n4. The cathode of the magnetic reset diode D6 is connected to the same-name terminal of the demagnetizing winding n6. The anode of the magnetic reset diode D6 is grounded to GND. The same-name terminal of the primary winding n4 and the non-same-name terminal of the demagnetizing winding n6 are simultaneously connected to the power supply VCC. The secondary winding n5 is connected to the combination and discharge circuit as the output of the forward converter.

[0007] The demagnetizing winding n3 of the three-winding transformer T1 and the demagnetizing winding n6 of the three-winding transformer T2 are magnetic reset windings, and the magnetic reset diodes D2 and D6 provide a path for the magnetic reset circuit.

[0008] To ensure reliable cutoff of NPN transistors Q1 and Q3 in the forward converter circuit and to accelerate the cutoff speed, base diodes D1 and D5 are connected in parallel across base resistors R1 and R5, respectively. This provides a discharge path for the parasitic capacitance between the base and emitter of the transistors, accelerates the cutoff response speed, and ensures reliable cutoff of the transistors.

[0009] To prevent the NPN transistors Q1 and Q3 in the forward converter circuit from being turned on by mistake, base diodes D3 and D7 are connected in series with the emitters of the transistors, respectively.

[0010] Furthermore, the frequency divider and signal splitting circuit includes a D flip-flop U1, an AND gate U2, and an AND gate U3. The CLK terminal of the D flip-flop U1 uses the existing PWM signal as the clock signal. The R and S terminals of the D flip-flop U1 are grounded to GND. The Qn terminal of the D flip-flop U1 is connected to the D terminal and also connected to one input terminal of the AND gate U3. The Q terminal of the D flip-flop U1 is connected to one input terminal of the AND gate U2. The remaining input terminals of the AND gates U2 and U3 are connected to the PWM signal. The output terminals of the AND gates U2 and U3 are respectively connected to the first forward converter circuit and the second forward converter circuit.

[0011] To maintain the forward converter circuit operating with a duty cycle of less than 50%, the frequency divider and signal splitting circuit uses a D flip-flop U1 and AND gates U2 and U3 to divide and split the input PWM signal. The PWM signal is first divided by two by U1 to obtain two mutually opposite square waves with a 50% duty cycle, the frequency of which is half the frequency of the PWM signal. These square waves are then ANDed with the PWM signal to obtain two signals with a duty cycle of no more than 50%, the high-level time of which is equal to that of the PWM signal, and the frequency of which is half the frequency of the input PWM signal. There is a time delay T (where T is the period of the input PWM signal) between the two signals. These two signals serve as the input signals for the next stage forward converter circuit.

[0012] Furthermore, the combined and bleed circuit includes rectifier diode D4, rectifier diode D8, bleeder resistor R3, bleeder resistor R7, bleeder PNP transistor Q2, bleeder PNP transistor Q4, drive resistor Rg, pull-down resistor R4, and Zener diode D9. The anode of the rectifier diode D4 is connected to the same terminal of the secondary winding n2, and the cathode of the rectifier diode D4 is connected to one end of the bleeder resistor R3; the anode of the rectifier diode D8 is connected to the same terminal of the secondary winding n5, and the cathode of the rectifier diode D8 is connected to one end of the bleeder resistor R7; the other end of the bleeder resistor R3 is connected to the other end of the bleeder resistor R7. The base of the bleeder PNP transistor Q2 is connected to the base of the bleeder PNP transistor Q4. The emitters of the bleeder PNP transistors Q2 and Q4 and the cathodes of rectifier diodes D4 and D8 are interconnected and connected to one end of the drive resistor Rg. The collectors of the bleeder PNP transistors Q2 and Q4 and the non-identical terminals of the secondary windings n2 and n5 are interconnected and connected to one end of the pull-down resistor R4 and the anode of the Zener diode D9, and connected to the source of the MOSFET. The other end of the drive resistor Rg, the other end of the pull-down resistor R4, and the cathode of the Zener diode D9 are interconnected and connected to the gate of the MOSFET.

[0013] The output signals from the secondary winding n2 of the three-winding transformer T1 and the secondary winding n5 of the three-winding transformer T2 are rectified by rectifier diodes D4 and D8, and the voltages of the two signals are balanced by bleeder resistors R3 and R7. To ensure rapid turn-off, bleeder PNP transistors Q2 and Q4 are added to the two outputs to accelerate the discharge of charge on the gate-source capacitance of the MOSFET. Bleeder resistors R3 and R7 also serve as current limiters.

[0014] To prevent resonance from occurring between the stray inductance of the drive signal line and the parasitic capacitance between the gate and source of the MOSFET, the drive resistor Rg is connected in series in the circuit to suppress resonance. At the same time, to prevent the voltage between the gate and source from exceeding the MOSFET's limit voltage, a Zener diode D9 is connected in parallel between the gate and source. To ensure reliable turn-off, a pull-down resistor R4 is connected in parallel between the gate and source.

[0015] Furthermore, the voltage of the power supply VCC is 12V~15V.

[0016] Furthermore, the base resistors R1 and R5 have equal resistance values, ranging from 1kΩ to 10kΩ, in order to simultaneously meet the requirements of high efficiency and high driving capability for aerospace power supplies.

[0017] Furthermore, the pull-down resistors R2 and R6 have the same resistance value, both ranging from 10kΩ to 100kΩ, to meet the anti-static requirements of aerospace power supply devices.

[0018] Furthermore, the parameters of the three-winding transformer T1 and the three-winding transformer T2 are the same, the transformer turns ratio is 1:1:1, and the selection of magnetic cores and manufacturing processes are the same.

[0019] Furthermore, the components selected for corresponding positions in the first and second forward converter circuits are identical; Furthermore, the resistance values ​​of the bleeder resistor R3 and the bleeder resistor R7 are equal, and their resistance range is 1k~5k; the rectifier diode D4 and the rectifier diode D8, and the bleeder PNP transistor Q2 and the bleeder PNP transistor Q4 are selected in the same way to ensure that the turn-off bleeder speed of the two secondary outputs is basically the same.

[0020] Furthermore, the driving resistor Rg has a value range of 5~10Ω, the pull-down resistor R4 has a value range of 10k~100k, and the Zener diode D9 has a Zener voltage of 15V to ensure switching speed and prevent the driving voltage from exceeding the limit voltage.

[0021] Furthermore, the source of the MOSFET is floating ground instead of zero-potential ground.

[0022] Compared with the prior art, the beneficial effects achieved by the present invention are as follows: (1) The present invention achieves in-phase conversion of PWM signal through forward converter circuit when the MOSFET source is floating by applying gate-source voltage, thus realizing isolated drive.

[0023] (2) The present invention adopts the method of simultaneously adding a discharge circuit to realize the charge discharge between the gate and source of the MOSFET, thereby achieving fast turn-off and accelerating the response speed during turn-off.

[0024] (3) The present invention adopts the addition of a magnetic reset winding to solve the problem of "residual magnetism" in the forward converter circuit.

[0025] (4) The MOSFET driving circuit provided by the present invention has fast turn-on and turn-off speed, strong driving capability, and high reliability. It solves the problem that most driving circuits cannot control the full duty cycle and can achieve 0-100% duty cycle conduction. In the driving circuit, only the primary side needs auxiliary power supply, the power supply design is simple, and the problem of excessively complex power supply design caused by multiple auxiliary power supplies for multiple MOSFETs is avoided. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 A schematic diagram of the principle of the isolated MOSFET drive circuit with full duty cycle for aerospace applications provided by the present invention; Figure 2 This is a schematic diagram illustrating the principle of the frequency division and splitting circuit provided by the present invention. Figure 3 Key signal waveform diagrams for the frequency division and splitting circuit provided in this invention; Figure 4 A schematic diagram of the first forward converter circuit provided by the present invention; Figure 5 This is a schematic diagram of the second forward converter circuit provided by the present invention; Figure 6 This is a schematic diagram of the combination and discharge circuit provided by the present invention. Detailed Implementation

[0028] The invention will now be further described with reference to the accompanying drawings.

[0029] like Figure 1 As shown, an isolated MOSFET driver circuit with a full-range duty cycle for aerospace applications is disclosed. The driver circuit includes a frequency divider and signal splitter circuit, a forward converter circuit, and a combination and discharge circuit, wherein: The frequency division and signal splitting circuit receives the externally input PWM signal, splits it into signal one and signal two, and sends them to the forward converter circuit. The frequencies of signal one and signal two are half the frequency of the PWM signal, the high-level time is equal to that of the PWM signal, and the phase difference between signal one and signal two is 180°. The forward converter circuit performs in-phase conversion on the split signal 1 and signal 2 and sends them to the combination and discharge circuit on the secondary side, while electrically isolating the original and secondary sides. The combined and bleedering circuit receives the in-phase transformed Signal 1 and Signal 2, combines the in-phase transformed Signal 1 and Signal 2 into a drive signal consistent with the PWM signal, and adds a bleedering circuit to realize the rapid discharge of the gate-source charge of the MOSFET, ensuring reliable turn-off.

[0030] Considering the need to perform in-phase conversion on the input PWM signal and reduce the number of auxiliary power supplies, this embodiment is based on a forward converter circuit. Considering that the forward converter circuit is prone to "residual magnetism" when the duty cycle is greater than 50%, which will shorten the life of components, especially magnetic components, and affect the efficiency of the circuit, the forward converter circuit should operate with a duty cycle of less than 50% and take magnetic reset measures.

[0031] The forward converter circuit includes a first forward converter circuit and a second forward converter circuit, wherein: like Figure 4 As shown, the first forward converter circuit includes a three-winding transformer T1, a base resistor R1, a base diode D1, a pull-down resistor R2, an NPN transistor Q1, an emitter diode D3, and a magnetic reset diode D2. The three windings of the three-winding transformer T1 are the primary winding n1, the secondary winding n2, and the demagnetizing winding n3. The cathode of the base diode D1 and one end of the base resistor R1 are connected to the output terminal of the AND gate U2. The anode of the base diode D1 is connected to the other end of the base resistor R1, and simultaneously to one end of the pull-down resistor R2 and the base of the NPN transistor Q1. The emitter of the NPN transistor Q1 is simultaneously connected to the other end of the pull-down resistor R2 and the anode of the emitter diode D3. The cathode of the emitter diode D3 is grounded to GND. The collector of the NPN transistor Q1 is connected to the non-same-name terminal of the primary winding n1. The cathode of the magnetic reset diode D2 is connected to the same-name terminal of the demagnetizing winding n3. The anode of the magnetic reset diode D2 is grounded to GND. The same-name terminal of the primary winding n1 and the non-same-name terminal of the demagnetizing winding n3 are simultaneously connected to the power supply VCC. The secondary winding n2 is used as the output of the forward converter and connected to the combination and discharge circuit. like Figure 5 As shown, the second forward converter circuit includes a three-winding transformer T2, a base resistor R5, a base diode D5, a pull-down resistor R6, an NPN transistor Q3, an emitter diode D7, and a magnetic reset diode D6. The three windings of the three-winding transformer T2 are the primary winding n4, the secondary winding n5, and the demagnetizing winding n6. The cathode of the base diode D5 and one end of the base resistor R5 are connected to the output terminal of the AND gate U3. The anode of the base diode D5 is connected to the other end of the base resistor R5, and simultaneously to one end of the pull-down resistor R6 and the base of the NPN transistor Q3. The emitter of the NPN transistor Q3 is simultaneously connected to the other end of the pull-down resistor R6 and the anode of the emitter diode D7. The cathode of the emitter diode D7 is grounded to GND. The collector of the NPN transistor Q3 is connected to the non-same-name terminal of the primary winding n4. The cathode of the magnetic reset diode D6 is connected to the same-name terminal of the demagnetizing winding n6. The anode of the magnetic reset diode D6 is grounded to GND. The same-name terminal of the primary winding n4 and the non-same-name terminal of the demagnetizing winding n6 are simultaneously connected to the power supply VCC. The secondary winding n5 is connected to the combination and discharge circuit as the output of the forward converter.

[0032] In this embodiment, the n3 winding of the three-winding transformer T1 and the n6 winding of the three-winding transformer T2 are magnetic reset windings, and the magnetic reset diodes D2 and D6 provide a path for the magnetic reset circuit.

[0033] In this embodiment, in order to ensure the reliable cutoff of NPN transistors Q1 and Q3 in the forward converter circuit and to accelerate the cutoff speed, base diodes D1 and D5 are connected in parallel across base resistors R1 and R5, respectively, to provide a discharge path for the parasitic capacitance between the base and emitter of the transistors, thereby accelerating the response speed during cutoff and ensuring the reliable cutoff of the transistors.

[0034] In this embodiment, to prevent NPN transistors Q1 and Q3 from being turned on erroneously in the forward converter circuit, base diodes D3 and D7 are connected in series with the emitters of the transistors, respectively.

[0035] In this embodiment, both the diodes and transistors used are silicon diodes, which increases the transistor turn-on voltage from 0.7V to 1.4V, resulting in higher circuit reliability.

[0036] like Figure 2 As shown, the frequency divider and signal splitting circuit includes a D flip-flop U1, an AND gate U2, and an AND gate U3. The CLK terminal of the D flip-flop U1 uses the existing PWM signal as the clock signal. The R and S terminals of the D flip-flop U1 are grounded to GND. The Qn terminal of the D flip-flop U1 is connected to the D terminal and also to one input terminal of the AND gate U3. The Q terminal of the D flip-flop U1 is connected to one input terminal of the AND gate U2. The remaining input terminals of the AND gates U2 and U3 are connected to the PWM signal. The output terminals of the AND gates U2 and U3 are respectively connected to the first forward converter circuit and the second forward converter circuit, as shown below. Figure 2 As shown.

[0037] To maintain the forward converter circuit operating with a duty cycle of less than 50%, the frequency divider and splitter circuit in this embodiment divides and splits the input PWM signal using D flip-flop U1 and AND gates U2 and U3. The circuit principle is as follows: Figure 2 As shown, the PWM signal is first divided by two by U1 to obtain two square waves with opposite phases and 50% duty cycles. The frequency of the square waves is half the frequency of the PWM signal. The key signal waveforms are as follows. Figure 3 As shown, the square wave after frequency division is as follows: Figure 3 U1Q and U1Qn are ANDed with the PWM signal to obtain two signals with a duty cycle not exceeding 50%. The high-level time of these signals is equal to that of the PWM signal, and their frequency is half that of the input PWM signal. There is a time delay T (where T is the period of the input PWM signal) between the two signals. Figure 3 The U2_out and U3_out signals are used as input signals for the next stage forward converter circuit.

[0038] like Figure 6 As shown, the combined and bleedering circuit includes rectifier diode D4, rectifier diode D8, bleedering resistor R3, bleedering resistor R7, bleedering PNP transistor Q2, bleedering PNP transistor Q4, driving resistor Rg, pull-down resistor R4, and Zener diode D9. The anode of the rectifier diode D4 is connected to the same terminal of the secondary winding n2, and the cathode of the rectifier diode D4 is connected to one end of the bleeder resistor R3; the anode of the rectifier diode D8 is connected to the same terminal of the secondary winding n5, and the cathode of the rectifier diode D8 is connected to one end of the bleeder resistor R7; the other end of the bleeder resistor R3 is connected to the other end of the bleeder resistor R7. The base of the bleeder PNP transistor Q2 is connected to the base of the bleeder PNP transistor Q4. The emitters of the bleeder PNP transistors Q2 and Q4 and the cathodes of rectifier diodes D4 and D8 are interconnected and connected to one end of the drive resistor Rg. The collectors of the bleeder PNP transistors Q2 and Q4 and the non-identical terminals of the secondary windings n2 and n5 are interconnected and connected to one end of the pull-down resistor R4 and the anode of the Zener diode D9, and connected to the source of the MOSFET. The other end of the drive resistor Rg, the other end of the pull-down resistor R4, and the cathode of the Zener diode D9 are interconnected and connected to the gate of the MOSFET.

[0039] The output signals of the secondary winding n2 and secondary winding n5 of the three-winding transformer T1 are rectified by rectifier diodes D4 and D8, and the voltages of the two signals are balanced by bleeder resistors R3 and R7. Figure 6The connections shown are combined. To ensure rapid turn-off, PNP transistors Q2 and Q4 are added to the two outputs to accelerate the discharge of charge on the gate-source capacitance of the MOSFET. The discharge resistors R3 and R7 also serve to limit the current.

[0040] To prevent resonance from occurring between the stray inductance of the drive signal line and the parasitic capacitance between the gate and source of the MOSFET, the drive resistor Rg is connected in series in the circuit to suppress resonance. At the same time, to prevent the voltage between the gate and source from exceeding the MOSFET's limit voltage, a Zener diode D9 is connected in parallel between the gate and source. To ensure reliable turn-off, a pull-down resistor R4 is connected in parallel between the gate and source.

[0041] The voltage of the power supply VCC is 12V~15V, and the gate-source voltage of the MOSFET is 12V-15V.

[0042] To simultaneously meet the requirements of high efficiency and high driving capability for aerospace power supplies, the base resistors R1 and R5 have equal resistance values, ranging from 1kΩ to 10kΩ.

[0043] To meet the anti-static requirements of power supply devices for aerospace applications, the pull-down resistors R2 and R6 have the same resistance value, both ranging from 10kΩ to 100kΩ.

[0044] The three-winding transformer T1 and the three-winding transformer T2 have the same parameters, the transformer turns ratio is 1:1:1, and the selection of magnetic cores and manufacturing processes are the same.

[0045] The components selected for corresponding positions in the first and second forward converter circuits are the same; To ensure that the turn-off and discharge speeds of the two secondary outputs are basically the same, the resistance values ​​of the discharge resistors R3 and R7 are equal, and their resistance range is 1k~5k; the rectifier diodes D4 and D8, and the discharge PNP transistors Q2 and Q4 are selected in the same way.

[0046] The base diode D3 and emitter diode D7 are grounded at the same GND as the R and S terminals of the D flip-flop U1, but not at the same point as the MOSFET source. That is, the MOSFET source is floating.

[0047] To ensure switching speed and prevent the drive voltage from exceeding the limit voltage, the value of Rg is in the range of 5~10Ω, the value of R4 is in the range of 10k~100k, and the voltage regulation value of Zener diode D9 is 15V.

[0048] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Any person skilled in the art can make possible variations and modifications to the technical solutions of the present invention using the disclosed methods and techniques without departing from the spirit and scope of the invention. Therefore, any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention, without departing from the scope of the invention, are all within the protection scope of the present invention. Content not described in detail in this specification is common knowledge to those skilled in the art.

Claims

1. An isolated MOSFET drive circuit with a full range duty cycle for aerospace applications, characterized in that, The driving circuit includes a frequency divider and signal splitter circuit, a forward converter circuit, and a combination and discharge circuit, wherein: The frequency division and signal splitting circuit receives the externally input PWM signal, splits it into signal one and signal two, and sends them to the forward converter circuit. The frequencies of signal one and signal two are half the frequency of the PWM signal, the high-level time is equal to that of the PWM signal, and the phase difference between signal one and signal two is 180°. The forward converter circuit performs in-phase conversion on the split signal 1 and signal 2 and sends them to the combination and discharge circuit on the secondary side, while electrically isolating the original and secondary sides. The combined and bleedering circuit receives the in-phase transformed Signal 1 and Signal 2, combines the in-phase transformed Signal 1 and Signal 2 into a drive signal consistent with the PWM signal, and adds a bleedering circuit to realize the rapid discharge of the gate-source charge of the MOSFET, ensuring reliable turn-off.

2. The isolated MOSFET driving circuit according to claim 1, characterized in that, The forward converter circuit includes a first forward converter circuit and a second forward converter circuit, wherein: The first forward converter circuit includes a three-winding transformer T1, a base resistor R1, a base diode D1, a pull-down resistor R2, an NPN transistor Q1, an emitter diode D3, and a magnetic reset diode D2; The three windings of the three-winding transformer T1 are the primary winding n1, the secondary winding n2, and the demagnetizing winding n3. The cathode of the base diode D1 and one end of the base resistor R1 are connected to the output terminal of the AND gate U2. The anode of the base diode D1 is connected to the other end of the base resistor R1, and simultaneously to one end of the pull-down resistor R2 and the base of the NPN transistor Q1. The emitter of the NPN transistor Q1 is simultaneously connected to the other end of the pull-down resistor R2 and the anode of the emitter diode D3. The cathode of the emitter diode D3 is grounded to GND. The collector of the NPN transistor Q1 is connected to the non-same-name terminal of the primary winding n1. The cathode of the magnetic reset diode D2 is connected to the same-name terminal of the demagnetizing winding n3. The anode of the magnetic reset diode D2 is grounded to GND. The same-name terminal of the primary winding n1 and the non-same-name terminal of the demagnetizing winding n3 are simultaneously connected to the power supply VCC. The secondary winding n2 is used as the output of the forward converter and connected to the combination and discharge circuit. The second forward converter circuit includes a three-winding transformer T2, a base resistor R5, a base diode D5, a pull-down resistor R6, an NPN transistor Q3, an emitter diode D7, and a magnetic reset diode D6; The three windings of the three-winding transformer T2 are the primary winding n4, the secondary winding n5, and the demagnetizing winding n6. The cathode of the base diode D5 and one end of the base resistor R5 are connected to the output terminal of the AND gate U3. The anode of the base diode D5 is connected to the other end of the base resistor R5, and simultaneously to one end of the pull-down resistor R6 and the base of the NPN transistor Q3. The emitter of the NPN transistor Q3 is simultaneously connected to the other end of the pull-down resistor R6 and the anode of the emitter diode D7. The cathode of the emitter diode D7 is grounded to GND. The collector of the NPN transistor Q3 is connected to the non-same-name terminal of the primary winding n4. The cathode of the magnetic reset diode D6 is connected to the same-name terminal of the demagnetizing winding n6. The anode of the magnetic reset diode D6 is grounded to GND. The same-name terminal of the primary winding n4 and the non-same-name terminal of the demagnetizing winding n6 are simultaneously connected to the power supply VCC. The secondary winding n5 is connected to the combination and discharge circuit as the output of the forward converter.

3. The isolated MOSFET driving circuit according to claim 1, characterized in that, The frequency divider and signal splitting circuit includes a D flip-flop U1, an AND gate U2, and an AND gate U3. The CLK terminal of the D flip-flop U1 uses the existing PWM signal as the clock signal. The R and S terminals of the D flip-flop U1 are grounded to GND. The Qn terminal of the D flip-flop U1 is connected to the D terminal and also connected to one input terminal of the AND gate U3. The Q terminal of the D flip-flop U1 is connected to one input terminal of the AND gate U2. The remaining input terminals of the AND gates U2 and U3 are connected to the PWM signal. The output terminals of the AND gates U2 and U3 are respectively connected to the first forward converter circuit and the second forward converter circuit.

4. The isolated MOSFET driving circuit according to claim 1, characterized in that, The combined and bleed circuit includes rectifier diode D4, rectifier diode D8, bleeder resistor R3, bleeder resistor R7, bleeder PNP transistor Q2, bleeder PNP transistor Q4, drive resistor Rg, pull-down resistor R4 and Zener diode D9. The anode of the rectifier diode D4 is connected to the same terminal of the secondary winding n2, and the cathode of the rectifier diode D4 is connected to one end of the bleeder resistor R3; the anode of the rectifier diode D8 is connected to the same terminal of the secondary winding n5, and the cathode of the rectifier diode D8 is connected to one end of the bleeder resistor R7; the other end of the bleeder resistor R3 is connected to the other end of the bleeder resistor R7. The base of the bleeder PNP transistor Q2 is connected to the base of the bleeder PNP transistor Q4. The emitters of the bleeder PNP transistors Q2 and Q4 and the cathodes of rectifier diodes D4 and D8 are interconnected and connected to one end of the drive resistor Rg. The collectors of the bleeder PNP transistors Q2 and Q4 and the non-identical terminals of the secondary windings n2 and n5 are interconnected and connected to one end of the pull-down resistor R4 and the anode of the Zener diode D9, and connected to the source of the MOSFET. The other end of the drive resistor Rg, the other end of the pull-down resistor R4, and the cathode of the Zener diode D9 are interconnected and connected to the gate of the MOSFET.

5. The isolated MOSFET driving circuit according to claim 2, characterized in that, The voltage of the power supply VCC is 12V~15V.

6. The isolated MOSFET driving circuit according to claim 2, characterized in that, The base resistors R1 and R5 have equal resistance values, ranging from 1kΩ to 10kΩ.

7. The isolated MOSFET driving circuit according to claim 2, characterized in that, The pull-down resistors R2 and R6 have the same resistance value, both ranging from 10kΩ to 100kΩ.

8. The isolated MOSFET driving circuit according to claim 2, characterized in that, The parameters of the three-winding transformer T1 and the three-winding transformer T2 are the same, and the transformer turns ratio is 1:1:

1.

9. The isolated MOSFET driving circuit according to claim 2 or 4, characterized in that, The components selected for corresponding positions in the first and second forward converter circuits are the same; The bleeder resistor R3 and the bleeder resistor R7 have the same resistance value, and their resistance range is 1kΩ to 5kΩ. The selection of rectifier diode D4 and rectifier diode D8, and bleeder PNP transistor Q2 and bleeder PNP transistor Q4 are consistent.

10. The isolated MOSFET drive circuit according to any one of claims 1 to 8, characterized in that, The source of the MOSFET is floating ground instead of zero-potential ground.

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