An adaptive linear pwm duty cycle regulation system and method

Abstract

The application discloses a self-adaptive linear PWM duty cycle adjusting system and method, belongs to the technical field of driving illumination, and solves the problems of discharge in an emergency scene and voltage fluctuation of a lithium battery when discharging and not discharging, which will bring nonlinear influence to PWM duty cycle adjustment. The application comprises a switched capacitor sampling circuit, a triangular wave generating circuit, a PWM signal generating circuit and a battery voltage clamping circuit; an input end of the battery voltage clamping circuit is used for connecting a battery voltage, and an output end of the battery voltage clamping circuit is connected with a first input end of the switched capacitor sampling circuit. The application adjusts and controls PWM duty cycle by sampling a battery voltage and a reference voltage VBG and generating a triangular wave, and adopts low voltage clamping technology to ensure brightness stability; the application samples a sampling capacitor in a PWM high / low level stage, and effectively avoids the interference of voltage fluctuation on PWM.

Description

Technical Field

[0001] This invention relates to the field of driving lighting technology, and in particular to an adaptive linear PWM duty cycle adjustment system and method. Background Technology

[0002] Emergency light discharge technology is a key technology that enables emergency lights to safely, stably, and effectively release the electrical energy stored in their batteries in emergency situations, providing power support for emergency lighting fixtures to maintain their lighting function.

[0003] Taking lithium batteries as an example, during the discharge process, the voltage of a lithium battery gradually decreases from its fully charged state to its cutoff voltage. The output voltage of a lithium battery remains relatively stable for most of the discharge process, but it drops rapidly near the end of the discharge, exhibiting a non-linear relationship. By detecting the output voltage of the lithium battery through a voltage detection circuit, the MCU control unit outputs a PWM drive signal with a corresponding duty cycle based on the detected voltage. This PWM control switch then controls the brightness of the LED lighting unit. This method can dynamically adjust the brightness of the emergency LEDs, reducing power consumption when the battery is low, thereby extending the lifespan of the emergency light. This is particularly important in emergency situations.

[0004] However, lithium batteries experience voltage fluctuations during discharge and non-discharge, which can have a non-linear effect on the PWM duty cycle. When the battery voltage is low, the average output voltage at the same duty cycle decreases, resulting in lower-than-expected brightness or power output. When the load changes abruptly, the battery voltage drops sharply, and if the PWM duty cycle is not adjusted in time, the brightness of the emergency light will fluctuate.

[0005] To address the aforementioned problems, existing technology discloses a lithium battery charging control circuit (Chinese Patent Publication No. CN103151824A), which solves the problem of lithium batteries being overcharged during charging, affecting their lifespan and even causing danger. A signal processing circuit receives a voltage signal and the terminal voltage signal in the lithium battery and outputs a first voltage signal. A triangular wave generation circuit generates a triangular wave of a certain frequency. A pulse width modulation (PWM) circuit has a reference voltage signal; the first voltage signal and the reference voltage signal are compared to generate a second voltage signal, which is then compared with the triangular wave generated by the triangular wave generation circuit to generate a PWM signal. A drive circuit amplifies the PWM signal from the PWM circuit to generate a first switching signal and a second switching signal. This charging control circuit is simple and reliable, ensuring that the lithium-ion battery pack is not overcharged, thereby ensuring the battery pack's lifespan.

[0006] Similarly, a lithium-ion battery switching charging circuit with announcement number CN103457320B compares the battery voltage with a reference voltage and dynamically adjusts the charging current using a triangular wave / PWM signal to achieve smooth switching between constant current charging and constant voltage charging, ensuring charging safety and extending battery life.

[0007] Similarly, a balancing charging device for series battery packs, with announcement number CN101425694A, also achieves automatic switching between constant current charging and constant voltage charging through voltage sampling, comparison, and control logic.

[0008] However, the above applications cannot solve the discharge problem in emergency scenarios, and the voltage fluctuations that occur when lithium batteries are discharging and not discharging, which will bring nonlinear effects to PWM duty cycle adjustment.

[0009] Therefore, an adaptive linear PWM duty cycle adjustment system and method are proposed to solve or alleviate the above problems. Summary of the Invention

[0010] The purpose of this invention is to address the shortcomings of existing technologies by proposing an adaptive linear PWM duty cycle adjustment system and method.

[0011] To achieve the above objectives, the present invention adopts the following technical solution:

[0012] An adaptive linear PWM duty cycle adjustment system includes a switched capacitor sampling circuit, a triangular wave generation circuit, a PWM signal generation circuit, and a battery voltage clamping circuit.

[0013] The input terminal of the battery voltage clamping circuit is connected to the battery voltage. The output terminal of the battery voltage clamping circuit is connected to the first input terminal of the switched capacitor sampling circuit. The battery voltage clamping circuit locks the battery voltage divider when the battery voltage is lower than a preset threshold. The second input terminal of the switched capacitor sampling circuit is connected to the reference source voltage. The output terminal of the switched capacitor sampling circuit is connected to the first input terminal of the PWM signal generation circuit. The switched capacitor sampling circuit is controlled by the PWM signal to synchronously acquire the battery voltage divider and the reference source voltage. The output terminal of the triangular wave generation circuit is connected to the second input terminal of the PWM signal generation circuit. The triangular wave generation circuit generates a periodically changing triangular wave signal for comparison by the PWM signal generation circuit. The PWM signal generation circuit outputs a PWM signal by comparing the magnitude of the battery voltage divider signal and the triangular wave signal.

[0014] Preferably, the switched capacitor sampling circuit includes a battery voltage divider sampling circuit and a reference source voltage sampling circuit. The input terminal of the battery voltage divider sampling circuit is connected to the output terminal of the battery voltage clamping circuit. The battery voltage divider sampling circuit samples the battery voltage and outputs a battery voltage divider sampling signal. The input terminal of the reference source voltage sampling circuit is connected to a reference source voltage. The reference source voltage sampling circuit samples the reference source voltage and outputs a VBG sampling voltage.

[0015] Preferably, the battery voltage divider sampling circuit and the reference source voltage sampling circuit are started by PWM signal control.

[0016] Preferably, the triangular wave generating circuit includes a charging and discharging circuit, a buffer, and a first comparator. The first comparator controls the on / off state of the triangular wave generating circuit based on the VBG sampling voltage to generate an on / off signal. The charging and discharging circuit generates a triangular wave signal based on the on / off signal. The buffer isolates the triangular wave signal and outputs the buffered triangular wave signal.

[0017] Preferably, the battery voltage clamping circuit includes an amplifier and a first NMOS transistor. The amplifier outputs a control signal by comparing the battery voltage with a reference voltage. The first NMOS transistor is turned on or off according to the control signal to achieve battery voltage clamping.

[0018] Preferably, the PWM signal generation circuit includes a third comparator, which compares the magnitude of the battery voltage divider sampling signal with that of the triangular wave signal to generate a PWM signal.

[0019] This invention also provides an adaptive linear PWM duty cycle adjustment method, used in conjunction with the adaptive linear PWM duty cycle adjustment system described above, comprising the following steps:

[0020] Step 1: Acquire the battery voltage divider and reference source voltage through the switched capacitor sampling circuit, and output the battery voltage divider sampling signal and VBG sampling voltage;

[0021] Step 2: In response to the VBG sampling voltage, a triangular wave is generated by the triangular wave generation circuit;

[0022] Step 3: In response to the battery voltage divider sampling signal, the PWM signal generation circuit compares the battery voltage divider sampling signal with the magnitude of the triangular wave and controls the duty cycle of the PWM output.

[0023] Step 4: When the battery voltage reaches the preset threshold, the clamping circuit keeps the battery voltage constant.

[0024] Preferably, step 1 includes:

[0025] Step 11: The battery voltage is sampled and the battery voltage sampling signal is output through the battery voltage divider sampling circuit of the switched capacitor sampling circuit; the battery voltage is the original battery voltage or the battery voltage after clamping.

[0026] Step 12: Sample the reference source voltage and output the VBG sampling voltage through the reference source voltage sampling circuit of the switched capacitor sampling circuit.

[0027] Preferably, step 2 includes:

[0028] Step 21: The first comparator controls the on / off state of the triangular wave generation circuit based on the VBG sampling voltage to generate an on / off signal;

[0029] Step 22: The charging and discharging circuit generates a triangular wave signal based on the on / off signal;

[0030] Step 23: The buffer isolates the triangular wave signal and outputs the buffered triangular wave signal.

[0031] Preferably, step 4 includes:

[0032] Step 41: The amplifier outputs a control signal by comparing the battery voltage with the reference voltage;

[0033] Step 42: The first NMOS transistor is turned on or off according to the control signal to achieve voltage clamping of the battery.

[0034] The present invention has the following beneficial effects:

[0035] This invention regulates the PWM duty cycle by sampling the battery voltage divider and the reference voltage VBG and generating a triangular wave signal, while employing low-voltage clamping technology to ensure stable brightness. By using a switched capacitor to sample the battery voltage divider and the reference source voltage during the PWM high / low level phases, the interference of voltage fluctuations on the PWM is effectively avoided. Attached Figure Description

[0036] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is the wiring diagram of the switched capacitor sampling circuit in this invention;

[0038] Figure 2 This is the wiring diagram of the triangular wave generating circuit in this invention;

[0039] Figure 3 This is a wiring diagram of the battery voltage clamping circuit in this invention;

[0040] Figure 4 This is the wiring diagram of the PWM signal generation circuit in this invention;

[0041] Figure 5 This is a waveform diagram of the triangular wave generation circuit in this invention;

[0042] Figure 6 This is a comparison waveform diagram of the sampling circuit used in this invention and the sampling circuit without switching sampling.

[0043] Figure 7 The waveform diagram is shown for the PWM signal generation circuit in this invention.

[0044] Figure 8 This is a flowchart of the adaptive linear PWM duty cycle adjustment method in this invention.

[0045] 1. Switched capacitor sampling circuit; 2. Triangular wave generation circuit; 3. PWM signal generation circuit; 4. Battery voltage clamping circuit. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0047] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0048] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0049] In the description of this invention, it should be understood that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this invention is in use, or the orientation or positional relationship commonly understood by those skilled in the art. They are only used to facilitate the description of this invention and to simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0050] Furthermore, the terms "first," "second," and "third" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0051] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0052] An adaptive linear PWM duty cycle adjustment system includes a switched capacitor sampling circuit 1, a triangular wave generation circuit 2, a PWM signal generation circuit 3, and a battery voltage clamping circuit 4.

[0053] The input terminal of the battery voltage clamping circuit 4 is connected to the battery voltage. The output terminal of the battery voltage clamping circuit 4 is connected to the first input terminal of the switched capacitor sampling circuit 1. The battery voltage clamping circuit 4 locks the battery voltage divider when the battery voltage is lower than a preset threshold. The second input terminal of the switched capacitor sampling circuit 1 is connected to the reference source voltage. The output terminal of the switched capacitor sampling circuit 1 is connected to the first input terminal of the PWM signal generation circuit 3. The switched capacitor sampling circuit 1 is controlled by the PWM signal to synchronously acquire the battery voltage divider and the reference source voltage. The output terminal of the triangular wave generation circuit 2 is connected to the second input terminal of the PWM signal generation circuit 3. The triangular wave generation circuit 2 generates a periodically changing triangular wave signal for comparison by the PWM signal generation circuit 3. The PWM signal generation circuit 3 outputs a PWM signal by comparing the magnitude of the battery voltage divider signal and the triangular wave signal.

[0054] In the adaptive linear PWM duty cycle adjustment system, the battery voltage clamping circuit 4 first divides the battery voltage and continuously monitors the relationship between the divided battery voltage and the reference voltage. When the battery voltage is higher than the preset threshold, it only performs normal voltage division to output a stable battery voltage. When the battery voltage is lower than the preset threshold, it maintains the battery voltage stability through self-adjustment to avoid subsequent abnormal adjustment due to low voltage.

[0055] Subsequently, the switched capacitor sampling circuit 1 synchronously acquires the battery voltage divider and the reference source voltage VBAT after clamping. Through sampling logic synchronized with the PWM signal, it only samples and maintains the sampling signal during specific time periods, effectively avoiding the impact of voltage fluctuations during battery discharge and non-discharge on sampling accuracy, and ensuring that the obtained battery voltage divider sampling signal and VBG sampling voltage can truly reflect the actual state.

[0056] Meanwhile, the triangular wave generation circuit 2 generates a periodic triangular wave signal based on the VBG sampling voltage through internal adjustment, providing a stable reference waveform for PWM duty cycle adjustment.

[0057] Next, the PWM signal generation circuit 3 compares the battery voltage divider sampling signal output by the switched capacitor sampling circuit 1 with the triangular wave signal generated by the triangular wave generation circuit 2 in real time. Based on the voltage relationship between the two, the duty cycle of the output PWM signal is dynamically adjusted. When the battery voltage divider sampling signal changes with the battery voltage, the PWM duty cycle changes linearly, thereby achieving adaptive adjustment of the load.

[0058] When the battery voltage is clamped, the battery voltage divider sampling signal remains stable, and the PWM duty cycle also remains constant, ensuring the basic operating brightness of the load under low voltage conditions.

[0059] As a result, this system successfully solves the problems of PWM duty cycle nonlinearity, load brightness jitter and unstable output under low voltage caused by battery voltage fluctuations in traditional regulation methods, and achieves precise and stable control of the battery discharge process.

[0060] The switched capacitor sampling circuit 1 includes a battery voltage divider sampling circuit and a reference source voltage sampling circuit. The input terminal of the battery voltage divider sampling circuit is connected to the output terminal of the battery voltage clamping circuit 4. The battery voltage divider sampling circuit samples the battery voltage and outputs the battery voltage sampling signal. The input terminal of the reference source voltage sampling circuit is connected to the reference source voltage VBAT. The reference source voltage sampling circuit samples the reference source voltage and outputs the VBG sampling voltage. The battery voltage divider sampling circuit and the reference source voltage sampling circuit are started by PWM signal control.

[0061] More specifically, such as Figure 1As shown, the battery voltage divider sampling circuit includes a sixth switch S6 and a second sampling capacitor C2. One end of the sixth switch S6 is connected to the output terminal of the battery voltage clamping circuit 4, and the other end of the sixth switch S6 is connected to one end of the second sampling capacitor C2. The other end of the second sampling capacitor C2 is grounded. The sixth switch S6 is controlled to be turned on and off by a PWM signal.

[0062] like Figure 1 As shown, the reference source voltage sampling circuit includes a third switch S3 and a first capacitor Csk1. One end of the third switch S3 is connected to the reference source voltage VBAT, and the other end of the third switch S3 is connected to one end of the first capacitor Csk1. The other end of the first capacitor Csk1 is grounded. The third switch S3 is controlled to be turned on and off by a PWM signal. The voltage across the second sampling capacitor C2 is the battery voltage divider sampling signal VBS, and the voltage across the first capacitor Csk1 is the reference source sampling signal VBG.

[0063] When the battery voltage divider sampling circuit is working, in order to ensure that the battery voltage changes linearly and uniformly collect the battery voltage at the discharge moment, when the PWM signal is high, the control switch is closed to sample the battery voltage divider. The battery voltage charges the second sampling capacitor C2 through the switch. The voltage across the second sampling capacitor C2 gradually rises until it is equal to the battery voltage divider, and the sampling phase ends. At this time, the second sampling capacitor C2 stores the battery voltage information and obtains the corresponding battery voltage divider sampling signal.

[0064] When the PWM signal is low, the switch is turned off. Since the charge stored in the second sampling capacitor C2 is retained, the voltage across it remains unchanged. Therefore, the voltage held by the second sampling capacitor C2, i.e. the battery voltage divider sampling signal, can be processed and output by the subsequent circuit.

[0065] This invention sets up a battery voltage divider sampling circuit, which switches the sampling state and hold state only when the PWM signal is high, using a switch and the second sampling capacitor C2. This method avoids sampling errors caused by changes in battery voltage signal and further prevents the fluctuation of battery voltage during discharge and non-discharge from having a nonlinear effect on the PWM duty cycle.

[0066] For the reference source voltage VBAT sampling circuit, considering that the chip discharges and generates a large current, which will cause a sudden change in battery voltage, and this sudden change will affect the reference source voltage VBAT, if the reference source voltage VBAT is sampled when the battery voltage changes, the sampling result will be inaccurate. Therefore, this invention uses the same sampling timing to complete the sampling of the reference source voltage VBAT and the battery voltage divider.

[0067] By controlling the acquisition of the reference source voltage VBAT using a PWM signal, the consistency between the reference source voltage VBAT and the battery discharge state is ensured.

[0068] The PWM signal can control whether the reference source voltage VBAT is connected. The first capacitor Csk1 is used to maintain the input voltage signal and stabilize the input signal of the comparator. The first capacitor Csk1 and the third switch S3 constitute a switching sampling circuit.

[0069] When the PWM signal is high, the third switch S3 is closed to sample the reference source voltage VBAT. The voltage across the first capacitor Csk1 gradually rises until it equals the reference source voltage VBAT, at which point the sampling phase ends. At this point, the first capacitor Csk1 stores the information of the reference source voltage VBAT, and the corresponding sampled voltage is obtained. The sampled reference source voltage VBAT can be maintained by the first capacitor Csk1. This method further avoids the nonlinear effect of battery voltage fluctuations during discharge and non-discharge on the PWM duty cycle.

[0070] Furthermore, since the sampled battery voltage is held by a capacitor, the triangular wave signal and the battery voltage divider signal can still be compared when the PWM signal is low.

[0071] When the PWM signal is high, the battery voltage can be sampled again and compared with the new battery voltage, ensuring the linear change of the comparison voltage.

[0072] Meanwhile, this invention can simultaneously acquire the reference source voltage VBAT and the battery voltage divider when the PWM signal is high, and it can also acquire them simultaneously when the PWM signal is low, further ensuring the consistency between the reference source voltage VBAT and the battery discharge voltage, thereby preventing abnormal fluctuations in the PWM signal and avoiding fluctuations in the brightness of the emergency light in subsequent circuits.

[0073] The triangular wave generating circuit 2 includes a charging and discharging circuit, a buffer, and a first comparator CMP1. The first comparator CMP1 controls the on / off state of the triangular wave generating circuit 2 based on the VBG sampling voltage, generating an on / off signal. The charging and discharging circuit generates a triangular wave signal based on the on / off signal. The buffer isolates the triangular wave signal and outputs the buffered triangular wave signal.

[0074] More specifically, such as Figure 2 and Figure 5As shown, the triangular wave generation circuit 2 includes a buffer, an upper and lower threshold selection circuit, a first comparator CMP1, a first current source I1, a second current source I2, a fourth switch S4, a fifth switch S5, and a first sampling capacitor C1. The upper and lower threshold selection circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first switch S1, and a second switch S2. The first resistor R1, the second resistor R2, and the third resistor R3 are connected in series. The end of the first resistor R1 furthest from the second resistor R2 is connected to the output terminal of the buffer, and the end of the third resistor R3 furthest from the second resistor R2 is grounded. One end of the first switch S1 is connected to the connection node between the first resistor R1 and the second resistor R2, and the other end of the first switch S1 is connected to the same terminal of the first comparator CMP1. The first comparator CMP1 is connected to the non-inverting input terminal. One end of the second switch S2 is connected to the connection node of the second resistor R2 and the third resistor R3. The other end of the second switch S2 is connected to the non-inverting input terminal of the first comparator CMP1. The first current source is connected to one end of the first sampling capacitor C1 through the fourth switch S4. The second current source is connected to one end of the first sampling capacitor C1 through the fifth switch S5. The other end of the first sampling capacitor C1 is grounded. The input terminal of the buffer is connected to one end of the first sampling capacitor C1. The output terminal of the buffer outputs a triangular wave signal. The inverting input terminal of the first comparator CMP1 is used to receive the reference source sampling signal. The output terminal of the first comparator CMP1 controls the on / off state of the first switch S1, the second switch S2, the fourth switch S4, and the fifth switch S5.

[0075] When the triangular wave generating circuit 2 is working, it uses the first comparator CMP1 to output high and low levels, forming rising and falling slopes, thereby generating a periodic triangular wave signal.

[0076] Two current sources can provide constant current. The charging current and the discharging current are set to be equal. The first switch S1 and the second switch S2 are controlled by the charging and discharging control signal to select the current source connected to the circuit, thereby controlling the charging and discharging capacitor to charge and discharge, so as to generate a triangular wave signal.

[0077] Specifically, the charging / discharging capacitor and the current source constitute a charging / discharging circuit. During the charging phase, the voltage across the charging / discharging capacitor gradually increases, forming a rising edge. During the discharging phase, the voltage across the charging / discharging capacitor gradually decreases, forming a falling edge, thus generating an initial triangular wave signal. This initial triangular wave signal is isolated by a buffer, and the output is a buffered triangular wave signal. This method can enhance the signal driving capability.

[0078] The buffered triangular wave signal output by the buffer is divided by a voltage divider circuit composed of three resistors. Similarly, the charging and discharging control signal controls the opening and closing of the third switch S3 and the fourth switch S4.

[0079] When one of the control signals is high and the other is low, the first switch S1 is closed and the second switch S2 is open, and the charging and discharging capacitor is in the discharging stage. At the same time, the third switch S3 is opened and the fourth switch S4 is closed, thereby selecting the threshold voltage under the triangular wave.

[0080] Similarly, when one of the control signals is low and the other is high, the first switch S1 is opened and the second switch S2 is closed, and the charging and discharging capacitor is in the charging stage. At the same time, the third switch S3 is closed and the fourth switch S4 is opened, thereby selecting the threshold voltage on the triangular wave.

[0081] Here, the lower threshold voltage corresponds to the lower limit of the triangular wave signal, and the upper threshold voltage corresponds to the upper limit of the triangular wave signal.

[0082] The first or second voltage divider is used as the non-inverting input voltage of the first comparator CMP1, and the reference source voltage VBAT is used as the inverting input voltage of the first comparator CMP1. The output of the charge / discharge control signal is controlled by comparing the magnitudes of these two voltages. When the voltage at the non-inverting input rises to the reference source voltage VBAT, the fourth switch S4 is controlled to switch to the second voltage divider, and the output state of the first comparator CMP1 flips. When the voltage at the non-inverting input drops to the reference source voltage VBAT, the third switch S3 is controlled to switch to the first voltage divider, and the output state of the first comparator CMP1 flips again, thereby realizing the switching of the charge / discharge state of the charging / discharge capacitor.

[0083] in:

[0084] Lower threshold voltage:

[0085] Upper threshold voltage:

[0086] upper threshold of the triangular wave:

[0087] Triangular wave lower threshold:

[0088] Triangular wave voltage difference:

[0089] According to the basic formula of capacitor charging We can obtain:

[0090] The charging phase cycle is as follows:

[0091] The period of the discharge phase is:

[0092] Therefore, during the charging and discharging process, due to ,capacitance Substituting the above values ​​into the period of the triangular wave: , It is a triangular wave signal voltage. The reference source voltage is VBAT.

[0093] like Figure 5 As shown, SW and SWN are square wave signals that control the charging and discharging circuit and the switching of upper and lower threshold voltages. Their high and low levels alternate over time. VTN and VTP are voltage divider signals connected to the Vp1 signal, used to define the range of the ROUT signal and control the switching of the capacitor charging and discharging process. When ROUT is in the rising phase, the charging threshold is switched so that Vp1 is connected to the VTP signal. When ROUT is in the falling phase, the discharging threshold is switched so that Vp1 is connected to the VTN signal. The corresponding Vp1 signal is obtained by switching the VTN and VTP voltages.

[0094] The battery voltage clamping circuit 4 includes an amplifier AMP and a first NMOS transistor N1. The amplifier AMP outputs a control signal by comparing the battery voltage with a reference voltage. The first NMOS transistor N1 is turned on or off according to the control signal to achieve battery voltage clamping.

[0095] More specifically, such as Figure 3 and Figure 6 As shown, the battery voltage clamping circuit 4 includes an amplifier AMP, a first NMOS transistor N1, and a voltage divider network. The voltage divider network includes a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6, which are connected in series. The end of the fourth resistor R4 furthest from the fifth resistor R5 is energized, and the end of the sixth resistor R6 furthest from the fifth resistor R5 is grounded. The non-inverting input of the amplifier AMP is used to connect to the reference voltage VREF. The inverting input of the amplifier AMP is connected to the connection node between the fifth resistor R5 and the sixth resistor R6. The gate of the first NMOS transistor N1 is connected to the output of the amplifier AMP. The drain of the first NMOS transistor N1 is connected to the connection node between the fourth resistor R4 and the fifth resistor R5. The source of the first NMOS transistor N1 is grounded. The connection node between the fourth resistor R4 and the fifth resistor R5 is the clamping point and the output battery voltage is divided and sent to the switched capacitor sampling circuit 1.

[0096] When the battery voltage clamping circuit 4 is working, the amplifier AMP has a non-inverting input terminal and an inverting input terminal. The non-inverting input terminal is connected to the reference voltage, and the inverting input terminal is connected to the voltage after the battery voltage is divided by three voltage divider resistors.

[0097] Therefore, the voltage dividing point B between the first and second voltage dividing resistors is called the clamping point, and the voltage dividing point A between the second and third voltage dividing resistors is called the feedback point. The voltage at the clamping point corresponds to the battery voltage VB, and the voltage at the feedback point is connected to the inverting input terminal of the amplifier AMP.

[0098] By comparing the voltages at the two input terminals, the amplifier AMP outputs a signal that controls the state of the first NMOS transistor N1. As a controlled switching element, the gate of the first NMOS transistor N1 is connected to the output terminal of the amplifier AMP. It controls its own conduction or cutoff based on the high or low level of the amplifier AMP output signal, thereby controlling the circuit's on / off state and voltage transmission. A voltage divider network consisting of three voltage divider resistors divides the battery voltage and feeds the divided voltage back to the inverting input terminal of the amplifier AMP, providing a reference for voltage comparison.

[0099] Under normal operating conditions, when the battery voltage is higher than the threshold voltage set for the discharge process, the magnitude of the clamping point voltage is: The feedback point voltage is At this point, the feedback point voltage is still higher than the reference voltage, that is, the voltage at the non-inverting input terminal of the amplifier AMP is greater than the voltage at the inverting input terminal, and the amplifier AMP outputs a low-level signal.

[0100] When the gate of the first NMOS transistor N1 receives a low level, since its conduction requires a gate-source voltage greater than the operating voltage, and the gate-source voltage is relatively small at this time, the first NMOS transistor N1 is in the off state. After the first NMOS transistor N1 is turned off, the path from the battery voltage to the first NMOS transistor N1 is broken, which is equivalent to the left side circuit not working. The voltage divider network is directly grounded through the third voltage divider resistor, and normal voltage division occurs without clamping effect.

[0101] In clamping operation, when the battery voltage is lower than the discharge threshold voltage, both the clamping point voltage and the feedback point voltage are lower than in normal operation. At this time, the feedback point voltage is lower than the reference voltage, meaning the voltage at the non-inverting input of amplifier AMP is lower than the voltage at the inverting input, and amplifier AMP outputs a high-level signal. The gate of the first NMOS transistor N1 receives a high-level signal, the gate-source voltage increases and exceeds the operating voltage, the first NMOS transistor N1 turns on, and the connection between its drain and source and the voltage divider network is established, forcibly raising the clamping point voltage and clamping it at the clamping voltage. .

[0102] like Figure 4 and Figure 7 As shown, the PWM signal generation circuit 3 includes a third comparator CMP3, which compares the magnitude of the battery voltage divider sampling signal and the triangular wave signal to generate a PWM signal.

[0103] More specifically, such as Figure 4 and Figure 7As shown, the PWM signal generation circuit 3 includes a third comparator CMP3. The non-inverting input of the third comparator CMP3 is used to receive the battery voltage divider sampling signal output by the switched capacitor sampling circuit 1. The inverting input of the third comparator CMP3 is used to receive the triangular wave signal output by the triangular wave generation circuit 2. The output of the third comparator CMP3 outputs the PWM signal.

[0104] It should be noted that, considering that the triangular wave signal output by the buffer has a certain deviation, in this embodiment of the invention, the third comparator CMP3 is used to compare the triangular wave signal before buffering with the battery voltage divider sampling signal. This can avoid the influence of the additional offset introduced by the buffer on the comparison result.

[0105] When the PWM signal generation circuit 3 is working, it mainly operates through the third comparator CMP3, such as... Figure 7 As shown, the circuit operates by comparing two key signals in real time, ultimately generating a dynamically adjustable PWM signal. These two key signals are the battery voltage divider sampling signal from the switched capacitor sampling circuit 1 and the triangular wave signal generated by the triangular wave generation circuit 2. The core function of the PWM signal generation circuit 3 is to determine the high and low level states of the output PWM signal by comparing the voltage magnitudes of these two signals, thereby achieving precise control of the duty cycle.

[0106] When the voltage value of the battery voltage divider sampling signal drops to a level that is exactly tangent to the voltage value of the triangular wave signal, the output state of the third comparator CMP3 will flip.

[0107] This flip is the key node in the entire PWM signal regulation. When the voltage of the battery voltage divider sampling signal is higher than the voltage of the triangular wave signal, the third comparator CMP3 will output a high level.

[0108] When the voltage of the battery voltage divider sampling signal is lower than the voltage of the triangular wave signal, the third comparator CMP3 will output a low level.

[0109] Because the triangular wave signal has a periodic change characteristic, its voltage will gradually rise from the lower threshold voltage to the upper threshold voltage, and then gradually fall from the upper threshold voltage to the lower threshold voltage, forming a continuous and regular fluctuation process. This periodic change will make the comparison between the triangular wave signal and the battery voltage divider sampling signal continue. The duration of the high and low levels of the PWM signal output by the third comparator CMP3 will also change dynamically with the voltage relationship between the two signals, ultimately realizing the adaptive linear adjustment of the PWM signal duty cycle.

[0110] During the phase where the triangular wave signal rises from the lower threshold voltage to the upper threshold voltage, its voltage value gradually increases. At this time, if the voltage value of the battery voltage divider sampling signal is high, then for most of the time the triangular wave signal rises, the voltage of the battery voltage divider sampling signal will be higher than the voltage of the triangular wave signal. This will cause the third comparator CMP3 to output a high level for a longer period of time, resulting in a larger duty cycle for the corresponding PWM signal.

[0111] Conversely, if the voltage value of the battery voltage divider sampling signal is low, the triangular wave signal will exceed the voltage of the battery voltage divider sampling signal more quickly, causing the high-level output time of the third comparator CMP3 to be shortened, and the duty cycle of the PWM signal will also decrease accordingly.

[0112] During the phase where the triangular wave signal decreases from the upper threshold voltage to the lower threshold voltage, its voltage value gradually decreases. At this time, the comparison logic between the battery voltage divider sampling signal and the triangular wave signal will exhibit characteristics that complement the rising phase. However, the duty cycle will ultimately be adjusted by changing the duration of the high and low levels.

[0113] This mechanism, which dynamically adjusts according to the relationship between the two signal voltages, ensures that the duty cycle of the PWM signal closely follows the changes in the battery voltage divider sampling signal, thus achieving the core requirement of "adaptive" operation.

[0114] The formula for calculating the PWM duty cycle is as follows:

[0115]

[0116] in, This represents the battery voltage divider sampling signal. From the formula, it can be seen that due to the sampled battery voltage divider... It is a variable value, so the PWM duty cycle can be adjusted according to the battery voltage divider sampling signal. Adaptive adjustment is performed, while the battery voltage divider sampling signal is used. When stable, the PWM duty cycle can be kept stable, maintaining the basic brightness of the emergency light under low voltage.

[0117] in, Figure 6 The figure presents a comparison of the waveforms generated by the sampling circuit using this invention and the sampling circuit without switching sampling. It is clearly visible from the figure that the battery voltage divider sampling signal obtained by the circuit without switching sampling exhibits obvious sawtooth fluctuations and is also accompanied by power supply jitter.

[0118] The root cause of this phenomenon lies in the fact that when the PWM signal is high, the circuit is in a discharging state, and the large current at this time causes the battery voltage to drop; while when the PWM signal is low, the circuit is not discharging, no current flows through the battery, and the voltage remains unchanged. This difference in battery voltage between discharging and non-discharging states directly leads to abnormal PWM signal generation. In contrast, this invention uses the high level of the PWM signal as the sampling signal. This design effectively avoids the nonlinear impact of battery voltage fluctuations during discharging and non-discharging on the PWM duty cycle, ensuring the stability of the sampling signal.

[0119] Figure 7 The diagram illustrates the waveform of the PWM generation circuit in this invention. When the amplitude of the battery voltage divider sampling signal is lower than the instantaneous value of the triangular wave reference signal, the output level of the comparator will flip, and the PWM signal will switch from high level to low level.

[0120] During this process, the duty cycle of the PWM signal exhibits a negative correlation with the dynamic change in the relative amplitude of the battery voltage divider sampling signal and the triangular wave reference signal. That is, the higher the relative amplitude of the battery voltage divider sampling signal, the longer the high-level duration of the PWM signal and the larger the duty cycle; conversely, the lower the relative amplitude, the smaller the duty cycle.

[0121] When the battery voltage is clamped, the battery voltage divider sampling signal is maintained at a constant value by the preceding battery voltage clamping circuit 4. At this time, the intersection of the battery voltage divider sampling signal and the triangular wave reference signal tends to be fixed, which allows the duty cycle of the PWM signal to remain constant, thus forming a stable voltage-duty cycle correspondence. This stable correspondence ensures that the emergency light receives stable power input even when the battery is in a low voltage state, thereby maintaining basic lighting brightness and meeting the need for stable lighting in emergency scenarios.

[0122] pass Figure 6 The comparison clearly shows that the switching sampling method adopted in this invention, by using the PWM high level as the sampling timing, successfully eliminates the interference of battery voltage fluctuations in different operating states on sampling accuracy.

[0123] Combined Figure 7 The operating characteristics of the PWM generation circuit enable the entire system to dynamically and stably adjust the PWM duty cycle according to the battery status. This solves the nonlinearity problem caused by voltage fluctuations in traditional circuits and ensures the basic brightness of the emergency light at low voltage, fully demonstrating the advantages of this invention in sampling stability and adjustment reliability.

[0124] This invention also provides an adaptive linear PWM duty cycle adjustment method, such as... Figure 8As shown, the following steps are included to work in conjunction with the above adaptive linear PWM duty cycle adjustment system:

[0125] Step 1: Acquire the battery voltage divider and reference source voltage through the switched capacitor sampling circuit 1, and output the battery voltage divider sampling signal and VBG sampling voltage;

[0126] Step 11: The battery voltage is sampled and the battery voltage sampling signal is output through the battery voltage divider sampling circuit of the switched capacitor sampling circuit 1; the battery voltage is the original battery voltage or the battery voltage after clamping.

[0127] Step 12: Sample the reference source voltage and output the VBG sample voltage through the reference source voltage sampling circuit of the switched capacitor sampling circuit 1;

[0128] More specifically,

[0129] Battery voltage divider sampling: The sixth switch S6 is controlled by the PWM signal. When the PWM signal is high, the sixth switch S6 is closed, and the battery voltage divider charges the second sampling capacitor C2 until the voltage across the second sampling capacitor C2 is equal to the battery voltage divider, thus obtaining the battery voltage divider sampling signal. When the PWM signal is low, the sixth switch S6 is open, and the second sampling capacitor C2 keeps the battery voltage divider sampling signal unchanged.

[0130] Reference source voltage VBAT sampling: The third switch S3 is controlled by the PWM signal. When the PWM signal is high, the third switch S3 is closed, and the reference source voltage VBAT charges the first capacitor Csk1 until the voltage across the first capacitor Csk1 is equal to VBG. When the PWM signal is low, the third switch S3 is open, and the first capacitor Csk1 maintains the sampling voltage of the reference source voltage VBAT unchanged.

[0131] Among them, the on / off state of the sixth switch S6 and the third switch S3 is synchronously controlled by the PWM signal;

[0132] Step 2: In response to the VBG sampling voltage, a triangular wave is generated by the triangular wave generation circuit 2;

[0133] Step 21: The first comparator CMP1 controls the on / off state of the triangular wave generation circuit 2 based on the VBG sampling voltage, generating an on / off signal;

[0134] Step 22: The charging and discharging circuit generates a triangular wave signal based on the on / off signal;

[0135] Step 23: The buffer isolates the triangular wave signal and outputs the buffered triangular wave signal;

[0136] More specifically,

[0137] Charge and discharge control: The SW and SWN signals output by the first comparator CMP1 control the opening and closing of the fourth switch S4 and the fifth switch S5. When the SW signal is low and the SWN signal is high, the fifth switch S5 is closed and the fourth switch S4 is open, and the second current source discharges the first sampling capacitor C1, and the voltage across the first sampling capacitor C1 decreases linearly. When the SW signal is high and the SWN signal is low, the fourth switch S4 is closed and the fifth switch S5 is open, and the first current source charges the first sampling capacitor C1, and the voltage across the first sampling capacitor C1 increases linearly.

[0138] Threshold switching: The first switch S1 and the second switch S2 are switched on and off synchronously by the SW signal and the SWN signal. When the first sampling capacitor C1 is charging, the first switch S1 is closed and the second switch S2 is open. The lower threshold voltage of the connection node of the first resistor R1 and the second resistor R2 is connected to the non-inverting input terminal of the first comparator CMP1. When the first sampling capacitor C1 is discharging, the second switch S2 is closed and the first switch S1 is open. The upper threshold voltage of the connection node of the second resistor R2 and the third resistor R3 is connected to the non-inverting input terminal of the first comparator CMP1.

[0139] Triangular wave output: The inverting input of the first comparator CMP1 is connected to the VBG sampling voltage. By comparing the lower threshold / upper threshold with the magnitude of the VBG sampling voltage, the SW signal and SWN signal are flipped and output. The voltage across the first sampling capacitor C1 is isolated by the buffer and then output as a triangular wave signal.

[0140] Step 3: In response to the battery voltage divider sampling signal, the PWM signal generation circuit 3 compares the battery voltage divider sampling signal with the magnitude of the triangular wave and controls the duty cycle of the PWM output.

[0141] More specifically,

[0142] Signal comparison: The battery voltage divider sampling signal obtained in step 1 is connected to the non-inverting input of the third comparator CMP3, and the triangular wave signal generated in step 2 is connected to the inverting input of the third comparator CMP3.

[0143] Duty cycle adjustment: When the battery voltage divider sampling signal is greater than the triangular wave signal, the third comparator CMP3 outputs a high level; when the battery voltage divider sampling signal is less than the triangular wave signal, the third comparator CMP3 outputs a low level.

[0144] Linear correlation: The duty cycle D of the PWM signal is calculated according to the formula D=(battery voltage divider sampling signal-Vtl) / ΔV×100%, and changes linearly with the battery voltage divider sampling signal, where Vtl is the lower threshold of the triangular wave and ΔV is the triangular wave voltage difference;

[0145] Step 4: When the battery voltage reaches the preset threshold, the battery voltage clamping circuit 4 keeps the battery voltage division constant;

[0146] Step 41: The amplifier AMP outputs a control signal by comparing the battery voltage with the reference voltage;

[0147] Step 42: The first NMOS transistor N1 is turned on or off according to the control signal to achieve battery voltage clamping;

[0148] More specifically,

[0149] Voltage divider detection: The battery voltage is divided by a voltage divider network composed of the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 to obtain the voltage at the feedback point and the battery voltage at the clamping point.

[0150] Threshold judgment: The voltage at the feedback point is compared with the reference voltage through the amplifier AMP. When the battery voltage is higher than the preset threshold, the voltage at the feedback point is greater than or equal to the reference voltage. The amplifier AMP outputs a low level, the first NMOS transistor N1 is cut off, and the battery voltage divider maintains its natural voltage division value. When the battery voltage is lower than the preset threshold, the voltage at the feedback point is less than the reference voltage. The amplifier AMP outputs a high level, and the first NMOS transistor N1 is turned on.

[0151] Voltage clamping: After the first NMOS transistor N1 is turned on, the battery voltage at the forced clamping point is maintained at the clamping voltage VBC = reference voltage × (1 + the value of the fifth resistor R5 / the value of the sixth resistor R6), so that the battery voltage sampling signal is stable.

[0152] The adaptive linear PWM duty cycle adjustment method is implemented using the aforementioned adaptive linear PWM duty cycle adjustment system.

[0153] In emergency scenarios requiring discharge, the lithium battery voltage is collected through a battery voltage divider sampling circuit, and a triangular wave signal is generated using a triangular wave generation circuit 2.

[0154] The duty cycle of the PWM output is controlled by comparing the battery voltage with the triangular wave signal. When the voltage collected by the battery voltage divider sampling circuit reaches the preset threshold, the battery voltage clamping circuit 4 will maintain the voltage stability.

[0155] The battery voltage sampling accuracy has been optimized to cope with sampling drift that occurs when the battery is discharging or not discharging, ensuring high accuracy in discharge monitoring.

[0156] Meanwhile, by dynamically comparing the triangular wave signal with the battery voltage, the duty cycle of the PWM output can be automatically adjusted according to the changes in battery voltage, thereby achieving intelligent regulation of the charging current, improving charging efficiency, and effectively extending battery life. When the battery voltage reaches the preset threshold, the battery voltage clamping circuit 4 maintains voltage stability, which can effectively ensure the basic brightness of the emergency light.

[0157] Furthermore, the setting of the switching sampling capacitor enables sampling of the battery voltage and the reference source voltage VBAT when the PWM is high or low, avoiding the nonlinear effect of voltage fluctuations during battery discharge and non-discharge on the PWM duty cycle, thereby preventing power supply fluctuations.

[0158] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An adaptive linear PWM duty cycle adjustment system, characterized in that, It includes a switched capacitor sampling circuit (1), a triangular wave generation circuit (2), a PWM signal generation circuit (3), and a battery voltage clamping circuit (4). The input terminal of the battery voltage clamping circuit (4) is used to connect to the battery voltage. The output terminal of the battery voltage clamping circuit (4) is connected to the first input terminal of the switched capacitor sampling circuit (1). The battery voltage clamping circuit (4) locks the battery voltage divider when the battery voltage is lower than a preset threshold. The second input terminal of the switched capacitor sampling circuit (1) is connected to the reference source voltage. The output terminal of the switched capacitor sampling circuit (1) is connected to the first input terminal of the PWM signal generation circuit (3). The switched capacitor sampling circuit (1) includes a switch controlled by the PWM signal and a sampling capacitor. The switched capacitor sampling circuit (1) is controlled by the PWM signal. During a specific period synchronized with the PWM signal, it samples the battery voltage divider and the reference source voltage through the switch and maintains the sampling signal through the sampling capacitor. The output terminal of the triangular wave generation circuit (2) is connected to the second input terminal of the PWM signal generation circuit (3). The triangular wave generation circuit (2) generates a periodically changing triangular wave signal for comparison by the PWM signal generation circuit (3). The PWM signal generation circuit (3) outputs the PWM signal by comparing the magnitude of the battery voltage divider signal and the triangular wave signal.

2. The adaptive linear PWM duty cycle adjustment system according to claim 1, characterized in that, The switched capacitor sampling circuit (1) includes a battery voltage divider sampling circuit and a reference source voltage sampling circuit. The input terminal of the battery voltage divider sampling circuit is connected to the output terminal of the battery voltage clamping circuit (4). The battery voltage divider sampling circuit samples the battery voltage and outputs the battery voltage divider sampling signal. The input terminal of the reference source voltage sampling circuit is connected to the reference source voltage. The reference source voltage sampling circuit samples the reference source voltage and outputs the VBG sampling voltage.

3. The adaptive linear PWM duty cycle adjustment system according to claim 2, characterized in that, The battery voltage divider sampling circuit and the reference source voltage sampling circuit are started by PWM signal control.

4. The adaptive linear PWM duty cycle adjustment system according to claim 1, characterized in that, The triangular wave generating circuit (2) includes a charging and discharging circuit, a buffer, and a first comparator. The first comparator controls the on / off state of the triangular wave generating circuit (2) based on the VBG sampling voltage to generate an on / off signal. The charging and discharging circuit generates a triangular wave signal based on the on / off signal. The buffer isolates the triangular wave signal and outputs the buffered triangular wave signal.

5. The adaptive linear PWM duty cycle adjustment system according to claim 1, characterized in that, The battery voltage clamping circuit (4) includes an amplifier and a first NMOS transistor. The amplifier outputs a control signal by comparing the battery voltage with a reference voltage. The first NMOS transistor is turned on or off according to the control signal to achieve battery voltage clamping.

6. The adaptive linear PWM duty cycle adjustment system according to claim 1, characterized in that, The PWM signal generation circuit (3) includes a third comparator, which compares the magnitude of the battery voltage divider sampling signal with the magnitude of the triangular wave signal to generate a PWM signal.

7. An adaptive linear PWM duty cycle adjustment method, used in conjunction with the adaptive linear PWM duty cycle adjustment system as described in any one of claims 1-6, characterized in that, Includes the following steps: Step 1: Collect the battery voltage divider and reference source voltage through the switched capacitor sampling circuit (1), and output the battery voltage divider sampling signal and VBG sampling voltage; Step 2: In response to the VBG sampling voltage, a triangular wave is generated by the triangular wave generation circuit (2); Step 3: In response to the battery voltage divider sampling signal, the PWM signal generation circuit (3) compares the battery voltage divider sampling signal with the magnitude of the triangular wave and controls the duty cycle of the PWM output. Step 4: When the battery voltage reaches the preset threshold, the clamping circuit keeps the battery voltage constant.

8. The adaptive linear PWM duty cycle adjustment method according to claim 7, characterized in that, Step 1 includes: Step 11: The battery voltage is sampled and the battery voltage sampling signal is output through the battery voltage divider sampling circuit of the switched capacitor sampling circuit (1); the battery voltage divider is the original battery voltage divider or the battery voltage divider after clamping. Step 12: The reference source voltage is sampled and the VBG sampling voltage is output through the reference source voltage sampling circuit of the switched capacitor sampling circuit (1).

9. The adaptive linear PWM duty cycle adjustment method according to claim 7, characterized in that, Step 2 includes: Step 21: The first comparator controls the on / off state of the triangular wave generation circuit (2) based on the VBG sampling voltage to generate an on / off signal; Step 22: The charging and discharging circuit generates a triangular wave signal based on the on / off signal; Step 23: The buffer isolates the triangular wave signal and outputs the buffered triangular wave signal.

10. The adaptive linear PWM duty cycle adjustment method according to claim 7, characterized in that, Step 4 includes: Step 41: The amplifier outputs a control signal by comparing the battery voltage with the reference voltage; Step 42: The first NMOS transistor is turned on or off according to the control signal to achieve voltage clamping of the battery.

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