High-order high-common-mode-rejection differential filter

By integrating a common-mode rejection structure and a spiral inductor-capacitor architecture into a differential filter, the problems of deterioration of out-of-band stopband characteristics and decrease in common-mode rejection ratio of high-order filters are solved, realizing a high-performance filter with high common-mode rejection ratio and low loss, suitable for 5G millimeter-wave communication systems.

CN121790710APending Publication Date: 2026-04-03NANJING UNIV OF POSTS & TELECOMM
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-02-28
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

Existing differential filters suffer from problems such as deterioration of out-of-band stopband characteristics, decrease in common-mode rejection ratio, increase in device size and increase in insertion loss when achieving high-performance and miniaturization requirements.

Method used

A high-order common-mode rejection differential filter integrated on a dielectric substrate is adopted. By coupling a common-mode rejection structure between balanced resonant units, a differential transmission network with multiple resonant poles is constructed. Combined with a spiral inductor-capacitor series-parallel architecture and a coupled inductor-ground via design, a high common-mode rejection ratio and low insertion loss are achieved.

Benefits of technology

Achieving high-order filtering response and high common-mode rejection within a compact structure, with a common-mode rejection ratio ≥40dB, out-of-band rejection ≥40dB, and in-passband insertion loss ≤1.2dB, it meets the high-performance requirements of 5G millimeter-wave communication systems and significantly reduces physical size.

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Abstract

The invention discloses a high-order high-common-mode-rejection differential filter, and relates to the technical field of filters. The antenna comprises a dielectric substrate, the top plane of the dielectric substrate is provided with an upper surface structure, the bottom plane of the dielectric substrate is connected with a grounding metal layer, the upper surface structure comprises a pair of balance input ports and a pair of balance output ports which are symmetrically arranged, and a balance resonance unit is cascaded between each balance input port and each output port. The balance resonance unit is used for generating resonance under the excitation of a differential mode signal so as to construct a passband and realize the selective transmission of the signal; wherein at least two groups of balance resonance units are arranged, and a common-mode suppression structure is coupled between two adjacent groups of balance resonance units and is used for constructing a signal absorption path under the excitation of a common-mode signal and guiding the common-mode signal to the grounding metal layer to realize high common-mode suppression. Through high-order resonance cascade and optimized common-mode rejection structure design, collaborative optimization of high-order filtering response and a high common-mode rejection ratio is realized.
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Description

Technical Field

[0001] This invention relates to the field of filter technology, specifically to a high-order high common-mode rejection differential filter. Background Technology

[0002] With the widespread adoption of high-speed differential architecture communication systems such as 5G millimeter wave and vehicle-mounted intelligent communication, users are placing increasingly stringent demands on signal transmission speed and anti-interference capabilities. In these differential communication systems, differential filters are one of the core passive components. Their filter selectivity and common-mode interference suppression capabilities directly determine the quality of signal transmission, while their size and integration also profoundly affect the miniaturization design and cost control of the communication system.

[0003] To meet the demands of high-speed differential communication scenarios, differential filters must simultaneously possess the characteristics of high-order filtering (high out-of-band selectivity), high common-mode rejection ratio (CMRR), wide passband and wide stopband compatibility, and low insertion loss. Currently, there are three main approaches to implementing high-order differential filters: First, constructing a high-order structure by simply cascading low-order balanced resonant units. While this increases the filtering order, it leads to deterioration of out-of-band stopband characteristics, and the CMRR decreases significantly with increasing cascade quantity. Second, using independent CMRR circuits combined with high-order filtering circuits. While this approach can maintain some performance, the additional circuitry significantly increases device size, and signal reflection at the interface increases insertion loss. Third, using planar coupling lines to enhance the coupling strength between resonant units to compress size. However, the linewidth and spacing tolerances of traditional PCB manufacturing processes limit coupling accuracy, leading to spurious resonance at high frequencies, and making it difficult to guarantee compatibility between wide passband and wide stopband.

[0004] Therefore, this invention proposes a high-order high common-mode rejection differential filter. Summary of the Invention

[0005] The purpose of this invention is to provide a high-order high common-mode rejection differential filter that achieves synergistic optimization of high-order filtering response and high common-mode rejection ratio through innovative topology design on an integrated passive device process platform, while maintaining compact size and low insertion loss characteristics.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a high-order high common-mode rejection differential filter, comprising a dielectric substrate, wherein a top plane of the dielectric substrate is provided with an upper surface structure, and a ground metal layer is connected to the bottom plane of the dielectric substrate, the upper surface structure comprising: A pair of balanced input ports and a pair of balanced output ports are symmetrically arranged. A balanced resonant unit is cascaded between each balanced input port and each balanced output port. The balanced resonant unit is used to generate resonance under differential mode signal excitation to construct a passband and realize selective signal transmission. The balanced resonant unit is set to at least two sets, and the two adjacent sets of balanced resonant units are coupled with a common-mode rejection structure, which is used to construct a signal absorption path under the excitation of common-mode signal and guide the common-mode signal to the ground metal layer to achieve high common-mode rejection.

[0007] Furthermore, it also includes a first port, a second port, a third port, and a fourth port, wherein the balanced resonant units are cascaded between the first port and the second port, and between the third port and the fourth port.

[0008] Furthermore, the first port and the third port constitute a pair of balanced input ports or balanced output ports, and the second port and the fourth port constitute another corresponding pair of balanced output ports or balanced input ports.

[0009] Furthermore, each set of balanced resonant units includes four spiral inductors, one coupling inductor, and four capacitors. The four spiral inductors are designated as the first spiral inductor, the second spiral inductor, the third spiral inductor, and the fourth spiral inductor, respectively. The coupling inductor is designated as the first coupling inductor, and the four capacitors are designated as the first capacitor, the second capacitor, the third capacitor, and the fourth capacitor, respectively.

[0010] Furthermore, the first capacitor is connected between the first port, the third port and the first spiral inductor, the second capacitor is connected between the second port, the fourth port and the fourth spiral inductor, the third capacitor is connected between the first spiral inductor and the fourth spiral inductor, the fourth capacitor is disposed between the second spiral inductor and the third spiral inductor, and the second spiral inductor and the third spiral inductor are connected in series through the fourth capacitor, and the whole formed by the three is connected in parallel with the third capacitor.

[0011] Furthermore, the common-mode suppression structure includes six capacitors, two coupling inductors, and two grounding vias, wherein the six capacitors include a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, and a tenth capacitor; the two coupling inductors are a first coupling inductor and a second coupling inductor; and the two grounding vias are a first grounding via and a second grounding via.

[0012] Furthermore, the first coupling inductor is connected between the fifth capacitor, the sixth capacitor and the first grounding via and is connected in parallel with the seventh capacitor; The second coupling inductor is connected between the eighth capacitor, the ninth capacitor and the second grounding via, and is in parallel with the tenth capacitor.

[0013] Furthermore, all of the first to tenth capacitors are surface-mount capacitors.

[0014] Furthermore, the first to fourth spiral inductors are all planar spiral inductors, and the dielectric substrate is set as a high-resistivity silicon or glass substrate. The spiral inductors, coupling inductors, capacitors and signal lines are all integrated on the same plane of the dielectric substrate.

[0015] Furthermore, the overall structure of the differential filter is arranged in a vertically or horizontally symmetrical manner relative to the central axis.

[0016] This invention has at least the following beneficial effects: 1. This invention constructs a differential transmission network with multiple resonant poles by coupling a specialized common-mode rejection structure between multiple sets of balanced resonant units. The cascaded design of the balanced resonant units enables the filter to form a steep passband edge and wide stopband rejection under differential-mode signal excitation, significantly enhancing the attenuation capability for out-of-band interference signals. Simultaneously, the common-mode rejection structure, through the cooperation of coupling inductors and ground vias, constructs a low-impedance energy dissipation path under common-mode signal excitation, effectively guiding common-mode interference to the ground metal layer, thereby achieving an extremely high common-mode rejection ratio without affecting differential-mode signal transmission. This topology, which deeply integrates high-order filtering and common-mode absorption, overcomes the shortcomings of traditional schemes where cascading leads to a decrease in common-mode rejection or requires additional suppression circuitry to worsen insertion loss. This allows the filter to maintain low-loss transmission while possessing a dual, powerful suppression capability against common-mode noise and spurious signals in complex electromagnetic environments.

[0017] 2. This invention utilizes a unique spiral inductor-capacitor series-parallel architecture, combined with a synergistic design of coupling inductors and grounding vias, to form a high-order filtering topology with a common-mode rejection ratio (CMRR) ≥40dB and out-of-band rejection ratio (OUTR) ≥40dB, effectively resisting common-mode interference and spurious signals. Simultaneously, leveraging the low parasitic parameters of the IPD process, the in-passband insertion loss is ≤1.2dB, and the return loss is ≥20dB, meeting the high-performance requirements of high-speed differential communication systems such as 5G millimeter-wave.

[0018] 3. This invention employs an integrated passive device process, integrating all spiral inductors, coupled inductors, capacitors, and signal lines onto the same plane of the same dielectric substrate. Compared to differential filters implemented using discrete components or traditional printed circuit board processes, this invention significantly improves integration and reduces overall physical size, achieving a chip-level microscale. This high-density integration not only greatly saves layout space in the RF front end, providing crucial support for the miniaturization and thinning design of communication systems, but also minimizes parasitic interconnection effects between components due to the precision advantages of the integration process, effectively ensuring the stability and consistency of high-frequency performance.

[0019] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description

[0020] Figure 1 This is a three-dimensional schematic diagram of the overall structure of the present invention; Figure 2 This is a top view of the overall structure of the present invention; Figure 3 This is a circuit diagram of the overall structure of the present invention; Figure 4 This is a differential simulation filter response curve diagram in an embodiment of the present invention.

[0021] Figure 5 This is a common-simulation filter response curve diagram in an embodiment of the present invention.

[0022] Figure label: 1. First port; 2. Second port; 3. Third port; 4. Fourth port; 5. First spiral inductor; 6. Second spiral inductor; 7. Third spiral inductor; 8. Fourth spiral inductor; 9. First capacitor; 10. Second capacitor; 11. Third capacitor; 12. Fourth capacitor; 13. Fifth capacitor; 14. Sixth capacitor; 15. Seventh capacitor; 16. Eighth capacitor; 17. Ninth capacitor; 18. Tenth capacitor; 19. First coupling inductor; 20. Second coupling inductor; 21. First grounding via; 22. Second grounding via; 23. Dielectric substrate; 24. Grounding metal layer; 25. Top surface structure. Detailed Implementation

[0023] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0024] This invention provides a high-order, high common-mode rejection differential filter suitable for radio frequency microwave communication systems, particularly for applications requiring differential signal processing such as 5G millimeter-wave communication, vehicle radar, and wireless local area networks. The filter is fabricated using integrated passive device technology, achieving high-order bandpass characteristics and high common-mode rejection capabilities within an extremely small chip area, meeting the urgent needs of modern wireless communication systems for miniaturization and high performance.

[0025] The differential filter of the present invention includes a dielectric substrate 23, which serves as the physical support and electrical isolation layer for the entire device. The dielectric substrate 23 has opposing top and bottom planes. An upper surface structure 25 is formed on the top plane using microfabrication processes such as photolithography, electroplating, and deposition. This upper surface structure 25 includes various metal patterns constituting the filter, such as inductors, capacitor plates, signal transmission lines, and bonding pads. A ground metal layer 24 is connected to the bottom plane of the dielectric substrate 23. This ground metal layer 24 is typically a full-surface metal layer covering the entire bottom of the dielectric substrate 23, serving as a reference ground plane for radio frequency signals and an electromagnetic shielding layer, isolating external interference and providing a stable potential reference point. Electrical isolation between the upper surface structure 25 and the ground metal layer 24 is achieved through the body material of the dielectric substrate 23, and reliable electrical connection is achieved at locations requiring grounding through metallized vias penetrating the dielectric substrate 23.

[0026] Please see Figures 1-5 The present invention provides a technical solution: a high-order high common-mode rejection differential filter, including a dielectric substrate 23, a top surface structure 25 disposed on the top plane of the dielectric substrate 23, and a ground metal layer 24 connected to the bottom plane of the dielectric substrate 23. The upper surface structure 25 includes: A pair of symmetrically arranged balanced input ports and a pair of balanced output ports are provided. A balanced resonant unit is cascaded between each balanced input port and each balanced output port. The balanced resonant unit is used to generate resonance under differential mode signal excitation to construct a passband and achieve selective signal transmission. The balanced resonant unit is configured in at least two groups, and the two adjacent balanced resonant units are coupled with a common-mode rejection structure, which is used to construct a signal absorption path under the excitation of the common-mode signal and guide the common-mode signal to the ground metal layer 24 to achieve high common-mode rejection.

[0027] The aforementioned technical features enable the filter to simultaneously achieve high-order filtering functions and high common-mode rejection performance within a compact structure, meeting the dual requirements of high-speed differential communication systems for signal selectivity and anti-interference capabilities.

[0028] The filter structure described in this embodiment also includes a first port 1, a second port 2, a third port 3 and a fourth port 4, wherein the balanced resonant units are cascaded between the first port 1 and the second port 2, and between the third port 3 and the fourth port 4. The first port 1 and the third port 3 constitute a pair of balanced input ports or balanced output ports, and the second port 2 and the fourth port 4 constitute another corresponding pair of balanced output ports or balanced input ports.

[0029] Specifically, in this embodiment, the balanced input ports are the first port 1 and the third port 3, and the balanced output ports are the second port 2 and the fourth port 4. Of course, depending on the actual application requirements, the first port 1 and the third port 3 can also be used as output ports, while the second port 2 and the fourth port 4 can be used as input ports. This embodiment does not limit this, as long as the two pairs of ports are symmetrically arranged. The first port 1 and the third port 3 form a pair of differential ports for receiving or outputting differential mode signals; the second port 2 and the fourth port 4 form another pair of differential ports for outputting or receiving filtered differential mode signals. This symmetrical port layout ensures low-loss transmission of differential mode signals by the filter, while exhibiting high suppression characteristics for common mode signals.

[0030] Regarding the technical solution of this embodiment, a balanced resonant unit is cascaded between the balanced input port and the balanced output port along the signal path. In this embodiment, at least two sets of balanced resonant units are configured. Each set of balanced resonant units includes four spiral inductors, one coupling inductor, and four capacitors. The four spiral inductors are designated as first spiral inductor 5, second spiral inductor 6, third spiral inductor 7, and fourth spiral inductor 8. The coupling inductor is designated as first coupling inductor 19. The four capacitors are designated as first capacitor 9, second capacitor 10, third capacitor 11, and fourth capacitor 12. The balanced resonant units on the two signal paths are coupled to each other through a common-mode rejection structure to form a differential operating mode. This cascaded structure enables the filter to achieve a high-order filtering response, i.e., by introducing multiple resonant poles within the passband, the steepness of the passband edge and out-of-band rejection capability are improved. Simultaneously, the common-mode rejection structure is located between the resonant units and is specifically used to suppress common-mode interference signals, while having almost no impact on the transmission of differential-mode signals.

[0031] In this embodiment, the first capacitor 9 is connected between the first port 1, the third port 3, and the first spiral inductor 5; the second capacitor 10 is connected between the second port 2, the fourth port 4, and the fourth spiral inductor 8; the third capacitor 11 is connected between the first spiral inductor 5 and the fourth spiral inductor 8; and the fourth capacitor 12 is located between the second spiral inductor 6 and the third spiral inductor 7, with the second spiral inductor 6 and the third spiral inductor 7 connected in series via the fourth capacitor 12. The three capacitors together are connected in parallel with the third capacitor 11. This configuration creates a multi-path signal transmission network within the balanced resonant unit. The first capacitor 9 and the second capacitor 10 serve as coupling elements between the input ports and the spiral inductors, respectively, achieving energy transfer and impedance matching from external signals to the resonant network. Furthermore, adjusting their capacitance values ​​controls the signal coupling strength to optimize port return loss characteristics. The third capacitor 11 is connected across the first spiral inductor 5 and the fourth spiral inductor 8, forming a parallel resonant branch. This branch, in conjunction with the series branch, enables the resonant unit to generate multiple resonant modes under differential-mode excitation, thereby expanding the effective passband range and improving frequency selectivity. The series combination of the fourth capacitor 12 with the second spiral inductor 6 and the third spiral inductor 7 further enriches the complexity of the resonant topology. This series structure, when connected in parallel with the third capacitor 11, forms a hybrid network exhibiting both series and parallel resonance characteristics. This results in low insertion loss in the target frequency band and high attenuation in the stopband. The interleaved connection of capacitors and inductors also introduces transmission zeros between the resonant units through electromagnetic coupling. The position of these transmission zeros can be flexibly configured by adjusting the capacitance and inductance values, thereby enhancing the suppression capability for specific interference frequency bands. Overall, this topology achieves a high-order filtering response with a limited number of components, while maintaining a compact circuit layout and ease of fabrication. The common-mode rejection structure in this embodiment includes six capacitors, two coupling inductors, and two grounding vias. The six capacitors are: a fifth capacitor 13, a sixth capacitor 14, a seventh capacitor 15, an eighth capacitor 16, a ninth capacitor 17, and a tenth capacitor 18. The two coupling inductors are a first coupling inductor 19 and a second coupling inductor 20. The two grounding vias are a first grounding via 21 and a second grounding via 22. This structure, through the synergistic effect of the capacitors, inductors, and grounding vias, constructs a wideband common-mode absorption network within a compact layout. This enables the filter to possess high common-mode rejection capability while maintaining low differential-mode insertion loss characteristics, meeting the dual requirements of high-speed differential communication systems for signal integrity and electromagnetic compatibility.

[0032] Regarding the technical solution of this embodiment, the first coupling inductor 19 is connected between the fifth capacitor 13, the sixth capacitor 14 and the first grounding through hole 21 and is connected in parallel with the seventh capacitor 15; The second coupling inductor 20 is connected between the eighth capacitor 16, the ninth capacitor 17 and the second grounding through hole 22, and is connected in parallel with the tenth capacitor 18.

[0033] Specifically, the aforementioned connection configuration allows the first coupling inductor 19 and the seventh capacitor 15, and the second coupling inductor 20 and the tenth capacitor 18, to form parallel resonant networks. These parallel resonant networks exhibit low impedance characteristics within a specific frequency band under common-mode signal excitation, effectively guiding common-mode energy to the grounding via. The fifth capacitor 13, the sixth capacitor 14, the eighth capacitor 16, and the ninth capacitor 17 serve as signal coupling elements, and their capacitance values ​​determine the coupling strength of the common-mode signal entering the parallel resonant network. Adjusting the capacitance values ​​of these capacitors allows for flexible control of the common-mode suppression frequency band and suppression depth. The independent configuration of the first coupling inductor 19 and the second coupling inductor 20 ensures a symmetrical distribution of the common-mode suppression structure in its physical layout. This symmetrical distribution ensures balanced flow of common-mode current along both paths, preventing degradation of common-mode suppression performance due to uneven current distribution. The parallel configuration of the seventh capacitor 15 and the tenth capacitor 18 provides the coupled inductor with the dual functions of DC bias isolation and high-frequency bypass. On the one hand, it prevents the risk of core saturation caused by DC current flowing through the coupled inductor; on the other hand, it provides an additional low-impedance discharge path for high-frequency common-mode components, expanding the effective bandwidth of common-mode rejection. The direct connection between the grounding via and the coupled inductor shortens the grounding loop length of the common-mode current, reducing the constraint of parasitic inductance of the grounding path on the high-frequency common-mode rejection performance, allowing the common-mode rejection structure to maintain effective energy absorption capability in higher frequency bands. Under differential-mode excitation, since the differential-mode signal amplitudes on both sides of the fifth capacitor 13 and the sixth capacitor 14, and the eighth capacitor 16 and the ninth capacitor 17 are equal and opposite in phase, the potential difference across the coupled inductor tends to zero, and the parallel resonant network exhibits a high-impedance state. The influence of the common-mode rejection structure on differential-mode signal transmission is significantly weakened, thereby achieving effective isolation between the common-mode rejection function and the differential-mode transmission characteristics. Overall, the above connection method, through optimized design of component topology, minimizes the adverse effects on differential mode passband insertion loss while ensuring high common-mode rejection ratio, enabling the filter to have excellent signal selectivity and anti-interference capability in complex electromagnetic environments.

[0034] In this embodiment, all capacitors 9 through 18 are surface-mount capacitors. The use of surface-mount capacitors ensures compatibility with standard surface mount technology in the filter's fabrication process. Surface-mount capacitors have standardized package dimensions and electrode lead-out methods, facilitating precise fixation to the surface of the dielectric substrate 23 via screen printing or dispensing, thereby reducing positioning errors and contact defects associated with manual assembly. The planar structure of surface-mount capacitors allows for integration with planar passive components such as spiral inductors and coupled inductors in the same process step, avoiding the complexity and alignment errors associated with assembling multiple types of components. Furthermore, the controllable thickness of surface-mount capacitors allows for reduction in the overall thickness of the filter, aligning with the trend towards miniaturization and thinner designs in communication systems. The standardized packaging of surface-mount capacitors also facilitates rapid replacement and parameter iteration during circuit debugging. Designers can flexibly adjust the filter's center frequency and bandwidth by selecting surface-mount capacitors with different capacitance values ​​without redesigning the substrate layout.

[0035] In this embodiment, all four spiral inductors (5 to 8) are planar spiral inductors. The dielectric substrate 23 is a high-resistivity silicon or glass substrate. The spiral inductors, coupling inductors, capacitors, and signal lines are all integrated on the same plane of the dielectric substrate 23. The planar spiral inductor is fabricated using photolithography and metal deposition processes. Its geometric parameters, including the number of coil turns, line width, line spacing, and spiral outer diameter, can be precisely controlled through mask design, thereby ensuring the consistency and repeatability of the inductance value and avoiding the parameter dispersion and geometric deformation problems introduced by manual winding of traditional wire-wound inductors. The selection of a high-resistivity silicon or glass substrate reduces the deterioration effect of substrate dielectric loss on the inductance quality factor. The resistivity characteristics of high-resistivity silicon suppress eddy current losses, and the low dielectric constant of the glass substrate weakens the coupling strength between the electric field and the substrate. Both provide a physical basis for the high-frequency, high-performance operation of the spiral inductor. The spiral inductor, coupled inductor, capacitor and signal lines are integrated on the same plane of the dielectric substrate 23, eliminating the interlayer vias and alignment processes required for multilayer structures, shortening the fabrication process and reducing the risk of electrical performance degradation caused by interlayer alignment deviations. At the same time, the single-layer layout makes it easier to accurately model and optimize the electromagnetic field distribution through full-wave simulation.

[0036] Regarding the technical solution of this embodiment, the overall structure of the filter is arranged in a vertically or horizontally symmetrical manner relative to the central axis.

[0037] Based on the above inductor and capacitor values, the transmission line impedance of the filter and the Q value of each spiral inductor are optimized using circuit simulation software to obtain a differential bandpass filter with high common-mode rejection. Electromagnetic simulation software is used to model and simulate this physical structure. By performing a full-wave simulation of the physical structure, a more accurate filter performance is obtained.

[0038] like Figure 3 The diagram shown is a detailed circuit diagram of the filter. In the circuit diagram, the capacitor... C 1 and inductor L The resonant frequency of 1 determines the center frequency of the filter, and the inductance... L 2 and capacitor C 2. Control the positions of the differential mode transmission zeros TZ1 and TZ2 respectively. Due to the characteristics of the differential and common mode circuits, the coupling inductors... L 3. It can control both the differential-mode transmission poles TZ1, TZ2, and TZ3, and the common-mode transmission zero TZ1. (The capacitor...) C 4. It also controls the common-mode transmission zero TZ1. Because the entire circuit has a symmetrical structure and fewer components, the required performance can be quickly debugged using circuit simulation software based on the above rules.

[0039] Figure 4 This is a diagram of the differential simulation filter response curve in this embodiment; Figure 5 The image shows the common-mode filtering response curve in this embodiment. Electromagnetic simulation results show that the center frequency of the high-order high common-mode rejection differential filter is 6.0 GHz. During differential-mode excitation, the return loss is 20 dB. S dd 11 The corresponding relative bandwidth reaches 25%, with a passband range covering 5.27 GHz to 6.77 GHz. 20-dB out-of-band rejection. S dd 21 Extends up to 15GHz. Under common-mode excitation, it achieves a 25-dB common-mode rejection ratio. S cc 21 The effective suppression range reaches 13.11 GHz. The physical size of this filter is only 0.00222λ. g ×0.00214λ g (0.111 mm × 0.107 mm), where λ g With a waveguide wavelength at a center frequency of 6.0 GHz, it possesses extremely miniaturized characteristics.

[0040] In summary, this invention constructs a differential transmission network with multiple resonant poles by coupling a specialized common-mode rejection structure between multiple sets of balanced resonant units. The cascaded design of the balanced resonant units enables the filter to form a steep passband edge and wide stopband rejection under differential-mode signal excitation, significantly enhancing its attenuation capability for out-of-band interference signals. Simultaneously, the common-mode rejection structure, through the cooperation of coupling inductors and ground vias, constructs a low-impedance energy dissipation path under common-mode signal excitation, effectively guiding common-mode interference to the ground metal layer, thereby achieving an extremely high common-mode rejection ratio without affecting differential-mode signal transmission. This topology, which deeply integrates high-order filtering and common-mode absorption, overcomes the shortcomings of traditional schemes where cascading leads to a decrease in common-mode rejection or requires additional suppression circuitry to worsen insertion loss. This allows the filter to maintain low-loss transmission while possessing a dual, powerful suppression capability against common-mode noise and spurious signals in complex electromagnetic environments.

[0041] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0042] For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances. When an element is referred to as being "assembled on," "mounted on," "fixed to," or "set on" another element, it may be directly on the other element or there may be an intermediate element present. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible embodiments.

[0043] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

[0044] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

Claims

1. A high-order high common-mode rejection differential filter, comprising a dielectric substrate (23), wherein the top plane of the dielectric substrate (23) is provided with an upper surface structure (25), and the bottom plane of the dielectric substrate (23) is connected to a ground metal layer (24), characterized in that, The upper surface structure (25) includes: A pair of balanced input ports and a pair of balanced output ports are symmetrically arranged. A balanced resonant unit is cascaded between each balanced input port and each balanced output port. The balanced resonant unit is used to generate resonance under differential mode signal excitation to construct a passband and realize selective signal transmission. The balanced resonant unit is set to at least two sets, and the two adjacent sets of balanced resonant units are coupled with a common-mode suppression structure, which is used to construct a signal absorption path under the excitation of the common-mode signal and guide the common-mode signal to the ground metal layer (24) to achieve high common-mode suppression.

2. A high-order high common-mode rejection differential filter according to claim 1, characterized in that: It also includes a first port (1), a second port (2), a third port (3) and a fourth port (4), wherein the balanced resonant unit is cascaded between the first port (1) and the second port (2), and between the third port (3) and the fourth port (4).

3. A high-order high common-mode rejection differential filter according to claim 2, characterized in that: The first port (1) and the third port (3) form a pair of balanced input ports or balanced output ports, and the second port (2) and the fourth port (4) form another pair of balanced output ports or balanced input ports.

4. A high-order high common-mode rejection differential filter according to claim 3, characterized in that: Each set of balanced resonant units includes four spiral inductors and four capacitors. The four spiral inductors are the first spiral inductor (5), the second spiral inductor (6), the third spiral inductor (7), and the fourth spiral inductor (8). The four capacitors are the first capacitor (9), the second capacitor (10), the third capacitor (11), and the fourth capacitor (12).

5. A high-order high common-mode rejection differential filter according to claim 4, characterized in that: The first capacitor (9) is connected between the first port (1), the third port (3) and the first spiral inductor (5). The second capacitor (10) is connected between the second port (2), the fourth port (4) and the fourth spiral inductor (8). The third capacitor (11) is connected between the first spiral inductor (5) and the fourth spiral inductor (8). The fourth capacitor (12) is located between the second spiral inductor (6) and the third spiral inductor (7). The second spiral inductor (6) and the third spiral inductor (7) are connected in series through the fourth capacitor (12). The three capacitors are connected in parallel with the third capacitor (11).

6. A high-order high common-mode rejection differential filter according to claim 4, characterized in that: The common-mode suppression structure includes six capacitors, two coupling inductors, and two grounding vias. The six capacitors include a fifth capacitor (13), a sixth capacitor (14), a seventh capacitor (15), an eighth capacitor (16), a ninth capacitor (17), and a tenth capacitor (18). The two coupling inductors are a first coupling inductor (19) and a second coupling inductor (20). The two grounding vias are a first grounding via (21) and a second grounding via (22).

7. A high-order high common-mode rejection differential filter according to claim 6, characterized in that: The first coupling inductor (19) is connected between the fifth capacitor (13), the sixth capacitor (14) and the first grounding via (21) and is connected in parallel with the seventh capacitor (15); The second coupling inductor (20) is connected between the eighth capacitor (16), the ninth capacitor (17) and the second grounding via (22) and is connected in parallel with the tenth capacitor (18).

8. A high-order high common-mode rejection differential filter according to claim 6, characterized in that: The first capacitor (9) to the tenth capacitor (18) are all surface mount capacitors.

9. A high-order high common-mode rejection differential filter according to claim 8, characterized in that: The first spiral inductor (5) to the fourth spiral inductor (8) are all planar spiral inductors. The dielectric substrate (23) is set as a high-resistivity silicon or glass substrate. The spiral inductors, coupling inductors, capacitors and signal lines are all integrated on the same plane of the dielectric substrate (23).

10. A high-order high common-mode rejection differential filter according to claim 1, characterized in that: The overall structure of the differential filter is symmetrical about the top and bottom or left and right relative to the central axis.