Semiconductor device analysis method and system, reliability prediction method and system

CN121835371BActive Publication Date: 2026-09-11BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202511911400.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-17
Publication Date
2026-09-11
Estimated Expiration
2045-12-17

AI Technical Summary

Technical Problem

由于传统的单一物理场模型忽略了电磁干扰这一关键因素,导致在对高功率器件的可靠性进行预测时,出现的偏差超过了30%,该偏差在实际的工程应用中可能会带来严重的后果,比如器件过早失效、系统稳定性降低等

Benefits of technology

或者,所述计算机程序被处理器执行时实现上述的半导体器件可靠性预测方法。

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention provides a semiconductor device analysis method and system, and a reliability prediction method and system, belonging to the field of semiconductor device analysis technology. The method and system construct current equations for semiconductor devices under the influence of electric, thermal, magnetic, and stress fields by introducing correction terms for magnetic and stress fields into traditional composite equations and carrier transport equations. Furthermore, it employs in-situ defect testing to detect the dynamic evolution of defect energy levels and defect concentrations in semiconductor devices, incorporating these changes into the correction terms of the current equations. Applying the corrected current equations to analysis tools allows for accurate analysis of defect locations under multi-physics conditions, reducing the deviation between analysis results and practical engineering applications. Simultaneously, the use of high-order finite element methods and fast multipole methods to solve the current equations during the analysis process improves the computational accuracy in irregular regions, enhances computational efficiency, and shortens the computational convergence time.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor device analysis technology, and more specifically to a semiconductor device analysis method, a semiconductor device analysis system, a semiconductor device reliability prediction method, and a semiconductor device reliability prediction system. Background Technology

[0002] In the design and manufacturing process of semiconductor devices, it is necessary to analyze and predict their reliability. Traditional methods for predicting semiconductor device reliability have the following drawbacks: Traditional methods, in constructing predictive models and conducting analyses, focus solely on the interaction between the two physical fields of electricity and heat, neglecting the significant impact of magnetic stress on carrier mobility. However, the presence of external electromagnetic interference (EMI) alters the crystal structure of semiconductor materials, thereby affecting the motion and migration capabilities of carriers. In the operating environment of high-power devices, EMI is an objective and unavoidable factor. Because traditional single-physics-field models ignore this crucial factor, the prediction of high-power device reliability suffers from a deviation exceeding 30%. This deviation can have serious consequences in practical engineering applications, such as premature device failure and reduced system stability.

[0003] Second, the reason for the reliability degradation of multi-physics field is the accumulation of internal defects in the device, which leads to changes in energy levels. Traditional testing methods usually use electrical characteristic testing to deduce internal energy levels, which cannot achieve coordinated testing between defect location and energy level. Therefore, it is impossible to determine the location of defects in complex devices, and thus cannot provide guidance for precise control of device reliability.

[0004] Third, due to the existence of irregular regions in the local structure of semiconductor devices, the distribution of physical field quantities is discontinuous. Traditional methods, such as fine meshing, low-order interpolation polynomials, and direct matrix decomposition, are used for analysis and solution, which involve large computational loads and difficulties in convergence. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a semiconductor device analysis method and system, and a reliability prediction method and system.

[0006] The first aspect of this invention provides a semiconductor device analysis method, comprising: Determine the current equation of a semiconductor device under a multiphysics field, wherein the multiphysics field includes at least three of the electric field, thermal field, magnetic field and stress field; In-situ defect testing of semiconductor devices was conducted to obtain the dynamic evolution of defect energy levels and defect concentrations. The current equation under the multiphysics field is modified according to the dynamic evolution law of the defect energy level and defect concentration to obtain the modified current equation. The modified current equation is applied to the analysis tool. During the analysis process, the modified current equation is solved using the high-order finite element method and the fast multipole method to obtain multiphysics analysis data of semiconductor devices.

[0007] In this embodiment of the invention, determining the current equation of the semiconductor device under multiple physics fields includes: The current equation under multi-physics fields is obtained by coupled iterative derivation of the Poisson equation, transport equation and continuity equation of semiconductor devices.

[0008] In this embodiment of the invention, the parameters of the Poisson equation include: the potential related to the electromagnetic field and the trap concentration related to the trap charge; The parameters of the transport equation include: temperature-dependent thermoelectric terms related to the thermal field; The parameters of the continuity equation include: the trap energy level associated with the trap charge and the lifetime derived from the trap concentration.

[0009] In this embodiment of the invention, the in-situ defect testing of the semiconductor device includes: By combining diamond NV color center testing and deep-level transient spectroscopy testing on semiconductor devices, the dynamic evolution of defect energy levels and defect concentrations of semiconductor devices can be obtained.

[0010] In this embodiment of the invention, the combined testing of a semiconductor device using diamond NV color center testing and deep-level transient spectroscopy includes: Deep-level transient spectroscopy tests are performed on semiconductor devices to obtain the defect energy levels and defect concentrations of the semiconductor devices; Diamond NV color center testing is performed on semiconductor devices to obtain their defect energy levels. The defect energy levels obtained from deep-level transient spectrum testing are corrected using the defect energy levels obtained from diamond NV color center testing.

[0011] In this embodiment of the invention, the diamond NV color center test of the semiconductor device includes: A micro heating electrode is integrated at the tip of a diamond NV probe. A bias electric field is applied to the micro heating electrode, and the defect carrier transition of the semiconductor device is excited by the thermal field. The electric field guides the carrier to move in a directional manner, thereby amplifying the local electromagnetic field disturbance caused by the defect.

[0012] In this embodiment of the invention, the diamond NV color center test of the semiconductor device includes: The ODMR response equation of the NV color center is modified to obtain the modified ODMR response equation of the NV color center; The ODMR frequency shift is determined based on the modified NV color center ODMR response equation, and a database mapping ODMR frequency shift to dual-field parameters is constructed. Based on the database of ODMR frequency shift and dual-field parameter mapping, the defect type and defect energy level are directly obtained by inversion through the frequency shift mode matching database.

[0013] In this embodiment of the invention, the modified NV color center ODMR response equation is: Δf=γeB defect +kTΔT+α δEz; Where Δf represents the frequency shift, γe is the gyromagnetic ratio of the electron, and B defect γeB represents the effective local magnetic field at the defect location. defect This indicates the energy or frequency change caused by the Zeeman effect experienced by an electron at a defect. k is Boltzmann constant, T is absolute temperature, and ΔT is the change in temperature; α is the NV color ECG sensitivity coefficient, δEz is the axial electric field change induced by defect charge transition, and α δEz represents the energy level shift caused by the electric field.

[0014] In this embodiment of the invention, the current equation under the multiphysics field is modified according to the dynamic evolution law of the defect energy level and defect concentration, including: By incorporating the dynamic evolution of defect energy levels and defect concentrations into the derivation of the current equation under the multiphysics field, a modified current equation is obtained, which can reflect the influence of defect changes over time on the current.

[0015] In this embodiment of the invention, the step of solving the modified current equation using the higher-order finite element method and the fast multipole method during the analysis process includes: The analysis tool determines whether each mesh cell generated based on the device structure is an irregular, abrupt region with drastic changes in electric, thermal, magnetic, or stress fields. When the mesh element is determined to be an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field, the irregular abrupt region is discretized using an element discretization method based on singular field smooth fitting, and the order of the basis functions of the higher-order finite element is determined. The modified current equation is then solved using the higher-order finite element method. The geometric topology of the semiconductor device is divided into multiple sub-regions for parallel computing. Units are assembled in each sub-region to form a local sparse matrix, and the fast multipole method is used to solve the local sparse matrix.

[0016] In this embodiment of the invention, the step of using a unit discretization method based on singular field smooth fitting to discretize the irregular abrupt change region includes: To address the local singularities in the irregularly abruptly altered regions, special units with embedded basis functions are constructed. These special units are then fitted to smooth units in the regular regions to ensure the consistency and accuracy of the discrete format. The basis functions include Dubiner basis functions or Legendre tensor product basis functions.

[0017] In this embodiment of the invention, the semiconductor device analysis method further includes: After solving the local sparse matrix using the fast multipole method, the solution vectors of each sub-region are merged to obtain the numerical result of the overall matrix of the analysis model.

[0018] In this embodiment of the invention, the calculation expression for solving the local sparse matrix using the fast multipole method is as follows: ; ; in, Represents the Green's function. As the source point, As the venue, The imaginary unit, For wave number, This represents the Euclidean distance between the source point and the field point; This represents the modified Green's function. It is a second-order tensor differential operator.

[0019] A second aspect of the present invention provides a method for predicting the reliability of semiconductor devices, comprising: The semiconductor device analysis method described above is used to test and analyze the semiconductor device, and multiphysics analysis data of the semiconductor device is obtained. The machine learning model is trained based on the multiphysics analysis data to obtain a multiphysics device performance prediction model. The reliability parameters of semiconductor devices are predicted using the multiphysics device performance prediction model.

[0020] In this embodiment of the invention, the semiconductor device analysis method described above is used to analyze and test semiconductor devices, including: Using analysis tools, multiple analysis and calculation tasks are generated in batches according to the user's required process structure deviation range and detection step size, and submitted to the computing cluster. The computing cluster distributes the multiple analysis and calculation tasks to different computing nodes, and each computing node performs analysis and calculation to generate analysis data.

[0021] In this embodiment of the invention, training a machine learning model based on the multiphysics analysis data includes: The multiphysics analysis data is divided into input and output items, and the input and output items are respectively imported into the machine learning model for model training. During model training, the accuracy metrics of the machine learning model are monitored in real time. When the accuracy metrics of the machine learning model tend to stabilize at a certain value as the number of iterations increases, model training is stopped.

[0022] In this embodiment of the invention, the semiconductor device reliability prediction method further includes: The multiphysics device performance prediction model is loaded into a multi-objective optimization framework as a component, and the multi-objective optimization algorithm is used to optimize the multiphysics device performance prediction model.

[0023] In this embodiment of the invention, a multi-objective optimization algorithm is used to optimize the performance prediction model of the multi-physics device, including: Use any one of the data points from the multiphysics analysis data as a baseline file and import it into the multiphysics device performance prediction model. By treating multiple factors affecting device performance as multiple objectives, a multi-objective optimization algorithm is used to find the Pareto solution set and Pareto front in the objective space, thereby achieving multi-objective optimization.

[0024] A third aspect of the present invention provides a semiconductor device analysis system, comprising: an in-situ defect testing module and a multiphysics analysis module; The in-situ defect testing module is used to perform in-situ defect testing on semiconductor devices to obtain the dynamic evolution law of defect energy level and defect concentration of semiconductor devices. The multiphysics analysis module is used to solve the current equation of semiconductor devices under multiphysics fields using the high-order finite element method and the fast multipole method, so as to obtain the multiphysics analysis data of semiconductor devices. The multiphysics fields include at least three of the electric field, thermal field, magnetic field and stress field. The current equation is obtained after being corrected according to the dynamic evolution law of defect energy level and defect concentration obtained from the in-situ defect test.

[0025] In this embodiment of the invention, the current equation is derived by coupled iterative derivation based on the Poisson equation, transport equation and continuity equation of semiconductor devices under multi-physics fields.

[0026] In this embodiment of the invention, the parameters of the Poisson equation include: the potential related to the electromagnetic field and the trap concentration related to the trap charge; The parameters of the transport equation include: temperature-dependent thermoelectric terms related to the thermal field; The parameters of the continuity equation include: the trap energy level associated with the trap charge and the lifetime derived from the trap concentration.

[0027] In this embodiment of the invention, the in-situ defect testing module performs a combined test of diamond NV color center testing and deep-level transient spectrum testing on the semiconductor device to obtain the dynamic evolution law of the defect energy level and defect concentration of the semiconductor device.

[0028] In this embodiment of the invention, the in-situ defect testing module performs joint testing of semiconductor devices using diamond NV color center testing and deep-level transient spectroscopy, including: Deep-level transient spectroscopy tests are performed on semiconductor devices to obtain the defect energy levels and defect concentrations of the semiconductor devices; Diamond NV color center testing is performed on semiconductor devices to obtain their defect energy levels. The defect energy levels obtained from deep-level transient spectrum testing are corrected using the defect energy levels obtained from diamond NV color center testing.

[0029] In this embodiment of the invention, the diamond NV color center test of the semiconductor device includes: The ODMR response equation of the NV color center is modified to obtain the modified ODMR response equation of the NV color center; The ODMR frequency shift is determined based on the modified NV color center ODMR response equation, and a database mapping ODMR frequency shift modes to dual-field parameters is constructed. Based on the database of ODMR frequency shift modes and dual-field parameter mappings, the defect type and defect energy level are directly obtained by frequency shift mode matching database.

[0030] In this embodiment of the invention, the multiphysics analysis module uses the high-order finite element method and the fast multipole method to solve the current equation of the semiconductor device under multiphysics, including: Determine whether each mesh cell generated based on the device structure is an irregular, abrupt region with drastic changes in electric field, thermal field, magnetic field, or stress field; When the mesh element is determined to be an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field, the irregular abrupt region is discretized using an element discretization method based on singular field smooth fitting, and the order of the basis functions of the higher-order finite element is determined. The current equation is then solved using the higher-order finite element method. The geometric topology of the semiconductor device is divided into multiple sub-regions for parallel computing. Units are assembled in each sub-region to form a local sparse matrix, and the fast multipole method is used to solve the local sparse matrix.

[0031] In this embodiment of the invention, the step of using a unit discretization method based on singular field smooth fitting to discretize the irregular abrupt change region includes: To address the local singularities in the irregularly abruptly altered regions, special units with embedded basis functions are constructed. These special units are then fitted to smooth units in the regular regions to ensure the consistency and accuracy of the discrete format. The basis functions include Dubiner basis functions or Legendre tensor product basis functions.

[0032] In this embodiment of the invention, the multiphysics analysis module solves the local sparse matrix using the fast multipole method, and then merges the solution vectors of each sub-region to obtain the numerical result of the overall matrix of the analysis model.

[0033] A fourth aspect of the present invention provides a semiconductor device reliability prediction system, comprising: the aforementioned semiconductor device analysis system and a device performance prediction module; The semiconductor device analysis system is used to test and analyze semiconductor devices to obtain multiphysics analysis data of semiconductor devices; The device performance prediction module is used to train the machine learning model based on the multiphysics analysis data to obtain a multiphysics device performance prediction model, and to use the multiphysics device performance prediction model to predict the reliability parameters of semiconductor devices.

[0034] In this embodiment of the invention, the semiconductor device analysis system is specifically used to: generate multiple analysis and calculation tasks in batches and submit them to the computing cluster according to the process structure deviation range and probe step size required by the user; distribute the multiple analysis and calculation tasks to different computing nodes through the computing cluster; and generate analysis data after each computing node performs analysis and calculation.

[0035] In this embodiment of the invention, the semiconductor device reliability prediction system further includes: a model optimization module; The model optimization module is used to optimize the multiphysics device performance prediction model using a multi-objective optimization algorithm, including: taking any set of data from the multiphysics analysis data as a baseline file and importing it into the multiphysics device performance prediction model; taking multiple factors affecting device performance as multiple objectives, and finding the Pareto solution set and Pareto front of the objective space through the multi-objective optimization algorithm to achieve multi-objective optimization.

[0036] A fifth aspect of the present invention provides a computer device, comprising: Memory, which stores computer programs; A processor for executing the computer program to implement the above-described semiconductor device analysis method; Alternatively, the processor may be used to execute the computer program to implement the semiconductor device reliability prediction method described above.

[0037] A sixth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the above-described semiconductor device analysis method. Alternatively, the computer program may be executed by a processor to implement the semiconductor device reliability prediction method described above.

[0038] A seventh aspect of the present invention provides a computer program product, comprising a computer program that, when executed by a processor, implements the above-described semiconductor device analysis method; or, when executed by a processor, the computer program implements the above-described semiconductor device reliability prediction method.

[0039] The above technical solution constructs current equations for semiconductor devices under the influence of electric, thermal, magnetic, and stress fields by introducing correction terms for magnetic and stress fields into traditional composite equations and carrier transport equations. It also employs in-situ defect testing to detect the dynamic evolution of defect energy levels and concentrations in semiconductor devices, incorporating this information into the correction terms of the current equations. Applying the corrected current equations to analysis tools allows for accurate analysis of defect locations under multi-physics conditions, reducing the deviation between analysis results and practical engineering applications. Furthermore, the use of high-order finite element methods and fast multipole methods to solve the current equations during the analysis process improves the computational accuracy in irregular regions, enhances computational efficiency, and shortens the computational convergence time.

[0040] Other features and advantages of the technical solution of the present invention will be described in detail in the following detailed embodiments section. Attached Figure Description

[0041] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings: Figure 1 This is a flowchart of the semiconductor device analysis method provided in the embodiments of the present invention; Figure 2 This is a flowchart of solving the modified current equation in the semiconductor device analysis method provided in this embodiment of the invention; Figure 3 This is a flowchart of the semiconductor device reliability prediction method provided in the embodiments of the present invention; Figure 4 This is a block diagram of the semiconductor device analysis system provided in an embodiment of the present invention; Figure 5This is a block diagram of the semiconductor device reliability prediction system provided in an embodiment of the present invention. Detailed Implementation

[0042] To make the technical solutions and advantages of the embodiments of the present invention clearer, the exemplary embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0043] As described in the background section, existing methods for predicting the reliability of semiconductor devices have the following drawbacks: they focus only on the interaction between the two physical fields of electricity and heat, neglecting the important influence of the magnetic stress field on the carrier mobility; the testing of internal defects in devices is limited, making it impossible to achieve joint analysis of defect location and defect energy level, thus making it impossible to determine the location of defects in complex devices; and the simulation analysis and solution methods for irregular structures are complex, and the calculation process is difficult to converge.

[0044] To address the aforementioned shortcomings, this invention provides a semiconductor device analysis method and system, as well as a process parameter prediction method and system. By introducing correction terms for magnetic and stress fields into the traditional composite equation and carrier transport equation, a current equation for a semiconductor device under the influence of electric, thermal, magnetic, and stress fields is constructed. An in-situ defect testing method is used to detect the dynamic evolution of defect energy levels and defect concentrations in the semiconductor device, incorporating this into the correction terms of the current equation. Applying the corrected current equation to analysis tools (such as simulation tools) allows for accurate analysis of defect locations under multiphysics fields, reducing the deviation between simulation results and actual engineering applications. Simultaneously, the use of high-order finite element methods and fast multipole methods to solve the current equation during simulation analysis improves the computational accuracy in irregular regions, increases computational efficiency, and shortens the computational convergence time.

[0045] Figure 1 This is a flowchart of a semiconductor device analysis method provided in an embodiment of the present invention. Figure 1 As shown, the semiconductor device analysis method provided in this embodiment includes the following steps: S100, determine the current equation of semiconductor devices under multi-physics fields; S200 is used to perform in-situ defect testing on semiconductor devices to obtain the dynamic evolution law of defect energy level and defect concentration of semiconductor devices. S300, based on the dynamic evolution of defect energy level and defect concentration, the current equation under multiphysics field is modified to obtain the modified current equation; S400 applies the modified current equation to the analysis tool. During the analysis process, the modified current equation is solved using the high-order finite element method and the fast multipole method to obtain multiphysics analysis data of semiconductor devices.

[0046] In step S100 above, the current equation under multi-physics fields is obtained by coupled iterative derivation based on the Poisson equation, transport equation, and continuity equation of the semiconductor device. The multi-physics fields include at least three of the following: electric field, thermal field, magnetic field, and stress field.

[0047] The Poisson equation provided in this embodiment, compared to the traditional Poisson equation, adds the potential related to the electromagnetic field and the trap concentration related to the trap charge. Its expression is as follows: ; in, Where is the dielectric constant. For electric potential, For elementary charge, Net doping concentration, Hole concentration, For electron concentration, The concentration of the trap; For operators, Represents divergence operations; electric potential and trap concentration This is an added parameter: trap concentration. Corresponding defect concentration.

[0048] The above Poisson equation adds a trap charge related term and an electromagnetic multiphysics modified potential related term to the existing Poisson equation to characterize the potential and electric field under multiphysics.

[0049] The transport equation provided in this embodiment, compared to the traditional transport equation, adds a temperature-dependent thermoelectric term related to the thermal field, and its expression is as follows: ; ; in, and These are electron current density and hole current density, respectively. For elementary charge, Hole concentration, For electron concentration, For electron mobility, The migration rate of holes. and These are the electron diffusion coefficient and the hole diffusion coefficient, respectively. and These are the carrier gradients of electrons and holes, respectively. and These are thermoelectric terms related to electron temperature and thermoelectric terms related to hole temperature, respectively. It is the thermoelectric power coefficient; The heat conduction gradient can be obtained from the heat conduction equation of the thermal field: Solving for the heat conduction gradient .

[0050] The above transport equation adds thermal field and temperature-dependent thermoelectric terms to the existing transport equation. The temperature gradient is calibrated by comparing the results of simulation analysis with the curve changes caused by the self-heating effect in actual electrical test data, and is used to characterize the current density under multi-physics fields.

[0051] The continuity equation provided in this embodiment, compared to the traditional continuity equation, adds a trap energy level related to the trap charge and a lifetime derived based on the trap concentration. Its expression is as follows: ; ; ; in, For elementary charge, Represents the trap-related equation, Indicates the trap energy level, and These are electron current density and hole current density, respectively. and These represent the electron carrier lifetime and the hole carrier lifetime, respectively. The carrier recombination rate, Carrier generation rate, carrier recombination rate and carrier generation rate Each is described by its corresponding physical model. The net recombination rate of charge carriers.

[0052] Trap energy level and trap concentration The defect spatial distribution information was obtained through deep level transient spectrum testing (DLTS) and diamond NV color center testing, providing experimental verification information for the defect concentration obtained from simulation analysis after device mesh generation; Electron carrier lifetime and hole carrier lifetime and It can be derived from the trap concentration equation.

[0053] This invention establishes a new reliability equation system—a reliability equation system for devices under multi-physics conditions—through coupled iterative derivation of the Poisson equation, transport equation, and continuity equation. The current equation of this system describes the relationship between defect energy levels and defect concentration and current. Based on this system, the relationships between current and temperature, time, and electromagnetic fields can be obtained: ); where I represents current, T represents temperature, t represents time, and Em represents electromagnetic intensity.

[0054] The evolution relationship of defect concentration over time (dynamic evolution law) can be obtained through experiments, namely: , Furthermore, based on the defect energy level relationship obtained from the test, the carrier concentration relationship over time was derived, namely: ; ; By incorporating the dynamic evolution of defect energy levels and defect concentrations (the relationship of their evolution over time) into the derivation of the current equation under multiphysics, the current equation is corrected. The corrected current equation can reflect the influence of defects on the current over time.

[0055] In step S200 above, a combined test of diamond NV center (NV) measurement and deep-level transient spectroscopy (DLTS) is performed on the semiconductor device to obtain the defect location, as well as the dynamic evolution of defect energy levels and defect concentration. Specifically, this includes: performing DLTS on the semiconductor device to obtain the defect energy levels and defect concentration; simultaneously, performing NV center (NV) measurement on the semiconductor device to obtain the spatial distribution information and defect energy levels of the defects; and then, using the defect energy levels obtained from the NV center (NV) measurement to correct the defect energy levels obtained from the DLTS.

[0056] By combining diamond NV color center testing and deep level transient spectroscopy (DLTS) testing, the degradation law of defect energy level and defect concentration over time can be obtained. This law is then incorporated into the Poisson equation, transport equation and continuity equation for joint coupling solution to obtain the device current degradation curve.

[0057] In a specific embodiment, the diamond NV color center test is performed as follows: The first step involves integrating a miniature heating electrode (heating range 300-600K) into the tip of a diamond NV probe during the testing of semiconductor devices. A bias electric field (0-10V / μm) is applied to the miniature heating electrode to excite defect carrier transitions in the semiconductor device through the thermal field. The electric field then guides the carriers to move in a directional manner, thereby amplifying the local electromagnetic field disturbance caused by the defects.

[0058] The second step is to modify the NV center ODMR (optically detected magnetic resonance) response equation. The modified NV center ODMR response equation is as follows: Δf=γeB defect +kTΔT+α δEz; Where Δf represents the frequency shift, γe is the gyromagnetic ratio of the electron, representing the strength of the interaction between the electron spin and the applied magnetic field; B defect The effective local magnetic field at the defect location may originate from the magnetic environment surrounding the lattice defect or local magnetic field disturbances; γeB defect This indicates the energy or frequency change caused by the Zeeman effect experienced by an electron at a defect. k is Boltzmann constant, T is absolute temperature, ΔT is the temperature change (or temperature difference in space / time), kTΔT represents the effect of thermal fluctuations or temperature gradient on the system, reflecting thermal frequency drift; α is the NV color ECG sensitivity coefficient, δEz is the axial electric field change induced by defect charge transition, and α δEz represents the energy level shift caused by the electric field.

[0059] The third step is to determine the ODMR frequency shift based on the modified NV color center ODMR response equation, and construct a database mapping ODMR frequency shift to two-field parameters, as shown in the table below:

[0060] Based on the database of ODMR frequency shift and dual-field parameter mapping, the defect type and energy level parameters are directly obtained by frequency shift mode matching database. The defect types include at least one of the following: vacancy defects, dislocation defects, and impurity complexes.

[0061] In step S300 above, the current equation under multiphysics is modified based on the dynamic evolution of defect energy levels and defect concentration. Specifically, the dynamic evolution of defect energy levels and defect concentration is incorporated into the derivation process of the current equation under multiphysics, thereby modifying the current equation so that it reflects the influence of defects on current over time. In practice, the degradation patterns of defect energy levels and defect concentration over time obtained from diamond NV color center testing and deep level transient spectroscopy (DLTS) are incorporated into the Poisson equation, transport equation, and continuity equation for joint coupling and solution, resulting in the device current degradation curve.

[0062] In step S400 above, such as Figure 2 As shown, the modified current equation is solved using the high-order finite element method and the fast multipole method in the simulation analysis tool, specifically including the following sub-steps: S410, determine whether each mesh cell generated by the simulation analysis tool based on the device structure is an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field; S420: When the mesh element is determined to be an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field, the element discretization method based on singular field smooth fitting is used to discretize the irregular abrupt region to make its derivative smooth and computable; and the order of the basis functions of the higher-order finite element is determined, and the modified current equation is solved using the higher-order finite element method. S430 divides the geometric topology of a semiconductor device into multiple sub-regions for parallel computing. Within each sub-region, cells are assembled to form a local sparse matrix, and the fast multipole method is used to solve the local sparse matrix.

[0063] In step S420 above, the irregular mutation region is processed by a discrete format. Specifically, for the local singularity characteristics of the irregular mutation region, a special unit with embedded basis functions is constructed. The special unit with embedded basis functions is fitted with the smooth unit of the regular region to ensure the consistency and accuracy of the discrete format.

[0064] The basis functions for smooth fitting of singular fields are either Dubiner basis functions or Legendre tensor product basis functions. The specific calculation process includes: Calculate the two-dimensional Dubiner basis (Jacobi form): , ; Where i and j represent the interpolation order, and Let r and s represent the i-th and j-th order Jacobi polynomials, respectively, and r and s represent two-dimensional isoparametric coordinates; Calculate the Legendre basis for the two-dimensional tensor product: Where i and j represent the interpolation order, and Let i and j be Legendre polynomials, respectively. and Represents two-dimensional isoparametric coordinates; Calculate the three-dimensional Dubiner extended basis: ; in, i , j and k They represent the interpolation order, and They represent i Rank, j order andk A Jacobi polynomial of order 1, where r, s, and t represent three-dimensional isoparametric coordinates; Calculate the Legendre basis for the three-dimensional tensor product: ; in, i , j and k They represent the interpolation order, and They represent i Rank, j order and k The order Legendre polynomial, where r, s, and t represent three-dimensional isoparametric coordinates.

[0065] In step S430 above, based on the overall mesh of the initial simulation model, the geometric topology of the semiconductor device is divided into multiple sub-regions for parallel computation according to the geometric shape distribution. Within each sub-region, cells are assembled to form a local sparse matrix. The fast multipole method is used to accelerate the solution of the local sparse matrix. After solving the local sparse matrix, the solution vectors of each sub-region are finally merged (restoring the overall matrix) to obtain the numerical result of the overall matrix of the simulation model.

[0066] The calculation expression for solving the local sparse matrix using the fast multipole method is as follows: ; ; in, Represents the Green's function. As the source point, As the venue, The imaginary unit, For wave number, This represents the Euclidean distance between the source point and the field point; This represents the modified Green's function. It is a second-order tensor differential operator.

[0067] Traditional low-order polynomial finite element methods cannot effectively suppress numerical oscillations caused by drastic abrupt changes in multiphysics fields in irregular regions. This necessitates mechanical mesh refinement and shortened computational step sizes, leading to a significant increase in computation time and decreased stability. This embodiment employs a singular field smoothing fitting function to ensure the computability of abrupt changes in the physical fields and their derivatives in irregular regions. Simultaneously, it performs domain decomposition on the simulation model and uses the fast multipole method for parallel computation, accelerating long-range electromagnetic interactions, improving computational efficiency, and shortening computation time.

[0068] In practical applications, the TCAD simulation platform can be used for simulation analysis. The simulation process in TCAD is as follows: First, it automatically identifies whether the mesh cells are located in irregular regions where physical quantities such as electric field, carrier concentration, or temperature change abruptly. For such regions, a high-order discontinuous Galerkin-type discretization scheme based on a singular field smoothing fitting function is adopted to ensure numerical stability and local accuracy. Then, based on the topological characteristics of the complex geometry of the device, the overall structure is divided into sub-regions that support parallel computing, and cell assembly is completed within each sub-region to form a local sparse matrix. For efficient solution of the local matrix, the engine combines the fast multipole method and domain decomposition strategy to accelerate the calculation of long-range interactions. At the global level, the numerical result of the overall matrix is ​​obtained by restoring and merging the solution vectors of each sub-region, and the convergence is dynamically judged and controlled in each iteration cycle. This approach improves the accuracy and robustness of the solver in the simulation of complex device field distributions and significantly enhances the computational efficiency in a large-scale parallel environment, providing solid numerical support for subsequent device design and process optimization.

[0069] This invention provides a method for predicting the reliability of semiconductor devices, such as... Figure 3 As shown, the method includes the following steps: S500: The semiconductor device is tested and analyzed using the above-mentioned semiconductor device analysis method to obtain multi-physics analysis data of the semiconductor device. S600 trains a machine learning model based on multiphysics analysis data to obtain a multiphysics device performance prediction model. S700 uses a multiphysics device performance prediction model to predict the reliability parameters of semiconductor devices.

[0070] In step S500 above, the simulation analysis and testing of the semiconductor device specifically includes: using simulation analysis tools, based on the user-required process structure deviation range and probe step size, generating multiple analysis calculation tasks (such as simulation script files) in batches and submitting them to the computing cluster; the computing cluster then distributes these multiple analysis calculation tasks to different computing nodes; each computing node performs the analysis calculations and generates analysis data, which is then saved to a shared memory. The analysis data includes the electrical parameters of the semiconductor device, such as on-resistance Rdson, drain current Ids, and breakdown voltage BV.

[0071] In step S600 above, training the machine learning model based on multiphysics analysis data specifically includes: dividing the multiphysics analysis data into input and output terms, and importing the input and output terms into the machine learning model for training; during model training, the accuracy index of the machine learning model is observed in real time; when the accuracy index of the machine learning model tends to stabilize at a certain value as the number of iterations increases, it indicates that the machine learning model has basically completed training, and model training is stopped at this point, thus obtaining the trained multiphysics device performance prediction model. The machine learning model can employ at least one of convolutional neural networks (CNN), long short-term memory networks (LSTM), or support vector machines (SVM).

[0072] Among them, the accuracy metrics of machine learning models can be expressed as mean absolute error (MAE) and coefficient of determination (R²). 2 Mean Absolute Error (MAE) measures the average absolute difference between model predictions and actual values, and directly reflects the average degree of prediction deviation. Coefficient of Determination (R²) 2 To measure the model's ability to explain the variation in the target variable, the model's fit advantage is demonstrated by comparing it with a baseline model that "only predicts the mean of the target variable".

[0073] The multiphysics device performance prediction model supports export in Verilog-A format and can be used for circuit-level simulation. In subsequent specific application scenarios, the trained multiphysics device performance prediction model is exported in Verilog-A format and imported into Cadance's Virtuoso for building gate-level circuits and subsequent circuit-level SPICE simulations.

[0074] Before step S700, i.e., before using the multiphysics device performance prediction model to predict the reliability of semiconductor devices, or during step S700, i.e., during the process of using the multiphysics device performance prediction model to predict the reliability of semiconductor devices, a multi-objective optimization algorithm can be used to optimize the multiphysics device performance prediction model. The multi-objective optimization algorithm can employ NSGA-II, MOEA / D, or Pareto front search algorithms. For example, the multiphysics device performance prediction model can be used as a component and loaded into a multi-objective optimization framework for model optimization. Specifically, any data point from the multiphysics analysis data is used as a baseline file and imported into the multiphysics device performance prediction model. Multiple factors affecting device performance are treated as multiple objectives, and the Pareto solution set and Pareto front in the objective space are found through the multi-objective optimization algorithm to achieve multi-objective optimization. These multiple factors affecting device performance (reliability parameters) include: on-resistance Rdson, drain current Ids, and breakdown voltage BV, etc.

[0075] This invention provides a semiconductor device analysis system, such as... Figure 4 As shown, the system includes an in-situ defect testing module and a multiphysics analysis module. The in-situ defect testing module is used to perform in-situ defect testing on semiconductor devices to obtain the dynamic evolution of defect energy levels and defect concentrations. The multiphysics analysis module is used to solve the current equations of the semiconductor device under multiphysics fields using high-order finite element methods and fast multipole methods to obtain multiphysics analysis data of the semiconductor device. The multiphysics fields include at least three of the following: electric field, thermal field, magnetic field, and stress field. The current equations are obtained after correction based on the dynamic evolution of defect energy levels and defect concentrations obtained from the in-situ defect testing.

[0076] In this embodiment, the current equation is derived through coupled iterative derivation of the Poisson equation, transport equation, and continuity equation for semiconductor devices under multiphysics conditions. The parameters of the Poisson equation include: the potential related to the electromagnetic field and the trap concentration related to the trap charge. The parameters of the transport equation include: the temperature-dependent thermoelectric term related to the thermal field. The parameters of the continuity equation include: the trap energy level related to the trap charge and the lifetime derived based on the trap concentration.

[0077] In this embodiment, the in-situ defect testing module performs joint testing of the semiconductor device using diamond NV center (NV) color center (NVC) testing and deep-level transient spectroscopy (DLS) testing to obtain the dynamic evolution of the defect energy levels and defect concentrations of the semiconductor device. Specifically, this includes: performing DLS testing on the semiconductor device to obtain the defect energy levels and defect concentrations; simultaneously, performing NVC testing on the semiconductor device to obtain the spatial distribution information and defect energy levels of the defects; and then, using the defect energy levels obtained from the NVC testing to correct the defect energy levels obtained from the DLS testing.

[0078] By combining diamond NV color center testing and deep level transient spectrum testing (DLTS), the degradation law of defect energy level and defect concentration over time can be obtained. This law is then introduced into the Poisson equation, transport equation and continuity equation for joint coupling solution to obtain the device current degradation curve.

[0079] In a specific embodiment, the diamond NV color center test is performed as follows: The first step involves integrating a miniature heating electrode (heating range 300-600K) into the tip of a diamond NV probe during the testing of semiconductor devices. A bias electric field (0-10V / μm) is applied to the miniature heating electrode to excite defect carrier transitions in the semiconductor device through the thermal field. The electric field then guides the carriers to move in a directional manner, thereby amplifying the local electromagnetic field disturbance caused by the defects.

[0080] The second step is to modify the NV center ODMR (optically detected magnetic resonance) response equation. The modified NV center ODMR response equation is as follows: Δf=γeB defect +kTΔT+α δEz; Where Δf represents the frequency shift, γe is the gyromagnetic ratio of the electron, representing the strength of the interaction between the electron spin and the applied magnetic field; B defect The effective local magnetic field at the defect location may originate from the magnetic environment surrounding the lattice defect or local magnetic field disturbances; γeB defect This indicates the energy or frequency change caused by the Zeeman effect experienced by an electron at a defect. k is Boltzmann constant, T is absolute temperature, ΔT is the temperature change (or temperature difference in space / time), kTΔT represents the effect of thermal fluctuations or temperature gradient on the system, reflecting thermal frequency drift; α is the NV color ECG sensitivity coefficient, δEz is the axial electric field change induced by defect charge transition, and α δEz represents the energy level shift caused by the electric field.

[0081] The third step involves determining the ODMR frequency shift based on the modified NV center ODMR response equation and constructing a database mapping the ODMR frequency shift to the two-field parameters. Based on this database, the defect type and energy level parameters are directly obtained through frequency shift mode matching. The defect types include at least one of the following: vacancy defects, dislocation defects, and impurity complexes.

[0082] The dynamic evolution of defect energy levels and concentrations is incorporated into the derivation of the current equation under multiphysics, thereby modifying the current equation to reflect the influence of defects on the current over time. In practice, the degradation patterns of defect energy levels and concentrations over time obtained from diamond NV center testing and deep level transient spectroscopy (DLTS) are coupled and solved in conjunction with the Poisson equation, transport equation, and continuity equation to obtain the device current degradation curve.

[0083] In this embodiment, the multiphysics analysis module uses the high-order finite element method and the fast multipole method to solve the current equation of the semiconductor device under multiphysics conditions, specifically including the following sub-steps: S410, determine whether each mesh cell generated by the simulation analysis tool based on the device structure is an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field; S420, when the mesh element is determined to be an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field, the irregular abrupt region is discretized using an element discretization method based on singular field smooth fitting, so that its derivative is smooth and computable; and the order of the basis functions of the higher-order finite element is determined, and the modified current equation is solved using the higher-order finite element method. S430 divides the geometric topology of a semiconductor device into multiple sub-regions for parallel computing. Within each sub-region, cells are assembled to form a local sparse matrix, and the fast multipole method is used to solve the local sparse matrix.

[0084] In step S420 above, the irregular abrupt change region is processed using a discrete format. Specifically, for the local singular characteristics of the irregular abrupt change region, special units with embedded basis functions are constructed. These special units are then fitted with smooth units in the regular region to ensure the consistency and accuracy of the discrete format. The basis functions used for smooth fitting of the singular field are Dubiner basis functions or Legendre tensor product basis functions.

[0085] In step S430 above, based on the overall mesh of the initial analysis model, the geometric topology of the semiconductor device is divided into multiple sub-regions for parallel computation according to the geometric shape distribution. Within each sub-region, cells are assembled to form a local sparse matrix. The fast multipole method is used to accelerate the solution of the local sparse matrix. After solving the local sparse matrix, the solution vectors of each sub-region are finally merged (restoring the overall matrix) to obtain the numerical result of the overall matrix of the analysis model.

[0086] Traditional low-order polynomial finite element methods cannot effectively suppress numerical oscillations caused by drastic abrupt changes in multiphysics fields in irregular regions. This necessitates mechanical mesh refinement and shortened computational step sizes, leading to a significant increase in computation time and decreased stability. This embodiment employs a singular field smoothing fitting function to ensure the computability of abrupt changes in the physical fields and their derivatives in irregular regions. Simultaneously, it performs domain decomposition on the analysis model and uses the fast multipole method for parallel computation, accelerating long-range electromagnetic interactions, improving computational efficiency, and shortening computation time.

[0087] This invention provides a semiconductor device reliability prediction system, such as... Figure 5As shown, the system includes a semiconductor device analysis system and a device performance prediction module. The semiconductor device analysis system is the same as the one provided in the above embodiment. The semiconductor device analysis system is used to test and analyze semiconductor devices to obtain multiphysics analysis data of the semiconductor devices. The device performance prediction module is used to train a machine learning model based on the multiphysics analysis data to obtain a multiphysics device performance prediction model, and then uses the multiphysics device performance prediction model to predict the reliability parameters of the semiconductor devices.

[0088] In specific application scenarios, the semiconductor device analysis system can generate multiple analysis and calculation tasks in batches according to the user-required process structure deviation range and probe step size, and submit them to the computing cluster. The computing cluster then distributes these tasks to different computing nodes, where each node performs the analysis and generates analysis data. This analysis data includes electrical parameters of the semiconductor device, such as on-resistance Rdson, drain current Ids, and breakdown voltage BV.

[0089] The device performance prediction module trains a machine learning model based on multiphysics analysis data. Specifically, this includes: dividing the multiphysics analysis data into input and output terms, and importing the input and output terms into the machine learning model for training; during model training, the accuracy index of the machine learning model is observed in real time; when the accuracy index of the machine learning model tends to stabilize at a certain value with the increase of iterations, it indicates that the machine learning model has basically completed training, at which point model training is stopped, thus obtaining the trained multiphysics device performance prediction model. The machine learning model can employ at least one of convolutional neural networks (CNN), long short-term memory networks (LSTM), or support vector machines (SVM).

[0090] In an optional embodiment, the above-described semiconductor device reliability prediction system further includes a model optimization module. The model optimization module is used to optimize the multiphysics device performance prediction model using a multi-objective optimization algorithm. The multi-objective optimization algorithm can employ NSGA-II, MOEA / D, or Pareto front search algorithms. The multiphysics device performance prediction model can be loaded as a component into the multi-objective optimization framework for model optimization. Specifically, any set of data from the multiphysics analysis data is used as a baseline file and imported into the multiphysics device performance prediction model; multiple factors affecting device performance are treated as multiple objectives, and the Pareto solution set and Pareto front in the objective space are found through the multi-objective optimization algorithm to achieve multi-objective optimization.

[0091] The present invention also provides a computer device, including: a memory and a processor, the memory storing a computer program, the processor executing the computer program to implement the above-described semiconductor device analysis method, or the processor executing the computer program to implement the above-described semiconductor device reliability prediction method.

[0092] The present invention also provides a machine-readable storage medium storing computer program instructions thereon, wherein the computer program instructions, when executed by a processor, implement the above-described semiconductor device analysis method, or, when executed by a processor, the computer program instructions implement the above-described semiconductor device reliability prediction method.

[0093] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described semiconductor device analysis method; or, when executed by a processor, the computer program implements the above-described semiconductor device reliability prediction method.

[0094] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of the present invention can be implemented using various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0095] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0096] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0097] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0098] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention. Clearly, those skilled in the art can make various alterations and modifications to the invention without departing from its spirit and scope. Thus, if these modifications and modifications of the invention fall within the scope of the claims and their equivalents, the invention is also intended to include these modifications and modifications.

Claims

1. A semiconductor device analysis method, characterized in that, include: Determine the current equation of a semiconductor device under a multiphysics field, wherein the multiphysics field includes at least three of the electric field, thermal field, magnetic field and stress field; In-situ defect testing of semiconductor devices includes: performing deep-level transient spectroscopy testing on semiconductor devices to obtain the defect energy levels and defect concentrations; performing diamond NV color center testing on semiconductor devices to obtain the defect energy levels; and using the defect energy levels obtained from the diamond NV color center testing to correct the defect energy levels obtained from the deep-level transient spectroscopy testing to obtain the dynamic evolution law of the defect energy levels and defect concentrations of semiconductor devices. The current equation under the multiphysics field is modified according to the dynamic evolution law of the defect energy level and defect concentration, including: incorporating the dynamic evolution law of the defect energy level and defect concentration into the derivation process of the current equation under the multiphysics field to obtain the modified current equation; the modified current equation can reflect the influence of the defect on the current over time. The modified current equation is applied to the analysis tool. During the analysis process, the modified current equation is solved using the high-order finite element method and the fast multipole method to obtain multiphysics analysis data of semiconductor devices.

2. The semiconductor device analysis method according to claim 1, characterized in that, The determination of the current equation of the semiconductor device under multiphysics fields includes: The current equation under multi-physics fields is obtained by coupled iterative derivation of the Poisson equation, transport equation and continuity equation of semiconductor devices.

3. The semiconductor device analysis method according to claim 2, characterized in that, The parameters of the Poisson equation include: the electric potential related to the electromagnetic field and the trap concentration related to the trap charge; The parameters of the transport equation include: temperature-dependent thermoelectric terms related to the thermal field; The parameters of the continuity equation include: the trap energy level associated with the trap charge and the lifetime derived from the trap concentration.

4. The semiconductor device analysis method according to claim 1, characterized in that, The diamond NV color center test of the semiconductor device includes: A micro heating electrode is integrated at the tip of a diamond NV probe. A bias electric field is applied to the micro heating electrode, and the defect carrier transition of the semiconductor device is excited by the thermal field. The electric field guides the carrier to move in a directional manner, thereby amplifying the local electromagnetic field disturbance caused by the defect.

5. The semiconductor device analysis method according to claim 1, characterized in that, The diamond NV color center test of the semiconductor device includes: The ODMR response equation of the NV color center is modified to obtain the modified ODMR response equation of the NV color center; The ODMR frequency shift is determined based on the modified NV color center ODMR response equation, and a database mapping ODMR frequency shift to dual-field parameters is constructed. Based on the database of ODMR frequency shift and dual-field parameter mapping, the defect type and defect energy level are directly obtained by inversion through the frequency shift mode matching database.

6. The semiconductor device analysis method according to claim 5, characterized in that, The modified ODMR response equation for the NV color center is: Δf=γeB defect +kTΔT+a δEz; Where Δf represents the frequency shift, γe is the gyromagnetic ratio of the electron, and B defect γeB represents the effective local magnetic field at the defect location. defect This indicates the energy or frequency change caused by the Zeeman effect experienced by an electron at a defect. k is Boltzmann constant, T is absolute temperature, and ΔT is the change in temperature; α is the NV color ECG sensitivity coefficient, δEz is the axial electric field change induced by defect charge transition, and α δEz represents the energy level shift caused by the electric field.

7. The semiconductor device analysis method according to claim 1, characterized in that, The analysis process employs high-order finite element method and fast multipole method to solve the modified current equation, including: The analysis tool determines whether each mesh cell generated based on the device structure is an irregular, abrupt region with drastic changes in electric, thermal, magnetic, or stress fields. When the mesh element is determined to be an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field, the irregular abrupt region is discretized using an element discretization method based on singular field smooth fitting, and the order of the basis functions of the higher-order finite element is determined. The modified current equation is then solved using the higher-order finite element method. The geometric topology of the semiconductor device is divided into multiple sub-regions for parallel computing. Units are assembled in each sub-region to form a local sparse matrix, and the fast multipole method is used to solve the local sparse matrix.

8. The semiconductor device analysis method according to claim 7, characterized in that, The step of using a unit discretization method based on singular field smoothing fitting to discretize the irregular abrupt change region includes: To address the local singularities in the irregularly abruptly altered regions, special units with embedded basis functions are constructed. These special units are then fitted to smooth units in the regular regions to ensure the consistency and accuracy of the discrete format. The basis functions include Dubiner basis functions or Legendre tensor product basis functions.

9. The semiconductor device analysis method according to claim 7, characterized in that, Also includes: After solving the local sparse matrix using the fast multipole method, the solution vectors of each sub-region are merged to obtain the numerical result of the overall matrix of the analysis model.

10. The semiconductor device analysis method according to claim 7, characterized in that, The computational expression for solving the local sparse matrix using the fast multipole method is as follows: ; ; in, Represents the Green's function. As the source point, As the venue, The imaginary unit, For wave number, This represents the Euclidean distance between the source point and the field point; This represents the modified Green's function. It is a second-order tensor differential operator.

11. A method for predicting the reliability of semiconductor devices, characterized in that, include: The semiconductor device is tested and analyzed using the semiconductor device analysis method according to any one of claims 1-10, and multiphysics analysis data of the semiconductor device is obtained. The machine learning model is trained based on the multiphysics analysis data to obtain a multiphysics device performance prediction model. The reliability parameters of semiconductor devices are predicted using the multiphysics device performance prediction model.

12. The semiconductor device reliability prediction method according to claim 11, characterized in that, The semiconductor device analysis method described above is used to analyze and test semiconductor devices, including: Using analysis tools, multiple analysis and calculation tasks are generated in batches according to the user's required process structure deviation range and detection step size, and submitted to the computing cluster. The computing cluster distributes the multiple analysis and calculation tasks to different computing nodes, and each computing node performs analysis and calculation to generate analysis data.

13. The semiconductor device reliability prediction method according to claim 11, characterized in that, Training a machine learning model based on the multiphysics analysis data includes: The multiphysics analysis data is divided into input and output items, and the input and output items are respectively imported into the machine learning model for model training. During model training, the accuracy metrics of the machine learning model are monitored in real time. When the accuracy metrics of the machine learning model tend to stabilize at a certain value as the number of iterations increases, model training is stopped.

14. The semiconductor device reliability prediction method according to claim 11, characterized in that, The method further includes: The multiphysics device performance prediction model is loaded into a multi-objective optimization framework as a component, and the multi-objective optimization algorithm is used to optimize the multiphysics device performance prediction model.

15. The semiconductor device reliability prediction method according to claim 14, characterized in that, The optimization of the multi-physics device performance prediction model using a multi-objective optimization algorithm includes: Use any one of the data points from the multiphysics analysis data as a baseline file and import it into the multiphysics device performance prediction model. By treating multiple factors affecting device performance as multiple objectives, a multi-objective optimization algorithm is used to find the Pareto solution set and Pareto front in the objective space, thereby achieving multi-objective optimization.

16. A semiconductor device analysis system, characterized in that, include: In-situ defect testing module and multiphysics analysis module; The in-situ defect testing module is used to perform in-situ defect testing on semiconductor devices, including: performing deep-level transient spectrum testing on the semiconductor device to obtain the defect energy level and defect concentration of the semiconductor device; performing diamond NV color center testing on the semiconductor device to obtain the defect energy level of the semiconductor device; and using the defect energy level obtained from the diamond NV color center testing to correct the defect energy level obtained from the deep-level transient spectrum testing to obtain the dynamic evolution law of the defect energy level and defect concentration of the semiconductor device. The multiphysics analysis module is used to solve the current equation of semiconductor devices under multiphysics fields using the high-order finite element method and the fast multipole method, and obtain multiphysics analysis data of semiconductor devices. The multiphysics fields include at least three of electric field, thermal field, magnetic field and stress field. The current equation is obtained by modifying the derivation process of the current equation under multiphysics fields by incorporating the dynamic evolution law of defect energy level and defect concentration obtained from the in-situ defect test. The modified current equation can reflect the influence of defect changes on current over time.

17. The semiconductor device analysis system according to claim 16, characterized in that, The current equation is derived by coupled iterative derivation of the Poisson equation, transport equation and continuity equation of semiconductor devices under multiphysics fields.

18. The semiconductor device analysis system according to claim 17, characterized in that, The parameters of the Poisson equation include: the electric potential related to the electromagnetic field and the trap concentration related to the trap charge; The parameters of the transport equation include: temperature-dependent thermoelectric terms related to the thermal field; The parameters of the continuity equation include: the trap energy level associated with the trap charge and the lifetime derived from the trap concentration.

19. The semiconductor device analysis system according to claim 16, characterized in that, The diamond NV color center test of the semiconductor device includes: The ODMR response equation of the NV color center is modified to obtain the modified ODMR response equation of the NV color center; The ODMR frequency shift is determined based on the modified NV color center ODMR response equation, and a database mapping ODMR frequency shift modes to dual-field parameters is constructed. Based on the database of ODMR frequency shift modes and dual-field parameter mappings, the defect type and defect energy level are directly obtained by frequency shift mode matching database.

20. The semiconductor device analysis system according to claim 16, characterized in that, The multiphysics analysis module uses the high-order finite element method and the fast multipole method to solve the current equations of semiconductor devices under multiphysics conditions, including: Determine whether each mesh cell generated based on the device structure is an irregular, abrupt region with drastic changes in electric field, thermal field, magnetic field, or stress field; When the mesh element is determined to be an irregular abrupt region with drastic changes in electric field, thermal field, magnetic field or stress field, the irregular abrupt region is discretized using an element discretization method based on singular field smooth fitting, and the order of the basis functions of the higher-order finite element is determined. The current equation is then solved using the higher-order finite element method. The geometric topology of the semiconductor device is divided into multiple sub-regions for parallel computing. Units are assembled in each sub-region to form a local sparse matrix, and the fast multipole method is used to solve the local sparse matrix.

21. The semiconductor device analysis system according to claim 20, characterized in that, The step of using a unit discretization method based on singular field smoothing fitting to discretize the irregular abrupt change region includes: To address the local singularities in the irregularly abruptly altered regions, special units with embedded basis functions are constructed. These special units are then fitted to smooth units in the regular regions to ensure the consistency and accuracy of the discrete format. The basis functions include Dubiner basis functions or Legendre tensor product basis functions.

22. The semiconductor device analysis system according to claim 20, characterized in that, The multiphysics analysis module solves the local sparse matrix using the fast multipole method, then merges the solution vectors of each sub-region to obtain the numerical result of the overall matrix of the analysis model.

23. A semiconductor device reliability prediction system, characterized in that, include: The semiconductor device analysis system and device performance prediction module according to any one of claims 16-22; The semiconductor device analysis system is used to test and analyze semiconductor devices to obtain multiphysics analysis data of the semiconductor devices; The device performance prediction module is used to train the machine learning model based on the multiphysics analysis data to obtain a multiphysics device performance prediction model, and to use the multiphysics device performance prediction model to predict the reliability parameters of semiconductor devices.

24. The semiconductor device reliability prediction system according to claim 23, characterized in that, The semiconductor device analysis system is specifically used to: generate multiple analysis and calculation tasks in batches according to the process structure deviation range and detection step size required by the user, and submit them to the computing cluster. The computing cluster distributes the multiple analysis and calculation tasks to different computing nodes, and each computing node performs analysis and calculation to generate analysis data.

25. The semiconductor device reliability prediction system according to claim 23, characterized in that, Also includes: Model optimization module; The model optimization module is used to optimize the multiphysics device performance prediction model using a multi-objective optimization algorithm, including: taking any set of data from the multiphysics analysis data as a baseline file and importing it into the multiphysics device performance prediction model; taking multiple factors affecting device performance as multiple objectives, and finding the Pareto solution set and Pareto front of the objective space through the multi-objective optimization algorithm to achieve multi-objective optimization.

26. A computer device, characterized in that, include: Memory, which stores computer programs; A processor for executing the computer program to implement the semiconductor device analysis method according to any one of claims 1-10; Alternatively, the processor is used to execute the computer program to implement the semiconductor device reliability prediction method according to any one of claims 11-15.

27. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the semiconductor device analysis method according to any one of claims 1-10; Alternatively, when the computer program is executed by a processor, it implements the semiconductor device reliability prediction method according to any one of claims 11-15.

28. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the semiconductor device analysis method according to any one of claims 1-10; Alternatively, the computer program, when executed by a processor, implements the semiconductor device reliability prediction method according to any one of claims 11-15.

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