Pad double-step adjustable semi-embedded package substrate and processing method thereof

CN121842966BActive Publication Date: 2026-09-08JIANGSU PROVISION ELECTRONICS CO LTD
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Patent Information

Application Number
CN202610088030.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-01-22
Publication Date
2026-09-08
Estimated Expiration
2046-01-22

AI Technical Summary

Technical Problem

[0006]上述凸起式焊盘的尺寸虽然在加工时可实现灵活调控,但在进行激光开盖加工时,焊盘容易受到激光开盖影响而造成损伤,甚至于会出现激光烧穿下一层绝缘材料的风险,从而严重影响了封装基板的质量

Benefits of technology

[0019] The beneficial effects of this invention are as follows: Compared with the prior art, the processing method of the double-level adjustable semi-embedded packaging substrate provided by this invention has the following advantages: ① Through process innovation, this invention introduces buried copper foil, which not only meets the processing requirements of layer addition and inner layer circuit fabrication, but also, thanks to the high melting point and high thermal stability of the resistive layer, allows the resistive layer to remain solid and not easily melted or vaporized by laser in high-temperature environments. This enables the resistive layer to block the laser, thereby achieving comprehensive and effective protection of the pad pattern during laser grooving operations, ensuring and significantly improving the quality of the packaging substrate. On the other hand, by simultaneously fabricating the pad pattern and the main circuit pattern, the shape and size of the pad pattern can be flexibly adjusted, broadening the development of packaging substrates and improving the flexibility of processing and production. ② This invention also optimizes the control of insulating materials, such as ensuring that both the first and second insulating layers use pure adhesive without glass fibers. This reduces laser energy and the number of laser shots during laser grooving, preventing damage to the insulating materials from high temperatures. It also effectively avoids residual adhesive caused by the presence of glass fibers, significantly improving the grooving quality. ③ The semi-embedded packaging substrate processing method provided by this invention is reasonable, has a simple process flow, and is easy to operate and implement.

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Abstract

The application discloses a kind of pad double-stage adjustable semi-embedded package substrate and its processing method, comprising: the inner layer circuit layer of both sides of operation board is provided with circuit pattern A, and the set region on a circuit pattern A is used as to be removed part;First insulating layer and buried resistance copper foil are stacked on the inner layer circuit layer, and circuit pattern B is made on the copper bottom layer of buried resistance copper foil, and a circuit pattern B includes pad pattern;The resistance layer of buried resistance copper foil exposed outside circuit pattern B is etched, and the resistance layer adjacent to pad pattern is reserved as protection structure;Double-sided build-up, double-sided circuit manufacturing, and the intermediate plate B provided with outer layer circuit layer is obtained;The embedding slot sketch with opening in one outer layer circuit layer and to-be-removed part as slot bottom is made;To-be-removed part is etched, the first insulating layer above protection structure is removed by laser, and protection structure is etched by acid, and embedding slot is obtained.The processing method is reasonable, the shape and size of pad pattern in the obtained package substrate are flexible and adjustable, and the quality is high.
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Description

Technical Field

[0001] This invention relates to the field of advanced packaging technology, and in particular to a semi-embedded packaging substrate with adjustable pads and its processing method. Background Technology

[0002] To meet the growing demand for high-density and miniaturization in electronic devices, components are typically embedded inside the packaging substrate during manufacturing, creating an embedded / semi-embedded packaging substrate structure. This reduces both the volume of the packaging substrate and the installation space required.

[0003] In existing embedded packaging substrate structures, pads are generally designed to be recessed or raised relative to the bottom of the slot. 1) The method for manufacturing sunken pads is as follows: First, perform the Larger window process (expanding the window area process) directly on the bottom of the groove, and then process the pads into shape on the bottom of the groove through the circuit fabrication process.

[0004] However, the size of such pads is often controlled by the thickness of the adjacent prepreg, making it impossible to flexibly adjust the pad size.

[0005] 2) The method for making raised pads is as follows: when making inner layer circuits, the pads are made in advance; then the pads are exposed through subsequent laser capping.

[0006] Although the size of the aforementioned raised pads can be flexibly adjusted during processing, the pads are easily damaged by the laser opening process, and there is even a risk that the laser will burn through the next layer of insulating material, which seriously affects the quality of the packaging substrate.

[0007] In view of this, the present invention is hereby proposed. Summary of the Invention

[0008] To overcome the above-mentioned defects, the present invention provides a semi-embedded packaging substrate with adjustable pads and its processing method. The processing method is reasonable, the process flow is simple, and it is easy to operate and implement. Moreover, the shape and size of the pad pattern in the obtained semi-embedded packaging substrate are flexibly adjustable, and the quality is high, which broadens the development of packaging substrates.

[0009] The technical solution adopted by this invention to solve its technical problem is: a processing method for a semi-embedded package substrate with adjustable pads, comprising: A work board is provided, wherein both opposite sides of the work board are inner circuit layers with circuit patterns A, and a designated area on one of the circuit patterns A is used as the part to be removed to assist in the processing of the groove. A first insulating layer and a buried resistive copper foil are sequentially stacked on the two inner circuit layers and pressed together into an integral structure; wherein the side of the buried resistive copper foil facing the first insulating layer is a resistive layer and the side facing away from the first insulating layer is a copper bottom layer; Circuit patterns B are fabricated on the copper substrates of the two buried copper foils respectively; wherein the projection of one circuit pattern B toward the working board does not fall on the part to be removed, and the other circuit pattern B includes a pad pattern that is directly opposite the part to be removed. The resistive layer exposed outside the circuit pattern B is etched using an acid etching process, leaving only the resistive layer within a predetermined range adjacent to the pad pattern as a protective structure that can block lasers; thus obtaining the intermediate board A. After performing double-sided lamination and double-sided circuit fabrication on the obtained intermediate board A, an intermediate board B with two outer circuit layers is obtained; wherein, the projection of the circuit pattern C on the outer circuit layer that is far away from the pad pattern toward the working board does not fall on the part to be removed. On the obtained intermediate board B, a groove prototype is machined with an opening on an outer circuit layer that is far from the pad pattern, and with the part to be removed as the groove bottom; After etching away the part to be removed, the first insulating layer located above the protective structure is removed using a laser ablation process, and then the protective structure is completely etched away using an acid etching process to obtain the groove. The thickness of the pad pattern can be selectively adjusted.

[0010] As a further improvement of the present invention, the material of the resistive layer is selected from any one of nickel-chromium alloy, nickel-phosphorus alloy and tantalum, and the thickness of the resistive layer is 0.2 to 0.5 μm.

[0011] As a further improvement of the present invention, the copper substrate is made of electrolytic copper foil or rolled copper foil; the first insulating layer is made of pure adhesive or prepreg.

[0012] As a further improvement of the present invention, the processing parameters of the above-mentioned acid etching process are as follows: the concentration of hydrochloric acid in the acid etching solution is 8% to 12%, and the etching temperature is 30℃ ± 2℃.

[0013] As a further improvement of the present invention, after the obtained intermediate plate B is subjected to anti-welding treatment, the groove prototype is processed on the obtained intermediate plate B using laser ablation process.

[0014] As a further improvement of the present invention, the groove prototype is processed using a CO2 laser, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5.

[0015] As a further improvement of the present invention, a CO2 laser is used to remove the first insulating layer located directly above the protective structure, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5.

[0016] As a further improvement of the present invention, the thickness of the pad pattern is adjusted using a flash etching process.

[0017] As a further improvement of the present invention, a surface treatment layer is plated on the designated area on the circuit pattern C and on the pad pattern.

[0018] The present invention also provides a pad-adjustable semi-embedded package substrate, which is manufactured using the pad-adjustable semi-embedded package substrate processing method described in the present invention.

[0019] The beneficial effects of this invention are as follows: Compared with the prior art, the processing method of the double-level adjustable semi-embedded packaging substrate provided by this invention has the following advantages: ① Through process innovation, this invention introduces buried copper foil, which not only meets the processing requirements of layer addition and inner layer circuit fabrication, but also, thanks to the high melting point and high thermal stability of the resistive layer, allows the resistive layer to remain solid and not easily melted or vaporized by laser in high-temperature environments. This enables the resistive layer to block the laser, thereby achieving comprehensive and effective protection of the pad pattern during laser grooving operations, ensuring and significantly improving the quality of the packaging substrate. On the other hand, by simultaneously fabricating the pad pattern and the main circuit pattern, the shape and size of the pad pattern can be flexibly adjusted, broadening the development of packaging substrates and improving the flexibility of processing and production. ② This invention also optimizes the control of insulating materials, such as ensuring that both the first and second insulating layers use pure adhesive without glass fibers. This reduces laser energy and the number of laser shots during laser grooving, preventing damage to the insulating materials from high temperatures. It also effectively avoids residual adhesive caused by the presence of glass fibers, significantly improving the grooving quality. ③ The semi-embedded packaging substrate processing method provided by this invention is reasonable, has a simple process flow, and is easy to operate and implement. Attached Figure Description

[0020] Figure 1 This is a flowchart of the processing method for the pad-adjustable semi-embedded packaging substrate described in Embodiment 1 of the present invention; Figure 2 This is a cross-sectional view of the work board described in Example 1; Figure 3 This is a schematic cross-sectional view of the board obtained by sequentially stacking the first insulating layer and buried copper foil on the two inner circuit layers in Example 1. Figure 4 This is a schematic cross-sectional view of the board A obtained after fabricating circuit patterns B on two buried copper foils in Example 1. Figure 5 This is a schematic cross-sectional view of the intermediate plate A obtained in Example 1; Figure 6 This is a schematic cross-sectional view of the intermediate plate B obtained in Example 1; Figure 7 This is a schematic cross-sectional view of the intermediate plate B after the groove prototype has been machined in Example 1. Figure 8 This is a schematic diagram of the cross-sectional structure after etching away the part to be removed on the intermediate plate B and removing the first insulating layer located directly above the protective structure in Example 1. Figure 9 This is a schematic diagram of the cross-sectional structure after etching away the protective structure on the intermediate plate B to create the groove in Example 1. Figure 10 This is a schematic cross-sectional view of the semi-finished semi-embedded packaging substrate obtained after adjusting the thickness of the pad pattern 40 in Example 1. Figure 11 This is a schematic cross-sectional view of the semi-embedded package substrate with adjustable pads obtained in Example 1.

[0021] Referring to the accompanying drawings, the following explanations are provided: 1. Inner circuit layer; 10. Part to be removed; 2. First insulating layer; 3. Buried copper foil; 30. Resistor layer; 31. Copper bottom layer; 40. Pad pattern; 41. Main circuit pattern; 5. Outer circuit layer; 60. Embedded groove prototype; 6. Embedded groove; 7. Surface treatment layer; 8. Solder resist layer; 9. Insulating intermediate layer; 11. Second insulating layer; B1. Working board; B2. Intermediate board A; B3. Intermediate board B; B4. Pad-adjustable semi-embedded packaging substrate. Detailed Implementation

[0022] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0023] Example 1:

[0024] Please see the appendix Figure 1 To be continued Figure 11 As shown, this embodiment 1 provides a method for processing a semi-embedded package substrate with adjustable pads, which mainly includes the following processing steps: S1: A working board is provided, wherein both opposite sides of the working board are inner circuit layers 1 with circuit patterns A, and a set area on one of the circuit patterns A is designated as the part to be removed 10 according to the preset groove processing data of the semi-embedded packaging substrate, so as to assist in the groove processing.

[0025] Regarding the aforementioned work board, its manufacturing method and implementation structure are determined based on the design requirements of the semi-embedded packaging substrate. This application does not impose any limiting requirements. However, in order to clearly and thoroughly describe the processing method of the pad-adjustable semi-embedded packaging substrate provided in this application, this embodiment 1 is specifically illustrated as follows: In this embodiment, the method for manufacturing the work board is designed as follows: S11: A double-sided copper-clad substrate is provided, wherein the double-sided copper-clad substrate has an insulating intermediate layer 9 and two first copper layers respectively fixedly attached to opposite sides of the insulating intermediate layer 9. The insulating intermediate layer 9 may be, but is not limited to, a prepreg, and the thickness of the insulating intermediate layer 9 and the first copper layers are determined according to product design requirements; this embodiment does not impose any restrictions.

[0026] S12: Place the double-sided copper-clad substrate in an oven and bake it at a temperature of 185-195°C for 2-4 hours to eliminate stress in the double-sided copper-clad substrate, prevent warping during processing, and improve its dimensional stability.

[0027] S13: The double-sided copper-clad substrate is subjected to drilling (i.e., drilling alignment holes and interlayer vias), copper plating and via-filling plating (i.e., using a combination of copper plating and via-filling plating to completely fill the interlayer vias with copper, so as to achieve communication between the two first copper layers, and at the same time control to ensure that the copper in the interlayer vias is flush with the two first copper layers), pre-coating treatment (i.e., roughening, cleaning and drying the two first copper layers in sequence), and coating with photoresist film (i.e., coating with photoresist film using a vacuum film laminating device). The process involves several steps: applying the photosensitive dry film to two first copper layers, exposure (using an LDI exposure machine and according to preset exposure data to expose the photosensitive dry film), development (removing the unexposed photosensitive dry film using a developing solution), etching (etching away the areas on the two first copper layers exposed outside the photosensitive dry film using an alkaline etching solution), film removal (removing the photosensitive dry film using a stripping solution), cleaning, and drying. After these steps, the work board B1 with two inner circuit layers 1 is obtained. (See attached document.) Figure 2 As shown, the working board B1 has an insulating intermediate layer 9 and two inner circuit layers 1 respectively disposed on opposite sides of the insulating intermediate layer 9. Both inner circuit layers 1 have a preset circuit pattern A, and the circuit patterns A on the two inner circuit layers 1 are electrically connected. Furthermore, it is understood that the circuit patterns A on the two inner circuit layers 1 may be different or the same, depending on the circuit design requirements.

[0028] For further details, please refer to the appendix. Figure 2As shown, if the thickness direction of the working board B1 is defined as the vertical direction, and according to the slotting processing data of the semi-embedded packaging substrate, in this embodiment, a set area on a circuit pattern A located below the insulating intermediate layer 9 is used as the part to be removed 10 to assist in the slotting process; correspondingly, the downward projection of another circuit pattern A located above the insulating intermediate layer 9 does not fall on the part to be removed 10, so as to facilitate the laser slotting operation in the subsequent process.

[0029] Furthermore, after the work board B1 is obtained, the circuit pattern A is subjected to AOI optical inspection to ensure the processing quality of the circuit pattern A.

[0030] Additional explanation: This embodiment 1 illustrates the fabrication of the inner circuit layer 1 using a subtractive process. However, it is understood that in actual production, depending on the processing requirements of the packaging substrate, the inner circuit layer 1 can also be fabricated using the mSAP process.

[0031] S2: A first insulating layer 2 and a buried resistive copper foil 3 are sequentially stacked on the two inner circuit layers 1 of the working board B1, and then laminated together to firmly connect the working board B1, the first insulating layer 2, and the buried resistive copper foil 3 into a single structure; wherein, the side of the buried resistive copper foil 3 facing the first insulating layer 2 is the resistive layer 30, and the side of the buried resistive copper foil 3 facing away from the first insulating layer 2 is the copper underlayer 31; see appendix for details. Figure 3 As shown.

[0032] Furthermore, the first insulating layer 2 can preferably be made of pure adhesive or a prepreg, with pure adhesive being the optimal choice. Understandably, when the first insulating layer 2 uses pure adhesive without glass fibers, during the subsequent laser grooving process, the pure adhesive configuration can effectively reduce laser energy and the number of laser shots, preventing damage to the insulating material from high temperatures. Furthermore, it can effectively avoid residual adhesive caused by the presence of glass fibers, thus improving the grooving quality.

[0033] In addition, the thickness of the first insulating layer 2 can be determined according to the thickness requirements of the semi-embedded packaging substrate. This embodiment does not impose any restrictions, such as it can be designed to be 25-40 μm.

[0034] Furthermore, the buried resistive copper foil 3 consists of a copper substrate 31 and a resistive layer 30 formed on one side of the copper substrate 31 by sputtering or electroplating. The copper substrate 31 is preferably made of electrolytic copper foil or rolled copper foil, and its thickness is determined according to the processing technology of the circuit pattern. The material of the resistive layer 30 is preferably any one of nickel-chromium alloy, nickel-phosphorus alloy, and tantalum (in this embodiment, nickel-chromium alloy or tantalum is more preferred), and the thickness of the resistive layer 30 is 0.2–0.5 μm. Understandably, in the lamination and layering operation, this embodiment replaces the conventional copper foil layering with the buried resistive copper foil 3, which not only meets the processing requirements for layering and inner layer circuit fabrication, but also, thanks to the high melting point and high thermal stability of the resistive layer 30, allows it to remain solid and not easily melted or vaporized by laser in high-temperature environments, thus enabling the resistive layer 30 to block laser light. In addition, compared with conventional copper foil layering, the buried copper foil 3 and the first insulating layer 2 can also achieve a stable lamination bond.

[0035] Furthermore, the above-mentioned lamination and pressing method is preferably the electric heating pressing method. The electric heating pressing method is a conventional technical means in the field of circuit board processing. This embodiment does not impose any restrictions. For example, the following processing parameters can be used: heating rate of 3-5℃ / min, pressing temperature ≥220℃, and maximum pressing pressure ≥420Psi.

[0036] S3: Fabricate circuit patterns B on the copper substrate 31 of the two buried copper foils 3 respectively. Please refer to the appendix. Figure 4 As shown, according to the circuit pattern data and slotting processing data of the semi-embedded packaging substrate, one circuit pattern B located above the working board B1 mainly includes a circuit body pattern 41, and the projection of the circuit pattern B above the working board B1 toward the working board (i.e., the downward projection of the circuit pattern B) does not fall on the part to be removed 10, so as to facilitate the laser slotting operation in the subsequent process; another circuit pattern B located below the working board B1 includes a circuit body pattern 41 and a pad pattern 40, the pad pattern 40 is directly opposite the part to be removed 10, and further, the projection of the pad pattern 40 toward the part to be removed 10 falls completely on the part to be removed 10; it can be understood that, by means of the part to be removed 10, on the one hand, the layout position of the pad pattern 40 can be limited to ensure that the pad pattern 40 can fall completely on the bottom of the slot, and on the other hand, the pad pattern 40 can be fully protected in the laser slotting operation described below. In addition, please continue to refer to the appendix. Figure 4As shown, the two circuit patterns B (specifically, the two circuit body patterns 41) are electrically connected to the two circuit patterns A. It can also be understood that by simultaneously fabricating the pad pattern 40 and the circuit body pattern 41, this embodiment allows for flexible adjustment of the shape and size of the pad pattern 40, thus broadening the development of packaging substrates.

[0037] Furthermore, when the copper substrate 31 on the buried copper foil 3 is a thick copper foil with a set copper thickness (e.g., copper thickness of 25-40 μm), this embodiment can use a subtractive process to produce the circuit pattern B (the specific processing details of the subtractive process can be found in S13 above); while when the copper substrate 31 is a composite copper layer composed of an ultra-thin copper layer and a carrier copper layer that can be detachably connected to the ultra-thin copper layer, this embodiment can use the mSAP process to produce the circuit pattern B.

[0038] Supplementary Explanation: ① When the copper substrate 31 is a composite copper layer composed of an ultra-thin copper layer and a carrier copper layer, the above-mentioned mSAP process includes drilling (i.e., drilling alignment holes and interlayer vias), board separation (i.e., removing the carrier copper layer by mechanical peeling), copper plating and via-filling plating (i.e., using a combination of copper plating and via-filling plating to completely fill the interlayer vias with copper, so as to achieve the connection between the ultra-thin copper layer and its corresponding circuit pattern A, while also controlling the copper in the interlayer vias to be flush with the ultra-thin copper layer), pre-coating treatment (i.e., roughening, cleaning and drying the ultra-thin copper layer), and coating. The circuit pattern B is obtained through the following processes: photosensitive film deposition (i.e., applying a photosensitive dry film to an ultrathin copper layer using a vacuum lamination device), exposure (i.e., exposing the photosensitive dry film to an ultrathin copper layer using an LDI exposure machine according to preset exposure data), development (i.e., removing the unexposed photosensitive dry film using a developing solution), pattern electroplating (i.e., plating a preliminary circuit pattern onto the ultrathin copper layer and the area exposed outside the photosensitive dry film using pattern electroplating), film removal (i.e., removing the photosensitive dry film using a stripping solution), baking, and flash etching (i.e., etching away the ultrathin copper layer not covered by the preliminary circuit pattern using an alkaline etching solution). ② It is known that in the field of circuit board processing, the core components of alkaline etching solutions are ammonia, ammonium chloride, and copper ions, while the core components of acidic etching solutions are hydrochloric acid, copper chloride, and sodium chloride. Therefore, both acidic and alkaline etching processes are applicable when etching copper materials; however, only the acidic etching process is applicable when etching the resistive layer 30.

[0039] Furthermore, after obtaining the circuit pattern B, AOI optical inspection is performed on the circuit pattern B to ensure the processing quality of the circuit pattern B.

[0040] In addition, for the convenience of subsequent process description, this embodiment will also define the board obtained after completing the above S3 processing as board A.

[0041] S4: First, the obtained board A is sequentially coated with photoresist dry film, exposed, and developed to ensure that the circuit pattern B and the resistive layer 30 within a predetermined range adjacent to the pad pattern 40 are covered and protected by the photoresist dry film, while the remaining resistive layer 30 exposed outside the circuit pattern B is not covered by the photoresist dry film. Then, acid etching is performed to etch away the resistive layer 30 that is not covered by the photoresist dry film and is simultaneously exposed outside the circuit pattern B. Subsequently, the film is removed, cleaned, and dried to obtain intermediate board A B2. For details, please refer to the appendix. Figure 5 As shown.

[0042] Understandably, after the above S4 process, the resistor layer 30 exposed outside the circuit pattern B is partially etched away, and only the resistor layer 30 within a preset range adjacent to the pad pattern 40 is retained as a protective structure that can block lasers.

[0043] Furthermore, the processing parameters for the aforementioned acid etching are as follows: the hydrochloric acid concentration in the acid etching solution is 8%–12%, and the etching temperature is 30℃ ± 2℃. Understandably, by precisely controlling the hydrochloric acid concentration and etching temperature in the acid etching solution, the resistive layer 30 not covered by the resist photosensitive dry film can be etched away, while avoiding the defect of the resist photosensitive dry film peeling off due to high temperature. This improves the quality of the acid etching process and increases the product yield.

[0044] Furthermore, regarding the "preset range" in the aforementioned "resistor layer 30 within a preset range adjacent to the pad pattern 40," it is set based on the preset lateral cross-sectional dimensions of the slot. Generally, it is required that the downward projection of the slot falls entirely on the protective structure (i.e., the retained resistor layer 30 adjacent to the pad pattern 40), as shown in the appendix. Figure 7 As shown; therefore, this embodiment does not impose any restrictions on the above-mentioned "preset range", as long as the protective structure can achieve full protection of the pad pattern 40 during the laser grooving operation.

[0045] S5: First, the second insulating layer 11 and the second copper layer are sequentially stacked on opposite sides of the obtained intermediate boards A and B2, respectively. Then, they are laminated (preferably by electrothermal lamination) to firmly connect the obtained intermediate board A, the second insulating layer 11, and the second copper layer into a single unit. Next, based on the structure of the second copper layer, the two second copper layers are fabricated into outer circuit layers 5 with circuit patterns C using a subtractive process or mSAP process, thus obtaining the intermediate board B and B3. Please refer to the appendix. Figure 6As shown, in the obtained intermediate board B, the projection of the circuit pattern C on the outer circuit layer 5 that is far from the pad pattern 40 toward the working board does not fall on the part to be removed 10, that is: the downward projection of the circuit pattern C on the upper outer circuit layer 5 does not fall on the part to be removed 10, so as to facilitate the laser grooving operation in the subsequent process; and the circuit patterns C on the two outer circuit layers 5 are respectively electrically connected to the two circuit patterns B (specifically the two circuit body patterns 41).

[0046] Furthermore, in this embodiment, the second insulating layer 11 can also be made of pure adhesive or prepreg, with pure adhesive being the best option; and the thickness of the second insulating layer 11 can also be determined according to the thickness requirements of the semi-embedded packaging substrate, which is not limited in this embodiment.

[0047] Furthermore, regarding the subtractive process or mSAP process described in S5, please refer to the descriptions in S13 and S3 above.

[0048] S6: First, perform solder resist treatment on the obtained intermediate board B3 to cover the intermediate board B with a solder resist layer 8 at a predetermined position; then, use laser ablation process to process an opening on the obtained intermediate board B on an outer circuit layer 5 that is far away from the pad pattern 40 (i.e., the groove prototype 60 opens on the upper outer circuit layer 5), with the part to be removed 10 as the groove bottom; see appendix for details. Figure 7 As shown. Understandably, the laser ablation operation in this step can also be referred to as a single laser grooving operation.

[0049] The aforementioned solder resist treatment can employ techniques commonly used in the circuit board manufacturing field, and therefore will not be described in detail here. In this embodiment, by placing the solder resist treatment before the laser-induced grooving operation, the solder resist layer 8, in addition to its basic functions of preventing oxidation of the circuit pattern and copper surface, can also effectively prevent laser damage to the circuit pattern, thus ensuring circuit quality.

[0050] Furthermore, since both the first insulating layer 2 and the second insulating layer 11 in this embodiment can preferably be made of pure adhesive without glass fibers, this embodiment can use a "low-energy laser ablation / grooving process" to process the grooved prototype 60. Specifically, the processing parameters of the laser ablation / grooving process are: using a CO2 laser, and the laser energy of the CO2 laser is 2-6 mJ, the pulse width is 4-6 μs, and the number of laser shots is 1-5.

[0051] S7: First, use an alkaline etching process to etch away the part 10 to be removed, and then use a laser ablation process to remove the first insulating layer 2 located above the protective structure (understandably, this laser ablation operation can also be called a secondary laser ablation operation). See attached document for details. Figure 8 As shown; then, the protective structure is completely etched away using an acid etching process to obtain the groove 6, as shown in the appendix. Figure 9 As shown. Understandably, during the laser secondary grooving operation, the laser blocking function of the protective structure (i.e., the resistive layer 30 that is retained and adjacent to the pad pattern 40) can effectively prevent the pad pattern 40 from being damaged by the laser, thus ensuring the quality of the pad pattern 40.

[0052] Furthermore, regarding the amount of etching of the portion 10 to be removed, it can be completely etched away, or a small portion of the portion 10 to be removed can be retained (see Appendix). Figure 8 As shown), it is acceptable as long as it does not affect the subsequent laser secondary etching process. In addition, it is understood that when the part to be removed 10 is subjected to alkaline etching, the remaining area on the resulting intermediate plate B with the groove prototype 60, except for the part to be removed 10, is covered and protected by a photosensitive dry film, and the photosensitive dry film is removed after the laser secondary etching process is completed.

[0053] Furthermore, regarding the aforementioned laser secondary grooving operation, the preferred processing parameters in this embodiment are: using a CO2 laser, wherein the laser energy of the CO2 laser is 2-6 mJ, the pulse width is 4-6 μs, and the number of laser shots is 1-5.

[0054] In addition, please continue to refer to the appendix. Figure 8 As shown, the inner wall of the groove obtained by the laser secondary grooving operation is flush with the inner wall of the groove prototype 60 obtained by the laser primary grooving operation.

[0055] Furthermore, regarding the aforementioned acid etching process, the preferred processing parameters in this embodiment are: a hydrochloric acid concentration of 8%–12% in the acid etching solution and an etching temperature of 30℃ ± 2℃. Understandably, as mentioned above, during acid etching, areas on the board that do not need to be etched must be protected with a photosensitive resist film; after the acid etching is completed, the photosensitive resist film is removed.

[0056] S8: Perform flash etching (using an alkaline etching solution) according to the circuit design requirements of the packaging substrate to adjust the thickness of the pad pattern 40; see attached document. Figure 10 As shown above, during flash etching, the areas on the board that do not need to be etched away also need to be protected with a photosensitive resist film; and after the flash etching is completed, the photosensitive resist film is removed.

[0057] S9: A surface treatment layer 7 is plated on the designated area on the circuit pattern C, the pad pattern 40, and the retained part to be removed 10, respectively. See Appendix. Figure 11 As shown.

[0058] Furthermore, the surface treatment layer 7 may be, but is not limited to, a nickel-palladium-gold layer, wherein the gold layer thickness is 0.05–0.015 μm, the nickel thickness is 3–15 μm, and the palladium thickness is 0.05–0.015 μm.

[0059] S10: After completing the above surface treatment, conventional molding, finished product electrical testing, and finished product inspection processes are performed sequentially to produce the pad-adjustable semi-embedded package substrate B4. For details, please refer to the appendix. Figure 11 As shown.

[0060] As can be seen from the above, compared with the prior art, the processing method of the pad-adjustable semi-embedded packaging substrate provided in this embodiment 1 has the following advantages: ① This embodiment, through process innovation, introduces buried copper foil 3, which not only meets the processing requirements of layer addition and inner layer circuit fabrication, but also, thanks to the high melting point and high thermal stability of the resistor layer 30, the resistor layer 30 can remain solid under high temperature environment and is not easily melted or vaporized by laser. Thus, the resistor layer 30 can achieve the function of blocking laser, thereby realizing comprehensive and effective protection of the pad pattern 40 in the laser grooving operation, ensuring and significantly improving the quality of the packaging substrate; on the other hand, by simultaneously manufacturing the pad pattern 40 and the circuit body pattern 41, the shape and size of the pad pattern 40 can be flexibly adjusted, broadening the development of the packaging substrate and improving the flexibility of processing and production. ② This embodiment also optimizes the insulation material, for example, by using pure adhesive without glass fibers for both the first insulating layer 2 and the second insulating layer 11. This reduces the laser energy and number of laser shots during laser grooving, preventing damage to the insulation material from high temperatures, and effectively avoids residual adhesive caused by the presence of glass fibers, significantly improving the grooving quality. ③ The processing method for the semi-embedded packaging substrate provided in this embodiment is reasonable, the process flow is simple, and it is easy to operate and implement.

[0061] Example 2:

[0062] This embodiment 2 provides a pad-adjustable semi-embedded packaging substrate, which is manufactured using the pad-adjustable semi-embedded packaging substrate processing method described in embodiment 1 above.

[0063] For details, please refer to the appendix. Figure 11As shown, the semi-embedded packaging substrate includes a board body and a groove 6 disposed on the board body. The board body is provided with an insulating intermediate layer 9. An inner circuit layer 1, a first insulating layer 2, a circuit pattern B, a second insulating layer 11, and an outer circuit layer 5 are sequentially stacked on opposite sides of the insulating intermediate layer 9. The circuit pattern A on the inner circuit layer 1, the circuit pattern B, and the circuit pattern C on the outer circuit layer 5 are electrically connected to each other. In addition, a pad pattern 40 on one of the circuit patterns B is disposed on the bottom of the groove 6 and is exposed on the bottom of the groove 6. Moreover, the thickness of the pad pattern 40 is adjustable.

[0064] As can be seen from the above, by means of the processing method of the pad-adjustable semi-embedded packaging substrate provided in this application, the shape and size of the pad pattern 40 in the semi-embedded packaging substrate obtained in this embodiment 2 are flexibly adjustable, the packaging substrate has high quality, and well meets the packaging requirements.

[0065] Finally, the prefixes "first," "second," etc. (such as first insulating layer, second insulating layer, etc.) in the component names in this patent specification, and the suffixes "A," "B," etc. (such as intermediate plate A, intermediate plate B, etc.) in the component names are only for ease of description and are not intended to limit the scope of implementation of this patent.

[0066] Many specific details have been set forth in the foregoing description to provide a thorough understanding of the present invention. However, the above description is merely a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed above. Furthermore, any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention, or modify them into equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the present invention. Any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the protection scope of the present invention.

Claims

1. A method for fabricating a semi-embedded package substrate with adjustable pads, characterized in that: include: A work plate is provided, wherein both opposite sides of the work plate are inner circuit layers (1) with circuit patterns A, and a set area on one of the circuit patterns A is used as the part to be removed (10) to assist in the processing of the groove. A first insulating layer (2) and a buried copper foil (3) are sequentially stacked on the two inner circuit layers (1) and pressed into an integral structure; wherein the buried copper foil (3) facing the first insulating layer (2) is a resistive layer (30) and the side facing away from the first insulating layer (2) is a copper bottom layer (31). Circuit patterns B are fabricated on the copper substrate (31) of the two buried copper foils (3); the projection of the circuit pattern B away from the part to be removed (10) toward the working board does not fall on the part to be removed (10), and the circuit pattern B close to the part to be removed (10) includes a pad pattern (40) that is directly opposite to the part to be removed (10). The resistor layer (30) exposed outside the circuit pattern B is etched by an acid etching process, and only the resistor layer (30) within a preset range adjacent to the pad pattern (40) is retained as a protective structure that can block lasers; thus, an intermediate board A is obtained. After performing double-sided lamination and double-sided circuit fabrication on the obtained intermediate board A, an intermediate board B with two outer circuit layers (5) is obtained; wherein, the projection of the circuit pattern C on the outer circuit layer (5) that is far away from the pad pattern (40) toward the working board does not fall on the part to be removed (10). A groove prototype (60) is machined on the obtained intermediate board B, with an opening on an outer circuit layer (5) that is far from the pad pattern (40) and with the part to be removed (10) as the bottom of the groove. After etching away the part to be removed (10), the first insulating layer (2) located above the protective structure is removed by laser ablation process, and then the protective structure is completely etched away by acid etching process to obtain the groove (6). The thickness of the pad pattern (40) can be selectively adjusted.

2. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: The material of the resistive layer (30) is selected from any one of nickel-chromium alloy, nickel-phosphorus alloy and tantalum, and the thickness of the resistive layer (30) is 0.2 to 0.5 μm.

3. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: The copper bottom layer (31) is made of electrolytic copper foil or rolled copper foil; the first insulating layer (2) is made of pure adhesive or semi-cured sheet.

4. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: The processing parameters for the above-mentioned acid etching process are: the concentration of hydrochloric acid in the acid etching solution is 8% to 12%, and the etching temperature is 30℃ ± 2℃.

5. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: After the intermediate plate B is subjected to anti-welding treatment, the groove prototype (60) is processed on the intermediate plate B using laser ablation process.

6. The processing method of the pad-adjustable semi-embedded package substrate according to claim 5, characterized in that: The groove prototype (60) is fabricated using a CO2 laser, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5.

7. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: The first insulating layer (2) located directly above the protective structure is removed using a CO2 laser, and the processing parameters of the CO2 laser are: laser energy of 2-6 mJ, pulse width of 4-6 μs, and number of laser shots of 1-5.

8. The method for processing a semi-embedded package substrate with adjustable pads according to claim 1, characterized in that: The thickness of the pad pattern (40) is adjusted using a flash etching process.

9. The processing method of the pad-adjustable semi-embedded package substrate according to claim 1, characterized in that: A surface treatment layer (7) is plated on the designated area on the circuit pattern C and on the pad pattern (40).

10. A semi-embedded packaging substrate with adjustable pads, characterized in that: It is manufactured using the processing method of any one of claims 1-9 for a semi-embedded package substrate with adjustable pads.

Citation Information

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