A wireless communication and image processing module, chip and frequency calibration method

CN121864923BActive Publication Date: 2026-10-16HANGZHOU GEO-CHIP TECH CO LTD
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Patent Information

Application Number
CN202511988413.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-26
Publication Date
2026-10-16
Estimated Expiration
2045-12-26

AI Technical Summary

Technical Problem

[0003]该闭环架构包含压控振荡器(Voltage-Controlled Oscillator,VCO)、电流泵(Charge Pump,CP)、鉴频鉴相器(Phase Frequency Detector,PFD)、多模分频器(Multi-Modulus Divider,MMD)、分频器(Local Divider,LO DIV)等模块,硬件结构复杂,导致芯片面积大、功耗高

Benefits of technology

[0016] The wireless communication and image processing module, its chip, and its frequency calibration method described above are used. The module includes a voltage-controlled oscillator (VCO) and a frequency divider, electrically connected. The VCO is configured to acquire video signals transmitted from an analog camera and generate radio frequency (RF) signals based on these signals. The frequency divider is configured to divide the RF signals to generate RF transmission signals in the desired frequency band. The circuit of the wireless communication and image processing module is configured as an open-loop architecture without a phase-locked loop (PLL). This open-loop PLL circuit retains only the VCO and the frequency divider, effectively eliminating the entire PLL closed-loop circuit (including current pumps, phase and frequency detectors, etc.). This reduces chip area and power consumption, making it particularly suitable for battery-powered analog signal image processing modules or devices. It also fundamentally avoids system failures caused by PLL lockout, improving system reliability.

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Abstract

The application provides a wireless communication and image processing module, a wireless communication and image processing module chip and a frequency calibration method. The module comprises a voltage-controlled oscillator and a frequency divider, and the voltage-controlled oscillator and the frequency divider are electrically connected. The voltage-controlled oscillator is configured to obtain a video signal transmitted by an analog camera and generate a radio frequency signal based on the video signal. The frequency divider is configured to divide the radio frequency signal to generate a radio frequency transmission signal of a required frequency band. The circuit of the wireless communication and image processing module is arranged in an open loop architecture without a phase-locked loop. The application adopts a traditional closed loop architecture, that is, an open loop replaces a closed loop, and the whole PLL closed loop circuit except the voltage-controlled oscillator is directly abandoned, so that the chip area is reduced and the power consumption is significantly reduced, and the application is particularly suitable for a battery-powered analog signal image processing module or device. Moreover, the system failure caused by PLL lock loss is avoided from the root, and the system reliability is improved.
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Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and more specifically, to a wireless communication and image processing module, a wireless communication and image processing module chip, and a frequency calibration method thereof. Background Technology

[0002] The wireless transmission scheme typically used in analog wireless communication and image processing module systems is based on a phase-locked loop (PLL) hardware closed-loop architecture.

[0003] This closed-loop architecture includes modules such as a voltage-controlled oscillator (VCO), a charge pump (CP), a phase frequency detector (PFD), a multi-modulus divider (MMD), and a local divider (LO DIV). The complex hardware structure results in a large chip area and high power consumption.

[0004] Furthermore, when the ambient temperature changes significantly, this closed-loop architecture is prone to phase-locked loop loss due to voltage-controlled oscillator frequency shift, resulting in transmission interruption during image / video processing and insufficient system reliability. Summary of the Invention

[0005] This application provides at least one wireless communication and image processing module, a wireless communication and image processing module chip, and a frequency calibration method thereof to solve the above-mentioned technical problems.

[0006] In a first aspect, embodiments of this application provide a wireless communication and image processing module, including: a voltage-controlled oscillator and a frequency divider, wherein the voltage-controlled oscillator and the frequency divider are electrically connected; The voltage-controlled oscillator is configured to acquire video signals transmitted from an analog camera and generate radio frequency signals based on the video signals; The frequency divider is configured to divide the radio frequency signal to generate a radio frequency transmission signal in the required frequency band. The circuit of the wireless communication and image processing module is configured as an open-loop architecture without a phase-locked loop.

[0007] In one possible implementation, a calibration module is also included; The calibration module is configured to perform frequency calibration on the voltage-controlled oscillator at a preset position within the vertical blanking period of the video signal. The vertical blanking period indicates the time interval between the completion of scanning one frame and the start of scanning the next frame for the image signal and / or video signal. The preset position is configured to be a position where the level is stable and has the least impact on the image signal during calibration.

[0008] In one possible implementation, the calibration module includes a voltage comparator; The voltage comparator is configured to identify the start point of the blanking period by detecting the start pulse of the vertical blanking period in the video signal.

[0009] In one possible implementation, the vertical blanking period conforms to the progressive phase-inverting PAL or the National Television System Committee (NTSC) television standard specifications.

[0010] In one possible implementation, the frequency divider is a multi-mode frequency divider configured to support the generation of radio frequency signals in different frequency bands.

[0011] Secondly, this application also provides a wireless communication and image processing module chip, comprising: the wireless communication and image processing module described in any one of the first aspects and various embodiments thereof, and a power amplifier; The power amplifier is configured to amplify the frequency-divided signal generated by the wireless communication and image processing module.

[0012] Thirdly, this application also provides a frequency calibration method for a wireless communication and image processing module, the wireless communication and image processing module including an open-loop voltage-controlled oscillator, the method comprising: During the transmission of video signals by the wireless communication and image processing module, a synchronization gap in the video signal is detected; The output frequency of the voltage-controlled oscillator is calibrated at a preset position within the detected synchronization gap; the preset position is configured to be a position with stable level and minimal impact on the image signal during calibration.

[0013] In one possible implementation, the synchronization gap is the vertical blanking period in the video signal, which indicates the time interval between the completion of scanning one frame and the start of scanning the next frame for the image signal and / or video signal.

[0014] In one possible implementation, calibrating the output frequency of the voltage-controlled oscillator includes: The output frequency of the voltage-controlled oscillator is compared with the reference frequency. Based on the comparison results, the programmable capacitor array applied to the voltage-controlled oscillator is adjusted so that the output frequency approaches the target frequency.

[0015] In one possible implementation, the frequency calibration is performed periodically at fixed time intervals, based on the normal transmission of the image signal.

[0016] The wireless communication and image processing module, its chip, and its frequency calibration method described above are used. The module includes a voltage-controlled oscillator (VCO) and a frequency divider, electrically connected. The VCO is configured to acquire video signals transmitted from an analog camera and generate radio frequency (RF) signals based on these signals. The frequency divider is configured to divide the RF signals to generate RF transmission signals in the desired frequency band. The circuit of the wireless communication and image processing module is configured as an open-loop architecture without a phase-locked loop (PLL). This open-loop PLL circuit retains only the VCO and the frequency divider, effectively eliminating the entire PLL closed-loop circuit (including current pumps, phase and frequency detectors, etc.). This reduces chip area and power consumption, making it particularly suitable for battery-powered analog signal image processing modules or devices. It also fundamentally avoids system failures caused by PLL lockout, improving system reliability.

[0017] Other advantages of this application will be explained in more detail in conjunction with the following description and figures.

[0018] It should be understood that the above description is merely an overview of the technical solution of this application, so as to enable a general understanding of the technical means of this application and to implement it in accordance with the contents of the specification. In order to make the above and other objects, features and advantages of this application more apparent and understandable, specific embodiments of this application are illustrated below. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below. The accompanying drawings are incorporated in and constitute a part of this specification. These drawings illustrate embodiments conforming to this application and are used together with the specification to explain the technical solutions of this application. It should be understood that the drawings only illustrate certain embodiments of this application and should not be considered as a limitation on the scope of protection. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. Furthermore, the same reference numerals denote the same components throughout the drawings. In the drawings: Figure 1 This illustration shows a schematic diagram of a wireless communication and image processing module provided in an embodiment of this application; Figure 2 This illustration shows a frequency calibration timing schematic provided in an embodiment of this application; Figure 3A schematic diagram of a wireless communication and image processing module chip provided in an embodiment of this application is shown; Figure 4 A flowchart of a frequency calibration method for a wireless communication and image processing module provided in an embodiment of this application is shown; Figure 5 A schematic diagram of a frequency calibration device for a wireless communication and image processing module provided in an embodiment of this application is shown. Detailed Implementation

[0020] Exemplary embodiments of this application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of this application are shown in the drawings, it should be understood that this application can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of this application and to fully convey the scope of this application to those skilled in the art.

[0021] In the description of embodiments of this application, it should be understood that terms such as “comprising” or “having” are intended to indicate the presence of the disclosed features, figures, steps, behaviors, components, portions or combinations thereof in this specification, and do not exclude the possibility of the presence of one or more other features, figures, steps, behaviors, components, portions or combinations thereof.

[0022] Unless otherwise stated, " / " means "or". For example, A / B can mean A or B. In this article, "and / or" is merely a way of describing the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A alone, A and B at the same time, and B alone.

[0023] The terms "first," "second," etc., are used only for ease of description to distinguish identical or similar technical features and should not be construed as indicating or implying the relative importance or number of these technical features. Therefore, a feature defined by "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of embodiments of this application, unless otherwise stated, the term "multiple" means two or more.

[0024] Research has revealed that existing wireless transmission schemes using a closed-loop architecture are prone to phase-locked loop (PLL) loss due to voltage-controlled oscillator (VCO) frequency shift when there are significant changes in ambient temperature. This can cause transmission interruptions during image processing, resulting in insufficient system reliability.

[0025] To at least partially solve one or more of the above-mentioned problems and other potential problems, this application provides a wireless communication and image processing module, a wireless communication and image processing module chip, and a frequency calibration method thereof. It adopts a phase-locked loop (PLL) circuit with an open-loop structure, which is different from the traditional closed-loop architecture (open-loop replaces closed-loop). The circuit retains only the voltage-controlled oscillator and frequency divider, that is, it directly removes modules such as current pump and phase-frequency discriminator, which reduces the chip area and significantly reduces power consumption. It is particularly suitable for battery-powered analog signal image processing modules or devices; and it avoids system failures caused by PLL lockout from the root, thereby improving system reliability.

[0026] To facilitate understanding of this embodiment, a detailed description of the wireless communication and image processing module 10 disclosed in this application embodiment will be provided first, see [link to relevant documentation]. Figure 1 The diagram illustrates the architecture of a module provided in this application embodiment, including: a voltage-controlled oscillator 11 (VCO) and a frequency divider 12 (LO DIV), wherein the VCO and the frequency divider 12 are electrically connected; wherein: A voltage-controlled oscillator 11 is configured to acquire video signals transmitted from an analog camera and generate radio frequency signals based on the video signals; Frequency divider 12 is configured to divide the radio frequency signal to generate a radio frequency transmission signal in the required frequency band. The wireless communication and image processing module 10 is configured as an open-loop architecture without a phase-locked loop.

[0027] The wireless communication and image processing module 10 in this embodiment adopts an open-loop architecture, including only a voltage-controlled oscillator 11 and a frequency divider 12. The voltage-controlled oscillator 11 directly receives the video signal generated by the analog camera and generates a radio frequency signal; the frequency divider 12 performs frequency division processing on the radio frequency signal to adapt to different communication frequency bands. By eliminating modules such as CP, PFD, and MMD in a traditional PLL, the system significantly reduces power consumption and chip area.

[0028] To address the issue of VCO frequency being susceptible to temperature fluctuations in open-loop architectures, embodiments of this application introduce a software-configurable closed-loop calibration mechanism. For example... Figure 1 As shown, the wireless communication and image processing module 10 here also includes a calibration module 13. The calibration module 13 detects the vertical synchronization pulse in the video signal through a voltage comparator, thereby identifying the vertical blanking period, and performs frequency calibration on the voltage-controlled oscillator 11 during the vertical blanking period. Specifically, the voltage comparator here can be configured to identify the start of the blanking period by detecting the start pulse of the vertical blanking period in the video signal.

[0029] In practical applications, the output of the voltage-controlled oscillator 11 serves as the input of the calibration module 13. The calibration results of the calibration module 13 can also be applied to the voltage-controlled oscillator 11 to support VCO operation under precise calibration.

[0030] The vertical blanking period here refers to the time interval between the completion of one frame scan and the start of the next frame scan for the image signal and / or video signal. In practical applications, frequency calibration can be performed at a preset position within the vertical blanking period (i.e., a position where the level is stable and has the least impact on the image signal during calibration). Taking the Phase Alternating Line (PAL) video timing specification as an example, such as... Figure 2 The diagram shows the signal synchronization.

[0031] For two consecutive video frames, after the first field scan ends and before the second field scan begins, there is a time interval (i.e., the vertical blanking period) available for VCO frequency calibration, typically q = 27.3 µs. This time interval is only a part of the vertical sync pulse and does not carry any image signal (i.e., it pauses normal image transmission). Therefore, even if VCO calibration interferes with the output signal, it will not cause image damage.

[0032] In the embodiments of this application, the vertical blanking period can conform to the PAL standard specification, or it can conform to other standard specifications, such as the National Television Standards Committee (NTSC) television standard. No specific restrictions are imposed here.

[0033] In the actual calibration process, this embodiment compares the VCO output frequency with a reference frequency and adjusts the programmable capacitor array of the VCO according to the frequency deviation to bring the output frequency back to the target value. This process is performed periodically at fixed time intervals to ensure long-term frequency stability.

[0034] The frequency divider 12 here can be a multi-mode frequency divider, which is configured to support the generation of radio frequency signals in different frequency bands.

[0035] The open-loop architecture adopted in this application embodiment has high reusability and can be extended to other wireless communication systems that require frequency generation and calibration, such as 5G image acquisition terminals, wireless monitoring terminals, IoT devices, or mobile communication terminals. The use of multi-mode frequency dividers further supports multi-band operation and enhances system applicability.

[0036] The embodiments of this application achieve the following beneficial effects by combining open-loop hardware architecture with closed-loop software calibration: 1. Low power consumption and low cost: By eliminating multiple hardware modules in the PLL, the system power consumption and chip area are significantly reduced, thereby reducing manufacturing costs.

[0037] 2. High reliability: By performing frequency calibration during calibration intervals (such as the vertical blanking period), the lockout problem caused by temperature changes in traditional PLLs is avoided, ensuring continuous and stable image transmission.

[0038] 3. System simplification: The hardware structure is simple, easy to design and integrate, and shortens the product development cycle.

[0039] 4. Flexibility and compatibility: Supports multiple video standards such as PAL / NTSC, and achieves multi-band coverage through multi-mode frequency dividers, thereby expanding the application range.

[0040] Based on the wireless communication and image processing module 10 provided in the above embodiments, this application also provides a wireless communication and image processing module chip, such as... Figure 3 As shown, in addition to the aforementioned wireless communication and image processing module 10, the chip also includes a power amplifier 20, which is configured to amplify the frequency division signal generated by the wireless communication and image processing module 10.

[0041] Based on the wireless communication and image processing module provided in the above embodiments, this application also provides a frequency calibration method for the wireless communication and image processing module, which performs frequency calibration using the aforementioned wireless communication and image processing module. Figure 4 As shown, the specific steps include the following: S101: Detect synchronization gaps in video signals during video signal transmission by the wireless communication and image processing module; S102: The output frequency of the voltage-controlled oscillator is calibrated at a preset position within the detected synchronization gap; the preset position is configured to be a position with stable level and minimal impact on the image signal during calibration.

[0042] Here, the frequency adjustment method for voltage-controlled oscillators involves detecting a synchronization gap in the video signal during video signal transmission by the wireless communication and image processing module, in order to complete frequency calibration within this synchronization gap. The synchronization gap is the vertical blanking period in the video signal, which indicates the time interval between the completion of one frame scan and the start of the next frame scan for the image signal and / or video signal.

[0043] For details regarding the vertical blanking period and the specific calibration process within that period, please refer to the description above; it will not be repeated here.

[0044] In practical applications, frequency calibration is performed periodically at fixed time intervals, based on the normal transmission of image signals.

[0045] In the description of this specification, references to terms such as "some possible implementations," "some implementations," "example," "specific example," or "some examples" indicate that a specific feature, structure, material, or characteristic described in connection with that implementation or example is included in at least one implementation or example of this application, and the aforementioned terms do not necessarily refer to the same implementation or example. Furthermore, the described specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more implementations or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different implementations or examples described in this specification, as well as the features of different implementations or examples.

[0046] The method flowcharts for embodiments of this application describe certain operations as different steps performed in a certain order. Such flowcharts are illustrative and not restrictive. Some steps described herein may be grouped together and performed in a single operation, or some steps may be divided into multiple sub-steps, and some steps may be performed in an order different from that shown herein. The various steps shown in the flowcharts may be implemented in any way by any circuit structure and / or tangible mechanism (e.g., by software running on a computer device, hardware (e.g., logic functions implemented by a processor or chip), and / or any combination thereof).

[0047] Those skilled in the art will understand that in the methods described in the above specific embodiments, the order in which the steps are written does not imply a strict execution order, and the specific execution order of each step should be determined by its function and possible internal logic.

[0048] Based on the same inventive concept, this application also provides a frequency calibration device corresponding to the frequency calibration method for wireless communication and image processing modules. Since the principle of the device in this application is similar to the frequency calibration method described above in this application, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be described again.

[0049] Reference Figure 5 The diagram shown is a schematic of a frequency calibration device provided in an embodiment of this application. The device includes: a detection module 201 and a calibration module 202; wherein: Detection module 201 is used to detect synchronization gaps in video signals during the transmission of video signals by the wireless communication and image processing module; The calibration module 202 is used to calibrate the output frequency of the voltage-controlled oscillator at a preset position within the detected synchronization gap; the preset position is configured to be a position with stable level and minimal impact on the image signal during calibration.

[0050] In one possible implementation, the synchronization gap is the vertical blanking period in the video signal, which indicates the time interval between the completion of scanning one frame and the start of scanning the next frame for the image signal and / or video signal.

[0051] In one possible implementation, calibration module 202 is used to calibrate the output frequency of the voltage-controlled oscillator according to the following steps: Compare the output frequency of the voltage-controlled oscillator with the reference frequency; Based on the comparison results, the programmable capacitor array applied to the voltage-controlled oscillator is adjusted to make the output frequency approach the target frequency.

[0052] In one possible implementation, frequency calibration is performed periodically at fixed time intervals, based on the normal transmission of the image signal.

[0053] It should be noted that the apparatus in the embodiments of this application can implement each process of the aforementioned method and achieve the same effect and function, which will not be elaborated here.

[0054] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the steps of the frequency calibration method described in the above-described method embodiments. The storage medium can be a volatile or non-volatile computer-readable storage medium.

[0055] This application also provides a computer program product carrying program code. The program code includes instructions that can be used to execute the steps of the frequency calibration method described in the above method embodiments. For details, please refer to the above method embodiments, which will not be repeated here.

[0056] The aforementioned computer program product can be implemented through hardware, software, or a combination thereof. In one optional embodiment, the computer program product is specifically embodied in a computer storage medium; in another optional embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.

[0057] The various embodiments in this application are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on its differences from other embodiments. In particular, the descriptions of the apparatus, device, and computer-readable storage medium embodiments are simplified because they are substantially similar to the method embodiments; relevant details can be found in the descriptions of the method embodiments.

[0058] The apparatus, device, and computer-readable storage medium provided in the embodiments of this application correspond one-to-one with the method. Therefore, the apparatus, device, and computer-readable storage medium also have similar beneficial technical effects as their corresponding methods. Since the beneficial technical effects of the method have been described in detail above, the beneficial technical effects of the apparatus, device, and computer-readable storage medium will not be repeated here.

[0059] Those skilled in the art will understand that embodiments of this application can be implemented as methods and apparatus (devices or systems), or as computer-readable storage media. Therefore, this application can be implemented entirely in hardware, entirely in software, or in a combination of software and hardware. Furthermore, this application can be implemented as a computer-readable storage medium on one or more computer-readable storage media containing computer-usable program code (including but not limited to disk storage, read-only optical disc storage (CD-ROM), optical storage, etc.).

[0060] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (devices or systems), and computer-readable storage media according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to create a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or block diagrams.

[0061] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article including instruction means, wherein the instruction means implement the functions specified in one or more flowcharts and / or one or more blocks in a block diagram.

[0062] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more blocks in the block diagram.

[0063] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0064] Memory can include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0065] Computer-readable media include permanent and non-permanent, removable and non-removable media, which can store information by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer-readable storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory, read-only memory, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device. Furthermore, although the operations of the methods of this application are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple sub-steps.

[0066] While the spirit and principles of this application have been described above with reference to several specific embodiments, it should be understood that this application is not limited to the disclosed specific embodiments, and the division of aspects does not imply that features in these aspects cannot be combined. This application is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A wireless communication and image processing module, characterized in that, include: A voltage-controlled oscillator and a frequency divider, wherein the voltage-controlled oscillator and the frequency divider are electrically connected; The voltage-controlled oscillator is configured to acquire video signals transmitted from an analog camera and generate radio frequency signals based on the video signals; The frequency divider is configured to divide the radio frequency signal to generate a radio frequency transmission signal in the required frequency band. The wireless communication and image processing module is configured as an open-loop architecture without a phase-locked loop. The wireless communication and image processing module also includes a calibration module, which is configured to: detect the vertical synchronization pulse in the video signal through a voltage comparator, thereby identifying the vertical blanking period, and perform frequency calibration on the voltage-controlled oscillator during the vertical blanking period.

2. The wireless communication and image processing module according to claim 1, characterized in that, The calibration module is configured to perform frequency calibration on the voltage-controlled oscillator at a preset position within the vertical blanking period of the video signal. The vertical blanking period indicates the time interval between the completion of scanning one frame and the start of scanning the next frame for the image signal and / or video signal. The preset position is configured to be a position where the level is stable and has the least impact on the image signal during calibration.

3. The wireless communication and image processing module according to claim 2, characterized in that, The calibration module includes a voltage comparator; The voltage comparator is configured to identify the start point of the blanking period by detecting the start pulse of the vertical blanking period in the video signal.

4. The wireless communication and image processing module according to claim 2 or 3, characterized in that, The vertical blanking period conforms to the progressive phase inversion PAL or the National Television System Committee NTSC television standard specifications.

5. The wireless communication and image processing module according to claim 1, characterized in that, The frequency divider is a multi-mode frequency divider, which is configured to support the generation of radio frequency signals in different frequency bands.

6. A wireless communication and image processing module chip, characterized in that, include: The wireless communication and image processing module according to any one of claims 1 to 5, and the power amplifier; The power amplifier is configured to amplify the frequency-divided signal generated by the wireless communication and image processing module.

7. A frequency calibration method for a wireless communication and image processing module, characterized in that, The wireless communication and image processing module includes an open-loop voltage-controlled oscillator and a frequency divider, as well as a calibration module. The method includes: During the transmission of video signals by the wireless communication and image processing module, a synchronization gap in the video signal is detected; wherein, the vertical synchronization pulse in the video signal is detected by the voltage comparator of the calibration module, thereby identifying the vertical blanking period; The output frequency of the voltage-controlled oscillator is calibrated at a preset position within the identified vertical blanking period; the preset position is configured to be a position with stable level and minimal impact on the image signal during calibration.

8. The frequency calibration method according to claim 7, characterized in that, The synchronization gap is the vertical blanking period in the video signal, which indicates the time interval between the completion of scanning one frame and the start of scanning the next frame for the image signal and / or video signal.

9. The frequency calibration method according to claim 7, characterized in that, The calibration of the output frequency of the voltage-controlled oscillator includes: The output frequency of the voltage-controlled oscillator is compared with the reference frequency. Based on the comparison results, the programmable capacitor array applied to the voltage-controlled oscillator is adjusted so that the output frequency approaches the target frequency.

10. The frequency calibration method according to any one of claims 7 to 9, characterized in that, Based on the normal transmission of the image signal, the frequency calibration is performed periodically at fixed time intervals.

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