Current ratio outlier determination device and method for mos transistors

By standardizing the current values ​​of MOS transistors and setting limit values ​​using the median absolute deviation, the problem of outlier determination in MOS transistor measurement data is solved, enabling efficient and reliable SPICE model data selection when measurement data is limited.

CN121899472BActive Publication Date: 2026-06-19NEXCHIP SEMICON CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NEXCHIP SEMICON CO LTD
Filing Date
2026-03-24
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

When generating SPICE models of MOS transistors, it is difficult to determine the appropriateness of the measurement results, especially when the measurement data is limited. The model is easily affected by outliers, which can lead to a decrease in model accuracy.

Method used

By standardizing the linear and saturation current values ​​of MOS transistors, the apparent current ratio is calculated using the ratio of channel length to width. The upper and lower limits of the current ratio are determined using the median and median absolute deviation, and outliers are automatically detected.

🎯Benefits of technology

With limited measurement data, it can efficiently and robustly detect outliers, ensuring the reliability of data generated by the SPICE model and improving model accuracy.

✦ Generated by Eureka AI based on patent content.

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Abstract

This application relates to the field of semiconductor manufacturing technology, specifically to a device and method for determining outliers in the current ratio of a MOS transistor, comprising: standardizing the acquired linear current value and saturation current value; calculating the apparent current ratio, which is the ratio of the standardized linear current value to the standardized saturation current value; calculating the median of the current ratio; calculating the absolute deviation of the median based on the current ratio and the median; calculating the upper limit management limit value and the lower limit management limit value based on the median of the current ratio and the absolute deviation of the median; and determining the current ratio as an outlier if it is greater than the upper limit management limit value or less than the lower limit management limit value, thereby improving the reliability of the measurement data.
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Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, specifically to a device and method for determining outlier values ​​in the current ratio of a MOS transistor, which can automatically determine abnormal values ​​in MOS transistor measurement data and improve the reliability of the measurement data. Background Technology

[0002] In recent years, SPICE models have been used in electronic circuit design to accurately reproduce the operating characteristics of MOS transistors. As exemplified in Patent Document 1, a SPICE model is a mathematical representation of how a MOS transistor performs electrical operations. Designers use the SPICE model to perform simulations to verify the operation of the circuit in advance.

[0003] By measuring multiple chips with identical MOS transistor designs, MOS transistor characteristic data for generating SPICE models of MOS transistors are obtained. Therefore, by comparing the fluctuations in the measurement results, measurement errors and abnormal data can be detected and eliminated, improving the reliability of parameter extraction. Prior art documents: Patent Document 1: Japanese Patent Application Publication No. 2005-064164; Patent Document 2: Japanese Patent No. 7169275. Summary of the Invention

[0004] However, when generating a SPICE model of a MOS transistor, if only a single chip of the MOS transistor formed on the substrate is used as the measurement object, it is difficult to determine the appropriateness of the measurement results because there is no comparable object with the same structure.

[0005] In particular, when parasitic resistance is unexpectedly added to the MOS transistor due to poor probe contact during measurement or minor fluctuations in the measurement environment, abnormal values ​​of the drain current (Id) may sometimes occur. For example, as shown in Patent Document 2, a sensor device that detects changes in the electrical properties of a substrate by binding to an analyte with an insect olfactory receptor suggests that the interaction between the sensor device and the object being detected can have a significant impact on the electrical properties.

[0006] For example Figure 1 As shown, in the linear region of IdVg and the saturated region of IdVd, if there is no expected value (dashed line), it is difficult to determine or detect such outliers based solely on the waveform shape (solid line). If they are mistakenly used directly for parameter extraction in the SPICE model, the accuracy of the SPICE model may be significantly reduced.

[0007] Furthermore, due to the operating characteristics of MOS transistors, which vary significantly with changes in channel length L and channel width W, the absolute value of the drain current (Id) depends on both channel length L and channel width W. Therefore, it is difficult to determine outliers based on a single current value; it is necessary to consider the analysis results of the correlation between measurement data based on different channel lengths L and channel widths W.

[0008] Furthermore, when the number of MOS transistors in the target object is limited, conventional statistical methods, such as threshold settings based on σ, are susceptible to outliers, making it difficult to make stable determinations.

[0009] Therefore, the purpose of this invention is to provide a current ratio outlier determination device and method for MOS transistors, which can take into account the correlation between measurement data of multiple MOS transistors with different channel lengths L and channel widths W, and efficiently and automatically detect outliers. Even when the measurement data is limited, it can maintain robustness and select measurement data that is suitable for SPICE model generation and has high reliability.

[0010] Methods for solving problems

[0011] This invention relates to a current ratio outlier determination device for a MOS transistor, the device comprising:

[0012] A data input section is used to input measurement data, which is related to the linear current and saturation current values ​​of multiple MOS transistors with different channel lengths and widths; and

[0013] The control unit shall perform the following steps:

[0014] Based on the linear current value, saturation current value, channel length and channel width of the MOS transistor, determine the standard value of the linear current, the standard value of the saturation current, and the apparent current ratio after standardization. The apparent current ratio is related to the ratio of the standard value of the linear current to the standard value of the saturation current.

[0015] The median of the current ratio is determined based on the apparent current ratio.

[0016] Determine the absolute deviation of the median based on the current ratio and the median of the current ratio;

[0017] Based on the median and absolute deviation of the current ratio, determine the upper limit management limit value as the upper limit value of the current ratio, and the lower limit management limit value as the lower limit value of the current ratio.

[0018] If the current ratio is greater than the upper limit of the management limit or less than the lower limit of the management limit, the current ratio will be judged as an outlier.

[0019] In some embodiments, the control unit is configured to:

[0020] Based on the channel length L and channel width W of the MOS transistor, the linear current value I obtained from the data input section is calculated using the following formula 1. dl After standardization, the standard value I of the linear current is obtained. dl_std ;

[0021] I dl_std =I dl ×L / W …Formula 1.

[0022] In some embodiments, the control unit is configured to:

[0023] Based on the channel length L and channel width W of the MOS transistor, the saturation current value I obtained from the data input section is calculated using the following formula 2. ds After standardization, the standard value I of the saturation current is obtained. ds_std ;

[0024] I ds_std =I ds ×L / W …Formula 2.

[0025] In some embodiments, the control unit is configured to:

[0026] The apparent current ratio I is calculated using the following formula 3. d_ratio ;

[0027] I d_ratio =I ds_std / I dl_std …Equation 3.

[0028] In some embodiments, the control unit is configured to:

[0029] The median absolute deviation (MAD) is calculated using the following formula 4.

[0030] The upper limit management limit value UCL is calculated using the following formula 5;

[0031] The lower limit management limit value LCL is calculated using the following formula 6;

[0032] MAD=1.4826×median×|I d_ratio -Median of current ratio | …Equation 4;

[0033] UCL = Median of current ratio + MAD × N … Formula 5;

[0034] LCL = Median of current ratio - MAD × N … Formula 6;

[0035] N is 3~5 or N is 2~2.5.

[0036] Based on the above configuration, since the current value of a MOS transistor is proportional to the ratio of channel length L to channel width W (L / W), the current value can be standardized to suppress fluctuations in individual MOS transistors. The standardized linear current has a standard value (I0). dl_std ) and the standard value of saturation current (I ds_std In evaluating the fluctuation of the ratio, the median and median absolute deviation (MAD) are used instead of the mean. Therefore, even with a few outliers, the statistics will not be significantly distorted, and the median absolute deviation (MAD) can serve as a robust indicator that is not easily affected by outliers. Thus, the upper limit management limit (UCL) and lower limit management limit (LCL) can be set without being affected by outliers. As a result, outliers can be efficiently and automatically detected while considering the correlation between measurement data of MOS transistors with different channel lengths L and channel widths W, selecting only measurement data that are suitable for SPICE model generation and have high reliability.

[0037] Alternatively, in the above-described determination device, if the current ratio above a predetermined benchmark is determined to be an outlier during the determination process, the control unit removes multiple current ratios determined to be outliers and then performs the median calculation process, the median absolute deviation calculation process, the management limit calculation process, and the determination process again.

[0038] Based on the above structure, it is possible to prevent the initial outliers from distorting the statistics while setting new management limits that reflect the correlations of the remaining data through re-evaluation, thus maintaining robust outlier detection even with limited measurement data. As a result, even with limited measurement data, it is possible to select measurement data that is suitable for generation by the SPICE model and has high reliability.

[0039] This application provides a method for determining the outlier value of the current ratio of a MOS transistor, including:

[0040] Acquire measurement data, which are related to the linear current and saturation current values ​​of MOS transistors with multiple different channel lengths and channel widths;

[0041] Based on the linear current value, saturation current value, channel length and channel width of the MOS transistor, determine the standard value of the linear current, the standard value of the saturation current, and the apparent current ratio after standardization. The apparent current ratio is related to the ratio of the standard value of the linear current to the standard value of the saturation current.

[0042] The median of the current ratio is determined based on the apparent current ratio.

[0043] Determine the absolute deviation of the median based on the current ratio and the median of the current ratio;

[0044] Based on the median and absolute deviation of the current ratio, determine the upper limit management limit value as the upper limit value of the current ratio, and the lower limit management limit value as the lower limit value of the current ratio.

[0045] If the current ratio is greater than the upper limit of the management limit or less than the lower limit of the management limit, the current ratio will be judged as an outlier.

[0046] In some embodiments, based on the channel length L and channel width W of the MOS transistor, the obtained linear current value I is calculated using the following formula 1. dl After standardization, the standard value I of the linear current is obtained. dl_std ;

[0047] I dl_std =I dl ×L / W …Formula 1.

[0048] In some embodiments, based on the channel length L and channel width W of the MOS transistor, the obtained saturation current value I is calculated using the following formula 2. ds After standardization, the standard value I of the saturation current is obtained. ds_std ;

[0049] I ds_std =I ds ×L / W …Formula 2;

[0050] The apparent current ratio I is calculated using the following formula 3. d_ratio ;

[0051] I d_ratio =I ds_std / I dl_std …Equation 3.

[0052] In some embodiments, the median absolute deviation (MAD) is calculated using the following formula 4;

[0053] The upper limit management limit value UCL is calculated using the following formula 5;

[0054] The lower limit management limit value LCL is calculated using the following formula 6;

[0055] MAD=1.4826×median×|I d_ratio -Median of current ratio | …Equation 4;

[0056] UCL = Median of current ratio + MAD × N … Formula 5;

[0057] LCL = Median of current ratio - MAD × N … Formula 6;

[0058] N is 3~5 or N is 2~2.5.

[0059] This application provides a computer device, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the program, it implements the steps of the method for determining the outlier value of the current ratio of a MOS transistor as described in any embodiment of this application.

[0060] This application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the method for determining the outlier value of the current ratio of a MOS transistor as described in any embodiment of this application.

[0061] The unexpected technical effects that the above-described embodiments of this application can produce include:

[0062] A device or method for determining outliers in the current ratio of a MOS transistor can be provided, which can take into account the correlation between measurement data of MOS transistors with multiple different channel lengths L and channel widths W, and efficiently and automatically detect outliers. It can maintain robustness even when the measurement data is limited, and can select measurement data that is suitable for SPICE model generation and has high reliability. Attached Figure Description

[0063] Figure 1 It is a graph showing the waveform shapes of expected values ​​(dashed lines) and outliers (solid lines) in the linear and saturated regions.

[0064] Figure 2 This is a block diagram of the information processing apparatus according to this embodiment;

[0065] Figure 3 This is a flowchart of the outlier determination process involved in this embodiment;

[0066] Figure 4 This is an example of the result display method of the determination process involved in this embodiment.

[0067] Explanation of reference numerals in the attached figures

[0068] 1. Information processing device; 2. Control unit; 3. Storage unit; 4. Data input unit; 5. Display unit. Detailed Implementation

[0069] The operating characteristics of a MOS transistor largely depend on its dimensions, specifically the channel length L and channel width W. The channel length L is the length from one end of the gate electrode to the other, along the direction of current flow. The channel width W is the lateral width of the gate, also along the direction of current flow. If the channel length L and channel width W differ, the current value and switching characteristics of the MOS transistor will also change.

[0070] Therefore, to generate an accurate SPICE model, it is necessary to determine the characteristic data of MOS transistors manufactured using multiple combinations of different channel lengths L and channel widths W, and to model each operating characteristic. This allows for the simulation of the operating characteristics of MOS transistors under various conditions required for electronic circuit design. The following refers to the appendix... Figure 1 The embodiments of the present invention will be described below.

[0071] The linear current value (I) of a MOS transistor dl ) and saturation current value (I ds The measured data related to the channel length L and channel width W (W / L) are directly proportional to each other, and are expressed by different formulas in the linear region (IdVg Linear) and the saturation region (IdVd Saturation). In the schematic diagram of the linear region (IdVg Linear), the dashed line represents the expected value data waveform, and the solid line represents the data waveform with outliers; in the schematic diagram of the saturation region (IdVd Saturation), the dashed line represents the expected value data waveform, and the solid line represents the data waveform with outliers. Therefore, in each MOS transistor, the measured linear current value (I... dl ) and saturation current value (I ds The linear current value (I) exhibits significant fluctuations and is discretely distributed. Therefore, in this embodiment, the information processing device 1 (equivalent to a determination device) calculates the aforementioned linear current value (I). dl ) and saturation current value (I ds The dependence of the MOS transistor on the channel length L and channel width W is removed by using the standard values ​​of the linear current and saturation current after W / L normalization. The ratio of the standard value of the linear current to the standard value of the saturation current is theoretically approximately constant. The outlier detection process is performed according to the following steps.

[0072] In this embodiment, such as Figure 2As shown, the information processing device 1 is, for example, a general-purpose computer, which includes: a control unit 2 containing a CPU; a storage unit 3 for holding or storing measurement data and programs; a data input unit 4 for inputting measurement data into the storage unit 3; and a display unit 5 for displaying judgment results, etc. The storage unit 3 stores a data area containing measurement data of MOS transistors and program code for executing various processes. The control unit 2 reads and executes the program code recorded in the storage unit 3, performing various processes while referring to / updating the measurement data stored in the storage unit 3.

[0073] The data input unit 4 is an input device for placing measurement data of MOS transistors into the data area of ​​the storage unit 3, and can be configured as follows according to the embodiment.

[0074] Data transfer device: Configured to read measurement data files stored in an external storage device (e.g., a USB memory) and transfer them to the data area of ​​the storage unit of the information processing device 1. This allows for easy insertion of the linear current value (I0) of the MOS transistor, measured using an external measurement system and experimental apparatus. dl ), and saturation current value (I ds (and other measurement data.)

[0075] Manual input device: configured to input the linear current value (IL) of the MOS transistor measured by an external measurement system or experimental setup. dl ) and saturation current value (I ds Measurement data, such as those obtained from the keyboard or digital tablet, can be directly input.

[0076] Measurement device connection: Configured for direct connection to measure the linear current value of the MOS transistor (I0). dl ) and saturation current value (I ds External measurement systems and experimental devices, such as those used in storage units 3, directly store the measurement data in the data area of ​​the storage unit 3.

[0077] The following is in accordance with Figure 3 The outlier determination process includes: an example of performing outlier determination using 15 MOS transistors for testing will be described. Here, the steps for processing the actual measurement data by the information processing device 1 will be explained.

[0078] In this embodiment, 15 MOS transistors with different channel lengths L and channel widths W are prepared. The channel lengths L and channel widths W of the 15 prepared MOS transistors are stored in the data area of ​​the storage unit 3 of the information processing device 1.

[0079] Next, using an external measurement system and experimental setup, the linear current value (IL) of each MOS transistor was measured. dl) and saturation current value (I ds ).

[0080] The measured linear current values ​​(I) of the 15 MOS transistors are transmitted through the data input unit 4. dl ) and saturation current value (I ds The measurement data is stored in the data area of ​​the storage unit 3 of the information processing device 1 to acquire measurement data of the MOS transistor. As described above, the measurement data input method via the data input unit 4 can utilize a data transfer device, a manual input device, or a connection to a measuring instrument.

[0081] Next, since the current value of a MOS transistor is proportional to the ratio (L / W) of its channel length L, the current value can be standardized to suppress fluctuations in each MOS transistor. Specifically, the standardization process S1 includes: using (Equation 1), the linear current values ​​(IL, IW, and IW) of the 15 MOS transistors stored in the data area of ​​the storage unit 3 are... dl Standardized based on the channel length L and channel width W of each MOS transistor.

[0082] I dl_std =I dl ×L / W … (Formula 1)

[0083] The standard value of the linear current (I) after standardization by (Equation 1) dl_std The data area of ​​storage unit 3 stores the linear current of the 15 MOS transistors in this embodiment. Furthermore, the standard values ​​(I0) of the linear current of the 15 MOS transistors in this embodiment are stored in the data area of ​​storage unit 3. dl_std (This is shown in column A of Table 1.)

[0084] Table 1

[0085]

[0086] Similarly, using (Equation 2), the saturation current values ​​(Is) of the 15 MOS transistors obtained from the data input unit 4 are calculated. ds Standardization is performed based on the channel length L and channel width W of each MOS transistor.

[0087] I ds_std =I ds ×L / W …(Formula 2)

[0088] The standard value of the saturation current (I) after standardization by (Equation 2) ds_std The data area of ​​storage unit 3 stores the saturation current of the 15 MOS transistors in this embodiment. Furthermore, the standard values ​​(Isaturation current) of the 15 MOS transistors in this embodiment are stored in the data area of ​​storage unit 3. ds_std (This is shown in column B of Table 1.)

[0089] Next, the current ratio calculation process S2 includes: calculating the standard value (I) of the standardized linear current after standardization processing using (Equation 3). dl_std ) and the standard value of saturation current (I ds_std The ratio of the apparent currents (I) to the apparent current ratio (I) d_ratio ).

[0090] I d_ratio =I ds_std / I dl_std …(Equation 3)

[0091] The apparent current ratio (I) calculated through (Equation 3) d_ratio The data is stored in the data area of ​​storage unit 3. Furthermore, the apparent current ratio (I1) of the 15 MOS transistors in this embodiment is... d_ratio (This is shown in column C of Table 1.)

[0092] Next, the median calculation process S3 includes: calculating the apparent current ratio (I0) of the 15 MOS transistors calculated by the current ratio calculation process. d_ratio The median is calculated as follows: If the number of MOS transistors is odd, the median value is selected; if the number is even, the average of the two median values ​​is calculated as the median. In this embodiment, the apparent current ratio (I0) of the 15 MOS transistors listed in column C of Table 1 is... d_ratio The median (C_Median) is "51.0".

[0093] Next, the median absolute deviation calculation process S4 includes: based on the current ratio calculated by the current ratio calculation process, and the apparent current ratio (I) calculated by the median calculation process. d_ratio The median (C_Median) is used to calculate the absolute deviation of the median (MAD) using (Equation 4).

[0094] Median absolute deviation (MAD) = 1.4826 × median × |I d_ratio -Median of current ratio | … (Equation 4);

[0095] In this embodiment, column D of Table 1 lists ABS (I) with 15 MOS transistors. d_ratio - The median current ratio (C_Median)). And, the ABS (I_Median) of these 15 MOS transistors. d_ratio The median (D_Median) of the median current ratio (C_Median) is 1.9. Therefore, the absolute deviation of the median (MAD) is approximately 1.4826 × 1.9 ≈ 2.817.

[0096] Next, the management limit calculation process S5 includes: based on the median of the current ratio (C_Median) calculated in the median calculation process, and the median absolute deviation (MAD) calculated in the median absolute deviation calculation process, the current ratio (I_Median) is calculated using (Equation 5). d_ratio The upper limit management limit (UCL) of the upper limit value of the current ratio is calculated. In addition, based on the median of the current ratio (C_Median) calculated in the median calculation process and the median absolute deviation (MAD) calculated in the median absolute deviation calculation process, the lower limit management limit (LCL) of the current ratio is calculated by (Equation 6).

[0097] Upper limit management limit (UCL) = median current ratio + median absolute deviation (MAD) × 3 (or N) … (Equation 5);

[0098] Lower limit of management (LCL) = median current ratio - median absolute deviation (MAD) × 3 (or N) … (Equation 6).

[0099] Here, N represents any scaling factor (scale factor) used to control outliers. By setting a scaling factor for the median absolute deviation (MAD), which represents the dispersion of the measurement data, it determines how much the measurement data deviates from the median of the current ratio from an outlier. Typically, N is set to 3, but if you want to moderate the distribution of the measurement data or detect outliers, N can be set to 3–5, for example, N can be set to 3, 4, or 5. If you want to tighten the distribution of the measurement data or detect outliers, N can be set to 2–2.5, for example, N can be set to 2, 2.1, 2.2, 2.3, 2.4, or 2.5.

[0100] In this embodiment, the upper limit management limit (UCL) = 51.0 + 2.817 × 3 = 59.451. Additionally, the lower limit management limit (LCL) = 51.0 + 2.817 × 3 = 42.549.

[0101] Next, the determination process S6: If the current ratio of the 15 MOS transistors calculated by the current ratio calculation process is greater than the upper limit management limit (UCL), the current ratio is determined to be an outlier. Similarly, if the current ratio of the 15 MOS transistors calculated by the current ratio calculation process is less than the lower limit management limit (LCL), the current ratio is determined to be an outlier.

[0102] In this embodiment, as shown in Table 1, the current ratio of the MOS transistor with serial number 3, "61.5", is greater than the upper limit control limit (UCL) of "59.451", and is therefore determined to be an outlier. Similarly, since the current ratio of the MOS transistor with serial number 12, "65", is greater than the upper limit control limit (UCL) of "59.451", it is also determined to be an outlier. Furthermore, in this embodiment, there are no MOS transistors with a current ratio less than the lower limit control limit (LCL) of "42.549".

[0103] Next, the determination result display process S7: displays the result of the determination process on the display unit 5. For example... Figure 4 As shown, outliers such as "59.451" for the current ratio of MOS transistor number 3 (which exceeds the upper limit of the control limit (UCL)) and "61.5" for the current ratio of MOS transistor number 12 (which exceeds the upper limit of the control limit (LCL)) can also be displayed to distinguish them from the current ratios of MOS transistors within the normal range between the upper and lower limits of the control limit (UCL) by using methods such as overlaying (×) or coloring. Additionally, as... Figure 4 As shown, the current characteristics (IDL characteristics) of each MOS transistor in the linear region can also be displayed, comparing the Id-Vg curve (solid line) of drain current versus gate voltage with the Id-Vg curve (dashed line) of expected value for MOS transistors that are identified as outliers.

[0104] Based on the above processing steps, the linear current value (I) of the MOS transistor is... dl ) and saturation current value (I ds The current value (I) is proportional to the ratio of channel length L to channel width W (L / W). Therefore, it is possible to suppress the fluctuations of individual MOS transistors and achieve a linear current value (I). dl ) and saturation current value (I ds Standardization. The standardized linear current (I) is then used as the standard value. dl_std ) and the standard value of saturation current (I ds_std In evaluating the fluctuation of the ratio, the median and median absolute deviation (MAD) are used instead of the mean. Therefore, even with a few outliers, the statistics will not be significantly distorted, resulting in a robust indicator that is not easily affected by outliers. Thus, the upper limit management limit (UCL) and lower limit management limit (LCL) can be set without being affected by outliers. As a result, outliers can be efficiently and automatically detected while considering the correlation between measurement data of MOS transistors with different channel lengths L and channel widths W, selecting only measurement data that are suitable for SPICE model generation and have high reliability.

[0105] Here, we re-evaluate the processing: when the current ratio of multiple MOS transistors (I... d_ratio When a value is identified as an outlier, the median (C_Median), median absolute deviation (MAD), upper limit management limit (UCL), and lower limit management limit (LCL) in the initial median calculation process may be significantly distorted due to the influence of multiple outliers, and normal values ​​may also be incorrectly excluded. Therefore, in this embodiment, the determination of whether a value is included in the determination process is based on the current ratio (I_Median) of the MOS transistor above a certain reference number. d_ratio This value is identified as an outlier (S8). Then, as a result of the determination process, the current ratio (I) of the MOS transistor above a specified reference number is determined. d_ratio If the value is identified as an outlier (S8: Yes), the following re-evaluation process is performed.

[0106] First, outlier removal processing (S9) is used to remove the current ratio data that became outliers in the decision-making process from the current ratio dataset.

[0107] Then, for the remaining current ratio data, the median calculation process (S3) is performed again to calculate a new median (C_Median).

[0108] Then, through the median absolute deviation calculation process (S4), the median absolute deviation (MAD) is recalculated using the new median (C_Median). Based on this, through the management limit calculation process (S5), the upper limit management limit value (UCL) and the lower limit management limit value (LCL) are recalculated.

[0109] Then, using the calculated new upper limit management limit (UCL) and lower limit management limit (LCL), the decision process (S6) is performed again to determine whether it is an outlier.

[0110] By repeatedly performing this re-evaluation process until the number of outliers falls below a predetermined threshold, a stable statistical measure unaffected by initial outliers can be used to determine whether an outlier is an outlier. Furthermore, the predetermined criteria for determining whether to repeatedly perform the re-evaluation process can be arbitrarily set. For example, thresholds such as "re-evaluation is performed when the ratio of currents that are outliers in the initial determination is above a predetermined proportion of the total" can be arbitrarily set based on the total number of MOS transistors being measured and the required accuracy of the SPICE model.

[0111] The re-evaluation process described above prevents the initial outliers from distorting the statistics. Furthermore, by setting new upper control limits (UCL) and lower control limits (LCL) that reflect the correlation of the remaining data after removing the initial outliers, the system can maintain robust outlier detection even with limited data. Consequently, even with limited data, it is possible to select reliable measurement data suitable for SPICE model generation.

[0112] This application also provides a computer device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps of the method for determining the outlier value of the current ratio of a MOS transistor as described in any of the preceding embodiments.

[0113] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method for determining the outlier value of the current ratio of a MOS transistor as described in any of the preceding embodiments.

[0114] The outlier determination process performed in the above embodiments can also be installed as software (program, data) in information processing devices such as smartphones, portable computers, laptops, tablets, handheld computers, and PDAs (Personal Data Assistants) and executed. In this case, the software can also be downloaded from a server or similar device and stored in a storage device (flash memory, etc.) within the portable information device via communication means. Furthermore, the communication means can be a bidirectional transmission path such as the Internet or cable television, or a broadcast that only transmits information in one direction.

[0115] In addition, the software (program) that performs the above outlier determination process can also be stored in storage media such as CD-ROM, DVD-ROM, MO (magneto-optical disk), hard disk, flash memory, etc., and can be read from the storage medium and installed in the storage unit 3 of the information processing device 1 as needed.

[0116] In addition, the descriptions in the above embodiments can also be implemented as a service executed between information terminals (input of various information) such as smartphones and PCs and information processing device 1 via the Internet (communication line).

[0117] Furthermore, the processing performed in the above embodiments can also be implemented as a method for determining outlier values ​​of the current ratio of a MOS transistor using an information processing device 1, etc. The embodiments of the present invention have been described above, but these are merely specific examples and are not intended to limit the present invention. The specific configurations of each means, etc., can be appropriately modified. Furthermore, the effects described in the embodiments of the present invention are merely examples of the best effects produced by the present invention, and the effects of the present invention are not limited to those described in the embodiments of the present invention.

Claims

1. A device for determining the outlier value of the current ratio of a MOS transistor, characterized in that, include: The data input section is used to input measurement data, which is related to the linear current value and saturation current value of a MOS transistor having multiple different channel lengths and channel widths. as well as The control unit shall perform the following steps: Based on the linear current value, the saturation current value, the channel length and channel width of the MOS transistor, a standardized value for the linear current, a standardized value for the saturation current, and an apparent current ratio are determined. This apparent current ratio is related to the ratio of the standardized value of the linear current to the standardized value of the saturation current. The standardization process is used to remove the dependence of the MOS transistor on the channel length L and channel width W. The ratio of the standardized value of the linear current to the standardized value of the saturation current is theoretically approximately constant. The median of the current ratio is determined based on the apparent current ratio; Determine the absolute deviation of the median based on the current ratio and the median of the current ratio; Based on the median of the current ratio and the absolute deviation of the median, determine the upper limit management limit value as the upper limit value of the current ratio and the lower limit management limit value as the lower limit value of the current ratio. If the current ratio is greater than the upper limit management limit or less than the lower limit management limit, the current ratio is determined to be an outlier. In the case where the current ratio above a specified benchmark is determined to be an outlier during the determination process, the control unit removes multiple current ratios that are determined to be outliers and then performs the median calculation process, the median absolute deviation calculation process, the management limit calculation process, and the determination process again.

2. The device for determining the outlier value of the current ratio of a MOS transistor according to claim 1, characterized in that, The control unit is configured to: Based on the channel length L and channel width W of the MOS transistor, the linear current value I obtained from the data input section is calculated using the following formula 1. dl The standard value I of the linear current is obtained by standardization. dl_std ; I dl_std =I dl ×L / W…Formula 1.

3. The device for determining the outlier value of the current ratio of a MOS transistor according to claim 2, characterized in that, The control unit is configured to: Based on the channel length L and channel width W of the MOS transistor, the saturation current value I obtained from the data input section is calculated using the following formula 2. ds The standard value I of the saturation current is obtained by standardization. ds_std ; I ds_std =I ds ×L / W…Formula 2.

4. The device for determining the outlier value of the current ratio of a MOS transistor according to claim 3, characterized in that, The control unit is configured to: The apparent current ratio I is calculated using the following formula 3. d_ratio ; I d_ratio =I ds_std / I dl_std ...Formula 3.

5. The device for determining the outlier value of the current ratio of a MOS transistor according to claim 3, characterized in that, The control unit is configured to: The median absolute deviation (MAD) is calculated using the following formula 4. The upper limit management limit value UCL is calculated using the following formula 5; The lower limit management limit value LCL is calculated using the following formula 6; MAD=1.4826×median×|I d_ratio -Median of current ratio | …Equation 4; UCL = Median of current ratio + MAD × N … Formula 5; LCL = Median of current ratio - MAD × N … Formula 6; N is 3~5 or N is 2~2.

5.

6. A method for determining outliers in the current ratio of a MOS transistor, characterized in that, include: Acquire measurement data, which is related to the linear current value and saturation current value of a MOS transistor having multiple different channel lengths and channel widths; Based on the linear current value, the saturation current value, the channel length and channel width of the MOS transistor, a standardized value for the linear current, a standardized value for the saturation current, and an apparent current ratio are determined. This apparent current ratio is related to the ratio of the standardized value of the linear current to the standardized value of the saturation current. The standardization process is used to remove the dependence of the MOS transistor on the channel length L and channel width W. The ratio of the standardized value of the linear current to the standardized value of the saturation current is theoretically approximately constant. The median of the current ratio is determined based on the apparent current ratio; Determine the absolute deviation of the median based on the current ratio and the median of the current ratio; Based on the median of the current ratio and the absolute deviation of the median, determine the upper limit management limit value as the upper limit value of the current ratio and the lower limit management limit value as the lower limit value of the current ratio. If the current ratio is greater than the upper limit management limit or less than the lower limit management limit, the current ratio is determined to be an outlier. In the case where the current ratio above the specified benchmark is determined to be an outlier during the determination process, multiple current ratios determined to be outliers are removed, and the median calculation process, the median absolute deviation calculation process, the management limit calculation process, and the determination process are executed again.

7. The method for determining the outlier value of the current ratio of a MOS transistor according to claim 6, characterized in that, Based on the channel length L and channel width W of the MOS transistor, the obtained linear current value I is calculated using the following formula 1. dl The standard value I of the linear current is obtained by standardization. dl_std ; I dl_std =I dl ×L / W…Formula 1.

8. The method for determining the outlier value of the current ratio of a MOS transistor according to claim 7, characterized in that, Based on the channel length L and channel width W of the MOS transistor, the obtained saturation current value I is calculated using the following formula 2. ds The standard value I of the saturation current is obtained by standardization. ds_std ; I ds_std =I ds ×L / W…Formula 2; The apparent current ratio I is calculated using the following formula 3. d_ratio ; I d_ratio =I ds_std / I dl_std ...Formula 3.

9. The method for determining the outlier value of the current ratio of a MOS transistor according to claim 8, characterized in that, The median absolute deviation (MAD) is calculated using the following formula 4. The upper limit management limit value UCL is calculated using the following formula 5; The lower limit management limit value LCL is calculated using the following formula 6; MAD=1.4826×median×|I d_ratio -Median of current ratio | …Equation 4; UCL = Median of current ratio + MAD × N … Formula 5; LCL = Median of current ratio - MAD × N … Formula 6; N is 3~5 or N is 2~2.5.

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