Chip circuit device of Ka-band transmitting assembly
By designing a Ka-band transmitter chip circuit device, combining a silicon-based amplitude and phase multifunctional circuit and a gallium arsenide power amplifier circuit, and optimizing the cascaded topology and matching network, the limitations of storage space and computation time in large-scale circuit simulation tools were solved, achieving efficient circuit analysis and design and stable power output.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-05
- Publication Date
- 2026-04-21
Smart Images
Figure CN121907260A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of radio frequency integrated microsystems, and specifically relates to a Ka-band transmitter component chip circuit device. Background Technology
[0002] Ka-band has become the core frequency band for high-capacity communication due to its wide bandwidth advantage. As the scale of circuits continues to expand and the integration level continues to increase, traditional circuit simulation methods are facing severe challenges.
[0003] Most existing circuit simulation tools have significant limitations in terms of storage space and computation time, making it difficult to meet the needs of analyzing and designing large-scale integrated circuit networks or complex systems. Especially when handling the simulation of large-scale, highly integrated circuits, they often consume substantial computational resources, and the simulation time increases significantly when the circuit size expands or nonlinear components are involved. Furthermore, simulation accuracy is limited by the accuracy of standardized component models, leading to unavoidable deviations between simulation results and actual test data.
[0004] Therefore, there is an urgent need for a Ka-band transmitter chip circuit device that can achieve a precise balance between linearity, gain and impedance matching by optimizing the cascaded topology, load pulling and matching network, and performing simulation analysis on large-scale integrated circuits to ensure stable power output of the transmitter in the entire Ka band. Summary of the Invention
[0005] The purpose of this invention is to address the problem that traditional circuit models cannot complete the analysis and design of large-scale integrated circuit networks or systems under limited storage space and computation time, and to propose a Ka-band transmitter component chip circuit device. The device includes: Silicon-based amplitude-phase multifunctional circuit and gallium arsenide power amplifier circuit; The silicon-based amplitude-phase multifunctional circuit includes a power distribution circuit, a drive amplifier circuit, a digitally controlled attenuation circuit, and a digitally controlled phase shifting circuit. The device also includes a COM terminal, which is connected to the input terminal of a power distribution circuit. The output terminal of the power distribution circuit is connected to the input terminal of a digitally controlled phase-shifting circuit. The output terminal of the digitally controlled phase-shifting circuit is connected to the input terminal of a drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a digitally controlled attenuation circuit. The output terminal of the digitally controlled attenuation circuit is connected to the input terminal of the drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a gallium arsenide power amplifier circuit.
[0006] Furthermore, the signal transmission path of the device is as follows: the radio frequency input signal is input from the COM terminal, passes through the power distribution circuit to the transmission channel, and is amplified, phase-shifted and attenuated by the drive amplifier circuit, the digitally controlled attenuation circuit and the digitally controlled phase-shifting circuit, and is output to the outside through the gallium arsenide power amplifier circuit.
[0007] Furthermore, the gallium arsenide power amplifier circuit adopts a three-stage cascaded topology, and the gallium arsenide power amplifier circuit includes a first-stage unit, a second-stage unit, and an output stage unit; The RF input signal is amplified by the first stage unit for small signal gain. The amplified signal is further amplified by the second stage unit for small signal gain and output power to drive the output stage unit. The output stage unit outputs a Ka-band signal.
[0008] Furthermore, the gallium arsenide power amplifier circuit is also equipped with an RFin radio frequency input terminal, an RFout radio frequency output terminal, and a drain voltage terminal VD and a gate voltage terminal VG. The RFin input terminal is connected in series with the first inductor L1. The second end of the first inductor L1 is connected to the first end of the second inductor L2. The second end of the second inductor L2 is connected to the first end of the fourth capacitor C4. The second end of the fourth capacitor C4 is connected to the gate of the first-stage common-source amplifier. The gate of the first-stage common-source amplifier is connected to the gate voltage terminal VG through the third inductor L3. The drain of the first-stage common-source amplifier is connected to the drain voltage terminal VD through the fourth inductor L4. The gate of the second-stage common-source amplifier is connected to the gate voltage terminal VG via the eighth inductor L8, and the drain of the second-stage common-source amplifier is connected to the drain voltage terminal VD via the ninth inductor L9. The gate of the common-source amplifier in the output stage is connected to the gate voltage terminal VG via the fourteenth inductor L14, and the drain of the common-source amplifier in the output stage is connected to the drain voltage terminal VD via the fifteenth inductor L15. The drain of the common-source amplifier in the output stage is also connected to the first terminal of the nineteenth capacitor C19. The second terminal of the nineteenth capacitor C19 is connected to the first terminal of the sixteenth inductor L16. The second terminal of the sixteenth inductor L16 is connected to the first terminal of the seventeenth inductor L17. The second terminal of the seventeenth inductor L17 is connected to the Rfout RF output terminal.
[0009] Furthermore, the driving amplifier circuit adopts a two-stage cascaded topology, and the driving amplifier circuit is used for impedance conjugate matching with the preceding and following stages to optimize return loss performance.
[0010] Furthermore, the driving amplifier circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit; The driving amplifier circuit is also equipped with an RFin radio frequency input terminal, an RFout radio frequency output terminal, and a drain voltage terminal VD and a gate voltage terminal VG. The RFin radio frequency input terminal is connected to the first terminal of the fourth resistor R4 and the twenty-second capacitor C22 after being connected in parallel. The second terminal of the fourth resistor R4 and the twenty-second capacitor C22 after being connected in parallel is connected to the first terminal of the twenty-third capacitor C23. The second terminal of the twenty-third capacitor C23 is connected to the first terminal of the twenty-fourth capacitor C24. The second terminal of the twenty-fourth capacitor C24 is connected to the gate of the first stage amplifier tube. The gate of the first stage amplifier tube is connected to the gate voltage terminal VG through the fifth resistor R5 and the nineteenth inductor L19. The drain of the first stage amplifier tube is connected to the drain voltage terminal VD through the twentieth inductor L20. The drain of the first stage amplifier tube is connected to the first terminal of the twenty-fifth capacitor C25. The second terminal of the twenty-fifth capacitor is connected to the first terminal of the twenty-sixth capacitor C26. The second terminal of the 26th capacitor C26 is connected to the first terminal of the parallel-connected 6th resistor R6 and 27th capacitor C27. The second terminal of the parallel-connected 6th resistor R6 and 27th capacitor C27 is connected to the first terminal of the 28th capacitor C28. The second terminal of the 28th capacitor C28 is connected to the first terminal of the 29th capacitor C29. The second terminal of the 29th capacitor C29 is connected to the gate of the second-stage amplifier. The gate of the second-stage amplifier is connected to the gate voltage terminal VG via the 7th resistor R7 and the 23rd inductor L23. The drain of the second-stage amplifier is connected to the drain voltage terminal VD via the 24th inductor L24. The drain of the second-stage amplifier is connected to the first terminal of the 30th capacitor C30. The second terminal of the 30th capacitor C30 is connected to the first terminal of the 31st capacitor C31. The second terminal of the 31st capacitor C31 is connected to the Rfout RF output terminal.
[0011] Furthermore, the digitally controlled attenuation circuit is a 5-bit digitally controlled attenuation circuit, which is composed of cascaded 5-bit attenuation units consisting of switching transistors and passive components; the 5-bit digitally controlled attenuation circuit is equipped with an RFin radio frequency input terminal and an RFout radio frequency output terminal. The numerically controlled attenuation circuit selects different signal paths and generates corresponding attenuation amounts by controlling the on / off state of the switching transistor.
[0012] Furthermore, the attenuation unit adopts a switch-and-resistor configuration composed of lumped elements to achieve wideband attenuation. The 0.5dB, 1dB, and 2dB attenuation states adopt a T-type attenuation topology, the 4dB attenuation state adopts a π-type attenuation topology, and the 8dB attenuation state adopts an SPDT gating structure.
[0013] Furthermore, the digitally controlled phase-shifting circuit is a 6-digit digitally controlled phase-shifting circuit, which is composed of cascaded 6-phase-shifting units consisting of multiple switching transistors and passive components; the 6-digit digitally controlled phase-shifting circuit is equipped with an RFin radio frequency input terminal and an RFout radio frequency output terminal; The numerically controlled phase-shifting circuit achieves numerical phase shifting by controlling the on / off state of the switching transistor to generate a phase difference in the signal through different paths.
[0014] Furthermore, the phase-shifting unit is in the form of a high-pass or low-pass filter composed of lumped elements, used to achieve wideband phase shifting. The 5.625°, 11.25°, 22.5°, and 45° phase shift states adopt series FET type and T-type phase shifting topologies, while the 90° and 180° phase shift states adopt switch-selected path type phase shifting topologies.
[0015] As can be seen from the above technical solutions, the present invention has the following advantages: This invention discloses a Ka-band transmitter chip circuit device. Through model simplification, it effectively improves computer computation efficiency, providing reliable prior analysis conditions for the study of large and complex networks. While maintaining the functionality of the components, it supports flexible replacement of different reference circuits, significantly reducing circuit implementation costs. The established modular circuit possesses excellent portability and can be easily combined and integrated with other circuit modules. This invention effectively overcomes the current limitations of complex system circuits in terms of storage space and computation time, providing strong technical support for the analysis and design of large-scale integrated circuit networks and systems. Attached Figure Description
[0016] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the description will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of the Ka-band transmitting component chip circuit device of the present invention.
[0018] Figure 2 This is a schematic diagram of the Ka-band power amplifier circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0019] Figure 3 This is a schematic diagram of the Ka-band drive amplifier circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0020] Figure 4 This is a schematic diagram of the Ka-band 5-digit digitally controlled attenuation circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0021] Figure 5 This is a schematic diagram of the Ka-band 6-phase shift circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0022] Figure 6 This is a schematic diagram of the standing wave at the input port of the Ka-band drive amplifier circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0023] Figure 7 This is a schematic diagram of the small-signal gain of the Ka-band power amplifier circuit in the Ka-band transmitting component chip circuit device of the present invention.
[0024] Figure 8 This is a schematic diagram of the output power of the Ka-band power amplifier circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0025] Figure 9 This is a schematic diagram of the power-added efficiency of the Ka-band power amplifier circuit in the Ka-band transmitting component chip circuit device of the present invention.
[0026] Figure 10 This is a schematic diagram of the input return loss of the Ka-band drive amplifier circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0027] Figure 11 This is a schematic diagram of the output return loss of the Ka-band drive amplifier circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0028] Figure 12 This is a schematic diagram of the small-signal gain of the Ka-band drive amplifier circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0029] Figure 13 This is a schematic diagram of the input return loss of the Ka-band digitally controlled attenuation circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0030] Figure 14 This is a schematic diagram of the output return loss of the Ka-band digitally controlled attenuation circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0031] Figure 15 This is a schematic diagram of the attenuation accuracy of the Ka-band digitally controlled attenuation circuit in the Ka-band transmitting component chip circuit device of the present invention.
[0032] Figure 16 This is a schematic diagram of the attenuation parasitic amplitude modulation of the Ka-band digitally controlled attenuation circuit in the Ka-band transmitting component chip circuit device of the present invention.
[0033] Figure 17 This is a schematic diagram of the phase-shifting parasitic amplitude modulation of the Ka-band digitally controlled phase-shifting circuit in the Ka-band transmitting component chip circuit device of the present invention.
[0034] Figure 18 This is a schematic diagram of the phase shifting accuracy of the Ka-band digitally controlled phase shifting circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0035] Figure 19 This is a schematic diagram showing the simulation and test comparison results of the a-band silicon-based amplitude and phase multifunctional circuit of the Ka-band transmitter component chip circuit device of the present invention.
[0036] Figure 20 This is a schematic diagram showing the simulation and test comparison results of the phase shift accuracy of the Ka-band silicon-based amplitude and phase multifunctional circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0037] Figure 21 This is a schematic diagram of the phase-shifting parasitic amplitude modulation of the Ka-band silicon-based amplitude and phase control multifunctional circuit of the Ka-band transmitting component chip circuit device of the present invention.
[0038] Figure 22 This is a schematic diagram showing the simulation and test comparison results of the attenuation accuracy of the Ka-band silicon-based amplitude and phase multifunctional circuit of the Ka-band transmitting component chip circuit device of the present invention. Detailed Implementation
[0039] Various embodiments of the invention will be described more fully in the Ka-band transmitter component chip circuit device described in detail below. The invention may have various embodiments, and adjustments and changes may be made therein. However, it should be understood that there is no intention to limit the various embodiments of the invention to the specific embodiments disclosed herein, but rather the invention should be understood to cover all adjustments, equivalents, and / or alternatives falling within the spirit and scope of the various embodiments of the invention.
[0040] It should be understood that, when used in this specification, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.
[0041] The terms "one embodiment" or "some embodiments" used in this invention mean that one or more embodiments of the invention include the specific features, structures, or characteristics described in that embodiment. Therefore, the terms "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of the invention do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized.
[0042] To facilitate a clear description of the technical solution of this invention, the terms "first" and "second" are used to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that "first" and "second" are not necessarily different.
[0043] To make the objectives, features, and advantages of this invention more apparent and understandable, specific embodiments and accompanying drawings will be used to clearly and completely describe the technical solutions protected by this invention. Obviously, the embodiments described below are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.
[0044] Please see Figure 1 The diagram shows a schematic of a Ka-band transmitter chip circuit device, which includes: 8-channel silicon-based amplitude and phase multifunction circuit and gallium arsenide power amplifier circuit; The silicon-based amplitude-phase multifunctional circuit includes a power distribution circuit, a drive amplifier circuit, a digitally controlled attenuation circuit, and a digitally controlled phase shifting circuit. The device also includes a COM terminal, which is connected to the input terminal of a power distribution circuit. The output terminal of the power distribution circuit is connected to the input terminal of a drive amplifier circuit. The output terminal of the power distribution circuit is connected to the input terminal of a digitally controlled phase-shifting circuit. The output terminal of the digitally controlled phase-shifting circuit is connected to the input terminal of the drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a digitally controlled attenuation circuit. The output terminal of the digitally controlled attenuation circuit is connected to the input terminal of the drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a gallium arsenide power amplifier circuit.
[0045] It should be noted that the reference architecture of the Ka-band transmitter chip circuit model is a multi-functional chip for Ka-band transmitters, covering the frequency band from 25 to 32 GHz. This chip integrates functions such as phase shifting, attenuation, and amplification.
[0046] The chip operates in transmit mode and supports phase adjustment with 6-bit precision in the 0~360° range and amplitude adjustment with 5-bit precision in the 0~15.5 dB range. The transmit conversion gain is 24 dB and the transmit saturation output power is 8 dBm.
[0047] Secondly, the minimum functional unit circuit is obtained through topological analysis of the Ka-band transmitter chip. In this example, the minimum functional unit circuit in the multi-functional chip of the Ka-band transmitter is a power amplifier circuit, a drive amplifier circuit, a six-digit digitally controlled phase-shifting circuit, a five-digit digitally controlled attenuation circuit, and a power distribution circuit.
[0048] The power amplifier circuit amplifies the input signal and effectively drives the load.
[0049] As a refinement and extension of the specific implementation of the above embodiments, in order to fully illustrate the specific implementation process of this embodiment, another Ka-band transmitting component chip circuit device is provided, the device comprising: 8-channel silicon-based amplitude and phase multifunction circuit and gallium arsenide power amplifier circuit; The silicon-based amplitude-phase multifunctional circuit includes a power distribution circuit, a drive amplifier circuit, a digitally controlled attenuation circuit, and a digitally controlled phase shifting circuit. The device also includes a COM terminal, which is connected to the input terminal of a power distribution circuit. The output terminal of the power distribution circuit is connected to the input terminal of a digitally controlled phase-shifting circuit. The output terminal of the digitally controlled phase-shifting circuit is connected to the input terminal of a drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a digitally controlled attenuation circuit. The output terminal of the digitally controlled attenuation circuit is connected to the input terminal of the drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a gallium arsenide power amplifier circuit.
[0050] The signal transmission path of the device is as follows: the radio frequency input signal is input from the COM terminal, passes through the power distribution circuit to the transmission channel, and is amplified, phase-shifted and attenuated by the drive amplifier circuit, the digitally controlled attenuation circuit and the digitally controlled phase shift circuit, and is output to the outside through the gallium arsenide power amplifier circuit.
[0051] It should be noted that the device integrates phase shifting, attenuation, and amplification functions. The smallest functional unit circuit consists of a power amplifier circuit, a drive amplifier circuit, a 5-digit digitally controlled attenuation circuit, a 6-digit digitally controlled phase shifting circuit, and a power distribution circuit. The signal is input from the COM terminal, passes through the power distribution circuit to the transmit channel, and is amplified, phase-shifted, and attenuated by the drive amplifier circuit, digitally controlled attenuation circuit, and digitally controlled phase shifting circuit. Finally, it is output to the outside through the power amplifier circuit. The simulation results of the silicon-based amplitude-phase multifunctional circuit are as follows: Figure 19 , Figure 20 , Figure 21 , Figure 22 As shown.
[0052] like Figure 2 As shown, the gallium arsenide power amplifier circuit adopts a three-stage cascaded topology, and the gallium arsenide power amplifier circuit includes a first-stage unit, a second-stage unit, and an output stage unit; The RF input signal is amplified by the first stage unit for small signal gain. The amplified signal is further amplified by the second stage unit for small signal gain and output power to drive the output stage unit. The output stage unit outputs a Ka-band signal.
[0053] The gallium arsenide power amplifier circuit is also equipped with an RFin radio frequency input terminal, an RFout radio frequency output terminal, and a drain voltage terminal VD and a gate voltage terminal VG. The RFin input terminal is connected in series with the first inductor L1. The second end of the first inductor L1 is connected to the first end of the second inductor L2. The second end of the second inductor L2 is connected to the first end of the fourth capacitor C4. The second end of the fourth capacitor C4 is connected to the gate of the first-stage common-source amplifier. The gate of the first-stage common-source amplifier is connected to the gate voltage terminal VG through the third inductor L3. The drain of the first-stage common-source amplifier is connected to the drain voltage terminal VD through the fourth inductor L4. The gate of the second-stage common-source amplifier is connected to the gate voltage terminal VG via the eighth inductor L8, and the drain of the second-stage common-source amplifier is connected to the drain voltage terminal VD via the ninth inductor L9. The gate of the common-source amplifier in the output stage is connected to the gate voltage terminal VG via the fourteenth inductor L14, and the drain of the common-source amplifier in the output stage is connected to the drain voltage terminal VD via the fifteenth inductor L15. The drain of the common-source amplifier in the output stage is also connected to the first terminal of the nineteenth capacitor C19. The second terminal of the nineteenth capacitor C19 is connected to the first terminal of the sixteenth inductor L16. The second terminal of the sixteenth inductor L16 is connected to the first terminal of the seventeenth inductor L17. The second terminal of the seventeenth inductor L17 is connected to the Rfout RF output terminal.
[0054] The gallium arsenide power amplifier circuit further includes a fifth inductor L5, a sixth inductor L6, a seventh inductor L7, a tenth inductor L10, an eleventh inductor L11, a twelfth inductor L12, and a thirteenth inductor L13; wherein, the first terminal of the fifth inductor L5 is connected to the second terminal of the sixth capacitor C6, and the second terminal of the fifth inductor L5 is connected to the first terminal of the sixth inductor L6; the second terminal of the sixth inductor L6 is connected to the first terminal of the seventh inductor L7; the second terminal of the seventh inductor L7 is connected to the first terminal of the tenth capacitor C10; the first terminal of the tenth inductor L10 is connected to the second terminal of the twelfth capacitor C12, and the second terminal of the tenth inductor L10 is connected to the first terminal of the eleventh inductor L11; the second terminal of the eleventh inductor L11 is connected to the first terminal of the twelfth inductor L12; the second terminal of the twelfth inductor L12 is connected to the first terminal of the thirteenth inductor L13; and the second terminal of the thirteenth inductor L13 is connected to the first terminal of the seventeenth capacitor C17. The gallium arsenide power amplifier circuit further includes capacitors C1, C2, C3, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, and C21; wherein, capacitors C1, C2, C2, C3, C5, C7, C8, C9, C11, C10, C12, C13, C14, C15, C16, C17, C18, C19, C10, C1 ... 13. The fourteenth capacitor C14, the fifteenth capacitor C15, the sixteenth capacitor C16, the eighteenth capacitor C18, the twentieth capacitor C20, and the twenty-first capacitor C21 are all grounded; the first terminal of the sixth capacitor C6 is connected to the first terminal of the fourth inductor L4, and the second terminal is connected to the first terminal of the fifth inductor L5; the first terminal of the tenth capacitor C10 is connected to the second terminal of the seventh inductor L7, and the second terminal is connected to the gate of the second stage common-source amplifier; the first terminal of the twelfth capacitor C12 is connected to the first terminal of the ninth inductor L9, and the second terminal is connected to the first terminal of the tenth inductor L10; the first terminal of the seventeenth capacitor C17 is connected to the second terminal of the thirteenth inductor L13, and the second terminal is connected to the gate of the output stage common-source amplifier.
[0055] The gallium arsenide power amplifier circuit also includes a first resistor R1, a second resistor R2, and a third resistor R3. The first resistor R1 is grounded through the fifth capacitor C5, the second resistor R2 is grounded through the eleventh capacitor C11, and the third resistor R3 is grounded through the eighteenth capacitor C18.
[0056] It should be noted that in the transmitting assembly, the power amplifier, as a core component, directly affects the operational quality of the entire transmitting link. Its main role is to provide sufficient output power to drive the antenna in the required frequency band while maintaining signal quality and efficiency. The power amplifier circuit adopts a three-stage structure, all using a common-source configuration. First, the output stage is load-pulled to meet the required output power. Then, the first and second stages are designed to satisfy small-signal gain while providing sufficient power to drive the final stage, thus achieving the desired result. Impedance conjugate matching is performed at the input and output terminals to ensure the driver amplifier has sufficiently good return loss performance. Simulation results for the gallium arsenide power amplifier circuit are shown below. Figure 7 , Figure 8 and Figure 9 As shown.
[0057] like Figure 3 As shown, the driving amplifier circuit adopts a two-stage cascaded topology. The driving amplifier circuit is used for impedance conjugate matching with the preceding and following stages to optimize return loss performance.
[0058] The driving amplifier circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit; The driving amplifier circuit is also equipped with an RFin radio frequency input terminal, an RFout radio frequency output terminal, and a drain voltage terminal VD and a gate voltage terminal VG. The RFin radio frequency input terminal is connected to the first terminal of the fourth resistor R4 and the twenty-second capacitor C22 after being connected in parallel. The second terminal of the fourth resistor R4 and the twenty-second capacitor C22 after being connected in parallel is connected to the first terminal of the twenty-third capacitor C23. The second terminal of the twenty-third capacitor C23 is connected to the first terminal of the twenty-fourth capacitor C24. The second terminal of the twenty-fourth capacitor C24 is connected to the gate of the first stage amplifier tube. The gate of the first stage amplifier tube is connected to the gate voltage terminal VG through the fifth resistor R5 and the nineteenth inductor L19. The drain of the first stage amplifier tube is connected to the drain voltage terminal VD through the twentieth inductor L20. The drain of the first stage amplifier tube is connected to the first terminal of the twenty-fifth capacitor C25. The second terminal of the twenty-fifth capacitor is connected to the first terminal of the twenty-sixth capacitor C26. The second terminal of the 26th capacitor C26 is connected to the first terminal of the parallel-connected 6th resistor R6 and 27th capacitor C27. The second terminal of the parallel-connected 6th resistor R6 and 27th capacitor C27 is connected to the first terminal of the 28th capacitor C28. The second terminal of the 28th capacitor C28 is connected to the first terminal of the 29th capacitor C29. The second terminal of the 29th capacitor C29 is connected to the gate of the second-stage amplifier. The gate of the second-stage amplifier is connected to the gate voltage terminal VG via the 7th resistor R7 and the 23rd inductor L23. The drain of the second-stage amplifier is connected to the drain voltage terminal VD via the 24th inductor L24. The drain of the second-stage amplifier is connected to the first terminal of the 30th capacitor C30. The second terminal of the 30th capacitor C30 is connected to the first terminal of the 31st capacitor C31. The second terminal of the 31st capacitor C31 is connected to the Rfout RF output terminal.
[0059] The drive amplifier circuit also includes the eighteenth inductor L18, the twenty-first inductor L21, the twenty-second inductor L22, and the twenty-fifth inductor L25, all of which are grounded.
[0060] It should be noted that the function of the transmitting component driver amplifier circuit is to provide appropriate power to the output stage power amplifier circuit, enabling the final stage power amplifier circuit to fully unleash its performance and thus ensuring the transmitting power of the transmitting component. The bandwidth of the driver amplifier circuit should be able to cover the operating frequency range of the power amplifier circuit to ensure signal transmission quality throughout the entire operating frequency band. The driver amplifier circuit adopts a two-stage structure, both using a common-source structure. First, the output stage is designed to ensure that the linearity meets the specifications, and then the gain of the first stage is designed to ensure that the overall gain meets the requirements. Impedance conjugate matching is performed at the input and output terminals to give the driver amplifier sufficiently good return loss performance. The simulation results of the driver amplifier circuit are as follows. Figure 6 , Figure 10 , Figure 11 as well as Figure 12 As shown.
[0061] like Figure 4 As shown, the digitally controlled attenuation circuit is a 5-bit digitally controlled attenuation circuit, which is composed of cascaded 5-bit attenuation units consisting of switching transistors and passive components; the 5-bit digitally controlled attenuation circuit is equipped with an RFin radio frequency input terminal and an RFout radio frequency output terminal. The numerically controlled attenuation circuit selects different signal paths and generates corresponding attenuation amounts by controlling the on / off state of the switching transistor.
[0062] The attenuation unit adopts a switching transistor plus resistor form composed of lumped elements to achieve wideband attenuation. The 0.5dB, 1dB and 2dB attenuation states adopt a T-type attenuation topology, the 4dB attenuation state adopts a π-type attenuation topology, and the 8dB attenuation state adopts an SPDT gating structure.
[0063] The numerically controlled attenuation circuit includes resistors R28 (28th), R29 (29th), R30 (30th), R31 (31st), R32 (32nd), R33 (33rd), R34 (34th), R35 (35th), R36 (36th), R37 (37th), R38 (38th), R39 (39th), R40 (40th), R41 (41st), R42 (42nd), R43 (43rd), R44 (44th), R45 (45th), R46 (46th), R47 (47th), R48 (48th), R49 (49th), and R50 (50th).
[0064] It should be noted that a numerically controlled attenuation circuit is a circuit used to introduce predetermined attenuation within a specified frequency range. A 5-bit numerically controlled attenuation circuit consists of switching transistors and passive components. By controlling the on / off state of the switches, the signal travels through different paths, resulting in different attenuation amounts. The difference in phase between two paths represents the attenuation. Cascading attenuation units with different attenuation amounts achieves the numerically controlled attenuation function. The attenuation unit uses a switching transistor and resistor configuration, composed of lumped components, enabling wideband attenuation. The 0.5dB, 1dB, and 2dB attenuation states employ a T-type attenuation topology, 4dB a π-type attenuation topology, and 8dB a SPDT gating structure. V1P, V2P, and V3P control the on / off state of the 0.5dB, 1dB, and 2dB attenuation units, while V4N, V5N and V4P, V5P are a pair of opposite digital signals used to control the selection of the path in the 4dB and 8dB attenuation units, thus achieving different attenuations. Simulation results of the numerically controlled attenuation circuit are shown below. Figure 13 , Figure 14 , Figure 15 , Figure 16 As shown.
[0065] like Figure 5 As shown, the digitally controlled phase-shifting circuit is a 6-digit digitally controlled phase-shifting circuit, which is composed of cascaded 6-phase-shifting units consisting of multiple switching transistors and passive components; the 6-digit digitally controlled phase-shifting circuit is equipped with an RFin radio frequency input terminal and an RFout radio frequency output terminal; The numerically controlled phase-shifting circuit achieves numerical phase shifting by controlling the on / off state of the switching transistor to generate a phase difference in the signal through different paths.
[0066] The phase-shifting unit is a high-pass / low-pass filter composed of lumped elements, used to achieve wideband phase shifting. The 5.625°, 11.25°, 22.5°, and 45° phase shift states adopt series FET type and T-type phase shifting topologies, while the 90° and 180° phase shift states adopt switch-selected path type phase shifting topologies.
[0067] The numerically controlled phase-shifting circuit includes the following inductors: the 26th inductor L26, the 27th inductor L27, the 28th inductor L28, the 29th inductor L29, the 30th inductor L30, the 31st inductor L31, the 32nd inductor L32, the 33rd inductor L33, the 34th inductor L34, the 35th inductor L35, the 36th inductor L36, the 37th inductor L37, the 38th inductor L38, the 39th inductor L39, the 40th inductor L40, the 41st inductor L41, the 42nd inductor L42, and the 43rd inductor L43; the 8th resistor R8, the 9th resistor R9, the 10th resistor R10, and the 11th resistor... Resistors R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R24, R25, R26, R27; and capacitors C32, C33, C34, C35, C36, and C37.
[0068] It should be noted that the numerically controlled phase-shifting circuit can adjust the phase difference between the input and output signals. By controlling the on / off state of the switches, the signal travels through different paths, resulting in different phases; the difference between the two phases is the phase shift. These phase-shifting units adopt the form of high-pass and low-pass filters, composed of lumped elements, and can achieve wideband phase shifts. The 5.625°, 11.25°, 22.5°, and 45° phase shift states use series FET type and T-type phase shifting topologies, while the 90° and 180° phase shift states use a switch-selected path type phase shifting topology. V1N~V6N and V1P~V6P are a pair of opposite digital signals used to control the selection of the path in the phase shifting unit, thereby achieving different phase shifts. The simulation results of the numerically controlled phase-shifting circuit are as follows: Figure 17 , Figure 18 As shown.
[0069] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A Ka-band transmitting component chip circuit device, characterized in that, The device includes: Silicon-based amplitude-phase multifunctional circuit and gallium arsenide power amplifier circuit; The silicon-based amplitude-phase multifunctional circuit includes a power distribution circuit, a drive amplifier circuit, a digitally controlled attenuation circuit, and a digitally controlled phase shifting circuit. The device also includes a COM terminal, which is connected to the input terminal of a power distribution circuit. The output terminal of the power distribution circuit is connected to the input terminal of a digitally controlled phase-shifting circuit. The output terminal of the digitally controlled phase-shifting circuit is connected to the input terminal of a drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a digitally controlled attenuation circuit. The output terminal of the digitally controlled attenuation circuit is connected to the input terminal of the drive amplifier circuit. The output terminal of the drive amplifier circuit is connected to the input terminal of a gallium arsenide power amplifier circuit.
2. The Ka-band transmitting component chip circuit device according to claim 1, characterized in that, The signal transmission path of the device is as follows: the radio frequency input signal is input from the COM terminal, passes through the power distribution circuit to the transmission channel, and is amplified, phase-shifted and attenuated by the drive amplifier circuit, the digitally controlled attenuation circuit and the digitally controlled phase shift circuit, and is output to the outside through the gallium arsenide power amplifier circuit.
3. The Ka-band transmitting component chip circuit device according to claim 1, characterized in that, The gallium arsenide power amplifier circuit adopts a three-stage cascaded topology, and the gallium arsenide power amplifier circuit includes a first-stage unit, a second-stage unit, and an output stage unit. The RF input signal is amplified by the first stage unit for small signal gain. The amplified signal is further amplified by the second stage unit for small signal gain and output power to drive the output stage unit. The output stage unit outputs a Ka-band signal.
4. The Ka-band transmitting component chip circuit device according to claim 3, characterized in that, The gallium arsenide power amplifier circuit is also equipped with an RFin radio frequency input terminal, an RFout radio frequency output terminal, and a drain voltage terminal VD and a gate voltage terminal VG. The RFin input terminal is connected in series with the first inductor L1. The second end of the first inductor L1 is connected to the first end of the second inductor L2. The second end of the second inductor L2 is connected to the first end of the fourth capacitor C4. The second end of the fourth capacitor C4 is connected to the gate of the first-stage common-source amplifier. The gate of the first-stage common-source amplifier is connected to the gate voltage terminal VG through the third inductor L3. The drain of the first-stage common-source amplifier is connected to the drain voltage terminal VD through the fourth inductor L4. The gate of the second-stage common-source amplifier is connected to the gate voltage terminal VG via the eighth inductor L8, and the drain of the second-stage common-source amplifier is connected to the drain voltage terminal VD via the ninth inductor L9. The gate of the common-source amplifier in the output stage is connected to the gate voltage terminal VG via the fourteenth inductor L14, and the drain of the common-source amplifier in the output stage is connected to the drain voltage terminal VD via the fifteenth inductor L15. The drain of the common-source amplifier in the output stage is also connected to the first terminal of the nineteenth capacitor C19. The second terminal of the nineteenth capacitor C19 is connected to the first terminal of the sixteenth inductor L16. The second terminal of the sixteenth inductor L16 is connected to the first terminal of the seventeenth inductor L17. The second terminal of the seventeenth inductor L17 is connected to the Rfout RF output terminal.
5. The Ka-band transmitting component chip circuit device according to claim 1, characterized in that, The driving amplifier circuit adopts a two-stage cascaded topology and is used for impedance conjugate matching with the preceding and following stages to optimize return loss performance.
6. The Ka-band transmitting component chip circuit device according to claim 5, characterized in that, The driving amplifier circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit; The driving amplifier circuit is also equipped with an RFin radio frequency input terminal, an RFout radio frequency output terminal, and a drain voltage terminal VD and a gate voltage terminal VG. The RFin radio frequency input terminal is connected to the first terminal of the fourth resistor R4 and the twenty-second capacitor C22 after being connected in parallel. The second terminal of the fourth resistor R4 and the twenty-second capacitor C22 after being connected in parallel is connected to the first terminal of the twenty-third capacitor C23. The second terminal of the twenty-third capacitor C23 is connected to the first terminal of the twenty-fourth capacitor C24. The second terminal of the twenty-fourth capacitor C24 is connected to the gate of the first stage amplifier tube. The gate of the first stage amplifier tube is connected to the gate voltage terminal VG through the fifth resistor R5 and the nineteenth inductor L19. The drain of the first stage amplifier tube is connected to the drain voltage terminal VD through the twentieth inductor L20. The drain of the first stage amplifier tube is connected to the first terminal of the twenty-fifth capacitor C25. The second terminal of the twenty-fifth capacitor is connected to the first terminal of the twenty-sixth capacitor C26. The second terminal of the 26th capacitor C26 is connected to the first terminal of the parallel-connected 6th resistor R6 and 27th capacitor C27. The second terminal of the parallel-connected 6th resistor R6 and 27th capacitor C27 is connected to the first terminal of the 28th capacitor C28. The second terminal of the 28th capacitor C28 is connected to the first terminal of the 29th capacitor C29. The second terminal of the 29th capacitor C29 is connected to the gate of the second-stage amplifier. The gate of the second-stage amplifier is connected to the gate voltage terminal VG via the 7th resistor R7 and the 23rd inductor L23. The drain of the second-stage amplifier is connected to the drain voltage terminal VD via the 24th inductor L24. The drain of the second-stage amplifier is connected to the first terminal of the 30th capacitor C30. The second terminal of the 30th capacitor C30 is connected to the first terminal of the 31st capacitor C31. The second terminal of the 31st capacitor C31 is connected to the Rfout RF output terminal.
7. The Ka-band transmitting component chip circuit device according to claim 1, characterized in that, The digitally controlled attenuation circuit is a 5-bit digitally controlled attenuation circuit, which is composed of cascaded 5-bit attenuation units consisting of switching transistors and passive components; the 5-bit digitally controlled attenuation circuit is equipped with an RFin radio frequency input terminal and an RFout radio frequency output terminal. The numerically controlled attenuation circuit selects different signal paths and generates corresponding attenuation amounts by controlling the on / off state of the switching transistor.
8. The Ka-band transmitting component chip circuit device according to claim 7, characterized in that, The attenuation unit adopts a switching transistor plus resistor form composed of lumped elements to achieve wideband attenuation. The 0.5dB, 1dB and 2dB attenuation states adopt a T-type attenuation topology, the 4dB attenuation state adopts a π-type attenuation topology, and the 8dB attenuation state adopts an SPDT gating structure.
9. The Ka-band transmitting component chip circuit device according to claim 1, characterized in that, The digitally controlled phase-shifting circuit is a 6-digit digitally controlled phase-shifting circuit, which is composed of cascaded 6-digit phase-shifting units consisting of multiple switching transistors and passive components; the 6-digit digitally controlled phase-shifting circuit is equipped with an RFin radio frequency input terminal and an RFout radio frequency output terminal. The numerically controlled phase-shifting circuit achieves numerical phase shifting by controlling the on / off state of the switching transistor to generate a phase difference in the signal through different paths.
10. The Ka-band transmitting component chip circuit device according to claim 9, characterized in that, The phase-shifting unit is a high-pass / low-pass filter composed of lumped elements, used to achieve wideband phase shifting. The 5.625°, 11.25°, 22.5°, and 45° phase shift states adopt series FET type and T-type phase shifting topologies, while the 90° and 180° phase shift states adopt switch-selected path type phase shifting topologies.