A back contact cell with a front side composite passivation layer and a method of manufacture and use

Abstract

The present application belongs to the technical field of back contact cells, and particularly relates to a back contact cell with a front composite passivation layer, a preparation method and application, which comprises a silicon wafer, first semiconductor layers and second semiconductor layers alternately arranged on the back surface of the silicon wafer, and a first tunneling oxide layer and a composite amorphous silicon layer sequentially arranged on the front surface of the silicon wafer to form a front composite passivation layer; wherein the composite amorphous silicon layer comprises an oxygen-free amorphous silicon layer and an oxygen-doped amorphous silicon layer sequentially arranged, and the single-layer oxygen-free amorphous silicon layer and the single-layer oxygen-doped amorphous silicon layer are alternately arranged, and the total thickness of the front composite passivation layer is 50A-300A. The present application can improve the short-circuit current and open-circuit voltage of the cell, the efficiency of the cell is improved, and at the same time, it is beneficial to reduce the UV decay rate of the cell and improve the anti-UV decay reliability of the cell.

Description

Technical Field

[0001] This invention belongs to the field of back contact battery technology, specifically relating to a back contact battery with a front composite passivation layer, its preparation method, and its application. Background Technology

[0002] An existing back-contact battery includes a silicon substrate, a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of the silicon substrate, and a second tunneling oxide layer, an ultrathin amorphous silicon layer and an antireflection layer sequentially disposed on the light-receiving surface of the silicon substrate. The second tunneling oxide layer passivates the interface of the crystalline silicon surface in the silicon substrate. Combined with the ultrathin amorphous silicon layer, a passivation enhancement effect is achieved. At the same time, maintaining high transmittance increases the short-circuit current of the battery, which significantly improves the battery conversion efficiency.

[0003] However, existing back-contact batteries suffer from a significant decrease in open-circuit voltage (Voc) and fill factor (FF) after exposure to ultraviolet light, which in turn leads to a significant reduction in battery efficiency.

[0004] It should be noted that this part of the present invention only provides background technology related to the present invention, and does not necessarily constitute prior art or known technology. Summary of the Invention

[0005] The purpose of this invention is to overcome the defect of existing back-contact batteries where ultraviolet-induced degradation leads to a decrease in battery efficiency. This invention provides a back-contact battery with a front composite passivation layer, its preparation method, and its application. This invention can improve the short-circuit current and open-circuit voltage of the battery, thereby improving battery efficiency. At the same time, it helps to reduce the UV degradation rate of the battery and improve the battery's UV degradation resistance reliability.

[0006] To achieve the above objectives, in a first aspect, the present invention provides a back contact battery with a front composite passivation layer, comprising a silicon wafer, a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of the silicon wafer, and further comprising a first tunneling oxide layer and a composite amorphous silicon layer sequentially disposed on the front side of the silicon wafer to form a front composite passivation layer; wherein the composite amorphous silicon layer comprises an oxygen-free amorphous silicon layer and an oxygen-doped amorphous silicon layer sequentially disposed, and single-layer oxygen-free amorphous silicon layers and single-layer oxygen-doped amorphous silicon layers are alternately disposed, and the total thickness of the front composite passivation layer is 50 Å-300 Å.

[0007] In some preferred embodiments of the present invention, the thickness of the first tunneling oxide layer is 2 Å-20 Å, the thickness of the single-layer oxygen-free amorphous silicon layer is 10 Å-50 Å, and the thickness of the single-layer oxygen-doped amorphous silicon layer is 5 Å-35 Å.

[0008] In some preferred embodiments of the present invention, the thickness ratio of the first tunneling oxide layer, the single-layer oxygen-free amorphous silicon layer and the single-layer oxygen-doped amorphous silicon layer is 1:(1-3):(1-4).

[0009] In some preferred embodiments of the present invention, the oxygen concentration of the single-layer oxygen-doped amorphous silicon layer is 5%-50% in atomic percentage; and / or, the refractive index of the front composite passivation layer is 3.2-3.9.

[0010] In some preferred embodiments of the present invention, the number of oxygen-free amorphous silicon layers contained in the composite amorphous silicon layer is n, and the number of oxygen-doped amorphous silicon layers contained is m, where n≥m≥1.

[0011] In some preferred embodiments of the present invention, m≥2, and the oxygen concentration of each oxygen-doped amorphous silicon layer is the same or increases in a gradient along the direction away from the first tunneling oxide layer.

[0012] In some preferred embodiments of the present invention, the oxygen concentration of each oxygen-doped amorphous silicon layer is set in a gradient increasing manner along the direction away from the first tunneling oxide layer; and the magnitude of the gradient increase satisfies that the oxygen concentration of the oxygen-doped amorphous silicon layer of the later gradient is 1-3 times that of the oxygen concentration of the oxygen-doped amorphous silicon layer of the previous gradient.

[0013] In some preferred embodiments of the present invention, 5≥n≥m≥2.

[0014] In some preferred embodiments of the present invention, n is 4, m is 3; and / or, the total thickness of the multilayer oxygen-free amorphous silicon layer is 50 Å-200 Å, and the total thickness of the multilayer oxygen-doped amorphous silicon layer is 20 Å-100 Å.

[0015] In some preferred embodiments of the present invention, the outermost and innermost layers of the composite amorphous silicon layer are both oxygen-free amorphous silicon layers; and / or, at least one oxygen-free amorphous silicon layer in the composite amorphous silicon layer is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer is also doped with phosphorus.

[0016] In some preferred embodiments of the present invention, n≥m≥2; wherein, at least one inner oxygen-free amorphous silicon layer in the multilayer oxygen-free amorphous silicon layer is further doped with phosphorus, and at least one oxygen-doped amorphous silicon layer in the multilayer oxygen-doped amorphous silicon layer near the first tunneling oxide layer is further doped with phosphorus.

[0017] In some preferred embodiments of the present invention, the phosphorus doping concentration of the oxygen-free amorphous silicon layer is 1%-6% in atomic percentage, and the phosphorus doping concentration of the oxygen-doped amorphous silicon layer is 1%-8% in atomic percentage.

[0018] In some preferred embodiments of the present invention, the phosphorus doping concentration of each oxygen-doped amorphous silicon layer is set in a gradient decreasing manner along the direction away from the first tunneling oxide layer.

[0019] In some preferred embodiments of the present invention, the thickness of each oxygen-doped amorphous silicon layer is arranged in a gradient increasing manner along the direction away from the first tunneling oxide layer.

[0020] In some preferred embodiments of the present invention, the composite amorphous silicon layer includes a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer disposed sequentially. The fourth oxygen-free amorphous silicon layer is further doped with phosphorus in the direction away from the first tunneling oxide layer, and the third oxygen-doped amorphous silicon layer and / or the fifth oxygen-doped amorphous silicon layer are further doped with phosphorus.

[0021] In some preferred embodiments of the present invention, the back contact battery further includes at least one of the following structures:

[0022] Structure 1: The back contact battery also includes an antireflection layer disposed outside the front composite passivation layer; wherein the thickness of the antireflection layer is 80-120nm, and / or the refractive index of the antireflection layer is 1.7-2.5;

[0023] Structure 2: The first semiconductor layer includes a first passivation layer and a first doped silicon layer; the second semiconductor layer includes a second passivation layer and a second doped silicon layer; the first passivation layer and the second passivation layer are each independently a second tunneling oxide layer or an intrinsic silicon layer; the first doped silicon layer and the second doped silicon layer are each independently polycrystalline silicon, amorphous silicon, or microcrystalline silicon; one of the first doped silicon layer and the other of the second doped silicon layer is N-type and the other is P-type.

[0024] Structure 3: The two ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, and the area between them is a gap region. The back contact battery also includes a metal electrode and a conductive film layer laid on the outer surface of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed on the portion of the conductive film layer located in the gap region. The metal electrode is disposed on the outer surface of the corresponding conductive film layer of the second semiconductor opening region and the first semiconductor opening region.

[0025] Structure 4: The back side of the silicon wafer corresponding to the first semiconductor layer is a polished surface, and the remaining part is a textured surface; the front side of the silicon wafer is a polished surface.

[0026] Secondly, the present invention provides a method for preparing a back contact battery, the method comprising the following steps:

[0027] S1. Provides double-sided polished silicon wafers;

[0028] S2. A first semiconductor layer and a mask layer are formed on the back side of the silicon wafer; then, an opening is etched on the corresponding film layer on the back side to form a second semiconductor opening region.

[0029] S3. By texturing and cleaning, a textured surface is formed on the front side of the silicon wafer and the second semiconductor opening area to remove the residual mask layer on the first semiconductor layer.

[0030] S4. A first tunneling oxide layer and a composite amorphous silicon layer are sequentially deposited on the front side of the silicon wafer to form a front composite passivation layer. The composite amorphous silicon layer includes an oxygen-free amorphous silicon layer and an oxygen-doped amorphous silicon layer deposited sequentially, and single-layer oxygen-free amorphous silicon layers and single-layer oxygen-doped amorphous silicon layers are alternately arranged to control the total thickness of the front composite passivation layer to be 50Å-300Å.

[0031] S5. Deposit a second semiconductor layer on the back side obtained in S4.

[0032] In some preferred embodiments of the present invention, the composite amorphous silicon layer in S4 includes at least two alternately deposited oxygen-free amorphous silicon layers and oxygen-doped amorphous silicon layers, wherein the number of oxygen-free amorphous silicon layers contained in the composite amorphous silicon layer is n, the number of oxygen-doped amorphous silicon layers contained is m, and n≥m.

[0033] In some preferred embodiments of the present invention, the oxygen concentration of each oxygen-doped amorphous silicon layer is controlled to be the same or to increase in a gradient along the direction away from the first tunneling oxide layer; and / or, at least one oxygen-free amorphous silicon layer in the composite amorphous silicon layer is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer is also doped with phosphorus.

[0034] In some preferred embodiments of the present invention, n≥m≥2; wherein, at least one inner oxygen-free amorphous silicon layer in the multilayer oxygen-free amorphous silicon layer is further doped with phosphorus, and at least one oxygen-doped amorphous silicon layer in the multilayer oxygen-doped amorphous silicon layer near the first tunneling oxide layer is further doped with phosphorus.

[0035] In some preferred embodiments of the present invention, the composite amorphous silicon layer includes a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer deposited sequentially, wherein the fourth oxygen-free amorphous silicon layer is further doped with phosphorus in a direction away from the first tunneling oxide layer, and the third oxygen-doped amorphous silicon layer and / or the fifth oxygen-doped amorphous silicon layer are further doped with phosphorus.

[0036] In some preferred embodiments of the present invention, the phosphorus doping concentration of the oxygen-free amorphous silicon layer is 1%-6% in atomic percentage, and the phosphorus doping concentration of the oxygen-doped amorphous silicon layer is 1%-8% in atomic percentage.

[0037] In some preferred embodiments of the present invention, oxygen-doped gas is introduced during the deposition of the oxygen-doped amorphous silicon layer, and the oxygen-doped gas includes at least one of N2O and CO2.

[0038] In some preferred embodiments of the present invention, the composite amorphous silicon layer includes several oxygen-free amorphous silicon layers, and carbon dioxide is introduced into at least one inner oxygen-free amorphous silicon layer during the deposition process to adjust the refractive index of the front composite passivation layer.

[0039] In some preferred embodiments of the present invention, the preparation method further includes at least one of the following processes:

[0040] Process 1: Control the thickness of the first tunneling oxide layer to be 2Å-20Å, the thickness of the single-layer oxygen-free amorphous silicon layer to be 10Å-50Å, and the thickness of the single-layer oxygen-doped amorphous silicon layer to be 5Å-35Å.

[0041] Process 2: The oxygen concentration of the single-layer oxygen-doped amorphous silicon layer is 5%-50% in atomic percentage; and / or, the refractive index of the front composite passivation layer is 3.2-3.9;

[0042] Process 3: Deposit a composite amorphous silicon layer using PECVD technology. The deposition conditions for the composite amorphous silicon layer include: deposition temperature of 150-600℃ and deposition pressure of 100-500 Pa.

[0043] Process 4: During the deposition of the oxygen-free amorphous silicon layer, a first silane is introduced, along with a first phosphine and carbon dioxide, which may or may not be introduced; during the deposition of the oxygen-doped amorphous silicon layer, a second silane, oxygen-doped gas, and a second phosphine, which may or may not be introduced, are introduced; wherein the flow rates of the first silane and the second silane are each independently 1000-30000 sccm, the flow rate of the first phosphine is 50-2000 sccm, the flow rate of carbon dioxide is 100-2000 sccm, the flow rate of the oxygen-doped gas is 100-2000 sccm, and the flow rate of the second phosphine is 30-300 sccm.

[0044] Process 5: The first semiconductor layer includes a second tunneling oxide layer and a first doped polysilicon layer sequentially disposed on the back side; the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer sequentially disposed on the back side.

[0045] Process 6, the preparation method also includes: after depositing a composite amorphous silicon layer in S4, an anti-reflection layer is also deposited on the front side;

[0046] Process 7, the preparation method also includes the following steps:

[0047] S6. The second semiconductor layer located on the first semiconductor layer is removed by laser etching to form a first semiconductor opening region that is spaced apart from the second semiconductor opening region;

[0048] S7. Deposit a conductive film layer on the back side obtained in S6;

[0049] S8. An opening is etched on the surface conductive film layer in the transition region between the first semiconductor opening region and the second semiconductor opening region to form an isolation trench.

[0050] S9. Metal electrodes are formed on the outer surfaces of the corresponding conductive film layers in the regions where the first semiconductor opening region and the second semiconductor opening region are located, respectively.

[0051] Thirdly, the present invention provides a back contact battery, which is prepared by the method for preparing a back contact battery as described in the second aspect.

[0052] Fourthly, the present invention provides a battery assembly comprising a back contact battery having a front composite passivation layer as described in the first aspect, or comprising a back contact battery as described in the third aspect.

[0053] Beneficial effects:

[0054] This invention, through the aforementioned technical solution, particularly the first tunneling oxide layer and a composite amorphous silicon layer comprising alternating oxygen-free and oxygen-doped amorphous silicon layers, forms a front-side composite passivation layer. The first tunneling oxide layer and the oxygen-doped amorphous silicon layer are wide bandgap material layers, while the oxygen-free amorphous silicon layer is a narrow bandgap material layer. The tunneling oxide layer and the composite amorphous silicon layer form a continuous, quantum well-like structure, optimizing the refractive index and increasing the short-circuit current of the battery, thus improving battery efficiency. Simultaneously, the composite amorphous silicon layer structure helps reduce the UV degradation rate of the battery, improving its UV degradation resistance reliability. Furthermore, this invention also controls the total thickness of the front-side composite passivation layer to 50Å-300Å, which helps improve the transmission of incident light while reducing parasitic absorption in amorphous silicon, thereby increasing the battery's short-circuit current.

[0055] In principle, specifically, the front-side composite passivation layer of this invention uses a structure of wide bandgap film layer-narrow bandgap film layer-wide bandgap film layer (tunneling oxide layer bandgap approximately 8.9 eV, oxygen-free amorphous silicon layer bandgap approximately 1.8 eV, and oxygen-doped amorphous silicon layer bandgap approximately 2.2 eV), forming a continuous quantum well-like structure. Electron-hole pairs excited by ultraviolet light in the passivation layer are confined within the well layer and rapidly collected by the crystalline silicon using a built-in electric field. This significantly reduces the probability of nonradiative recombination of charge carriers within the hydrogenated amorphous silicon, thereby reducing the main energy source leading to Si-H bond breakage and hydrogen atom escape. Simultaneously, the wide bandgap oxygen-doped amorphous silicon layer has a more stable atomic structure (containing strong Si-O bonds), which not only withstands higher-energy ultraviolet shocks but also effectively binds hydrogen atoms through its dense network, preventing their escape from the film layer and maintaining long-term stability of the passivation effect. In summary, this invention achieves "rapid depletion" of harmful charge carriers and "active reinforcement" of the membrane structure, synergistically enhancing resistance to ultraviolet attenuation.

[0056] In a preferred embodiment of the present invention, adjusting the oxygen concentration of the oxygen-doped amorphous silicon layer within a suitable range and / or setting the oxygen doping in a gradient manner is more conducive to reducing parasitic absorption, broadening the spectral response range, and reducing the refractive index, thereby further improving the short-circuit current of the battery. A first tunneling oxide layer, an oxygen-free amorphous silicon layer, and an oxygen-doped amorphous silicon layer with suitable thickness ratios facilitate excellent passivation, ensuring that photogenerated carriers can be effectively collected while maintaining a high open-circuit voltage, thereby improving battery efficiency and resistance to ultraviolet degradation. Attached Figure Description

[0057] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0058] Figure 1 This is a schematic diagram of a specific embodiment of the back contact battery of the present invention.

[0059] Explanation of reference numerals in the attached figures

[0060] 1. Antireflection layer, 2. Oxygen-free amorphous silicon layer, 3. Oxygen-doped amorphous silicon layer, 4. First tunneling oxide layer, 5. Composite amorphous silicon layer, 6. Front composite passivation layer, 7. Silicon wafer, 8. Second tunneling oxide layer, 9. First doped layer, 10. Intrinsic amorphous silicon layer, 11. Second doped layer, 12. Transparent conductive film layer, 13. First electrode, 14. Second electrode. Detailed Implementation

[0061] In this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0062] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0063] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges. For numerical ranges, the endpoint values ​​of the ranges, the endpoint values ​​of the ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein. The terms "optional" and "optional" mean that they may or may not be included (or may or may not be present).

[0064] In this invention, the area closer to the silicon wafer is considered the inside, and the area farther from the silicon wafer is considered the outside.

[0065] In a first aspect, the present invention provides a back-contact battery with a front-side composite passivation layer, comprising a silicon wafer, a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of the silicon wafer, and a first tunneling oxide layer and a composite amorphous silicon layer sequentially disposed on the front side of the silicon wafer to form a front-side composite passivation layer; wherein, the composite amorphous silicon layer comprises an oxygen-free amorphous silicon layer and an oxygen-doped amorphous silicon layer sequentially disposed, and single-layer oxygen-free amorphous silicon layers and single-layer oxygen-doped amorphous silicon layers are alternately disposed. The composite amorphous silicon layer of the present invention includes at least one layer of oxygen-free amorphous silicon and at least one layer of oxygen-doped amorphous silicon, both employing an alternating structure of single-layer oxygen-free amorphous silicon and single-layer oxygen-doped amorphous silicon layers, forming a continuous quantum well-like structure, improving the short-circuit current of the battery, and enhancing battery efficiency. Simultaneously, the composite amorphous silicon layer structure helps reduce the UV degradation rate of the battery and improves the battery's UV degradation resistance reliability.

[0066] Preferably, the total thickness of the front composite passivation layer in this invention is 50 Å-300 Å, specifically, it can be 50 Å, 60 Å, 70 Å, 80 Å, 90 Å, 100 Å, 110 Å, 120 Å, 130 Å, 140 Å, 150 Å, 160 Å, 170 Å, 180 Å, 190 Å, 200 Å, 210 Å, 220 Å, 230 Å, 240 Å, 250 Å, 260 Å, 270 Å, 280 Å, 290 Å, 295 Å, or 300 Å, or any range between any two values. This invention uses a front composite passivation layer of suitable thickness, which is more conducive to the rapid conduction of charge carriers, improving battery efficiency, and resisting ultraviolet light damage, reducing UV decay.

[0067] In some preferred embodiments of the present invention, the thickness of the first tunneling oxide layer is 2 Å-20 Å, specifically 2 Å, 3 Å, 4 Å, 5 Å, 6 Å, 7 Å, 8 Å, 9 Å, 10 Å, 11 Å, 12 Å, 13 Å, 14 Å, 15 Å, 16 Å, 17 Å, 18 Å, 19 Å or 20 Å, and any range between any two point values.

[0068] Preferably, the thickness of the monolayer oxygen-free amorphous silicon layer in this invention is 10 Å-50 Å, specifically, it can be 2 Å, 3 Å, 4 Å, 5 Å, 6 Å, 7 Å, 8 Å, 9 Å, 10 Å, 11 Å, 12 Å, 13 Å, 14 Å, 15 Å, 16 Å, 17 Å, 18 Å, 19 Å, 20 Å, 21 Å, 22 Å, 23 Å, 24 Å, 25 Å, 26 Å, 27 Å, 28 Å, 29 Å, 30 Å, 32 Å, 35 Å, 37 Å, 40 Å, 42 Å, 45 Å, 48 Å, 49 Å, or 50 Å, or any range between any two values. The thickness of different oxygen-free amorphous silicon layers can be the same or different. This invention uses a suitable thickness of monolayer oxygen-free amorphous silicon layer, which is more conducive to obtaining a good passivation effect while reducing parasitic absorption.

[0069] Preferably, the thickness of the monolayer oxygen-doped amorphous silicon layer in this invention is 5 Å-35 Å, specifically, it can be 5 Å, 6 Å, 7 Å, 8 Å, 9 Å, 10 Å, 11 Å, 12 Å, 13 Å, 14 Å, 15 Å, 16 Å, 17 Å, 18 Å, 19 Å, 20 Å, 21 Å, 22 Å, 23 Å, 24 Å, 25 Å, 26 Å, 27 Å, 28 Å, 29 Å, 30 Å, 32 Å, 33 Å, 34 Å, or 35 Å, or any range between any two values. The thickness of different layers of oxygen-doped amorphous silicon can be the same or different. This invention uses a suitable thin monolayer oxygen-doped amorphous silicon layer, which is more conducive to improving the short-circuit current of the battery and reducing the series resistance.

[0070] In some preferred embodiments of the present invention, the thickness ratio of the first tunneling oxide layer, the single-layer oxygen-free amorphous silicon layer and the single-layer oxygen-doped amorphous silicon layer is 1:(1-3):(1-4), more preferably 1:(1-3):(1-2. This, combined with the quantum well-like structure of the front composite passivation layer, is more conducive to reducing the probability of nonradiative recombination of charge carriers and enhancing the ability to resist ultraviolet light and maintain the passivation effect.

[0071] In some preferred embodiments of the present invention, the oxygen concentration of the monolayer oxygen-doped amorphous silicon is 5%-50% in atomic percentage, specifically 5%, 6%, 7%, 8%, 9%, 10%, 11%, 12%, 13%, 14%, 15%, 16%, 17%, 18%, 19%, 20%, 22%, 25%, 27%, 30%, 32%, 35%, 37%, 40%, 41%, 42%, 43%, 44%, 45%, 46%, 47%, 48%, 49%, or 50%, or any range between any two values. The oxygen concentration of different oxygen-doped amorphous silicon layers can be the same or different. The present invention uses an oxygen-doped amorphous silicon layer with a suitable oxygen concentration, which is more conducive to bandgap and refractive index adjustment and resistance to ultraviolet light impact.

[0072] Preferably, the refractive index of the front composite passivation layer is 3.2-3.9, more preferably 3.2-3.7. Controlling the refractive index of the front composite passivation layer is more conducive to reducing the reflection of incident light and increasing the short-circuit current.

[0073] In some preferred embodiments of the present invention, the composite amorphous silicon layer contains n oxygen-free amorphous silicon layers and m oxygen-doped amorphous silicon layers, where n ≥ m ≥ 1. n and m are both integers of natural numbers, and can be independently selected from 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 15, 20, etc. The oxygen-free amorphous silicon layers and the oxygen-doped amorphous silicon layers in the composite amorphous silicon layer can be multiple layers or a single layer, with n > m being preferred in the case of multiple layers.

[0074] In some preferred embodiments of the present invention, the outermost and innermost layers of the composite amorphous silicon layer are both oxygen-free amorphous silicon layers. This preferred approach is more conducive to improving the passivation effect at the contact interfaces between different film layers.

[0075] In some preferred embodiments of the present invention, m ≥ 2.

[0076] More preferably, in the direction away from the first tunneling oxide layer, the oxygen concentration of each oxygen-doped amorphous silicon layer is the same or increases in a gradient. More preferably, the oxygen concentration of each oxygen-doped amorphous silicon layer increases in a gradient, which is beneficial for gradually increasing the band gap width of the oxygen-doped amorphous silicon layer, reducing the refractive index, and improving the conductivity of the film, thereby improving the cell efficiency and UV degradation resistance reliability.

[0077] In some preferred embodiments of the present invention, the oxygen concentration of each oxygen-doped amorphous silicon layer is set in a gradient increasing manner along the direction away from the first tunneling oxide layer; and the magnitude of the gradient increase satisfies the following condition: the oxygen concentration of the oxygen-doped amorphous silicon layer in the subsequent gradient is 1-3 times that of the oxygen concentration of the oxygen-doped amorphous silicon layer in the previous gradient, for example, it can be 1, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, or 3 times, or any range between any two points. This preferred scheme is more conducive to adjusting the bandgap width and more conducive to forming a continuous quantum well-like structure.

[0078] Preferably, in this invention, the thickness of each oxygen-doped amorphous silicon layer increases in a gradient along the direction away from the first tunneling oxide layer. This preferred embodiment of the invention is more conducive to balancing improved battery efficiency and UV degradation resistance.

[0079] In some preferred embodiments of the present invention, 5≥n≥m≥2.

[0080] In some preferred embodiments of the present invention, n is 4 and m is 3. This preferred approach is more conducive to increasing short-circuit current, improving battery efficiency, and reducing UV degradation.

[0081] Preferably, in this invention, the total thickness of the multiple oxygen-free amorphous silicon layers in the composite amorphous silicon layer is 50 Å to 200 Å, specifically, it can be 50 Å, 55 Å, 60 Å, 65 Å, 70 Å, 75 Å, 80 Å, 85 Å, 90 Å, 95 Å, 100 Å, 110 Å, 120 Å, 130 Å, 140 Å, 150 Å, 160 Å, 170 Å, 180 Å, 190 Å, or 200 Å, or any range between any two values. This preferred scheme is more conducive to improving carrier collection efficiency and reducing the probability of SI-H bond breakage.

[0082] Preferably, in this invention, the total thickness of the multiple oxygen-doped amorphous silicon layers in the composite amorphous silicon layer is 20 Å to 100 Å, specifically, it can be 20 Å, 21 Å, 22 Å, 23 Å, 24 Å, 25 Å, 26 Å, 27 Å, 28 Å, 29 Å, 30 Å, 32 Å, 33 Å, 34 Å, 35 Å, 37 Å, 40 Å, 42 Å, 45 Å, 48 Å, 50 Å, 55 Å, 60 Å, 65 Å, 70 Å, 75 Å, 80 Å, 85 Å, 90 Å, 95 Å, or 100 Å, or any range between two such values. This preferred embodiment facilitates the adjustment of the refractive index to increase the transmission of incident light and improve battery performance.

[0083] In some preferred embodiments of the present invention, at least one oxygen-free amorphous silicon layer in the composite amorphous silicon layer is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer is also doped with phosphorus.

[0084] In some preferred embodiments of the present invention, n ≥ m ≥ 2. More preferably, at least one inner oxygen-free amorphous silicon layer in the multilayer oxygen-free amorphous silicon layers is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer near the first tunneling oxide layer in the multilayer oxygen-doped amorphous silicon layers is also doped with phosphorus (more preferably, at least two oxygen-doped amorphous silicon layers near the first tunneling oxide layer are also doped with phosphorus). This preferred approach allows for more precise control of carrier distribution, avoiding the increase in recombination centers caused by bottom-layer doping or the reduction in optical losses caused by top-layer doping, thus improving minority carrier lifetime and ultimately enhancing battery efficiency and UV degradation resistance reliability.

[0085] In some preferred embodiments of the present invention, the phosphorus doping concentration of the oxygen-free amorphous silicon layer is 1%-6% in atomic percentage, for example, specifically 1%, 1.5%, 2%, 2.5%, 3%, 3.5%, 4%, 4.5%, 5%, 5.5% or 6%, and any range between two point values.

[0086] Preferably, the phosphorus doping concentration of the oxygen-doped amorphous silicon layer is 1%-8% in atomic percentage, for example, it can be 1%, 1.5%, 2%, 2.5%, 3%, 3.5%, 4%, 4.5%, 5%, 5.5%, 6%, 6.5%, 7%, 7.5%, 7.9% or 8%, or any range between any two point values.

[0087] Preferably, in the direction away from the first tunneling oxide layer, the phosphorus doping concentration of each oxygen-doped amorphous silicon layer is set in a gradient decreasing manner, which is more conducive to improving battery efficiency and UV degradation resistance reliability.

[0088] In some preferred embodiments of the present invention, the composite amorphous silicon layer comprises a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer disposed sequentially. More preferably, in the direction away from the first tunneling oxide layer, the fourth oxygen-free amorphous silicon layer is further doped with phosphorus, and the third and / or fifth oxygen-doped amorphous silicon layers are further doped with phosphorus. This preferred embodiment is more conducive to improving conductivity, enhancing the front surface field, and repelling minority carriers to reduce recombination losses.

[0089] In some preferred embodiments of the present invention, the back contact battery further includes an antireflection layer disposed outside the front composite passivation layer. The antireflection layer of the present invention can be made with reference to existing technology. Preferably, the antireflection layer can be at least one of silicon nitride, aluminum oxide, and silicon oxide.

[0090] More preferably, the thickness of the antireflection layer is 80-120 nm.

[0091] Preferably, the refractive index of the antireflection layer is 1.7-2.5.

[0092] In some specific embodiments of the present invention, the first semiconductor layer includes a first passivation layer and a first doped silicon layer, and the second semiconductor layer includes a second passivation layer and a second doped silicon layer. The first passivation layer and the second passivation layer are each independently a second tunneling oxide layer or an intrinsic silicon layer. The first doped silicon layer and the second doped silicon layer are each independently polycrystalline silicon, amorphous silicon, or microcrystalline silicon. Specifically, one of the first doped silicon layer and the other of the second doped silicon layer is N-type and the other is P-type.

[0093] In some preferred embodiments of the present invention, the first semiconductor layer includes a second tunneling oxide layer and a first doped polycrystalline silicon layer sequentially disposed on the back side, and the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer sequentially disposed on the back side. This combined passivation structure for the back contact battery, in conjunction with a specific front passivation structure, further enhances the overall battery efficiency.

[0094] The thicknesses and corresponding doping concentrations of the second tunneling oxide layer or intrinsic silicon layer, the first doped silicon layer, and the second doped silicon layer in this invention can all refer to the ranges of existing technologies and can all be used in this invention. For example, the thickness of the second tunneling oxide layer is 1-2 nm, the thickness of the intrinsic silicon layer is 5-15 nm, and the thickness of the second doped silicon layer is 7-45 nm with an effective doping concentration of 2e18 cm⁻¹. -3 -3e20cm -3 The thickness of the first doped silicon layer is 30-250 nm, and the effective doping concentration is greater than 5e18 cm⁻¹. -3 .

[0095] Preferably, in this invention, the two ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, and the area between them is a gap region. The back contact battery also includes a metal electrode and a conductive film layer laid on the outer surfaces of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed on the portion of the conductive film layer located in the gap region. The metal electrode is disposed on the outer surface of the corresponding conductive film layer of the second semiconductor opening region and the first semiconductor opening region.

[0096] In some preferred embodiments of the present invention, the portion of the back side of the silicon wafer corresponding to the first semiconductor layer is a polished surface, the remaining portion is a textured surface, and the front side of the silicon wafer is a polished surface.

[0097] Secondly, the present invention provides a method for preparing a back contact battery, the method comprising the following steps:

[0098] S1. Provides double-sided polished silicon wafers;

[0099] S2. A first semiconductor layer and a mask layer are formed on the back side of the silicon wafer; then, an opening is etched on the corresponding film layer on the back side to form a second semiconductor opening region; the etching opening in S2 of this invention makes the first semiconductor layer spaced apart.

[0100] S3. By texturing and cleaning, a textured surface is formed on the front side of the silicon wafer and the second semiconductor opening area to remove the residual mask layer on the first semiconductor layer.

[0101] S4. A first tunneling oxide layer and a composite amorphous silicon layer are sequentially deposited on the front side of the silicon wafer to form a front composite passivation layer.

[0102] S5. Deposit a second semiconductor layer on the back side obtained in S4.

[0103] The type and thickness of the mask layer described in S2 of this invention can refer to existing technologies. For example, its type can be at least one of silicon nitride, silicon oxide, silicon oxynitride, or nitrogen-containing polycrystalline silicon, preferably silicon nitride. The mask layer thickness can be, for example, 40-90 nm. The mask layer is completely removed in the subsequent texturing process in S3.

[0104] The deposition process of the first tunneling oxide layer in S4 of this invention can refer to existing technologies, as long as the target film layer of the first tunneling oxide layer can be obtained. For example, the deposition of the first tunneling oxide layer can be performed using thermal oxidation or PECVD. Further, the thermal oxidation process conditions include: a deposition temperature of 150-600℃, N2O introduction, an N2O flow rate of 1000 sccm-20000 sccm, and a deposition pressure of 100 Pa-500 Pa. Further, the PECVD deposition conditions for the first tunneling oxide layer include: a deposition temperature of 150-600℃, N2O and SiH4 introduction, an N2O flow rate of 1000 sccm-20000 sccm, a SiH4 flow rate of 1000-30000 sccm, and a deposition pressure of 100 Pa-500 Pa.

[0105] The deposition process of the composite amorphous silicon layer includes the sequential deposition of an oxygen-free amorphous silicon layer and an oxygen-doped amorphous silicon layer, with single-layer oxygen-free amorphous silicon layers and single-layer oxygen-doped amorphous silicon layers alternating. More preferably, the total thickness of the front-side composite passivation layer is controlled to be 50 Å-300 Å. The corresponding structures, thicknesses, doping concentrations, and other parameters of the first tunneling oxide layer and the composite amorphous silicon layer in this invention are the same as those in the back contact battery of the first aspect, and will not be repeated here.

[0106] In some preferred embodiments of the present invention, the composite amorphous silicon layer in S4 includes at least two alternately deposited oxygen-free amorphous silicon layers and oxygen-doped amorphous silicon layers, wherein the number of oxygen-free amorphous silicon layers contained in the composite amorphous silicon layer is n, the number of oxygen-doped amorphous silicon layers contained is m, and n≥m.

[0107] In some preferred embodiments of the present invention, the oxygen concentration of each oxygen-doped amorphous silicon layer is controlled to be the same or to increase in a gradient along the direction away from the first tunneling oxide layer. The oxygen concentration is controlled by adjusting the oxygen-doping gas during the deposition process of the corresponding oxygen-doped amorphous silicon layer. The oxygen concentration range of the oxygen-doped amorphous silicon layer is the same as that of the oxygen-doped amorphous silicon layer in the back contact cell of the first aspect, and will not be described again here.

[0108] In some preferred embodiments of the present invention, oxygen-doped gas is introduced during the deposition of the oxygen-doped amorphous silicon layer, and the oxygen-doped gas includes at least one of N2O and CO2.

[0109] In some preferred embodiments of the present invention, at least one oxygen-free amorphous silicon layer and at least one oxygen-doped amorphous silicon layer in the composite amorphous silicon layer are also doped with phosphorus. Phosphorus doping is controlled by adjusting the phosphorus-doping gas, such as phosphine, during the deposition process of the desired phosphorus-doped film layer. The range of phosphorus doping concentration for each film layer is the same as the range of phosphorus doping concentration for the corresponding film layer in the back contact battery of the first aspect, and will not be repeated here.

[0110] In some preferred embodiments of the present invention, n≥m≥2; wherein, at least one inner oxygen-free amorphous silicon layer in the multilayer oxygen-free amorphous silicon layer is further doped with phosphorus, and at least one oxygen-doped amorphous silicon layer in the multilayer oxygen-doped amorphous silicon layer near the first tunneling oxide layer is further doped with phosphorus.

[0111] In some preferred embodiments of the present invention, the composite amorphous silicon layer includes a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer deposited sequentially. The fourth oxygen-free amorphous silicon layer is further doped with phosphorus in the direction away from the first tunneling oxide layer, and the third and / or fifth oxygen-doped amorphous silicon layers are further doped with phosphorus.

[0112] In some preferred embodiments of the present invention, the composite amorphous silicon layer comprises several oxygen-free amorphous silicon layers, and carbon dioxide is introduced into at least one inner oxygen-free amorphous silicon layer during the deposition process to adjust the refractive index of the front composite passivation layer. The refractive index of the front composite passivation layer is in the same range as that of the front composite passivation layer in the back contact battery of the first aspect, and will not be described again here.

[0113] In some preferred embodiments of the present invention, a composite amorphous silicon layer is deposited using PECVD technology.

[0114] Preferably, the deposition conditions for the composite amorphous silicon layer in this invention include: a deposition temperature of 150-600℃ and a deposition pressure of 100-500 Pa.

[0115] In some preferred embodiments of the present invention, a first silane, and a first phosphine and carbon dioxide (with or without introduction) are introduced during the deposition of the oxygen-free amorphous silicon layer. Whether the first phosphine is introduced depends on whether the oxygen-free amorphous silicon layer is phosphorus-doped, and whether carbon dioxide is introduced depends on whether the refractive index of the front composite passivation layer needs to be adjusted. More preferably, the flow rate of the first silane is 1000-30000 sccm, preferably 1500-2300 sccm; the flow rate of the first phosphine during introduction is 50-2000 sccm, preferably 30-500 sccm; and the flow rate of carbon dioxide is 100-2000 sccm, preferably 100-1500 sccm.

[0116] In some preferred embodiments of the present invention, a second silane, an oxygen-doped gas, and a second phosphine (with or without introduction) are introduced during the deposition of the oxygen-doped amorphous silicon layer. Whether the second phosphine is introduced depends on whether the oxygen-doped amorphous silicon layer is phosphorus-doped. More preferably, the flow rate of the second silane is 1000-30000 sccm, the flow rate of the oxygen-doped gas is 100-2000 sccm, and the flow rate of the second phosphine during introduction is 30-300 sccm.

[0117] In some preferred embodiments of the present invention, the preparation method further includes: after depositing a composite amorphous silicon layer in S4, an antireflection layer is also deposited on the front side.

[0118] In some preferred embodiments of the present invention, the preparation method further includes the following steps:

[0119] S6. The second semiconductor layer located on the first semiconductor layer is removed by laser etching to form a first semiconductor opening region that is spaced apart from the second semiconductor opening region;

[0120] S7. Deposit a conductive film layer on the back side obtained in S6;

[0121] S8. An opening is etched on the surface conductive film layer in the transition region between the first semiconductor opening region and the second semiconductor opening region to form an isolation trench.

[0122] S9. Metal electrodes are formed on the outer surfaces of the corresponding conductive film layers in the regions where the first semiconductor opening region and the second semiconductor opening region are located, respectively.

[0123] Thirdly, the present invention provides a back contact battery, which is prepared by the method for preparing a back contact battery as described in the second aspect. The structure and performance of the back contact battery of the third aspect of the present invention are the same as those of the back contact battery of the first aspect, and will not be described again here.

[0124] Fourthly, the present invention provides a battery assembly comprising a back contact battery having a front composite passivation layer as described in the first aspect, or comprising a back contact battery as described in the third aspect.

[0125] The embodiments of the present invention described below are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0126] Example 1

[0127] A back-contact battery, structured as follows Figure 1 As shown, it is prepared by the following method:

[0128] S1. Provides clean silicon wafers 7 that are polished on both sides;

[0129] S2. A first semiconductor layer and a mask layer are fabricated on the back side of silicon wafer 7. The first semiconductor layer includes a second tunneling oxide layer 8 (1.5 nm thick) and a first doped layer 9 (specifically, an N-type doped polysilicon layer with a thickness of 120 nm and an effective doping concentration of 9e19cm) deposited sequentially. -3 The mask layer is made of silicon nitride and has a thickness of 80 nm.

[0130] Then, laser patterning openings are made on the back film layer, and parts of the first semiconductor layer and mask layer are etched to form the second semiconductor opening region; at this time, the first semiconductor layers are arranged at intervals.

[0131] S3. Cleaning and texturing: A texturing surface is formed on the second semiconductor opening area on the back side of silicon wafer 7 and on the front side of silicon wafer 7, and all remaining mask layers on the first semiconductor layer are removed.

[0132] S4. A first tunneling oxide layer 4 and a composite amorphous silicon layer 5 are deposited on the front side of the silicon wafer 7 obtained in S3 to form a front-side composite passivation layer 6. Then, an antireflection layer 1 (silicon nitride, refractive index 2.1) with a thickness of 80 nm is deposited on the front side. Among them, the composite amorphous silicon layer 5 is deposited using PECVD technology to form alternating oxygen-free amorphous silicon layers 2 and oxygen-doped amorphous silicon layers 3. Specifically, it includes a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer deposited in sequence. The third oxygen-doped amorphous silicon layer, the fifth oxygen-doped amorphous silicon layer, and the seventh oxygen-doped amorphous silicon layer adopt an increasing oxygen doping method. In addition, along the direction away from the first tunneling oxide layer 4, the fourth oxygen-free amorphous silicon layer is also doped with phosphorus, and the third oxygen-doped amorphous silicon layer and the fifth oxygen-doped amorphous silicon layer are also doped with phosphorus.

[0133] The deposition process parameters for the first tunneling oxide layer 4 are as follows: thermal oxidation process is used, the deposition temperature is 450℃, N2O is introduced at a flow rate of 1800 sccm, and the deposition pressure is 120 Pa. The thickness of the first tunneling oxide layer 4 is 10 Å.

[0134] The second oxygen-free amorphous silicon layer deposition process parameters are: SiH4 flow rate of 1800 sccm, deposition pressure of 260 Pa, and thickness of 20 Å.

[0135] The process parameters for the fourth oxygen-free amorphous silicon layer are as follows: SiH4 flow rate is 1800 sccm, PH3 flow rate is 60 sccm, CO2 flow rate is 800 sccm, deposition pressure is 290 Pa, thickness is 20 Å, and phosphorus doping concentration is 2.3% by atomic percentage.

[0136] The process parameters for the sixth oxygen-free amorphous silicon layer are: SiH4 flow rate of 1800 sccm, CO2 flow rate of 800 sccm, deposition pressure of 290 Pa, and thickness of 20 Å.

[0137] The process parameters for the eighth oxygen-free amorphous silicon layer are: SiH4 flow rate of 1800 sccm, deposition pressure of 270 Pa, and thickness of 24 Å.

[0138] The process parameters for the third oxygen-doped amorphous silicon layer are as follows: SiH4 flow rate is 1800 sccm, N2O flow rate is 200 sccm, PH3 flow rate is 60 sccm, deposition pressure is 290 Pa, thickness is 13 Å, oxygen doping concentration is 9.7% (atomic percentage), and phosphorus doping concentration is 2.9% (atomic percentage).

[0139] The process parameters for the fifth oxygen-doped amorphous silicon layer are as follows: SiH4 flow rate is 1800 sccm, N2O flow rate is 600 sccm, PH3 flow rate is 60 sccm, deposition pressure is 290 Pa, thickness is 17 Å, oxygen doping concentration is 24.4% (atomic percentage), and phosphorus doping concentration is 2.4% (atomic percentage).

[0140] The process parameters for the seventh oxygen-doped amorphous silicon layer are: SiH4 flow rate of 1800 sccm, N2O flow rate of 1200 sccm, and deposition pressure of 280 Pa. The thickness of this film is 32 Å, and the oxygen doping concentration is 40% by atomic percentage.

[0141] Carbon dioxide was incorporated into the deposition process gas of the fourth and sixth oxygen-free amorphous silicon layers to adjust the refractive index of the front composite passivation layer 6 to be 3.4-3.7.

[0142] S5. Deposit a second semiconductor layer on the back side of silicon wafer 7. The second semiconductor layer includes an intrinsic amorphous silicon layer 10 (8 nm thick) and a second doped layer 11 (specifically a P-type doped amorphous silicon layer with a thickness of 15 nm and an effective doping concentration of 3e19cm) deposited sequentially. -3 );

[0143] S6. The second semiconductor layer located on the first semiconductor layer is removed by laser etching to form a first semiconductor opening region that is spaced apart from the second semiconductor opening region;

[0144] S7. A transparent conductive film layer 12, i.e., ITO, is deposited on the back side;

[0145] S8. An opening is etched on the corresponding transparent conductive film layer 12 in the transition region between the first semiconductor opening region and the second semiconductor opening region to form an isolation trench (not shown in the figure).

[0146] S9. Metal electrodes are formed on the outer surfaces of the corresponding transparent conductive film layers 12 in the regions where the first semiconductor opening region and the second semiconductor opening region are located, namely the second electrode 14 and the first electrode 13.

[0147] Example 2

[0148] The process was carried out in accordance with Example 1, except that the N2O flow rate of the third oxygen-doped amorphous silicon layer and the fifth oxygen-doped amorphous silicon layer was adjusted to 1200 sccm (that is, the gradient oxygen doping was changed to constant oxygen doping, and the oxygen doping concentration was 40% in terms of atomic percentage). The remaining process parameters remained unchanged, and the refractive index n of the resulting front composite passivation layer 6 was 3.2.

[0149] Example 3

[0150] The procedure was carried out in accordance with Example 1, except that the composite amorphous silicon layer 5 was fully phosphorus-doped, with a phosphorus doping concentration of 2.4% in terms of atomic percentage. The resulting front composite passivation layer 6 had a refractive index n=3.52.

[0151] Example 4

[0152] The procedure was carried out in accordance with Example 1, except that the fourth oxygen-free amorphous silicon layer, the third oxygen-doped amorphous silicon layer, and the fifth oxygen-doped amorphous silicon layer were all free of phosphorus. The resulting front composite passivation layer 6 has a refractive index n=3.6.

[0153] Example 5

[0154] The procedure was carried out in accordance with Example 1, except that the composite amorphous silicon layer 5 did not include a seventh oxygen-doped amorphous silicon layer or an eighth oxygen-free amorphous silicon layer. The resulting front composite passivation layer 6 has a refractive index n=3.8.

[0155] Example 6

[0156] The procedure was carried out in accordance with Example 1, except that the composite amorphous silicon layer 5 consisted of a second oxygen-free amorphous silicon layer and a third oxygen-doped amorphous silicon layer arranged sequentially, instead of the other five layers: a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer. The resulting front composite passivation layer 6 had a refractive index n=3.9.

[0157] Example 7

[0158] The procedure was carried out in accordance with Example 1, except that the oxygen-doped N2O flow rates of the third, fifth, and seventh oxygen-doped amorphous silicon layers were adjusted to 1200 sccm, 600 sccm, and 200 sccm, respectively, resulting in oxygen doping concentrations of 30%, 17%, and 7% in atomic percentage. The refractive index n of the resulting front composite passivation layer 6 was 3.94.

[0159] Example 8

[0160] The procedure was carried out in accordance with Example 1, except that the thicknesses of the third, fifth, and seventh oxygen-doped amorphous silicon layers were adjusted to be different, and were respectively 20 Å, 20 Å, and 20 Å. The resulting front composite passivation layer 6 has a refractive index n=3.43.

[0161] Comparative Example 1

[0162] The procedure was carried out in accordance with Example 1, except that the composite amorphous silicon layer 5 was different. The composite amorphous silicon layer 5 was composed of a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, and a seventh oxygen-doped amorphous silicon layer, arranged sequentially. The oxygen-free amorphous silicon layers and the oxygen-doped amorphous silicon layers were not alternated, and there were no oxygen-free amorphous silicon layers between the oxygen-doped amorphous silicon layers. The refractive index n of the resulting front composite passivation layer 6 was 3.48.

[0163] Comparative Example 2

[0164] The procedure was carried out in accordance with Example 1, except that the composite amorphous silicon layer 5 was replaced with a conventional amorphous silicon layer, which was an ultrathin amorphous silicon layer with a thickness of 15 nm and was not oxygen-doped. The resulting front composite passivation layer 6 had a refractive index n=4.2.

[0165] Comparative Example 3

[0166] The procedure was carried out in accordance with Example 1, except that the composite amorphous silicon layer 5 was different. Instead, the composite amorphous silicon layer 5 was replaced with a third oxygen-doped amorphous silicon layer, and the second oxygen-free amorphous silicon layer was not included in the composite amorphous silicon layer 5. The third oxygen-doped amorphous silicon layer was deposited directly after the first tunneling oxide layer 4 was deposited. The refractive index n of the resulting front composite passivation layer 6 was 3.97.

[0167] Comparative Example 4

[0168] The procedure was carried out in accordance with Example 1, except that the composite amorphous silicon layer 5 was different. The composite amorphous silicon layer 5 was composed of a third oxygen-doped amorphous silicon layer and a second oxygen-free amorphous silicon layer sequentially disposed. The refractive index n of the resulting front composite passivation layer 6 was 4.06.

[0169] Test case

[0170] The back-contact batteries obtained from the above embodiments and comparative examples were subjected to performance tests. The normalized results are shown in Table 1. Each performance index of each embodiment and comparative example was converted using Comparative Example 1 as a reference benchmark. The data in Comparative Example 1 is a normalized benchmark of 1.0000. Other examples were converted based on Comparative Example 1; for example, the UVLID attenuation value of Embodiment 1 / the UVLID attenuation value of Comparative Example 1 is 0.255. The specific test method for LID attenuation performance indicators can be found in GB / T6495.11-2016. The lower the UVLID attenuation value, the higher the reliability against UV attenuation. During the normalization process, the unit of short-circuit current is A, the unit of open-circuit voltage is V, the unit of battery efficiency is %, and the unit of UVLID attenuation value is %.

[0171] Table 1

[0172] Performance indicators Open circuit voltage short circuit current Battery efficiency UVLID attenuation value (after 48 hours of UV irradiation) Example 1 1.0191 1.0137 1.0399 0.255 Example 2 1.0150 1.0166 1.0342 0.333 Example 3 1.0123 1.0151 1.0272 0.376 Example 4 1.0177 1.0084 1.0311 0.450 Example 5 1.0109 1.0107 1.0219 0.613 Example 6 1.0041 1.0016 1.0058 0.752 Example 7 0.9973 0.9991 1.0303 0.418 Example 8 1.0109 1.0113 1.0295 0.475 Comparative Example 1 1.0000 1.0000 1.0000 1.0000 Comparative Example 2 1.0109 0.9943 0.9612 0.592 Comparative Example 3 0.9877 1.0000 0.9651 0.908 Comparative Example 4 0.9864 1.0017 0.9693 0.879

[0173] The results above show that, compared with the comparative example, the embodiment of the present invention improves the short-circuit current and open-circuit voltage of the battery, thereby improving battery efficiency. It also helps to reduce the UV degradation rate of the battery and improve the battery's UV degradation resistance reliability.

[0174] Furthermore, as can be seen from Examples 1 and 2-8, the preferred scheme of the present invention is more conducive to improving battery efficiency and UV degradation resistance reliability.

[0175] The preferred embodiments of the present invention have been described in detail above; however, the present invention is not limited thereto. Within the scope of the inventive concept, various simple modifications can be made to the technical solutions of the present invention, including combinations of various technical features in any other suitable manner. These simple modifications and combinations should also be considered as the content disclosed in the present invention and are all within the protection scope of the present invention.

Claims

1. A back contact battery with a front composite passivation layer, comprising a silicon wafer, and a first semiconductor layer and a second semiconductor layer alternately disposed on the back side of the silicon wafer, characterized in that, It also includes a first tunneling oxide layer and a composite amorphous silicon layer sequentially disposed on the front side of the silicon wafer to form a front composite passivation layer; wherein, the composite amorphous silicon layer includes an oxygen-free amorphous silicon layer and an oxygen-doped amorphous silicon layer sequentially disposed, and single-layer oxygen-free amorphous silicon layer and single-layer oxygen-doped amorphous silicon layer are alternately disposed, the total thickness of the front composite passivation layer is 50Å-300Å, the number of oxygen-free amorphous silicon layers contained in the composite amorphous silicon layer is n, the number of oxygen-doped amorphous silicon layers contained is m, n≥m≥2, and the innermost layer in the composite amorphous silicon layer is an oxygen-free amorphous silicon layer.

2. The back contact battery with a front composite passivation layer according to claim 1, characterized in that, The thickness of the first tunneling oxide layer is 2 Å-20 Å, the thickness of the single-layer oxygen-free amorphous silicon layer is 10 Å-50 Å, and the thickness of the single-layer oxygen-doped amorphous silicon layer is 5 Å-35 Å.

3. The back contact battery with a front composite passivation layer according to claim 1, characterized in that, The thickness ratio of the first tunneling oxide layer, the single-layer oxygen-free amorphous silicon layer, and the single-layer oxygen-doped amorphous silicon layer is 1:(1-3):(1-4).

4. The back contact battery with a front composite passivation layer according to claim 1, characterized in that, The oxygen concentration of the single-layer oxygen-doped amorphous silicon layer is 5%-50% in atomic percentage; and / or, the refractive index of the front composite passivation layer is 3.2-3.

9.

5. The back contact battery with a front composite passivation layer according to claim 1, characterized in that, Along the direction away from the first tunneling oxide layer, the oxygen doping concentration of each oxygen-doped amorphous silicon layer is set to be the same or to increase in a gradient.

6. The back contact battery with a front composite passivation layer according to claim 5, characterized in that, Along the direction away from the first tunneling oxide layer, the oxygen concentration of each oxygen-doped amorphous silicon layer is set in a gradient increasing manner; and the magnitude of the gradient increase satisfies the following condition: the oxygen concentration of the oxygen-doped amorphous silicon layer of the later gradient is 1-3 times that of the oxygen-doped amorphous silicon layer of the previous gradient.

7. The back contact battery with a front composite passivation layer according to claim 1, characterized in that, 5≥n≥m≥2; and / or, the thickness of each oxygen-doped amorphous silicon layer is set in a gradient increasing manner along the direction away from the first tunneling oxide layer.

8. The back contact battery with a front composite passivation layer according to claim 7, characterized in that, n is 4, m is 3; And / or, The total thickness of the multilayer oxygen-free amorphous silicon layer is 50 Å-200 Å, and the total thickness of the multilayer oxygen-doped amorphous silicon layer is 20 Å-100 Å.

9. The back contact battery with a front composite passivation layer according to claim 4, characterized in that, The outermost layer of the composite amorphous silicon layer is an oxygen-free amorphous silicon layer; and / or, at least one oxygen-free amorphous silicon layer in the composite amorphous silicon layer is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer is also doped with phosphorus.

10. The back contact battery with a front composite passivation layer according to any one of claims 1-9, characterized in that, At least one inner oxygen-free amorphous silicon layer in the multilayer oxygen-free amorphous silicon layer is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer in the multilayer oxygen-doped amorphous silicon layer near the first tunneling oxide layer is also doped with phosphorus.

11. The back contact battery with a front composite passivation layer according to claim 10, characterized in that, The phosphorus doping concentration of oxygen-free amorphous silicon layers is 1%-6% in atomic percentage, and the phosphorus doping concentration of oxygen-doped amorphous silicon layers is 1%-8% in atomic percentage. And / or, along the direction away from the first tunneling oxide layer, the phosphorus doping concentration of each oxygen-doped amorphous silicon layer is set in a gradient decreasing manner.

12. The back contact battery with a front composite passivation layer according to claim 10, characterized in that, The composite amorphous silicon layer includes a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer arranged sequentially. The fourth oxygen-free amorphous silicon layer is further doped with phosphorus in the direction away from the first tunneling oxide layer, and the third oxygen-doped amorphous silicon layer and / or the fifth oxygen-doped amorphous silicon layer are further doped with phosphorus.

13. The back contact battery with a front composite passivation layer according to any one of claims 1-9, characterized in that, The back contact battery also includes at least one of the following structures: Structure 1: The back contact battery also includes an antireflection layer disposed outside the front composite passivation layer; wherein the thickness of the antireflection layer is 80-120nm, and / or the refractive index of the antireflection layer is 1.7-2.5; Structure 2: The first semiconductor layer includes a first passivation layer and a first doped silicon layer; the second semiconductor layer includes a second passivation layer and a second doped silicon layer; the first passivation layer and the second passivation layer are each independently a second tunneling oxide layer or an intrinsic silicon layer; the first doped silicon layer and the second doped silicon layer are each independently polycrystalline silicon, amorphous silicon, or microcrystalline silicon; one of the first doped silicon layer and the other of the second doped silicon layer is N-type and the other is P-type. Structure 3: The two ends of the second semiconductor layer extend outward to cover the back side of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back side of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening regions and the first semiconductor opening regions are arranged alternately, and the area between them is a gap region. The back contact battery also includes a metal electrode and a conductive film layer laid on the outer surface of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed on the portion of the conductive film layer located in the gap region. The metal electrode is disposed on the outer surface of the corresponding conductive film layer of the second semiconductor opening region and the first semiconductor opening region. Structure 4: The back side of the silicon wafer corresponding to the first semiconductor layer is a polished surface, and the remaining part is a textured surface; the front side of the silicon wafer is a polished surface.

14. A method for preparing a back-contact battery, characterized in that, The preparation method includes the following steps: S1. Provides double-sided polished silicon wafers; S2. A first semiconductor layer and a mask layer are formed on the back side of the silicon wafer; then, an opening is etched on the corresponding film layer on the back side to form a second semiconductor opening region. S3. By texturing and cleaning, a textured surface is formed on the front side of the silicon wafer and the second semiconductor opening area, and the residual mask layer on the first semiconductor layer is removed. S4. A first tunneling oxide layer and a composite amorphous silicon layer are sequentially deposited on the front side of the silicon wafer to form a front-side composite passivation layer. The composite amorphous silicon layer includes an oxygen-free amorphous silicon layer and an oxygen-doped amorphous silicon layer deposited sequentially, with single-layer oxygen-free amorphous silicon layers and single-layer oxygen-doped amorphous silicon layers alternating, controlling the total thickness of the front-side composite passivation layer to be 50Å-300Å. In S4, the composite amorphous silicon layer includes at least two alternating deposits of oxygen-free amorphous silicon layers and oxygen-doped amorphous silicon layers. The number of oxygen-free amorphous silicon layers contained in the composite amorphous silicon layer is n, and the number of oxygen-doped amorphous silicon layers contained is m, where n≥m≥2. The innermost layer of the composite amorphous silicon layer is an oxygen-free amorphous silicon layer. S5. Deposit a second semiconductor layer on the back side obtained in S4.

15. The method for preparing a back contact battery according to claim 14, characterized in that, Along the direction away from the first tunneling oxide layer, the oxygen concentration of each oxygen-doped amorphous silicon layer is controlled to be the same or to be set in a gradient increasing manner.

16. The method for preparing a back contact battery according to claim 14, characterized in that, The composite amorphous silicon layer contains at least one oxygen-free amorphous silicon layer that is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer that is also doped with phosphorus.

17. The method for preparing a back contact battery according to any one of claims 14-16, characterized in that, At least one inner oxygen-free amorphous silicon layer in the multilayer oxygen-free amorphous silicon layer is also doped with phosphorus, and at least one oxygen-doped amorphous silicon layer near the first tunneling oxide layer in the multilayer oxygen-doped amorphous silicon layer is also doped with phosphorus.

18. The method for preparing a back contact battery according to claim 17, characterized in that, The composite amorphous silicon layer comprises a second oxygen-free amorphous silicon layer, a third oxygen-doped amorphous silicon layer, a fourth oxygen-free amorphous silicon layer, a fifth oxygen-doped amorphous silicon layer, a sixth oxygen-free amorphous silicon layer, a seventh oxygen-doped amorphous silicon layer, and an eighth oxygen-free amorphous silicon layer deposited sequentially. The fourth oxygen-free amorphous silicon layer is further doped with phosphorus in the direction away from the first tunneling oxide layer, and the third oxygen-doped amorphous silicon layer and / or the fifth oxygen-doped amorphous silicon layer are further doped with phosphorus. And / or, the phosphorus doping concentration of the oxygen-free amorphous silicon layer is 1%-6% in atomic percentage, and the phosphorus doping concentration of the oxygen-doped amorphous silicon layer is 1%-8% in atomic percentage.

19. The method for preparing a back contact battery according to any one of claims 14-16, characterized in that, During the deposition of the oxygen-doped amorphous silicon layer, an oxygen-doped gas is introduced, including at least one of N2O and CO2; and / or, The composite amorphous silicon layer includes several oxygen-free amorphous silicon layers. During the deposition process, carbon dioxide is introduced into at least one of the inner oxygen-free amorphous silicon layers to adjust the refractive index of the front composite passivation layer.

20. The method for preparing a back contact battery according to any one of claims 14-16, characterized in that, The preparation method also includes at least one of the following processes: Process 1: Control the thickness of the first tunneling oxide layer to be 2Å-20Å, the thickness of the single-layer oxygen-free amorphous silicon layer to be 10Å-50Å, and the thickness of the single-layer oxygen-doped amorphous silicon layer to be 5Å-35Å. Process 2: The oxygen concentration of the single-layer oxygen-doped amorphous silicon layer is 5%-50% in atomic percentage; and / or, the refractive index of the front composite passivation layer is 3.2-3.9; Process 3: Deposit a composite amorphous silicon layer using PECVD technology. The deposition conditions for the composite amorphous silicon layer include: deposition temperature of 150-600℃ and deposition pressure of 100-500 Pa. Process 4: During the deposition of the oxygen-free amorphous silicon layer, a first silane is introduced, along with a first phosphine and carbon dioxide, which may or may not be introduced; during the deposition of the oxygen-doped amorphous silicon layer, a second silane and oxygen-doped gas are introduced, along with a second phosphine, which may or may not be introduced; wherein, the flow rates of the first silane and the second silane are each independently 1000-30000 sccm, the flow rate of the first phosphine is 50-2000 sccm, the flow rate of carbon dioxide is 100-2000 sccm, the flow rate of the oxygen-doped gas is 100-2000 sccm, and the flow rate of the second phosphine is 30-300 sccm; Process 5: The first semiconductor layer includes a second tunneling oxide layer and a first doped polysilicon layer sequentially disposed on the back side; the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer sequentially disposed on the back side. Process 6, the preparation method also includes: after depositing a composite amorphous silicon layer in S4, an anti-reflection layer is also deposited on the front side; Process 7, the preparation method also includes the following steps: S6. The second semiconductor layer located on the first semiconductor layer is removed by laser etching to form a first semiconductor opening region that is spaced apart from the second semiconductor opening region; S7. Deposit a conductive film layer on the back side obtained in S6; S8. An opening is etched on the surface conductive film layer in the transition region between the first semiconductor opening region and the second semiconductor opening region to form an isolation trench. S9. Metal electrodes are formed on the outer surfaces of the corresponding conductive film layers in the regions where the first semiconductor opening region and the second semiconductor opening region are located, respectively.

21. A back-contact battery, characterized in that, It is prepared by the method of any one of claims 14-20.

22. A battery assembly, characterized in that, It includes a back contact battery with a front composite passivation layer as described in any one of claims 1-13, or includes a back contact battery as described in claim 21.

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