Light emitting diode epitaxial wafer and preparation method thereof, and light emitting diode
By designing alternating AlwGa1-wN barrier layers and InαGa1-αN well layers in GaN-based LED epitaxial wafers, the carrier distribution was optimized, solving the problem of efficiency roll-off in GaN-based LEDs at high current densities and improving luminous brightness and crystal quality.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- JIANGXI ZHAO CHI SEMICON CO LTD
- Filing Date
- 2026-03-27
- Publication Date
- 2026-05-29
AI Technical Summary
GaN-based LEDs exhibit an efficiency roll-off phenomenon at high current densities, mainly due to the uneven distribution of charge carriers caused by the difference in electron and hole mobility. Electrons accumulate in a few quantum wells in the P-region, while holes are difficult to inject into the depths of the N-region quantum wells, resulting in a decrease in efficiency.
Alternating layers of AlwGa1-wN barrier, In and InαGa1-αN well are used to form a carrier confinement layer, AlxInyGa1-x-yN barrier and InβGa1-βN well are used to form a composite layer, and InγGa1-γN barrier and InδGa1-δN well are used as hole injection layers. By controlling the thickness and composition ratio of each layer, a high bandgap electron blocking and high-speed hole channel are formed, thus optimizing the carrier distribution.
It effectively suppressed uneven carrier distribution and leakage, improved luminescence brightness, reduced defect density of multi-quantum well layers, improved crystal quality, and suppressed efficiency roll-off.
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Figure CN121924903B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor optoelectronic devices, and more particularly to a light-emitting diode epitaxial wafer and its fabrication method, and a light-emitting diode. Background Technology
[0002] GaN-based LEDs have achieved great success in lighting and display applications. However, when LEDs operate at high current densities, they exhibit an efficiency roll-off phenomenon, severely limiting their performance in high-brightness applications such as automotive headlights, high-end projection, and industrial curing. The main cause of this efficiency roll-off lies in the significant difference in electron and hole mobility, leading to a severely uneven carrier distribution: electrons tend to accumulate in a few quantum wells near the P-region, causing a surge in Auger recombination; while holes are difficult to inject into the depths of multi-quantum-well layers, resulting in low utilization of quantum wells near the N-region. Summary of the Invention
[0003] The technical problem to be solved by the present invention is to provide a light-emitting diode epitaxial wafer and its preparation method, which can improve the luminous efficiency.
[0004] Another technical problem that the present invention needs to solve is to provide a light-emitting diode.
[0005] To address the aforementioned problems, this invention discloses a light-emitting diode epitaxial wafer, comprising a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer sequentially stacked on the substrate.
[0006] The multi-quantum-well layer comprises a carrier confinement layer, a recombination layer, and a hole injection layer sequentially stacked on the N-type GaN layer; the carrier confinement layer comprises alternating layers of Al w Ga 1-w N-layer and In α Ga 1-α N-well layer; the composite layer comprises alternating layers of Al x In y Ga 1-x-y N-layer and In β Ga 1-β The N-well layer, the hole injection layer comprising alternating layers of In γ Ga 1-γ N-layer and In δ Ga 1-δ N-well layer;
[0007] Where w > x, γ > y.
[0008] As an improvement to the above technical solution, the Al w Ga 1-w The thickness of the N-barrier layer is greater than that of Al. x Iny Ga 1-x-y Thickness of the N-barrier layer;
[0009] The Al x In y Ga 1-x-y The thickness of the N barrier layer is greater than that of In. γ Ga 1-γ The thickness of the N-layer.
[0010] As an improvement to the above technical solution, the Al w Ga 1-w The thickness of the N-barrier layer is 13nm~17nm;
[0011] The Al x In y Ga 1-x-y The thickness of the N-barrier layer is 9nm~13nm;
[0012] The In γ Ga 1-γ The thickness of the N-barrier layer is 5nm~9nm.
[0013] As an improvement to the above technical solution, the number of cycles in the carrier confinement layer is 2 to 5;
[0014] The Al w Ga 1-w In the N-layer barrier, the value of w ranges from 0.02 to 0.1;
[0015] The In α Ga 1-α The thickness of the N-well layer is 2nm~5nm, and the value of α ranges from 0.15 to 0.3.
[0016] The number of cycles in the composite layer is 4 to 10;
[0017] The Al x In y Ga 1-x-y In the N-layer, the value of x ranges from 0 to 0.02, and the value of y ranges from 0 to 0.02.
[0018] The In β Ga 1-β The thickness of the N-well layer is 2nm~5nm, and the value of β ranges from 0.15 to 0.3.
[0019] The number of cycles in the hole injection layer is 2 to 5;
[0020] The In γ Ga 1-γ The value of γ in the N-barrier layer ranges from 0.02 to 0.1;
[0021] The In δ Ga 1-δ The thickness of the N-well layer is 2nm~5nm, and the value of δ ranges from 0.15 to 0.3.
[0022] As an improvement to the above technical solution, the Al w Ga 1-w The N-barrier layer is doped with Si, with a doping concentration of 1×10⁻⁶. 17 cm -3 ~5×10 18 cm -3 .
[0023] As an improvement to the above technical solution, along the growth direction of the light-emitting diode epitaxial wafer, a plurality of Al... w Ga 1-w The Si doping concentration in the N-barrier layer decreases.
[0024] Accordingly, the present invention also discloses a method for preparing a light-emitting diode epitaxial wafer, which is used to prepare the above-mentioned light-emitting diode epitaxial wafer, comprising:
[0025] Provide substrate;
[0026] A buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer are grown on the substrate.
[0027] The multi-quantum-well layer comprises a carrier confinement layer, a recombination layer, and a hole injection layer sequentially stacked on the N-type GaN layer; the carrier confinement layer comprises alternating layers of Al w Ga 1-w N-layer and In α Ga 1-α N-well layer; the composite layer comprises alternating layers of Al x In y Ga 1-x-y N-layer and In β Ga 1-β The N-well layer, the hole injection layer comprising alternating layers of In γ Ga 1-γ N-layer and In δ Ga 1-δ N-well layer;
[0028] Where w > x, γ > y.
[0029] As an improvement to the above technical solution, the Al w Ga 1-w The growth temperature of the N-barrier layer is higher than that of Al. x In y Ga 1-x-yGrowth temperature of the N-barrier layer;
[0030] The Al x In y Ga 1-x-y The growth temperature of the N-barrier layer is greater than that of In. γ Ga 1-γ The growth temperature of the N-barrier layer.
[0031] As an improvement to the above technical solution, the Al w Ga 1-w The growth temperature of the N-barrier layer is 890℃~910℃;
[0032] The In α Ga 1-α The growth temperature of the N-well layer is 720℃~800℃;
[0033] The Al x In y Ga 1-x-y The growth temperature of the N-barrier layer is 870℃~890℃;
[0034] The In β Ga 1-β The growth temperature of the N-well layer is 720℃~800℃;
[0035] The In γ Ga 1-γ The growth temperature of the N-barrier layer is 850℃~870℃;
[0036] The In δ Ga 1-δ The growth temperature of the N-well layer is 720℃~800℃.
[0037] Accordingly, the present invention also discloses a light-emitting diode, which includes the above-described light-emitting diode epitaxial wafer.
[0038] Implementing this invention has the following beneficial effects:
[0039] In one embodiment of the present invention, the light-emitting diode epitaxial wafer includes a substrate, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer are sequentially stacked. The multiple quantum well layer includes a carrier confinement layer, a recombination layer, and a hole injection layer sequentially stacked on the N-type GaN layer; the carrier confinement layer includes alternating layers of Al. w Ga 1-w N-layer and In α Ga 1-α N-well layer; composite layer comprising alternating layers of Al x In y Ga 1-x-y N-layer and Inβ Ga 1-β The N-well layer, the hole injection layer comprises alternating layers of In... γ Ga 1-γ N-layer and In δ Ga 1-δ An N-well layer; where w > x, γ > y. Based on the above-described LED epitaxial wafer, a high bandgap Al layer is used in the region near the N-type GaN layer. w Ga 1-w The N-layer effectively reduces electron migration rate and blocks electron leakage; and alternating layers of In are used. γ Ga 1-γ N-layer and In δ Ga 1-δ The N-well layer, acting as a hole injection layer, forms a high-speed channel for holes, allowing hole carriers to rapidly enter the recombination layer. The combination of these two elements enables the recombination region to accommodate more carriers, reducing the local carrier density and effectively suppressing Auger recombination. Simultaneously, Al... x In y Ga 1-x-y N-layer and In β Ga 1-β Alternating N-well layers form a composite layer, which can effectively handle recombination under high current. The combination of these features fundamentally alleviates the problems of uneven carrier distribution and leakage, improves luminescence brightness, and effectively suppresses efficiency roll-off. Furthermore, each layer uses a different In / Ga / Al composition, meaning each layer also has different lattice parameters. This can relax dislocations to a certain extent, making the strain of different layers more matched, reducing the average defect density of the multi-quantum-well layer, and improving its crystal quality. Attached Figure Description
[0040] Figure 1 This is a schematic diagram of the structure of a light-emitting diode epitaxial wafer in one embodiment of the present invention;
[0041] Figure 2 This is a flowchart of a method for preparing an epitaxial wafer for a light-emitting diode according to an embodiment of the present invention.
[0042] In this designation, 100 is the substrate, 200 is the buffer layer, 300 is the undoped GaN layer, 400 is the N-type GaN layer, 500 is the multiple quantum well layer, 510 is the carrier confinement layer, and 511 is the Al layer. w Ga 1-w N-layer, 512 is In α Ga 1-α N-well layer, 520 is a composite layer, 521 is Al x In y Ga 1-x-y N-layer, 522 is In β Ga1-β N-well layer, 530 is hole injection layer, 531 is In γ Ga 1-γ N-layer, 532 is In δ Ga 1-δ The N-well layer and the 600 layer are P-type GaN layers. Detailed Implementation
[0043] To facilitate understanding of the present invention, it will be described in more detail below. However, it should be understood that the present invention can be implemented in many different forms and is not limited to the embodiments or examples described herein. Rather, these embodiments or examples are provided to make the disclosure of the present invention more thorough and complete.
[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments or examples only and is not intended to limit the invention. The optional range of the term "and / or" as used herein includes any one of two or more of the related listed items, as well as any and all combinations of the related listed items, including any two related listed items, any more related listed items, or a combination of all related listed items.
[0045] See Figure 1 The present invention discloses a light-emitting diode epitaxial wafer, which includes a substrate 100, a buffer layer 200, an undoped GaN layer 300, an N-type GaN layer 400, a multiple quantum well layer 500 and a P-type GaN layer 600 sequentially stacked on the substrate 100.
[0046] The multi-quantum-well layer 500 includes a carrier confinement layer 510, a composite layer 520, and a hole injection layer 530 sequentially stacked on an N-type GaN layer 400; the carrier confinement layer 510 includes alternating layers of Al w Ga 1-w N-layer 511 and In α Ga 1-α N-well layer 512; composite layer 520 includes alternating layers of Al x In y Ga 1-x-y N-layer 521 and In β Ga 1-β N-well layer 522, hole injection layer 530 includes alternating layers of In γ Ga 1-γ N-layer 531 and In δ Ga 1-δN-well layer 532; where w > x, γ > y. Based on the above-described LED epitaxial wafer, a high bandgap Al layer was used in the region near the N-type GaN layer 400. w Ga 1-w The N-layer 511 effectively reduces electron migration rate and blocks electron leakage; and alternating layers of In are used. γ Ga 1-γ N-layer 531 and In δ Ga 1-δ The N-well layer 532 serves as the hole injection layer 530, forming a high-speed channel for holes, allowing hole carriers to rapidly enter the recombination layer 520. The combination of these two layers enables the recombination region to accommodate more carriers, reducing the local carrier density and effectively suppressing Auger recombination. Simultaneously, Al is used... x In y Ga 1-x-y N-layer 521 and In β Ga 1-β The N-well layers 522 are alternately stacked to form a composite layer 520, which can effectively handle recombination under high current. The combination of these features fundamentally alleviates the problems of uneven carrier distribution and leakage, improves luminescence brightness, and effectively suppresses efficiency roll-off. Furthermore, each layer uses a different In / Ga / Al composition, meaning each layer also has different lattice parameters. This can relax dislocations to a certain extent, making the strain of different layers more matched, reducing the average defect density of the multi-quantum-well layer 500, and improving its crystal quality.
[0047] Specifically, the number of cycles in the carrier confinement layer 510 is 2 to 5, exemplarily 3, 4 or 5, but not limited thereto.
[0048] Specifically, Al w Ga 1-w The thickness of the N-barrier layer 511 is 13nm~17nm; it should be noted that if Al w Ga 1-w If the thickness of the N-barrier layer 511 is insufficient, electrons may tunnel or thermally emit across Al. w Ga 1-w With N layers and 511, the limiting effect is greatly reduced. If Al w Ga 1-w If the N-barrier layer 511 is too thick, the series resistance increases significantly, leading to excessively high operating voltage, severe device overheating, and a potential decrease in overall luminous efficiency due to heat generation. For example, Al... w Ga 1-w The thickness of the N-barrier layer 511 is 13.5nm, 14nm, 14.5nm, 15nm, 15.5nm, 16nm, or 16.5nm, but is not limited thereto. Preferably, it is 14nm to 17nm.
[0049] Specifically, Al w Ga 1-w In the N-layer barrier 511, the value of w ranges from 0.02 to 0.1. If the proportion of Al component (i.e., w) is low, the barrier height is low, and the confinement effect on electron carriers is poor. If the proportion of Al component is too high, the series resistance is too high. For example, w is 0.03, 0.05, 0.07, or 0.09, but is not limited to these. Preferably, it is 0.05 to 0.1.
[0050] Specifically, in α Ga 1-α The thickness of the N-well layer 512 is 2nm to 5nm, exemplarily 2.5nm, 3nm, 3.5nm, 4nm or 4.5nm, but not limited thereto.
[0051] Specifically, in α Ga 1-α The proportion (i.e., α) of the In component in the N-well layer 512 is 0.15~0.3; exemplaryly, it is 0.18, 0.21, 0.24, 0.27 or 0.29, but is not limited thereto.
[0052] Specifically, the number of cycles in the composite layer is 4 to 10, exemplarily 5, 6, 7, 8 or 9, but not limited thereto.
[0053] Specifically, Al x In y Ga 1-x-y The thickness of the N-barrier layer 521 is 9nm to 13nm, exemplarily 9.5nm, 10nm, 10.5nm, 11nm, 11.5nm, 12nm or 12.5nm, but not limited thereto. Preferably, it is 10nm to 13nm.
[0054] Specifically, Al x In y Ga 1-x-y The proportion (i.e., x) of the Al component in the N-barrier layer 521 is 0 to 0.02, exemplarily 0, 0.01, 0.015, or 0.02, but not limited thereto. x In y Ga 1-x-y The proportion (i.e., y) of the In component in the N barrier layer 521 is 0 to 0.02, exemplarily 0, 0.01, 0.015 or 0.02, but not limited thereto.
[0055] Specifically, in β Ga 1-β The thickness of the N-well layer 522 is 2nm to 5nm, exemplarily 2.5nm, 3nm, 3.5nm, 4nm or 4.5nm, but not limited thereto.
[0056] Specifically, inβ Ga 1-β The proportion (i.e., β) of the In component in the N-well layer 522 is 0.15~0.3; exemplaryly, it is 0.18, 0.21, 0.24, 0.27 or 0.29, but is not limited thereto.
[0057] Specifically, the number of cycles in the hole injection layer is 2 to 5, for example 2, 3, 4, 5, but not limited to this.
[0058] Specifically, in γ Ga 1-γ The thickness of the N-barrier layer 531 is 5nm~9nm. If its thickness is too thin, it cannot effectively form a barrier, increasing the probability of direct electron tunneling leakage and negating the efficiency roll-off improvement effect. If its thickness is too large, it will hinder hole injection, making hole transport difficult and resulting in insufficient holes in the composite layer 520, thus reducing luminous efficiency. For example, In γ Ga 1-γ The thickness of the N-barrier layer 531 is 5.5nm, 6nm, 6.5nm, 7nm, 7.5nm, 8nm, or 8.5nm, but is not limited to these. Preferably, it is 6nm to 9nm.
[0059] Specifically, in γ Ga 1-γ The proportion of In component (i.e., γ) in the N-barrier layer 531 is 0.02~0.1. If the proportion of In component is too high, the band gap is too small, and an effective barrier cannot be formed; if the proportion of In component is too low, hole injection is hindered. For example, In γ Ga 1-γ The proportion of In component in the N barrier layer 531 is 0.04, 0.06, 0.08 or 0.09, but is not limited to these. Preferably it is 0.02 to 0.05.
[0060] Specifically, in δ Ga 1-δ The thickness of the N-well layer 532 is 2nm to 5nm, exemplarily 2.5nm, 3nm, 3.5nm, 4nm or 4.5nm, but not limited thereto.
[0061] Specifically, in δ Ga 1-δ The proportion (i.e., δ) of the In component in the N-well layer 532 is 0.15~0.3; exemplaryly, it is 0.18, 0.21, 0.24, 0.27 or 0.29, but is not limited thereto.
[0062] Preferably, in some embodiments, Al w Ga 1-w The thickness of the N-barrier layer 511 is greater than that of Al. x In y Ga 1-x-yThe thickness of the N-layer 521 is greater than that of In. γ Ga 1-γ The thickness of the N-barrier layer 531. Based on the above implementation method, the luminous efficiency can be further improved.
[0063] Preferably, in some embodiments, Al w Ga 1-w Si is doped in the N-barrier layer 511 with a doping concentration of 1×10⁻⁶. 17 cm -3 -5×10 18 cm -3 It should be noted that, due to Al w Ga 1-w The N-barrier layer 511 employs a thick barrier and high Al composition, resulting in significantly higher resistivity compared to other barrier regions. Therefore, appropriate Si doping can provide electrons, increasing the barrier's conductivity and thus reducing the overall device's series resistance and operating voltage. However, at the interface between the heavily Si-doped barrier and the undoped well layer, electrons diffuse from the barrier to the well, causing the energy band to bend downwards at the interface. This downward band bend facilitates hole entry from the barrier into the quantum well and further pulls them towards the N-region, promoting hole acceleration but hindering electron confinement. Therefore, the Si doping concentration is controlled at 1 × 10⁻⁶. 17 cm -3 ~5×10 18 cm -3 Scope. More preferably, along the growth direction of the light-emitting diode epitaxial wafer, multiple Al... w Ga 1-w The Si doping concentration in the N-barrier layer 511 decreases. That is, from the first cycle to the last cycle of the carrier confinement layer 510, the Si doping concentration gradually decreases. At the beginning (near the N-region), high doping is used to promote hole injection and reduce resistance. At the end (near the main recombination region), low doping is used to maintain a high barrier, strongly confine electrons, and protect the recombination layer.
[0064] Specifically, the substrate 100 is any one of a sapphire substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a gallium oxide substrate, but is not limited thereto. Preferably, it is a sapphire substrate.
[0065] Specifically, the buffer layer 200 is an AlN layer, a GaN layer, or an AlGaN layer, but is not limited to these. The thickness of the buffer layer 200 is 30 nm to 80 nm.
[0066] Specifically, the thickness of the undoped GaN layer 300 is 1 μm to 3 μm.
[0067] Specifically, the N-type GaN layer 400 is doped with Si, but is not limited to this. The Si doping concentration in the N-type GaN layer 400 is 1 × 10⁻⁶. 18cm -3 ~5×10 19 cm -3 Its thickness is 1μm~5μm.
[0068] Specifically, the doping element of the p-type GaN layer 600 is Mg, but it is not limited to this. The doping concentration of Mg in the p-type GaN layer 600 is 1×10⁻⁶. 19 cm -3 ~5×10 20 cm -3 Its thickness is 80nm~200nm.
[0069] Accordingly, see Figure 2 The present invention also provides a method for preparing a light-emitting diode epitaxial wafer, which includes the following steps:
[0070] S1: Provides a substrate;
[0071] S2: A buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer are grown sequentially on the substrate;
[0072] Specifically, in some embodiments of the present invention, step S2 includes:
[0073] S21: Grow a buffer layer on the substrate;
[0074] The buffer layer can be grown using PVD, MOCVD, MBE, or VPE, but is not limited to these methods.
[0075] Preferably, in one embodiment of the present invention, an AlN layer is grown by PVD as a buffer layer.
[0076] S22: Growing an undoped GaN layer on the buffer layer;
[0077] Specifically, in one embodiment of the present invention, an undoped GaN layer is grown using MOCVD at a growth temperature of 1000℃~1200℃ and a growth pressure of 100 torr~500 torr.
[0078] S23: Growing an N-type GaN layer on an undoped GaN layer;
[0079] Specifically, in one embodiment of the present invention, an N-type GaN layer is grown using MOCVD at a growth temperature of 1000℃~1200℃ and a growth pressure of 100 torr~500 torr.
[0080] S24: Growth of multiple quantum well layers on N-type GaN layers;
[0081] Specifically, in one embodiment, a carrier confinement layer, a recombination layer, and a hole injection layer are sequentially grown on an N-type GaN layer using MOCVD. More specifically, Al is first grown periodically and alternately. w Ga 1-w N-layer and In α Ga 1-α N-well layers are formed to obtain carrier confinement layers; then Al is periodically and alternately grown. x In y Ga 1-x-y N-layer and In β Ga 1-β N-well layers are formed to obtain a composite layer; finally, In layers are grown alternately and periodically. γ Ga 1-γ N-layer and In δ Ga 1-δ An N-well layer is formed, resulting in a hole injection layer. Specifically, Al... w Ga 1-w The growth temperature of the N-barrier layer is 890℃~910℃; In α Ga 1-α The growth temperature of the N-well layer is 720℃~800℃; Al x In y Ga 1-x-y The growth temperature of the N-barrier layer is 870℃~890℃; In β Ga 1-β The growth temperature of the N-well layer is 720℃~800℃; In γ Ga 1-γ The growth temperature of the N-barrier layer is 850℃~870℃; In δ Ga 1-δ The growth temperature of the N-well layer is 720℃~800℃.
[0082] Preferably, in some embodiments, Al w Ga 1-w N-barrier layer growth temperature > Al x In y Ga 1-x-y N-barrier layer growth temperature > In γ Ga 1-γ Growth temperature of N-barrier layer. High-temperature growth of Al. w Ga 1-w The N-barrier layer has better lattice quality and a higher barrier; In grown at low temperatures... γ Ga 1-γ The N-barrier layer has a lower potential barrier. The temperature gradient and composition gradient work together to amplify the difference in barrier height among the three regions, making the carrier modulation effect more significant. In addition, temperature gradient growth can help relax and match the strain between different layers to some extent, reducing the average defect density of the entire multi-quantum-well layer.
[0083] S25: Growing a P-type GaN layer on a multi-quantum-well layer;
[0084] Specifically, in one embodiment of the present invention, a P-type GaN layer is grown using MOCVD at a growth temperature of 950°C to 1000°C and a growth pressure of 100 torr to 300 torr.
[0085] The present invention will be further described below with reference to specific embodiments:
[0086] Example 1
[0087] This embodiment provides a light-emitting diode epitaxial wafer, which includes a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer and a P-type GaN layer sequentially stacked on the substrate;
[0088] The substrate is sapphire, the buffer layer is an AlN layer with a thickness of 30 nm, and the undoped GaN layer has a thickness of 1.5 μm. The Si doping concentration in the N-type GaN layer is 8.5 × 10⁻⁶. 18 cm -3 Its thickness is 3μm.
[0089] The multi-quantum-well layer comprises a carrier confinement layer, a recombination layer, and a hole injection layer sequentially stacked on an N-type GaN layer; the carrier confinement layer comprises alternating layers of Al w Ga 1-w N barrier (w=0.08) and In α Ga 1-α The N-well layer (α=0.18) has 5 periods, and Al w Ga 1-w The thickness of the N-barrier layer is 13 nm, In α Ga 1-α The N-well layer is 3 nm thick. The composite layer consists of alternating layers of Al. x In y Ga 1-x-y N-layer (x=0, y=0) and In β Ga 1-β The N-well layer (β=0.18) has 10 periods and Al x In y Ga 1-x-y The thickness of the N-barrier layer is 13 nm, In β Ga 1-β The N-well layer is 3 nm thick. The hole injection layer consists of alternating layers of In. γ Ga 1-γ N barrier (γ=0.04) and In δ Ga 1-δThe N-well layer (δ=0.18) has 4 periods, In γ Ga 1-γ The thickness of the N-barrier layer (γ=0.04) is 9 nm, and the In... δ Ga 1-δ The thickness of the N-well layer is 3 nm.
[0090] The p-type GaN layer has a thickness of 150 nm and a Mg doping concentration of 3.5 × 10⁻⁶. 20 cm -3 .
[0091] The method for fabricating the epitaxial wafer of the light-emitting diode in this embodiment includes the following steps:
[0092] (1) Provide a substrate;
[0093] (2) A buffer layer is grown on the substrate;
[0094] Specifically, an AlN layer is grown using PVD as a buffer layer.
[0095] (3) Growing an undoped GaN layer on the buffer layer;
[0096] Specifically, undoped GaN layers were grown using MOCVD at a growth temperature of 1120℃ and a growth pressure of 400 torr.
[0097] (4) Growing an N-type GaN layer on an undoped GaN layer;
[0098] Specifically, an N-type GaN layer was grown using MOCVD at a growth temperature of 1080℃ and a growth pressure of 300 torr.
[0099] (5) Growing multiple quantum well layers on N-type GaN layers;
[0100] Specifically, Al first grows in a periodic alternation. w Ga 1-w N-layer and In α Ga 1-α N-well layers are formed to obtain carrier confinement layers; then Al is periodically and alternately grown. x In y Ga 1-x-y N-layer and In β Ga 1-β N-well layers are formed to obtain a composite layer; finally, In layers are grown alternately and periodically. γ Ga 1-γ N-layer and In δ Ga 1-δ An N-well layer is formed, resulting in a hole injection layer. Specifically, Al... w Ga 1-w The growth temperature of the N-barrier layer is 900℃; Inα Ga 1-α The growth temperature of the N-well layer is 750℃; Al x In y Ga 1-x-y The growth temperature of the N-barrier layer is 890℃; In β Ga 1-β The growth temperature of the N-well layer is 750℃; In γ Ga 1-γ The growth temperature of the N-barrier layer is 860℃; In δ Ga 1-δ The growth temperature of the N-well layer is 750℃.
[0101] (6) Growing a P-type GaN layer on a multi-quantum-well layer;
[0102] Specifically, P-type GaN layers were grown using MOCVD at a growth temperature of 980℃ and a growth pressure of 200 torr.
[0103] Example 2
[0104] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 1 in that:
[0105] The composite layer consists of alternating layers of Al x In y Ga 1-x-y N-layer (x=0.01, y=0.005) and In β Ga 1-β N-well layer (β=0.18). Al x In y Ga 1-x-y The thickness of the N-barrier layer is 10 nm.
[0106] Everything else is the same as in Example 1.
[0107] Example 3
[0108] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 2 in that:
[0109] Al w Ga 1-w The N-barrier layer is doped with Si at a concentration of 5.5 × 10⁻⁶. 17 cm -3 And Al in carrier confinement layers of different periods w Ga 1-w In the N-barrier layer, the doping concentration is the same.
[0110] Everything else is the same as in Example 2.
[0111] Example 4
[0112] This embodiment provides a light-emitting diode epitaxial wafer, which differs from Embodiment 3 in that:
[0113] Al w Ga 1-w The N-barrier layer is doped with Si, and the doping concentration decreases along the growth direction. Specifically, the doping concentration in each period is 1×10⁻⁶. 18 cm -3 8×10 17 cm -3 5.5×10 17 cm -3 3×10 17 cm -3 and 1×10 17 cm -3 .
[0114] Everything else is the same as in Example 3.
[0115] Comparative Example 1
[0116] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that:
[0117] Excluding carrier confinement layer and hole injection layer.
[0118] Everything else is the same as in Example 1.
[0119] Comparative Example 2
[0120] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that:
[0121] Excluding the carrier confinement layer.
[0122] Everything else is the same as in Example 1.
[0123] Comparative Example 3
[0124] This comparative example provides a light-emitting diode epitaxial wafer, which differs from Example 1 in that:
[0125] Excluding the hole injection layer, everything else is the same as in Example 1.
[0126] The epitaxial structures obtained in Examples 1-4 and Comparative Examples 1-3 were fabricated into chips with a vertical structure size of 5 mil × 7 mil. The luminous intensity was measured at 120 mA, and the brightness improvement rate of Example 1 was calculated based on the data from Comparative Example 1. Specific results are shown in the table below:
[0127]
[0128] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.
Claims
1. A light-emitting diode epitaxial wafer, characterized in that, It includes a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer and a P-type GaN layer are sequentially stacked on the substrate. The multi-quantum-well layer comprises a carrier confinement layer, a recombination layer, and a hole injection layer sequentially stacked on the N-type GaN layer; the carrier confinement layer comprises alternating layers of Al w Ga 1-w N-layer and In α Ga 1-α N-well layer; the composite layer comprises alternating layers of Al x In y Ga 1-x-y N-layer and In β Ga 1-β The N-well layer, the hole injection layer comprising alternating layers of In γ Ga 1-γ N-layer and In δ Ga 1-δ N-well layer; Where w > x, γ > y; the Al w Ga 1-w The thickness of the N-barrier layer is greater than that of Al. x In y Ga 1-x-y The thickness of the N-barrier layer; the Al x In y Ga 1-x-y The thickness of the N barrier layer is greater than that of In. γ Ga 1-γ The thickness of the N-layer.
2. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The Al w Ga 1-w The thickness of the N-barrier layer is 13nm~17nm; The Al x In y Ga 1-x-y The thickness of the N-barrier layer is 9nm~13nm; The In γ Ga 1-γ The thickness of the N-barrier layer is 5nm~9nm.
3. The light-emitting diode epitaxial wafer as described in claim 1, characterized in that, The number of cycles in the carrier confinement layer is 2 to 5; The Al w Ga 1-w In the N-layer barrier, the value of w ranges from 0.02 to 0.1; The In α Ga 1-α The thickness of the N-well layer is 2nm~5nm, and the value of α ranges from 0.15 to 0.
3. The number of cycles in the composite layer is 4 to 10; The Al x In y Ga 1-x-y In the N-layer, the value of x ranges from 0 to 0.02, and the value of y ranges from 0 to 0.
02. The In β Ga 1-β The thickness of the N-well layer is 2nm~5nm, and the value of β ranges from 0.15 to 0.
3. The number of cycles in the hole injection layer is 2 to 5; The In γ Ga 1-γ The value of γ in the N-barrier layer ranges from 0.02 to 0.1; The In δ Ga 1-δ The thickness of the N-well layer is 2nm~5nm, and the value of δ ranges from 0.15 to 0.
3.
4. The light-emitting diode epitaxial wafer as described in any one of claims 1 to 3, characterized in that, The Al w Ga 1-w The N-barrier layer is doped with Si, with a doping concentration of 1×10⁻⁶. 17 cm -3 ~5×10 18 cm -3 .
5. The light-emitting diode epitaxial wafer as described in claim 4, characterized in that, Along the growth direction of the epitaxial wafer of the light-emitting diode, a plurality of Al w Ga 1-w The Si doping concentration in the N-barrier layer decreases.
6. A method for preparing a light-emitting diode epitaxial wafer, used to prepare a light-emitting diode epitaxial wafer as described in any one of claims 1 to 5, characterized in that, include: Provide substrate; A buffer layer, an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer are grown on the substrate. The multi-quantum-well layer comprises a carrier confinement layer, a recombination layer, and a hole injection layer sequentially stacked on the N-type GaN layer; the carrier confinement layer comprises alternating layers of Al w Ga 1-w N-layer and In α Ga 1-α N-well layer; the composite layer comprises alternating layers of Al x In y Ga 1-x-y N-layer and In β Ga 1-β The N-well layer, the hole injection layer comprising alternating layers of In γ Ga 1-γ N-layer and In δ Ga 1-δ N-well layer; Where w > x, γ > y.
7. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 6, characterized in that, The Al w Ga 1-w The growth temperature of the N-barrier layer is higher than that of Al. x In y Ga 1-x-y Growth temperature of the N-barrier layer; The Al x In y Ga 1-x-y The growth temperature of the N-barrier layer is greater than that of In. γ Ga 1-γ The growth temperature of the N-barrier layer.
8. The method for fabricating a light-emitting diode epitaxial wafer as described in claim 6, characterized in that, The Al w Ga 1-w The growth temperature of the N-barrier layer is 890℃~910℃; The In α Ga 1-α The growth temperature of the N-well layer is 720℃~800℃; The Al x In y Ga 1-x-y The growth temperature of the N-barrier layer is 870℃~890℃; The In β Ga 1-β The growth temperature of the N-well layer is 720℃~800℃; The In γ Ga 1-γ The growth temperature of the N-barrier layer is 850℃~870℃; The In δ Ga 1-δ The growth temperature of the N-well layer is 720℃~800℃.
9. A light-emitting diode, characterized in that, Includes the light-emitting diode epitaxial wafer as described in any one of claims 1 to 5.