Power chip packaging method, plastic package chip unit and power module

Abstract

The invention provides a power chip packaging method, a plastic package chip unit and a power module, and relates to the technical field of chip packaging. The power chip packaging method comprises the following steps: obtaining a power chip, and carrying out filling plastic package processing on each open area of the power chip to form a plastic package body; and processing the surface of the plastic package body to enable the surface to be flat so as to form a plastic package chip unit. The plastic package chip unit is embedded into the PCB, the signal pins are fanned out of the plastic package chip unit in a blind hole mode, and the signal pins are electrically connected with corresponding circuits on the PCB. According to the invention, the filling difficulty of the PCB after the ceramic substrate is embedded can be effectively reduced, and the abnormities of lack of glue are avoided, thereby improving the packaging yield and reliability of the power module.

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