基于Zynq芯片的星载系统在轨运行优化方法及系统
By adopting a hierarchical reconfiguration mode and ARM+FPGA co-design, the problem of low on-orbit reliability of Zynq chips was solved, enabling active loading and refreshing, and improving the on-orbit operational stability and data accuracy of the spaceborne system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- HUNAN SIBEITU TECH CO LTD
- Filing Date
- 2026-04-02
- Publication Date
- 2026-07-17
AI Technical Summary
Zynq chips have low on-orbit reliability, complex loading methods, and difficulty in implementing refresh functions, resulting in limited on-orbit use.
The system adopts a hierarchical reconstruction mode, which actively determines the loading requirements through the ground station. It utilizes the collaborative design of ARM processing system and FPGA programmable logic to achieve active loading and refreshing. It combines hardware-level and software-level verification to form a dual verification mechanism. The independent storage area isolates data, simplifies the process, and records telemetry data.
It significantly improves the reliability of on-orbit operation of satellite programs, reduces data transmission and storage error rates, solves the problem of missing records in traditional Zynq refresh functions, and enhances the stability of on-orbit operation of the system.
Smart Images
Figure CN121957725B_ABST