Function detection system, method and storage medium for rs232 interface

Abstract

The application discloses a system and method for detecting the function of an RS232 interface and a storage medium. The system comprises a detection fixture and a device under test, and the device under test comprises an RS232 interface. The detection fixture comprises a control module, a communication module and a negative pressure detection module. The first side of the communication module is connected to the control module, and the second side of the communication module is connected to the RS232 interface. The first side of the negative pressure detection module is connected to the RS232 interface, and the second side of the negative pressure detection module is connected to the control module. The communication module is used for detecting the communication connection between the device under test and the detection fixture and obtaining a first detection result. The negative pressure detection module is used for detecting the device under test when the first detection result comprises a successful communication connection and obtaining a second detection result. The control module is used for determining a target detection result according to the second detection result. The application can improve the reliability of the function detection result of the RS232 interface.

Description

Technical Field

[0001] This application relates to the field of interface testing technology, and in particular to a functional testing system, method and storage medium for an RS232 interface. Background Technology

[0002] In electronic systems, the RS232 interface is widely used for data transmission and debugging between vehicle tablets and control units such as diagnostic interfaces and infotainment systems due to its simple protocol and strong compatibility. Its communication reliability directly affects the stability of system functions.

[0003] Currently, traditional testing only verifies communication functions and cannot detect physical layer electrical characteristics. When the charge pump in the RS232 interface fails due to capacitor failure, if the testing fixture has a wide receiving tolerance, it is easy to miss detections, resulting in insufficient reliability of RS232 interface function test results.

[0004] Therefore, improving the reliability of the functional test results of the RS232 interface has become an urgent problem to be solved. Summary of the Invention

[0005] This application provides a function testing system, method, and storage medium for an RS232 interface, which can improve the reliability of RS232 interface function testing results.

[0006] In a first aspect, embodiments of this application provide a functional testing system for an RS232 interface, comprising: a testing fixture and a device under test, wherein the device under test includes an RS232 interface; the testing fixture includes: a control module, a communication module, and a negative pressure detection module; a first side of the communication module is connected to the control module, and a second side of the communication module is connected to the RS232 interface; a first side of the negative pressure detection module is connected to the RS232 interface, and a second side of the negative pressure detection module is connected to the control module; wherein: The communication module is used to detect the communication connection between the device under test and the testing fixture, and obtain a first detection result; the first detection result includes any one of the following: communication connection successful, communication connection failed; The negative pressure detection module is used to detect the device under test when the first detection result includes a successful communication connection, and obtain a second detection result; The control module is used to determine the target detection result based on the second detection result; the target detection result includes any one of the following: the RS232 interface is functioning normally, or the RS232 interface is malfunctioning.

[0007] Secondly, embodiments of this application provide a method for detecting the function of an RS232 interface, applied to the system described in the first aspect, the method comprising: The communication module detects the communication connection between the device under test and the testing fixture to obtain a first detection result; the first detection result includes any one of the following: successful communication connection or failed communication connection. When the first detection result includes a successful communication connection, the negative pressure detection module detects the device under test and obtains a second detection result. The control module determines the target detection result based on the second detection result; the target detection result includes any one of the following: the RS232 interface is functioning normally, or the RS232 interface is malfunctioning.

[0008] Thirdly, embodiments of this application provide a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data interchange, wherein the computer program causes a computer to perform some or all of the steps described in the second aspect of embodiments of this application.

[0009] Fourthly, embodiments of this application provide a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program, the computer program being operable to cause a computer to perform some or all of the steps described in the second aspect of embodiments of this application. The computer program product may be a software installation package.

[0010] Implementing this application will have the following beneficial effects: As can be seen, the RS232 interface functional testing system, method, and storage medium described in this application verify the communication connection status through the communication module, initiating negative pressure detection only when the connection is successful. This avoids invalid detection and distinguishes between communication faults and electrical anomalies. Furthermore, the negative pressure detection module directly detects the physical layer's negative pressure electrical characteristics, compensating for the blind spot of traditional methods that only test communication functions. It can identify false communication successes caused by charge pump failure in the RS232 interface, eliminating missed detections at the root. The control module makes the final judgment based on the negative pressure detection results, forming a complete closed loop to ensure the rigor and reliability of the final target detection results. This application achieves dual verification of communication functions and electrical characteristics, improving the reliability of RS232 interface functional testing results. Attached Figure Description

[0011] To more clearly illustrate the technical solutions in the embodiments of this application or the background art, the accompanying drawings used in the embodiments of this application or the background art will be described below.

[0012] Figure 1 This is a schematic diagram of the structure of a functional detection system for an RS232 interface provided in an embodiment of this application; Figure 2This is a schematic diagram of the structure of a testing fixture provided in an embodiment of this application; Figure 3 This is a flowchart illustrating a communication connection detection process provided in an embodiment of this application. Figure 4 This is a schematic diagram of the structure of a negative pressure detection module provided in an embodiment of this application; Figure 5 This is a circuit structure diagram of a negative pressure detection module provided in an embodiment of this application; Figure 6 This is a circuit structure diagram of a positive and negative dual power supply provided in an embodiment of this application; Figure 7 This is a flowchart illustrating a negative pressure detection process provided in an embodiment of this application; Figure 8 This is a flowchart of a function detection method for an RS232 interface provided in an embodiment of this application. Detailed Implementation

[0013] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0014] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0015] It should be understood that the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document indicates that the preceding and following related objects are in an "or" relationship. In the embodiments of this application, "multiple" refers to two or more.

[0016] In the embodiments of this application, "at least one item" or its similar expression refers to any combination of these items, including any combination of a single item or a plurality of items. "One or more" means one or more, while "multiple" means two or more. For example, "at least one item" of a, b, or c can represent the following seven cases: a, b, c; a and b; a and c; b and c; a, b, and c. Each of a, b, and c can be an element or a set containing one or more elements.

[0017] In this application, the term "connection" refers to various connection methods, such as direct connection or indirect connection, to achieve communication between devices. This application does not impose any limitations on this.

[0018] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0019] The following describes the relevant content, concepts, meanings, technical issues, technical solutions, and beneficial effects involved in the embodiments of this application.

[0020] First, let me explain some of the technical terms used in this application: RS232 interface: refers to a serial communication interface implemented in accordance with the RS232 communication standard, used for asynchronous data transmission between devices.

[0021] RS232 interface functional testing: refers to the comprehensive testing of whether the communication connection function and physical layer negative voltage electrical characteristics of the RS232 interface meet the standards.

[0022] The RS232 interface standard specifies that when the RS232 interface is in an idle state (logic "1"), its transmit pin should output a negative voltage of -15V to -3V. This negative voltage is usually generated by the charge pump circuit inside the interface chip, and its normal operation depends on external components such as external capacitors.

[0023] Traditional production testing only verifies the communication protocol. However, when the charge pump circuit fails due to capacitor damage or other reasons and cannot generate a standard negative voltage, if the receiving end of the testing equipment has a wide voltage level tolerance, communication may still occur under abnormal voltage levels, resulting in serious missed detections. When such defective products are put on the market, communication failures inevitably occur when connected to standard equipment, leading to customer complaints and increased after-sales costs. Therefore, there is an urgent need for a testing solution that can directly detect whether the negative voltage meets the standard at the physical layer and make a joint judgment with communication testing.

[0024] Currently, in modern automotive electronic systems, the RS232 interface is widely used for data transmission and debugging between in-vehicle tablets and other vehicle control units (such as diagnostic interfaces and infotainment systems) due to its simple protocol and good compatibility. Its communication reliability directly affects the functional stability of the in-vehicle system. However, current testing of RS232 interfaces in in-vehicle tablet manufacturing processes generally suffers from the following technical pain points and testing blind spots, leading to defective products entering the market: First, traditional communication testing methods carry a fundamental risk of missed detections. Current mainstream factory testing only verifies the communication protocol at the data link layer, confirming whether the test fixture and the tested tablet can establish a connection and send / receive preset data packets. It cannot effectively test whether the physical layer electrical characteristics meet the RS232 standard. When the charge pump circuit of the interface chip fails due to poor soldering, damage, or missing energy storage capacitors, it will be unable to output a standard negative voltage. If the receiver tolerance of the test fixture is wide, communication may still occur at non-standard voltage levels, leading to missed hardware defects. After such products are delivered, communication failures are likely to occur when connected to compliant automotive equipment, resulting in customer complaints.

[0025] Second, the harsh automotive environment amplifies the impact of hardware failures. The automotive environment exhibits strong electromagnetic interference, and long-term vehicle vibration and temperature cycling can exacerbate manufacturing defects such as poor soldering and weak connections. RS232 interfaces with critical electrical characteristics (e.g., insufficient negative voltage) are prone to intermittent communication interruptions or data errors in the automotive electromagnetic environment. Traditional factory testing, conducted under static, ideal laboratory conditions, struggles to identify these potential faults that only surface under actual automotive stress.

[0026] Third, fault location is difficult, making it hard to trace production quality. When RS232 communication failures occur in the client or during reliability testing, because the key electrical parameters of the interface are not recorded in the factory test, it is difficult for R&D personnel to distinguish whether the fault is caused by unqualified hardware electrical characteristics or software configuration, protocol mismatch, etc. This results in a long cycle for problem reproduction and root cause analysis, and it is impossible to effectively feed back field failures to the production process to improve the process, making it difficult to form a closed loop of quality control.

[0027] In summary, existing technologies only superficially verify the communication function of the RS232 interface, lacking direct and quantitative testing methods for its core electrical characteristics (especially negative pressure generation capability). This makes it impossible to effectively intercept hidden defects caused by the failure of hardware circuits such as charge pumps, posing a significant threat to the quality and reliability of vehicle-mounted tablet products.

[0028] To address the aforementioned technical problems, embodiments of this application provide a function testing system, method, and storage medium for an RS232 interface, which can improve the reliability of RS232 interface function testing results.

[0029] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an RS232 interface functional testing system provided in an embodiment of this application; it can be seen that the RS232 interface functional testing system (hereinafter referred to as the system) includes: a testing fixture and a device under test, wherein the device under test includes an RS232 interface; please refer to Figure 2 , Figure 2 This is a schematic diagram of a testing fixture provided in an embodiment of this application; it can be seen that the testing fixture includes: a control module, a communication module, and a negative pressure detection module; the first side of the communication module is connected to the control module, and the second side of the communication module is connected to the RS232 interface; the first side of the negative pressure detection module is connected to the RS232 interface, and the second side of the negative pressure detection module is connected to the control module; wherein: The communication module is used to detect the communication connection between the device under test and the testing fixture, and obtain a first detection result; the first detection result includes any one of the following: communication connection successful, communication connection failed; In this embodiment of the application, the device under test is an electronic device with an RS232 interface. Specifically, the device under test may include any of the following: vehicle electronic devices, industrial control devices, communication terminals and testing equipment, etc., without limitation.

[0030] In a specific embodiment, please refer to Figure 3 , Figure 3 This is a flowchart illustrating a communication connection detection process provided in an embodiment of this application; the details are as follows: 1. Start the test: The testing process is initiated, and the testing fixture enters the communication connection testing preparation stage, providing triggering conditions for subsequent steps.

[0031] 2. Initialize the communication module and configure the connection: The communication module of the testing fixture completes the hardware and parameter initialization. Specifically, it can configure the GPIO port communication parameters and establish a communication link with the RS232 interface of the device under test at a fixed baud rate of 115200, thus completing the basic preparation for communication connection.

[0032] 3. Start the communication test and wait to receive the first preset character sequence: The testing fixture sends a communication test command to the device under test through the communication module, waits in real time for and receives the first preset character sequence (e.g., "ABCD1234") actively sent by the device under test, and enters the data receiving waiting state.

[0033] 4. Determine whether the character sequence was successfully received before the timeout: The testing fixture has a built-in timeout mechanism to monitor the receiving status in real time. If the timeout is not exceeded and the first preset character sequence is successfully received, it is determined as "yes", and then proceed to the next step; If the message is not received within the timeout period or fails to be received, it is judged as "No". At this time, the first detection result is "Communication connection failed", and the process proceeds directly to step 8 "Detection ends".

[0034] 5. Reverse the character sequence and send it back to the device under test: The testing fixture performs character inversion processing on the first preset character sequence that has been successfully received (for example, "ABCD1234" is converted to "4321DCBA") to obtain the inverted character sequence. The inverted character sequence is then sent back to the device under test through the communication module to complete the preparation for the transmission of loopback data.

[0035] 6. Receive the loopback verification results reported by the device under test: The testing fixture waits for the device under test to return the loopback verification result. This result is used to characterize whether the device under test has correctly received the reversed character sequence, providing a core basis for subsequent verification.

[0036] 7. Determine if the loopback validation was successful: The testing fixture determines the received loopback verification results: If loopback verification fails (the device under test does not receive the reverse sequence correctly), it is judged as "No". At this time, the first detection result is "Communication connection failed", and the process directly proceeds to step 8 "Detection ends". If the loopback verification is successful (the device under test correctly receives the reverse sequence), it is judged as "yes". At this time, the communication link is confirmed to be normal, the first test result is "communication connection successful", and the process proceeds to step 8 "test ends".

[0037] 8. Test completed: The process ends regardless of whether the communication connection is successful or not.

[0038] In this way, by first configuring the communication module to establish a stable link, and then quickly identifying one-way communication faults through the preset character reception and timeout mechanism, the transmission sequence is reversed after successful reception to verify bidirectional transmission capability and avoid bit error interference. Finally, the judgment is based on the loopback verification result. Communication is judged to be normal only when all three items of "reception, transmission, and verification" are successfully verified, effectively eliminating missed detections and misjudgments, and improving the accuracy and rigor of detection.

[0039] The negative pressure detection module is used to detect the device under test when the first detection result includes a successful communication connection, and obtain a second detection result; In a specific embodiment, the first side (signal input side) of the negative pressure detection module is connected to the transmit pin of the RS232 interface. When the first detection result includes a successful communication connection, the voltage signal output by the transmit pin is collected to detect the negative pressure electrical characteristics of the physical layer of the RS232 interface of the device under test and obtain the second detection result.

[0040] When the first detection result includes communication connection failure, the target detection result can be directly determined as RS232 interface malfunction, without needing to test the device under test through the negative pressure detection module.

[0041] In some embodiments, please refer to Figure 4 , Figure 4 This is a schematic diagram of the structure of a negative pressure detection module provided in an embodiment of this application. As can be seen, the negative pressure detection module includes: a reference voltage generation circuit, a voltage follower, a voltage comparator, and a level conversion circuit. In terms of detecting the device under test and obtaining a second detection result, the negative pressure detection module is specifically used for: S11. A negative reference voltage is generated by the reference voltage generation circuit; S12. Input the negative reference voltage and the voltage of the RS232 interface into the voltage comparator through the voltage follower; S13. The voltage comparator is used to compare the negative reference voltage and the voltage of the RS232 interface to obtain a comparison result; S14. The comparison result is converted by the level conversion circuit to obtain the second detection result.

[0042] In a specific embodiment, the reference voltage generation circuit can output a stable and highly accurate negative reference voltage according to the RS232 standard requirements, which can be used as a threshold for judging whether the negative voltage meets the standard.

[0043] In some embodiments, the negative reference voltage can be -4V.

[0044] Then, the voltage of the RS232 interface is impedance matched and buffered by a voltage follower to improve input stability. At the same time, the buffered voltage of the RS232 interface and the negative reference voltage are respectively sent to the two input terminals of the voltage comparator. Next, the voltage comparator compares the negative reference voltage and the voltage of the RS232 interface. If the voltage of the RS232 interface is less than the negative reference voltage, the voltage comparator outputs a high-level signal, which is the comparison result; if the voltage of the RS232 interface is greater than or equal to the negative reference voltage, the voltage comparator outputs a low-level signal, which is the comparison result.

[0045] In some embodiments, the high-level signal is +12V.

[0046] In some embodiments, the low-level signal is -12V.

[0047] The comparison result is converted by a level conversion circuit into a logic level that the control module can recognize, forming a standardized second detection result. Specifically, if the comparison result is a high-level signal, the second detection result is a low logic level (0); if the comparison result is a low-level signal, the second detection result is a high logic level (1).

[0048] Thus, a stable negative reference voltage is provided by the reference voltage generation circuit, and impedance isolation and signal buffering are achieved with the help of a voltage follower, ensuring accurate and reliable decision-making by the voltage comparator. The voltage comparator directly converts the analog level to the digital comparison result, resulting in fast detection response and high accuracy. Then, the level conversion circuit adapts the comparison result to a logic level that the control module can recognize, forming a standardized second detection result. The overall circuit structure is simple and has strong anti-interference capabilities, enabling rapid, stable, and quantitative detection of the negative voltage electrical characteristics of the RS232 interface physical layer. This effectively avoids missed detections caused by hardware defects such as charge pump failure, improving the accuracy and reliability of negative voltage detection results.

[0049] In some embodiments, the voltage follower is connected to the reference voltage generation circuit, the voltage comparator U1, and the RS232 interface, respectively. The voltage follower can obtain a negative reference voltage from the reference voltage generation circuit and an interface voltage from the RS232 interface. Additionally, the voltage follower can output the processed negative reference voltage and interface voltage to the voltage comparator U1 to achieve signal buffering and impedance matching. The output of the voltage comparator U1 is connected to the level conversion circuit to output the comparison result. The level conversion circuit then converts the comparison result into a logic level recognizable by the control module, forming a second detection result.

[0050] In some embodiments, please refer to Figure 5 , Figure 5 This is a circuit structure diagram of a negative pressure detection module provided in an embodiment of this application. It can be seen that the reference voltage generation circuit includes: a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is connected to a first negative voltage, and the second end of the first resistor R1 is connected to the first end of the second resistor R2; the second end of the second resistor R2 is grounded.

[0051] It needs to be explained that, Figure 5 and Figure 6 GND in the middle indicates grounding.

[0052] In this embodiment, the first negative voltage can be -12V; the resistance of the first resistor R1 can be 10 (kΩ), and the resistance of the second resistor R2 can be 4.7 (kΩ).

[0053] In a specific embodiment, the reference voltage generation circuit is powered by the first negative voltage, and the first resistor R1 and the second resistor R2 divide the -12V voltage. According to the principle of resistor voltage division, a voltage of about -4V, which is the negative reference voltage, can be generated at node A.

[0054] Thus, generating a negative reference voltage using a resistor voltage divider method has the advantages of simple circuit structure, low cost, and ease of implementation. Only two resistors are needed to stably output a negative reference voltage that meets the detection requirements, eliminating the need for a complex reference source chip and effectively reducing hardware costs and circuit complexity.

[0055] In addition, the voltage division ratio can be precisely adjusted by flexibly configuring the resistance value, which can adapt to the detection requirements of different RS232 negative voltage thresholds. It has strong versatility and configurability, and high working stability. It can provide a reliable decision reference for voltage comparator U1, and improve the accuracy and consistency of negative voltage detection.

[0056] In some embodiments, please refer to Figure 5 The voltage follower includes: operational amplifier U3, third resistor R3, and fourth resistor R4; The first and second terminals of the operational amplifier U3 are connected to the second terminal of the fourth resistor R4, and the first terminal of the fourth resistor R4 is connected to the non-inverting input terminal of the voltage comparator U1; the third terminal of the operational amplifier U3 is connected to the second terminal of the first resistor R1 and the first terminal of the second resistor R2; the fourth terminal of the operational amplifier U3 is connected to the first negative voltage; the fifth terminal of the operational amplifier U3 is connected to the RS232 interface; the sixth and seventh terminals of the operational amplifier U3 are connected to the second terminal of the third resistor R3, and the eighth terminal of the operational amplifier U3 is connected to the first positive voltage; the first terminal of the third resistor R3 is connected to the inverting input terminal of the voltage comparator U1.

[0057] In this embodiment, the operational amplifier U3 can be an LM358, which is a dual operational amplifier U3 chip containing two independent operational amplifier U3 units; the resistance values ​​of the third resistor R3 and the fourth resistor R4 can both be 10 kΩ; RS232_TxD represents the transmit pin of the RS232 interface; the operational amplifier U3 has 8 ports (i.e., 8 pins), of which: First port: The port name is OUT, which is the output terminal of the first op-amp, outputting the signal after amplification / follower processing.

[0058] Second port: The port name is -IN, the inverting input of the first op-amp. When a signal is input from this port, the output phase is opposite to the input phase.

[0059] The third port: The port name is +IN. It is the non-inverting input of the first op-amp. When a signal is input from this port, the output is in phase with the input.

[0060] Fourth port: Port name is V-, negative power supply terminal, connected to negative power supply voltage (first negative voltage), providing negative power supply to the op-amp.

[0061] Fifth port: The port name is +IN. It is the non-inverting input of the second op-amp and has the same function as pin 3. It is used for the non-inverting signal input of the second op-amp.

[0062] Sixth port: The port name is -IN, the inverting input of the second op-amp, and its function is the same as that of pin 2, used for the inverting signal input of the second op-amp.

[0063] Seventh port: The port name is OUT. It is the output terminal of the second op-amp and has the same function as pin 1. It outputs the processing signal of the second op-amp.

[0064] Eighth port: Port name is V+, positive power supply terminal, connected to the positive power supply voltage (first positive voltage) to provide positive power supply to the op-amp.

[0065] In a specific embodiment, the negative reference voltage (node ​​A) is input to the third terminal of operational amplifier U3. The first and second terminals of operational amplifier U3 are directly connected, forming a 100% voltage series negative feedback. According to the "virtual short" characteristic of the op-amp, the output voltage of the first terminal strictly follows the input voltage of the third terminal, that is: VOUT1≈Vref; Where VOUT1 represents the output voltage of the first terminal of operational amplifier U3; Vref represents the input voltage (i.e., the negative reference voltage) of the third terminal of operational amplifier U3; the signal Vref is directly fed into the non-inverting input terminal of voltage comparator U1; Additionally, the voltage signal from RS232_TxD is input to the fifth terminal of operational amplifier U3. The sixth and seventh terminals of operational amplifier U3 are directly connected, forming a 100% voltage series negative feedback. According to the "virtual short" characteristic of the op-amp, the output voltage of the seventh terminal strictly follows the input voltage of the fifth terminal, that is: VOUT7≈VRS; Where VOUT7 represents the output voltage of the seventh terminal of operational amplifier U3; VRS represents the input voltage of the fifth terminal of operational amplifier U3 (i.e., the voltage signal of RS232_TxD); the signal VRS is directly fed into the inverting input terminal of voltage comparator U1.

[0066] The third resistor R3 is used to form the negative feedback loop of the operational amplifier, ensuring that the operational amplifier operates in voltage follower mode and realizes output current limiting protection; the fourth resistor R4 is connected in series between the operational amplifier output and the voltage comparator U1, used for current limiting protection and impedance isolation between the preceding and following stages, improving the stability and anti-interference capability of the detection circuit.

[0067] Thus, by buffering the RS232 interface voltage and the negative reference voltage through a voltage follower and inputting them into the voltage comparator U1, high-impedance input isolation and low-impedance drive output can be achieved. This avoids the subsequent circuits from biasing and interfering with the original signal, ensuring the integrity and stability of the two input signals, providing accurate and reliable comparison input for the voltage comparator U1, and ensuring the consistency and reliability of the detection results.

[0068] In some embodiments, the voltage comparator U1 is powered by a dual positive and negative power supply. The positive power supply terminal of the voltage comparator U1 is connected to the first positive voltage, and the negative power supply terminal of the voltage comparator U1 is connected to the first negative voltage.

[0069] In this embodiment, the first positive voltage can be +12V; the first negative voltage can be -12V.

[0070] In a specific embodiment, since voltage comparator U1 needs to detect the voltage of the RS232 interface and the negative reference voltage, the input signal of voltage comparator U1 must fall within its power supply range to function properly. If a single power supply is used (e.g., +12V only), the voltage comparator U1 cannot recognize negative voltage signals below 0V. The input negative voltage will be clamped, causing the comparison to fail.

[0071] Therefore, a dual positive and negative power supply is required. The input voltage range of the voltage comparator U1 covers the interval from the negative power supply to the positive power supply, so that the voltage of the RS232 interface can be directly and accurately compared with the negative reference voltage, ensuring the reliability and accuracy of the detection results.

[0072] In some embodiments, please refer to Figure 5 The voltage comparator U1 can be model LM393DR2G, which contains two sets of comparator units. Figure 5 Only one set of comparison units (denoted as group A) is used; this voltage comparator U1 has 8 ports (i.e., 8 pins), of which: First port: The port name is OUT / A, which is the output terminal of the A group comparator unit. It has an open collector output structure and requires an external pull-up resistor (the fifth resistor R5) to output a valid level. The second port, named IN / A / 2, is the inverting input of the A group comparator unit. It is connected to the RS232 interface voltage buffered by the voltage follower as the signal to be measured.

[0073] The third port: The port name is IN / A, which is the non-inverting input terminal of the A group comparison unit. It is connected to the negative reference voltage buffered by the voltage follower as the decision basis. The fourth port: Named GND, this is the ground terminal. Figure 5 The fourth port is connected to the first negative voltage to ensure compatibility with negative voltage input and to ensure that voltage comparator U1 can process negative level signals; The fifth port, named IN / B, is the non-inverting input of the B group comparator unit. Figure 5 The fact that no signal is connected to the fifth port indicates that the port is not in use. The sixth port, named IN / B / 2, is the inverting input of the B group comparator unit. Figure 5 The fact that no signal is connected to the sixth port indicates that the port is not in use. Port 7: Port name is OUT / B, which is the output terminal of the B group of comparator units. Figure 5 The fact that no signal is connected to the seventh port indicates that the port is not in use. Eighth port: The port name is VCC, which is the positive power supply terminal: it is connected to the first positive voltage to provide the operating voltage for voltage comparator U1.

[0074] The RS232 interface voltage, buffered by a voltage follower, is input to the second port of voltage comparator U1. The negative reference voltage, also buffered by a voltage follower, is input to the third port of voltage comparator U1. Voltage comparator U1 compares the RS232 interface voltage and the negative reference voltage. If the RS232 interface voltage is less than the negative reference voltage, the first port of voltage comparator U1 outputs a high-level signal, which is the comparison result. If the RS232 interface voltage is greater than or equal to the negative reference voltage, the first port of voltage comparator U1 outputs a low-level signal, which is also the comparison result.

[0075] It needs to be explained that, Figure 5 The external identifier OUT1 of the voltage comparator U1 port is used to identify the output terminal of the voltage comparator U1 and to output the comparison result. IN1-: Indicates the inverting input terminal of voltage comparator U1, which is connected to the buffered RS232 interface voltage; IN1+: Indicates the non-inverting input terminal of voltage comparator U1, which is connected to a negative reference voltage.

[0076] Please see Figure 6 , Figure 6 This is a circuit diagram of a positive and negative dual power supply provided in an embodiment of this application; it can be seen that the positive and negative dual power supply includes: a charge pump chip U2, a third capacitor C21, and a fourth capacitor C22; wherein: The second terminal of charge pump chip U2 is connected to the first terminal of third capacitor C21; the second terminal of third capacitor C21 is connected to the fourth terminal of charge pump chip U2; the fifth terminal of charge pump chip U2 is connected to the first terminal of fourth capacitor C22, and the first terminal of fourth capacitor C22 outputs a first negative voltage (i.e. Figure 6 -12V); the eighth terminal of the charge pump chip U2 is connected to the first positive voltage (i.e. Figure 6 (+12V in the middle); The third terminal of the charge pump chip U2 and the second terminal of the fourth capacitor C22 are both grounded; No signals were connected to the first, sixth, and seventh terminals of the charge pump chip U2, indicating that these ports were not in use.

[0077] In this embodiment, the charge pump chip U2 can be an ICL7660.

[0078] In a specific embodiment, a positive and negative dual power supply circuit is constructed based on the charge pump chip U2. The first positive voltage can be provided by the detection fixture, and the charge pump chip U2 controls the charging and discharging of the third capacitor C21 and filters the output through the fourth capacitor C22 to stably generate the first negative voltage, providing negative power supply support for the voltage comparator U1.

[0079] In this way, the first positive voltage provided by the test fixture is controlled by the charge pump chip U2 to charge and discharge the capacitor, generating a stable first negative voltage, which provides negative power supply support for the voltage comparator U1. No additional negative power supply module is required, the circuit is simple and reliable, and can efficiently adapt to the dual power supply requirements of negative voltage detection.

[0080] It should be explained that the charge pump chip U2 has 8 ports (i.e., 8 pins), of which: The first port: The port name is NC, which is the Not Connected pin. There is no electrical connection inside the chip, so it can be left floating when in use.

[0081] The second port, named CAP+, is the positive terminal of the pump capacitor. It is connected to an external charging and discharging capacitor and together with port CAP-, completes charge transfer and voltage reversal.

[0082] The third port: The port name is GND, which is the ground terminal. It is connected to the system ground and provides a ground potential reference for the chip. The fourth port, named CAP-, is the negative terminal of the pump capacitor. An external charging / discharging capacitor is connected between it and port CAP+ to enable the core operation of the charge pump.

[0083] The fifth port, named VOUT, is the negative voltage output terminal. It outputs a reversed negative voltage, which, after passing through the filter capacitor (the fourth capacitor C22), powers the subsequent circuit.

[0084] Port 6: Port name is LV, which is the low voltage detection terminal, used to monitor whether the input voltage is too low. Figure 6 The circuit shown is not used.

[0085] Port 7: The port name is OSC, which is the oscillator port, used to connect external components to adjust the internal oscillation frequency. Figure 6 The circuit shown is not used.

[0086] Eighth port: The port name is V+, which is the positive power input terminal. It is connected to a +12V input voltage to provide operating power for the chip.

[0087] In some embodiments, please refer to Figure 5 The level conversion circuit includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first diode D1, a first transistor Q1, a first capacitor C11, and a second capacitor C12. The first terminal of the fifth resistor R5 is connected to the first positive voltage ( Figure 5 (As shown in +12V), the second end of the fifth resistor R5 is connected to the output terminal of the voltage comparator U1 and the first end of the sixth resistor R6, respectively; the second end of the sixth resistor R6 is connected to the cathode of the first diode D1, the first end of the first capacitor C11, and the base of the first transistor Q1, respectively; the collector of the first transistor Q1 is connected to the second end of the seventh resistor R7, the first end of the eighth resistor R8, and the first end of the second capacitor C12, respectively; the first end of the seventh resistor R7 is connected to a second positive voltage ( Figure 5 (as shown, +3.3V); the second terminal of the eighth resistor R8 is connected to the control module; The anode of the first diode D1, the second terminal of the first capacitor C11, the emitter of the first transistor Q1, and the second terminal of the second capacitor C12 are all grounded.

[0088] In this embodiment, the resistance values ​​of the fifth resistor R5 and the seventh resistor R7 can both be 10 (kΩ); the resistance values ​​of the sixth resistor R6 and the eighth resistor R8 can both be 1 (kΩ); the first diode D1 can be a Schottky diode; the first transistor Q1 can be an NPN transistor; the capacitance of the first capacitor C11 can be 0.1 (uF); and the capacitance of the second capacitor C12 can be 1 (uF).

[0089] In some embodiments, the second positive voltage may be 3.3V.

[0090] In some embodiments, the control module may include an MCU; the voltage comparator U1 adopts an open-drain output mode and is connected to the +12V voltage through the fifth resistor R5 to ensure that when the voltage comparator U1 outputs a high-level signal, the high-level signal is +12V.

[0091] The fifth resistor R5 is used to provide a pull-up path for the voltage comparator U1 (open-drain output mode), ensuring that the voltage comparator U1 can stably output a +12V level when the output is high, thus guaranteeing the effectiveness of the open-drain output.

[0092] The sixth resistor R6 is connected in series between the output of voltage comparator U1 and the base of the first transistor Q1 to limit the base current, prevent excessive current from damaging the base-emitter junction, and also serve as a signal isolation function. The first transistor Q1 acts as an electronic switch to achieve level inversion and level conversion: When the base input is high (+12V), it saturates and conducts, pulling the collector down to near 0V; When the base input is negative (-12V), it is cut off, and the collector is pulled up to 3.3V, completing the conversion from -12V to 3.3V logic level.

[0093] The first diode D1 is used for reverse clamping protection. When the voltage comparator U1 outputs -12V, it is forward-biased, clamping the base voltage of the first transistor Q1 at about -0.3V to prevent the emitter junction from breaking down due to excessive reverse voltage, thus ensuring the safety of the first transistor Q1.

[0094] The first capacitor C11 is connected in parallel between the base of the first transistor Q1 and ground to filter out high-frequency noise in the base signal, improve the circuit's anti-interference capability, and avoid false triggering.

[0095] The seventh resistor R7 is connected in series between +3.3V and the collector of the first transistor Q1. When the first transistor Q1 is turned off, it pulls the collector node up to a high level of 3.3V, providing a valid logic high level for the control module.

[0096] The second capacitor C12 is connected in parallel between the MCU_IN node (i.e., the input node of the control module) and ground to further filter out high-frequency noise in the output signal and ensure that the level read by the MCU is stable and reliable.

[0097] The eighth resistor R8 is connected in series between the collector of the first transistor Q1 and the MCU_IN node to limit the output current and prevent damage to the control module in case of abnormality in the subsequent circuit, thus playing a protective role.

[0098] In a specific embodiment, the comparison result output by the voltage comparator U1 is connected to the base of the first transistor Q1 via the sixth resistor R6. When the comparison result is a high-level signal, the first diode D1 is cut off, the first transistor Q1 is saturated and turned on, and MCU_IN is pulled low to near 0V. That is, the second detection result output by the level conversion circuit is a low logic level (0). When the comparison result is a low-level signal, the first diode D1 is turned on, the first transistor Q1 is turned off, and MCU_IN is pulled up to nearly 3.3V. 3.3V belongs to the high logic level, that is, the second detection result output by the level conversion circuit is a high logic level (1).

[0099] In this way, the high and low voltage signals can be safely converted into logic levels that the control module can recognize through the level conversion circuit, effectively protecting the interface of the control module; in addition, the device negative voltage protection is achieved through diode clamping, which has strong anti-interference ability.

[0100] The control module is used to determine the target detection result based on the second detection result; the target detection result includes any one of the following: the RS232 interface is functioning normally, or the RS232 interface is malfunctioning.

[0101] In some embodiments, in determining the target detection result based on the second detection result, the control module is specifically used for: S21. When the second detection result meets the preset conditions, it is determined that the target detection result includes the RS232 interface function being normal; S22. When the second detection result does not meet the preset conditions, it is determined that the target detection result includes the RS232 interface function abnormality.

[0102] In this embodiment of the application, the preset conditions can be preset in advance or defaulted. For example, the preset condition can be: the second detection result is equal to a low logic level (0).

[0103] In this embodiment of the application, when the second detection result meets the preset conditions, that is, when the second detection result is equal to a low logic level (0), it indicates that the voltage of the RS232 interface is less than the negative reference voltage and the negative voltage of the RS232 interface is normal. At this time, the target detection result can be determined as the RS232 interface function is normal. When the second detection result does not meet the preset conditions, that is, the second detection result is a high logic level (1) and not equal to a low logic level (0), it indicates that the voltage of the RS232 interface is greater than or equal to the negative reference voltage, and the negative voltage of the RS232 interface is abnormal. At this time, the target detection result can be determined as an abnormal function of the RS232 interface.

[0104] In this way, by setting preset conditions to automatically judge the test results, the functional status of the interface can be determined quickly and accurately, improving the efficiency and reliability of the test.

[0105] Please see Figure 7 , Figure 7 Here is a flowchart of a negative pressure detection process provided in an embodiment of this application, as detailed below: 1. Start the test: Trigger the negative pressure detection process (e.g., device power-on, user command, or periodic self-test), and the system initializes each circuit module.

[0106] 2. RS232_TxD signal input: The negative voltage level signal output from the transmit pin of the RS232 interface is buffered by a voltage follower and then input to the voltage comparator; at the same time, the negative reference voltage is also buffered by a voltage follower and then input to the voltage comparator. 3. RS232_TxD voltage < negative reference voltage: The voltage comparator compares the two input voltages in real time: Yes: The RS232_TxD voltage is less than the negative reference voltage, which meets the electrical standards, and the system enters the normal testing branch; No: The RS232_TxD voltage is greater than or equal to the negative reference voltage, which does not comply with electrical standards. Enter the anomaly detection branch.

[0107] The specific process for the normal detection branch is as follows: (11) The voltage comparator outputs a high-level signal: The voltage comparator adopts an open-drain output structure. When the output is high, the internal output transistor is cut off, and the output voltage of the voltage comparator is pulled up to the positive power supply voltage (i.e. +12V) through the fifth resistor R5 to form a stable high-level signal.

[0108] (12) The first transistor is turned on, and the first diode is turned off: A high-level signal flows into the base of the first transistor, causing the base voltage Vbe > 0.7V, and the first transistor saturates and conducts. Since the base voltage is positive, the first diode is reverse biased and is in the cutoff state.

[0109] (13) Output MCU_IN at a low logic level: After the first transistor is turned on, its collector is pulled to near 0V, meaning the output of the MCU_IN node is a low logic level (0).

[0110] (14) RS232 interface negative pressure detection is normal: The MCU reads a low logic level (0), determines that the negative voltage of the RS232 interface meets the standard, and the negative voltage detection is normal.

[0111] The specific process for the anomaly detection branch is as follows: (21) The voltage comparator outputs a low-level signal: The voltage comparator's open-drain output is turned on, outputting a low-level signal.

[0112] (22) The first transistor is cut off, and the first diode is turned on: A low-level signal turns the first diode forward, clamping the base of the first transistor at approximately -0.3V. With the base voltage Vbe < 0, the first transistor is turned off.

[0113] (23) Output MCU_IN at a high logic level: After the first transistor is turned off, the collector is pulled up to +3.3V through the seventh resistor R7, that is, the output of the MCU_IN node is a high logic level (1).

[0114] (24) Abnormal negative pressure detection at RS232 interface: The MCU reads a high logic level (1) and determines that the negative voltage of the RS232 interface does not meet the standard, indicating an abnormality in negative voltage detection.

[0115] 4. Test completed: The process ends regardless of whether the test result is normal or abnormal; the MCU can record the result, report the status, or trigger subsequent processing (e.g., alarm, retry).

[0116] In some embodiments, the system is further specifically used for: S31. Perform a voltage test on the RS232 interface of the reference device to obtain voltage test data; the voltage test data includes multiple voltage values; the reference device is a qualified device of the same type as the device under test. S32. Determine the maximum voltage value, minimum voltage value, and average voltage value corresponding to the plurality of voltage values; S33. Determine the target difference based on the maximum voltage value and the minimum voltage value; S34. Determine a first reference voltage value based on the target difference and the average voltage value; S35. Determine the target basic information corresponding to the device under test; S36. Adjust the first reference voltage value according to the target basic information to obtain a second reference voltage value; S37. Determine the deviation between the second reference voltage value and the preset voltage value to obtain the target deviation. S38. When the target deviation is less than the preset deviation, determine the negative reference voltage based on the second reference voltage value; S39. When the target deviation is greater than or equal to the preset deviation, determine the negative reference voltage according to the preset voltage value.

[0117] In this embodiment, the target basic information may include at least one of the following: device model, device type, RS232 interface standard version, expected device data (e.g., expected device lifespan), etc., which are not limited here; the preset voltage value and preset deviation can be preset in advance or defaulted; wherein, the preset voltage value is the ideal reference threshold that conforms to the RS232 electrical specification, which is used to provide a compliance benchmark and fallback protection; the preset deviation is the maximum allowable fluctuation range of the negative reference voltage, which is used to determine the validity of the adaptive calculation result and balance the adaptive flexibility of the detection logic with the system stability.

[0118] In a specific embodiment, a voltage test can first be performed on the RS232 interface of the reference device to obtain voltage test data. Specifically, a test command can be sent to the reference device to control its RS232 interface to output a standard test level, such as a negative level signal corresponding to a continuous logic "1", so that the RS232 interface enters a stable test state. Then, the output voltage of the RS232 interface is sampled according to a preset sampling rate (e.g., 100 times / second) to obtain multiple sets of raw sampling data. These multiple sets of raw sampling data are then subjected to digital filtering operations such as averaging and outlier removal to eliminate errors caused by noise, interference and instantaneous fluctuations, thereby obtaining stable and reliable voltage test data.

[0119] Next, the maximum and minimum voltage values ​​among multiple voltage values ​​can be identified, and the average voltage value of these multiple voltage values ​​can be calculated. Then, based on the maximum and minimum voltage values, a target difference can be determined. Specifically, the target difference is obtained by subtracting the minimum voltage value from the maximum voltage value. Next, based on the target difference and the average voltage value, a first reference voltage value can be determined. Specifically, a preset mapping relationship between the difference and the optimization factor can be stored in advance, and the target optimization factor corresponding to the target difference can be determined based on this mapping relationship. The value range of the target optimization factor is -0.15 to 0.15. The average voltage value is then optimized based on the target optimization factor, as follows: First reference voltage value = average voltage value × (1 + target optimization factor); According to the above formula, the first reference voltage value can be obtained. Next, the target basic information corresponding to the device under test can be determined. Specifically, the target basic information can be the device model. A model query command can be sent to the device under test, and feedback information from the device under test can be received. This feedback information contains the device model, i.e., the target basic information. Then, the first reference voltage value can be adjusted according to the target basic information to obtain the second reference voltage value. Specifically, a pre-stored mapping relationship between preset basic information and adjustment coefficients can be used to determine the target adjustment coefficient corresponding to the target basic information. The target adjustment coefficient ranges from -0.2 to 0.2. The first reference voltage value is adjusted according to the target adjustment coefficient as follows: Second reference voltage value = First reference voltage value × (1 + target adjustment coefficient); Based on the above formula, the second reference voltage value can be obtained; then, the deviation between the second reference voltage value and the preset voltage value can be determined, as follows: Target deviation = |Second reference voltage value - Preset voltage value| / Preset voltage value × 100%; According to the above formula, the target deviation can be obtained; when the target deviation is less than the preset deviation, the second reference voltage value can be directly determined as the negative reference voltage. When the target deviation is greater than or equal to the preset deviation, the preset voltage value can be directly determined as the negative reference voltage.

[0120] In some embodiments, the preset deviation can be 30%.

[0121] Thus, a negative reference voltage is determined through multi-level dynamic adjustment and dual verification. First, a first reference voltage is calculated based on measured voltage fluctuations to adapt to the real-time signal status. Then, a second reference voltage is obtained by adjusting the voltage based on the equipment's basic information to improve equipment compatibility. Finally, deviation verification ensures threshold compliance. This solution can adaptively match signal and equipment characteristics, reducing misjudgments, while ensuring stability and reliability through fallback verification. It eliminates the need for manual calibration, improving detection accuracy and versatility.

[0122] In summary, the RS232 interface functional testing system described in this application verifies the communication connection status through the communication module, initiating negative pressure detection only upon successful connection. This avoids invalid detection and distinguishes between communication faults and electrical anomalies. Furthermore, the negative pressure detection module directly detects the physical layer's negative pressure electrical characteristics, overcoming the blind spot of traditional methods that only test communication functions. It can identify false communication successes caused by charge pump failure in the RS232 interface, eliminating missed detections at the root. The control module makes the final judgment based on the negative pressure detection results, forming a complete closed loop to ensure the rigor and reliability of the final target test results. This application achieves dual verification of communication function and electrical characteristics, improving the reliability of RS232 interface functional testing results.

[0123] Please see Figure 8 , Figure 8 This is a flowchart of a function detection method for an RS232 interface provided in an embodiment of this application. The method is applied to any RS232 interface function detection system as described in the above embodiments, and includes, but is not limited to, the following steps: S81. The communication connection between the device under test and the testing fixture is detected by the communication module to obtain a first detection result; the first detection result includes any one of the following: successful communication connection or failed communication connection; S82. When the first detection result includes a successful communication connection, the negative pressure detection module detects the device under test to obtain a second detection result. S83. The control module determines the target detection result based on the second detection result; the target detection result includes any one of the following: the RS232 interface is functioning normally, or the RS232 interface is functioning abnormally.

[0124] It is understood that the RS232 interface function detection method described in the embodiments of the present invention can also perform other implementation methods described in the RS232 interface function detection system provided in the embodiments of the present invention, which will not be repeated here.

[0125] This application also provides a computer-readable storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments, wherein the computer includes an electronic device.

[0126] This application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. The computer program product may be a software installation package, and the computer may include an electronic device.

[0127] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0128] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0129] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0130] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. This program can be stored in a computer-readable storage medium, and when executed, it can include the processes described in the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM or random access memory (RAM), magnetic disks, or optical disks.

[0131] The steps of the methods or algorithms described in the embodiments of this application can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in RAM, flash memory, ROM, EPROM, electrically erasable programmable read-only memory (EEPROM), registers, hard disk, portable hard disk, read-only optical disk (CD-ROM), or any other form of storage medium well known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Furthermore, the ASIC can reside in a terminal device or management device. Alternatively, the processor and storage medium can exist as discrete components in the terminal device or management device.

[0132] Those skilled in the art will recognize that, in one or more of the examples above, the functions described in the embodiments of this application can be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When these computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated.

[0133] The aforementioned computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media.

[0134] The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., digital video discs (DVDs)), or semiconductor media (e.g., solid-state disks (SSDs)).

[0135] The modules / units included in the various devices and products described in the above embodiments can be software modules / units, hardware modules / units, or a combination of both. For example, for devices and products applied to or integrated into a chip, all modules / units can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits. For devices and products applied to or integrated into a chip module, all modules / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The implementation is achieved through a software program that runs on the processor integrated within the chip module. The remaining modules / units (if any) can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into terminal equipment, each of their modules / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components within the terminal equipment. Alternatively, at least some modules / units can be implemented through a software program that runs on the processor integrated within the terminal equipment, while the remaining modules / units (if any) can be implemented using hardware methods such as circuits.

[0136] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the embodiments of this application. It should be understood that the above descriptions are merely specific embodiments of the embodiments of this application and are not intended to limit the protection scope of the embodiments of this application. Any modifications, equivalent substitutions, improvements, etc., made on the basis of the technical solutions of the embodiments of this application should be included within the protection scope of the embodiments of this application.

Claims

1. A functional testing system for an RS232 interface, characterized in that, include: A testing fixture and a device under test (DUT), wherein the DUT includes an RS232 interface; the testing fixture includes: a control module, a communication module, and a negative pressure detection module; a first side of the communication module is connected to the control module, and a second side of the communication module is connected to the RS232 interface; a first side of the negative pressure detection module is connected to the RS232 interface, and a second side of the negative pressure detection module is connected to the control module; wherein: The communication module is used to detect the communication connection between the device under test and the testing fixture, and obtain a first detection result; the first detection result includes any one of the following: communication connection successful, communication connection failed; The negative pressure detection module is used to detect the device under test when the first detection result includes a successful communication connection, and obtain a second detection result; The control module is used to determine the target detection result based on the second detection result; the target detection result includes any one of the following: the RS232 interface is functioning normally, or the RS232 interface is functioning abnormally; The negative pressure detection module includes: a reference voltage generation circuit, a voltage follower, a voltage comparator, and a level conversion circuit; In terms of detecting the device under test and obtaining a second detection result, the negative pressure detection module is specifically used for: A negative reference voltage is generated by the reference voltage generation circuit. The negative reference voltage and the voltage of the RS232 interface are input to the voltage comparator through the voltage follower; The voltage comparator compares the negative reference voltage and the voltage of the RS232 interface to obtain a comparison result. Specifically, if the voltage of the RS232 interface is less than the negative reference voltage, the voltage comparator outputs a high-level signal, which is the comparison result; if the voltage of the RS232 interface is greater than or equal to the negative reference voltage, the voltage comparator outputs a low-level signal, which is the comparison result. The comparison result is converted by the level conversion circuit to obtain the second detection result; specifically, if the comparison result is a high-level signal, the second detection result is a low logic level; if the comparison result is a low-level signal, the second detection result is a high logic level.

2. The system as described in claim 1, characterized in that, The voltage follower is connected to the reference voltage generation circuit, the voltage comparator, and the RS232 interface, respectively; the output of the voltage comparator is connected to the level conversion circuit.

3. The system as described in claim 2, characterized in that, The reference voltage generation circuit includes: a first resistor and a second resistor; The first end of the first resistor is connected to a first negative voltage, and the second end of the first resistor is connected to the first end of the second resistor; the second end of the second resistor is grounded.

4. The system as described in claim 3, characterized in that, The voltage follower includes: an operational amplifier, a third resistor, and a fourth resistor; The first and second terminals of the operational amplifier are connected to the second terminal of the fourth resistor, and the first terminal of the fourth resistor is connected to the non-inverting input terminal of the voltage comparator; the third terminal of the operational amplifier is connected to the second terminal of the first resistor and the first terminal of the second resistor; the fourth terminal of the operational amplifier is connected to the first negative voltage; the fifth terminal of the operational amplifier is connected to the RS232 interface; the sixth and seventh terminals of the operational amplifier are connected to the second terminal of the third resistor, and the eighth terminal of the operational amplifier is connected to the first positive voltage; the first terminal of the third resistor is connected to the inverting input terminal of the voltage comparator.

5. The system as described in claim 4, characterized in that, The level conversion circuit includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first diode, a first transistor, a first capacitor, and a second capacitor; The first terminal of the fifth resistor is connected to the first positive voltage; the second terminal of the fifth resistor is connected to the output terminal of the voltage comparator and the first terminal of the sixth resistor; the second terminal of the sixth resistor is connected to the cathode of the first diode, the first terminal of the first capacitor, and the base of the first transistor; the collector of the first transistor is connected to the second terminal of the seventh resistor, the first terminal of the eighth resistor, and the first terminal of the second capacitor; the first terminal of the seventh resistor is connected to the second positive voltage; and the second terminal of the eighth resistor is connected to the control module. The anode of the first diode, the second terminal of the first capacitor, the emitter of the first transistor, and the second terminal of the second capacitor are all grounded.

6. The system as described in claim 5, characterized in that, The voltage comparator is powered by both positive and negative power supplies. The positive power supply terminal of the voltage comparator is connected to the first positive voltage, and the negative power supply terminal of the voltage comparator is connected to the first negative voltage.

7. The system according to any one of claims 1-6, characterized in that, In determining the target detection result based on the second detection result, the control module is specifically used for: When the second detection result meets the preset conditions, it is determined that the target detection result includes the RS232 interface function being normal; If the second detection result does not meet the preset conditions, the target detection result is determined to include the RS232 interface malfunction.

8. A method for functional testing of an RS232 interface, characterized in that, Applied to the system as described in any one of claims 1-7, the method comprises: The communication module detects the communication connection between the device under test and the testing fixture to obtain a first detection result; the first detection result includes any one of the following: successful communication connection or failed communication connection. When the first detection result includes a successful communication connection, the negative pressure detection module detects the device under test and obtains a second detection result. The control module determines the target detection result based on the second detection result; the target detection result includes any one of the following: the RS232 interface is functioning normally, or the RS232 interface is malfunctioning.

9. A computer-readable storage medium, characterized in that, A computer program for electronic data interchange is stored, wherein the computer program causes a computer to perform the method as described in claim 8.

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