Epitaxial structure of gallium nitride thin film and preparation method thereof

Abstract

This invention provides an epitaxial structure and fabrication method for gallium nitride thin films, relating to the field of semiconductor technology. The structure includes: a substrate, a buffer layer, a GaN thin film, an AlGaN barrier layer, and an insulating layer stacked sequentially; multiple rectangular gate root slots, a first source slot, and a second source slot are formed on the insulating layer, with the bottoms of both the first and second source slots extending to the bottom of the AlGaN barrier layer; a comb-shaped gate having multiple rectangular gate roots matching the respective rectangular gate root slots; the width of each rectangular gate root in the longitudinal direction of the epitaxial structure and the spacing between adjacent rectangular gate roots are constrained by the actual intrinsic transconductance of the epitaxial structure; when a conduction voltage is applied to the comb-shaped gate, a two-dimensional electron gas layer between the multi-contact source and drain electrodes becomes conductive, forming a conductive channel, improving the stability of the source access resistance, reducing its nonlinear change with current or voltage, and thus improving the linearity of the epitaxial structure.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an epitaxial structure of gallium nitride thin film and its preparation method. Background Technology

[0002] Epitaxial structures of gallium nitride (GaN) thin films refer to GaN thin films with high-quality crystal structures fabricated on substrates using epitaxial growth techniques. Epitaxial growth typically employs techniques such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE), which can deposit single or multiple layers of GaN on single-crystal substrates. The advantage of epitaxial structures is that they enable lattice matching of the thin film material, thereby reducing grain boundary defects and improving the electrical and optical properties of the material. HEMTs (High Electron Mobility Transistors) based on GaN thin film epitaxial structures are high-performance semiconductor devices widely used in radio frequency communications, high-power electronics, power modules, and other fields. Their core structure utilizes the epitaxial growth of heterojunction materials such as gallium nitride (GaN) and aluminum gallium nitride (AlGaN) to form a two-dimensional electron gas (2DEG) at the heterojunction interface, thereby achieving high-speed, high-efficiency charge transport.

[0003] High-quality gallium nitride (GaN) thin film epitaxial structures can reduce defects and grain boundaries in HEMT devices, improve the material's conductivity and thermal stability, and enable it to play a crucial role in high-frequency, high-power electronic devices, lasers, and optoelectronic devices. Epitaxial optimization can not only improve the efficiency of GaN devices but also expand their potential in a wider range of applications.

[0004] However, existing gallium nitride thin film epitaxial structures suffer from unstable contact resistance due to the source plane contact conductive layer, which in turn interferes with the gate's control of the two-dimensional electron gas. This ultimately leads to nonlinear changes in the source access resistance. The unilateral control of the two-dimensional electron gas by the gate plane contact conductive layer cannot constrain this nonlinear change, resulting in fluctuations in the concentration and mobility of the two-dimensional electron gas. Consequently, the transconductance of the device becomes unstable, affecting the linearity of the device and making it prone to signal distortion in high-frequency applications. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this invention is to provide an epitaxial structure of gallium nitride thin film, which can solve the problem that in the prior art, the source plane contact conductive layer is prone to gate contact failure, resulting in nonlinear changes in source access resistance. Furthermore, the gate plane contact conductive layer cannot constrain the nonlinear changes in source access resistance by unilaterally controlling the two-dimensional electron gas, which in turn causes fluctuations in the concentration and mobility of the two-dimensional electron gas, thereby making the transconductance of the device unstable, affecting the linearity of the device, and making it prone to signal distortion in high-frequency applications.

[0006] A first aspect of the present invention provides an epitaxial structure of a gallium nitride thin film, comprising:

[0007] Substrate, buffer layer, GaN thin film, AlGaN barrier layer, insulating layer, comb gate, multi-contact source and drain;

[0008] The substrate, buffer layer, GaN thin film, AlGaN barrier layer and insulating layer are stacked sequentially;

[0009] A two-dimensional electron gas layer is formed in the GaN thin film;

[0010] Multiple rectangular gate slots, a first source slot, and a second source slot are formed on the insulating layer. The height of the rectangular gate slots is greater than the first height from the two-dimensional electron gas layer to the insulating layer, and each rectangular gate slot is uniformly arranged in the lateral direction of the epitaxial structure. The bottoms of the first source slot and the second source slot both extend to the bottom of the AlGaN barrier layer. The first height is the vertical distance between the lower surface of the two-dimensional electron gas layer and the upper surface of the insulating layer.

[0011] The comb-shaped gate has multiple rectangular gate roots that match the slots of each rectangular gate root;

[0012] The width of each rectangular gate root and the spacing between adjacent rectangular gate roots in the longitudinal direction of the epitaxial structure are constrained by the actual intrinsic transconductance of the epitaxial structure. The size and spacing of each rectangular gate root in the longitudinal direction of the epitaxial structure are determined by aiming to minimize the source access resistance and constrained by a preset fluctuation range of the actual intrinsic transconductance of the epitaxial structure and a fluctuation range of the fill ratio. Alternatively, specific size ranges or proportional relationships are provided as structural limitations.

[0013] The multi-pin source electrode has a first contact pin and a second contact pin that match both the first source electrode slot and the second source electrode slot;

[0014] When a conduction voltage is applied to the comb-shaped gate, the two-dimensional electron gas layer between the source and drain of the multi-contact pins becomes conductive, forming a conductive channel.

[0015] A second aspect of this invention provides a method for preparing an epitaxial structure of a gallium nitride thin film, comprising:

[0016] S1: Substrate preparation;

[0017] S2: A buffer layer, a GaN thin film, an AlGaN barrier layer, and an insulating layer are sequentially grown on the substrate;

[0018] S3: Combining the proximity effect pre-compensation algorithm, rectangular gate slots, first source slots and second source slots are formed on the insulating layer using electron beam lithography.

[0019] S4: Deposit a comb-shaped gate at the rectangular gate and slot to form a gate contact;

[0020] S5: Deposit a multi-contact source electrode in the first source slot and the second source slot, and deposit a drain electrode to form source contacts and drain contacts, thus obtaining an epitaxial structure.

[0021] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following:

[0022] In this embodiment of the invention, by designing a multi-contact source and adjusting the position of the source slot, the contact quality between the source and the two-dimensional electron gas layer is optimized, reducing the nonlinear variation of the source access resistance caused by poor contact or uneven current density, improving the stability of the source contact resistance, and reducing its nonlinear characteristics with current or voltage changes. Secondly, by employing multiple rectangular gate slots and optimizing the gate width and spacing based on the intrinsic transconductance constraints of the epitaxial structure, the stability of the device's transconductance is ensured, avoiding transconductance instability caused by source contact resistance fluctuations, and enhancing the device's linearity. Finally, the comb-shaped gate design allows the gate to control the two-dimensional electron gas from both sides of the channel, effectively reducing the impact of early electron mobility saturation and improving overall linearity. This not only improves the stability of the source access resistance and maintains transconductance stability but also improves signal linearity in high-frequency applications, effectively avoiding signal distortion and enhancing the performance of gallium nitride HEMTs in high-frequency, high-power applications, especially suitable for the low-noise, high-linearity, and high-power-efficiency requirements of 5G communications. Attached Figure Description

[0023] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. Obviously, the drawings described below are merely some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0024] Figure 1 This is a schematic diagram of the epitaxial structure of a gallium nitride thin film provided in an embodiment of the present invention.

[0025] Figure 2 This is a top view of an epitaxial structure of a gallium nitride thin film provided in an embodiment of the present invention.

[0026] Figure 3 This is a schematic diagram of a unit structure of an epitaxial structure of a gallium nitride thin film provided in an embodiment of the present invention.

[0027] Figure 4 This is a schematic diagram of a multi-contact source electrode structure provided in an embodiment of the present invention.

[0028] Figure 5 This is a schematic diagram of a comb-shaped gate structure provided in an embodiment of the present invention.

[0029] Figure 6 This is a schematic diagram of another comb-shaped gate structure provided in an embodiment of the present invention.

[0030] Figure 7 This is a schematic flowchart of a method for preparing an epitaxial structure of a gallium nitride thin film according to an embodiment of the present invention. Detailed Implementation

[0031] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. It should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0032] The epitaxial structure of gallium nitride thin films provided in the embodiments of the present invention will be described in detail below with reference to the accompanying drawings and through specific embodiments and application scenarios.

[0033] Reference manual attached Figure 1 The diagram shows a schematic structural diagram of an epitaxial structure of a gallium nitride thin film provided in an embodiment of the present invention.

[0034] Figure 1 The diagram illustrates the epitaxial structure of a gallium nitride (GaN) thin film, comprising several key layers. The substrate provides fundamental support and mitigates lattice mismatch between the GaN film and the buffer layer. A two-dimensional electron gas (2DEG) layer is formed within the GaN film, forming the core of the device's conductivity. An AlGaN barrier layer, located above the GaN film, also forms the 2DEG layer, providing current channels. An insulating layer isolates electrical regions, ensuring electric field control between the gate and source. The comb-shaped gate shown precisely controls the flow of the 2DEG through multiple rectangular gate root slots, enhancing device linearity. The bottom of the rectangular gate root slots extends below the 2DEG layer, modulating the 2DEG through an electric field. Source and drain slots ensure good source-to-2DEG contact, optimizing source contact resistance and improving device performance. This structural design contributes to improved device stability and reduced signal distortion, making it particularly suitable for high-frequency, high-power applications.

[0035] Reference manual attached Figure 2 The diagram shows a top view of an epitaxial structure of a gallium nitride thin film provided in an embodiment of the present invention.

[0036] Figure 2The layout of the source slots, comb gate, and SiN insulating layer is shown. As seen in the figure, multiple first and second source slots are arranged on the surface of the gallium nitride thin-film epitaxial structure. The source slot design ensures good contact between the source and the two-dimensional electron gas layer, while the comb gate precisely controls the electron flow in the two-dimensional electron gas layer through rectangular gate root slots. The insulating layer, located on top of the structure, isolates the electrical regions and controls the electric field, optimizing device performance. This design ensures electric field control between the gate and source, while improving device stability and linearity, making it particularly suitable for high-frequency, high-power applications.

[0037] Reference manual attached Figure 3 The diagram shows a unit structure schematic of an epitaxial structure of a gallium nitride thin film provided in an embodiment of the present invention.

[0038] Figure 3 The unit cell structure of gallium nitride thin film epitaxial structure is shown. (From...) Figure 3 As can be seen, the depth of the comb-shaped gate extends beyond the 2DEG, allowing adjacent gate roots to finely control the separated 2DEG. This reduces the impact of early mobility saturation, thereby improving the linearity and stability of the device. This design optimizes gate control and enhances the device's performance in high-frequency and high-power applications, offering significant advantages, especially in scenarios requiring high linearity and low noise.

[0039] Reference manual attached Figure 4 The diagram shows a schematic of a multi-contact source electrode structure provided by an embodiment of the present invention.

[0040] Figure 4 The structure of a multi-contact source is shown. The source (S) is designed with two contact feet, where the first and second contact feet ensure a more uniform and precise contact between the source and the two-dimensional electron gas layer. This design effectively optimizes the contact resistance of the source, avoiding poor contact or uneven current density, thereby improving the device's stability, linearity, and conductivity, making it particularly suitable for high-frequency and high-power applications. The multi-contact source design increases the contact area between the source and the two-dimensional electron gas layer, ensuring uniform current distribution and reducing poor contact caused by excessively high local current density. This reduces nonlinear variations in source contact resistance, improving device stability and conductivity. The distance between the first and second contact feet can be set according to actual needs.

[0041] Reference manual attached Figure 5 The diagram shows a comb-shaped gate structure provided by an embodiment of the present invention.

[0042] Figure 5This paper showcases a comb-shaped gate design, composed of multiple rectangular gate roots. This structure allows for precise control of the conductivity of the two-dimensional electron gas (2DEG), particularly in high-frequency applications, enabling more effective regulation of electron flow and improving device linearity and stability. Compared to conventional gates, this design better avoids early saturation of electron mobility, enhancing device performance in high-power and high-frequency applications.

[0043] Reference manual attached Figure 6 The diagram shows another comb-shaped gate structure provided by an embodiment of the present invention.

[0044] Figure 6 This paper demonstrates a comb-shaped gate design, where the gate consists of multiple short gate roots. Each gate root is rectangular in shape, uniformly arranged, and located within the gate region. This design allows for precise modulation of the two-dimensional electron gas (2DEG) layer in multiple directions, providing better control over electron flow and improving device linearity compared to traditional planar gates. The comb-shaped gate reduces the saturation effect of early electron mobility, contributing to optimized device stability and performance, and is particularly suitable for precise modulation in high-frequency, high-power applications.

[0045] This invention provides an epitaxial structure of a gallium nitride (GaN) thin film, comprising: a substrate, a buffer layer, a GaN thin film, an AlGaN barrier layer, an insulating layer, a comb-shaped gate, a multi-contact source, and a drain. The substrate, buffer layer, GaN thin film, AlGaN barrier layer, and insulating layer are sequentially stacked. A two-dimensional electron gas layer is formed in the GaN thin film. The insulating layer has multiple rectangular gate root slots, a first source slot, and a second source slot. The height of the rectangular gate root slots is greater than the first height from the two-dimensional electron gas layer to the insulating layer, and the rectangular gate root slots are uniformly arranged in the lateral direction of the epitaxial structure. The bottoms of both the first and second source slots extend to the bottom of the AlGaN barrier layer. The comb-shaped gate has multiple rectangular gate roots that match the rectangular gate root slots. The width of each rectangular gate root and the spacing between adjacent rectangular gate roots in the longitudinal direction of the epitaxial structure are constrained by the actual intrinsic transconductance of the epitaxial structure. The multi-contact source has a first contact and a second contact that match both the first and second source slots. When a conduction voltage is applied to the comb-shaped gate, the two-dimensional electron gas layer between the source and drain of the multi-contact pins becomes conductive, forming a conductive channel.

[0046] Among them, by Figure 1 It can be seen that the height of the rectangular gate and slot being greater than the first height from the two-dimensional electron gas layer to the insulating layer describes that the height of the rectangular gate and slot being greater than the first height h1 between the lower surface of the two-dimensional electron gas layer and the upper surface of the insulating layer.

[0047] The substrate is the foundational layer of the entire epitaxial structure, typically made of a material with high thermal conductivity, such as silicon carbide (SiC) or sapphire (Al2O3), to provide support for the upper layers and ensure structural stability. A buffer layer is located between the substrate and the GaN thin film, primarily to alleviate lattice mismatch between them. The buffer layer helps reduce stress and defects that may result from lattice differences between the substrate and the GaN thin film, improving the overall structure quality. The GaN thin film is the key material in this structure, responsible for providing a high-mobility two-dimensional electron gas (2DEG). GaN has high electron mobility and high breakdown voltage, making it ideal for high-power and high-frequency applications. An AlGaN barrier layer is located above the GaN thin film, forming the 2DEG. The heterojunction between AlGaN and GaN forms an electron gas layer, which allows electrons to conduct electricity effectively under an applied electric field, providing the necessary current path. An insulating layer isolates different electrical regions, prevents current leakage, and ensures electric field control between the gate and source. The thickness and material selection of the insulating layer have a significant impact on the performance of the device (such as switching speed and leakage current).

[0048] Additionally, rectangular gate and slot regions are used to deposit the gate. The gate and slot design ensures uniform gate distribution and precise control. The bottom of the rectangular gate and slot extends below the 2DEG layer, and its height is greater than the distance from the 2DEG layer to the insulating layer. This allows for multi-directional control of the 2DEG through the gate, ensuring effective multi-directional control of the 2DEG layer within the channel. The uniform arrangement of the rectangular gate and slot helps improve device performance and consistency. The bottoms of the first and second source slots extend to the bottom of the AlGaN barrier layer, ensuring good contact between the source and the 2DEG layer, optimizing source access resistance, and improving device performance. This design allows for better contact between the source and the 2DEG layer, thereby improving device stability and linearity. A comb gate is a special gate design composed of multiple rectangular gate roots that match the rectangular gate and slot regions. The comb gate can control the 2DEG layer from both sides (laterally) of the channel. Compared to traditional planar gates, it can more precisely control the flow of electrons in the channel, improving device linearity.

[0049] In practical applications, the substrate of the gallium nitride thin-film epitaxial structure provides the fundamental support for the structure, and the use of materials with high thermal conductivity (such as silicon carbide or sapphire) helps dissipate heat and enhance device stability. A buffer layer alleviates lattice mismatch between the substrate and the GaN thin film, reducing stress and defects and ensuring high-quality structure. The two-dimensional electron gas layer (2DEG) in the GaN thin film is the conductive core of the device, possessing high mobility and breakdown voltage, suitable for high-frequency and high-power applications. The heterojunction formed by the AlGaN barrier layer enables the 2DEG layer to conduct electricity effectively, providing a stable current path. The insulating layer used in the structure effectively isolates different electrical regions, reduces leakage current, and ensures electric field control between the gate and source. The bottom of the rectangular gate and slot extends below the 2DEG layer; its design ensures uniform gate distribution, and because the height of the slot is greater than the distance from the 2DEG layer to the insulating layer, the gate can precisely control the 2DEG layer in the channel from multiple directions. The bottoms of the first and second source slots extend to the bottom of the AlGaN barrier layer, optimizing source access resistance and improving device performance. Comb-shaped gates achieve precise gate control through multiple rectangular gate roots, effectively reducing the impact of early electron mobility saturation and improving the linearity and stability of the device.

[0050] Furthermore, the multi-contact source design improves the contact quality between the source and the two-dimensional electron gas layer, reducing nonlinear changes in source access resistance caused by poor contact or uneven current density, and enhancing the stability of source contact resistance. Overall, this structure, through optimized design of various components, significantly improves the performance of gallium nitride HEMTs in high-frequency, high-power applications, especially in 5G communications, effectively avoiding signal distortion and meeting the requirements of low noise, high linearity, and high power efficiency.

[0051] In this embodiment of the invention, by designing a multi-contact source and adjusting the position of the source slot, the contact quality between the source and the two-dimensional electron gas layer is optimized, reducing the nonlinear variation of the source access resistance caused by poor contact or uneven current density, improving the stability of the source contact resistance, and reducing its nonlinear characteristics with current or voltage changes. Secondly, by employing multiple rectangular gate slots and optimizing the gate width and spacing based on the intrinsic transconductance constraints of the epitaxial structure, the stability of the device's transconductance is ensured, avoiding transconductance instability caused by source contact resistance fluctuations, and enhancing the device's linearity. Finally, the comb-shaped gate design allows the gate to control the two-dimensional electron gas from both sides of the channel, effectively reducing the impact of early electron mobility saturation and improving overall linearity. This not only improves the stability of the source access resistance and maintains transconductance stability but also improves signal linearity in high-frequency applications, effectively avoiding signal distortion and enhancing the performance of gallium nitride HEMTs in high-frequency, high-power applications, especially suitable for the low-noise, high-linearity, and high-power-efficiency requirements of 5G communications.

[0052] In one possible implementation, the determination of the width of the rectangular grid and the spacing between adjacent rectangular grids specifically includes:

[0053] Determine the preset fluctuation range of the actual intrinsic transconductance of the epitaxial structure.

[0054] The specific formula for calculating the actual intrinsic transconductance of an epitaxial structure is as follows:

[0055]

[0056]

[0057]

[0058] in, This represents the actual intrinsic transconductance of the epitaxial structure. This represents the ideal intrinsic transconductance of the epitaxial structure. Represents the elementary charge. Indicates the desired electron mobility. This represents the desired unit electron density in a two-dimensional electron gas layer. Indicates the width of the rectangular grid. express , Indicates the length of the rectangular grid root. This represents the dielectric constant associated with epitaxial materials. Represents the vacuum permittivity. This indicates the built-in potential of the epitaxial structure. Indicates the gate-source voltage. This represents the desired electron density per unit volume in a two-dimensional electron gas layer. Indicates the source access resistance. This represents the distance from the source to the gate, i.e., the distance between the second contact pin and the rectangular gate root, I. D This represents the drain current.

[0059] The source access resistance is the intervening resistance between the source metal and the two-dimensional electron gas layer. The actual intrinsic transconductance of the epitaxial structure takes into account the influence of the source access resistance on transconductance, reflecting the actual conductivity of the two-dimensional electron gas layer under different gate voltages. By dynamically adjusting the width of the rectangular gate root and the spacing between adjacent gate roots, the source contact resistance can be effectively optimized, thereby improving the stability and linearity of the device. This method helps to minimize the source access resistance while ensuring transconductance stability, improving the device's performance in high-frequency and high-power applications.

[0060] It should be noted that those skilled in the art can set the size of the preset fluctuation range according to actual needs, and this invention does not limit this.

[0061] Determine the relationship between the width of the rectangular gate root and the spacing between adjacent rectangular gate roots and the source access resistance.

[0062] The specific relational expression is as follows:

[0063]

[0064] in, This represents the source access resistance. The desired electron mobility (…). This can be obtained through Hall effect testing, with a typical value range of 1500-2000 cm⁻¹. 2 / (V·s); the expected unit electron density in a two-dimensional electron gas layer ( This can be obtained through a capacitance-voltage test, with a typical value range of 1×10⁻⁶. 13 -2×10 13 cm -2 .

[0065] It should be noted that by clearly defining the quantitative relationship between the rectangular gate width and the spacing between adjacent gates and the source access resistance, it is helpful to accurately control the variation of the source contact resistance. By optimizing these parameters, the source access resistance can be effectively reduced, the conductivity and transconductance stability of the device can be improved, thereby enhancing the linearity and efficiency of the device in high-frequency, high-power applications.

[0066] Determine the range of fill ratio fluctuations for the width of the rectangular grid base and the spacing between adjacent rectangular grid bases.

[0067] The formula for the fill ratio fluctuation range is as follows:

[0068]

[0069] in, Indicates the fill ratio, [ [] indicates the upper and lower limits of the fill ratio.

[0070] It should be noted that setting the fill ratio fluctuation range for the rectangular gate width and the spacing between adjacent gates can ensure the stability of the device under different operating conditions. By limiting the upper and lower limits of the fill ratio, source contact resistance fluctuations caused by excessively large or small fill ratios can be avoided while ensuring device performance, thereby optimizing transconductance and linearity.

[0071] Optionally, fill ratio upper limit It can be set to 0.7, the lower limit of the fill ratio. It can be set to 0.4.

[0072] Under the constraints of the preset fluctuation range and fill ratio fluctuation range, the width of the rectangular gate root and the spacing between adjacent rectangular gate roots are solved with the goal of minimizing the source access resistance.

[0073] It should be noted that determining the width of the rectangular gate root and the spacing between adjacent rectangular gate roots based on the correlation between the actual intrinsic transconductance fluctuation range of the epitaxial structure and the source access resistance can effectively optimize device performance. Firstly, based on the transconductance calculation formula, and considering the relationship between the source access resistance and the gate root width and spacing, the source access resistance can be minimized by adjusting these parameters, thereby improving the device's conductivity and stability. By constraining the fill ratio fluctuation range, ensuring that the gate root width and spacing vary within a certain range helps balance the changes in source contact resistance and transconductance, avoiding excessive nonlinear fluctuations in the device at high frequencies and high power. Finally, while meeting performance requirements, optimizing the gate root geometry not only improves the device's linearity and transconductance stability but also effectively enhances signal transmission quality in high-frequency applications, increasing the device's reliability and efficiency in applications such as 5G communication.

[0074] In one possible implementation, the first source slot and the second source slot penetrate the epitaxial structure in the longitudinal direction of the epitaxial structure.

[0075] It should be noted that the first and second source slots penetrate the epitaxial structure in the longitudinal direction, ensuring more sufficient and uniform contact between the source and the two-dimensional electron gas layer. This design helps optimize source contact resistance, reduces performance fluctuations caused by poor contact, and thus improves device stability and conductivity, especially in high-frequency and high-power applications.

[0076] In one possible implementation, the insulating layer is specifically a SiN insulating layer.

[0077] Specifically, the gallium nitride thin-film epitaxial structure includes components such as a substrate, a buffer layer, a GaN thin film, an AlGaN barrier layer, an insulating layer, a comb-shaped gate, a multi-contact source, and a drain. The substrate provides basic support and uses high thermal conductivity materials such as silicon carbide (SiC) or sapphire (Al2O3) to alleviate heat accumulation issues. The buffer layer mitigates lattice mismatch between the substrate and the GaN thin film, reducing stress and defects. The two-dimensional electron gas (2DEG) layer formed in the GaN thin film provides high mobility and high breakdown voltage, suitable for high-frequency, high-power applications. The AlGaN barrier layer forms an effective current channel through a heterojunction, promoting conductivity in the 2DEG layer. The insulating layer effectively isolates electrical regions, ensuring electric field control between the gate and source. The comb-shaped gate design allows for precise control of the 2DEG layer from multiple sides of the channel (top, left, and right), reducing early mobility saturation and improving linearity. The multi-contact source design optimizes the contact quality between the source and the 2DEG layer, reducing nonlinear changes in source contact resistance and improving device stability and linearity. This structure, through reasonable optimization of each component, not only improves the conductivity of the device but also reduces signal distortion, enhancing its performance in high-frequency and high-power applications. It is especially suitable for applications such as 5G communication that have strict requirements for high linearity and high power efficiency.

[0078] Reference manual attached Figure 7 The diagram shows a flow chart of a method for preparing an epitaxial structure of a gallium nitride thin film according to an embodiment of the present invention.

[0079] This invention provides a method for preparing an epitaxial structure of a gallium nitride thin film, the method comprising:

[0080] S1: Prepare the substrate.

[0081] In one possible implementation, the substrate includes a Si substrate and a sapphire substrate.

[0082] Following S1, it also includes:

[0083] The substrate undergoes pretreatment including chemical cleaning and surface passivation.

[0084] It should be noted that during the substrate pretreatment process, chemical cleaning is used to remove surface impurities and surface passivation is performed, which can effectively reduce surface defects and contamination, improve the adhesion of subsequent materials and the quality of the thin film, thereby optimizing the overall performance of the epitaxial structure and ensuring the high-quality growth of GaN thin films.

[0085] S2: A buffer layer, a GaN thin film, an AlGaN barrier layer, and an insulating layer are grown sequentially on the substrate.

[0086] In one possible implementation, S2 specifically refers to:

[0087] A buffer layer, a GaN thin film, an AlGaN barrier layer, and an insulating layer are sequentially grown on a substrate using metal-organic chemical vapor deposition or molecular beam epitaxy.

[0088] It should be noted that a buffer layer, a GaN thin film, an AlGaN barrier layer, and an insulating layer are sequentially grown on the substrate using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). These methods allow for precise control of the film thickness, quality, and crystal structure, ensuring high-quality growth of each layer. The buffer layer helps alleviate lattice mismatch between the substrate and the GaN layer, the GaN thin film provides a highly mobile two-dimensional electron gas, the AlGaN barrier layer forms the electron gas layer, and the insulating layer effectively isolates the electrical regions, ensuring stable device performance.

[0089] S3: Combining the proximity effect pre-compensation algorithm, rectangular gate slots, first source slots, and second source slots are formed on the insulating layer using electron beam lithography.

[0090] Among them, the proximity effect pre-compensation algorithm is a technique used in electron beam lithography, designed to correct the impact of electron beam scattering on pattern accuracy. Since electron beam scattering occurs during exposure, leading to blurred edges or dimensional changes in the pattern, the proximity effect compensation algorithm adjusts the exposed pattern by simulating the energy distribution of electron beam scattering to reduce or eliminate these effects. Based on forward and backscattering models of the electron beam, this algorithm pre-compensates and corrects the exposed pattern to ensure that the final exposed pattern accuracy meets design requirements.

[0091] In one possible implementation, S3 specifically includes:

[0092] S301: Determine the initial exposure pattern on the insulating layer during electron beam lithography based on the preset two-dimensional pattern, wherein the initial exposure pattern includes a rectangular gate slot pattern, a first source slot pattern, and a second source slot pattern.

[0093] S302: Establish a double Gaussian model for simulating the electron beam scattering energy distribution in electron beam lithography.

[0094] The double Gaussian model is as follows:

[0095]

[0096] in, Represents the coordinates of the plane containing the insulating layer Electron beam energy intensity at the location Represents pi (π). and These represent the electron beam forward diffusion attenuation rate and the electron beam backward diffusion attenuation rate, respectively, which are related to electron beam lithography equipment. Description and Weighting coefficients for relative contribution Represents the natural constant.

[0097] The weighting coefficients can be set according to the electron beam lithography equipment. A weighting coefficient of 1 indicates that forward and backscattering contribute equally to the energy distribution. A weighting coefficient greater than 1 indicates that backscattering is more important than forward scattering. A weighting coefficient less than 1 indicates that forward scattering has a stronger influence.

[0098] It should be noted that the established dual-Gaussian model, by considering the different effects of forward and backscattering of the electron beam, can more accurately simulate the energy distribution during electron beam lithography. By introducing weighting coefficients, the model flexibly adjusts the contribution of scattering effects to adapt to the characteristics of different electron beam lithography equipment. This accurate simulation can effectively improve the precision of exposure patterns, reduce pattern errors caused by scattering, thereby achieving higher pattern consistency and smaller dimensional errors during lithography, and improving the manufacturing precision and performance of devices.

[0099] S303: Combine the double Gaussian model to pre-correct the initial exposure pattern to obtain the pre-corrected initial exposure pattern.

[0100] In one possible implementation, S303 specifically refers to:

[0101] The initial exposure image is convolved with a double Gaussian model to obtain a pre-corrected initial exposure image.

[0102] The convolution operation involves convolving the graph with a proximity effect kernel function to simulate the effect of scattering.

[0103] It should be noted that convolving the initial exposure pattern with a double Gaussian model can effectively simulate the scattering effect of the electron beam and correct errors in the exposure pattern. The convolution operation accurately accounts for the proximity effect, reflecting the impact of electron beam scattering on pattern accuracy, thus generating a more precise pre-corrected initial exposure pattern. Compared to traditional direct exposure processing, this method significantly improves the accuracy of the exposure process, reduces pattern size errors caused by scattering, ensures the final exposure pattern meets design requirements, and enhances the manufacturing precision and consistency of the device.

[0104] S304: Establish an optimization function with the objective of minimizing the deviation between the ideal exposure pattern and the pre-corrected initial exposure pattern, where the ideal exposure pattern is the exposure area pattern corresponding to the preset two-dimensional pattern.

[0105] The formula for the optimization function is as follows:

[0106]

[0107] in, Indicates the ideal exposure pattern. This indicates a pre-corrected initial exposure pattern. This indicates taking the minimum function value. , This indicates a convolution operation.

[0108] It should be noted that the established optimization function achieves precise exposure pattern optimization by minimizing the deviation between the ideal exposure pattern and the pre-corrected initial exposure pattern. By combining convolution operations with the electron beam scattering effect, the optimization function can dynamically adjust the exposure pattern, compensate for pattern errors caused by scattering, and thus more accurately control the pattern accuracy during the exposure process. This reduces errors caused by scattering and other physical effects, ensures high-precision pattern transfer, and improves device consistency and performance.

[0109] S305: Iteratively update the pre-corrected initial exposure pattern with the goal of minimizing the optimization function.

[0110] S306: Output the updated pre-corrected initial exposure pattern as the electron beam lithography region.

[0111] S307: Based on the obtained electron beam lithography area, rectangular gate slots, first source slots, and second source slots are formed on the insulating layer using electron beam lithography technology.

[0112] Specifically, by combining a proximity effect pre-compensation algorithm, electron beam lithography is used to precisely create rectangular gate and source slots on the insulating layer. First, the initial exposure pattern is determined based on a pre-defined two-dimensional pattern. Second, a double Gaussian model is established to simulate the distribution of electron beam scattering energy, thereby accurately calculating the error of the exposure pattern. Then, by correcting the initial exposure pattern and constructing an optimization function, the exposure pattern is iteratively updated to minimize the deviation between the ideal and actual patterns. Finally, electron beam lithography is performed using the corrected exposure pattern to precisely create the required structural patterns on the insulating layer, ensuring high precision and consistency of the device.

[0113] S4: Deposit comb-shaped gates in a rectangular gate and slot to form gate contacts.

[0114] S5: Deposit a multi-contact source electrode in the first source slot and the second source slot, and deposit a drain electrode to form source contacts and drain contacts, thus obtaining an epitaxial structure.

[0115] In one possible implementation, after S5, the following is also included:

[0116] Post-processing, including annealing, is performed on the epitaxial structure.

[0117] Understandably, annealing helps improve the interface quality between the metal and the GaN / AlGaN layer, reduce contact resistance, and improve device performance.

[0118] Specifically, the substrate is first chemically cleaned and passivated to ensure surface cleanliness and reduce defects. Then, a buffer layer, GaN thin film, AlGaN barrier layer, and insulating layer are sequentially grown on the substrate using metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) to ensure high-quality growth of each layer. Next, electron beam lithography combined with a proximity effect pre-compensation algorithm is used to optimize the exposure pattern through precise pattern correction steps, ultimately forming high-precision rectangular gate root slots and source slots. Following this, comb-shaped gates, multi-contact source and drain electrodes are deposited to form source and drain contacts. Finally, annealing improves the interface quality between the metal and the GaN / AlGaN layers, reduces contact resistance, and enhances device performance. This improves device stability and linearity, and also ensures accuracy in high-frequency, high-power applications.

[0119] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following:

[0120] In this embodiment of the invention, by designing a multi-contact source and adjusting the position of the source slot, the contact quality between the source and the two-dimensional electron gas layer is optimized, reducing the nonlinear variation of the source access resistance caused by poor contact or uneven current density, improving the stability of the source contact resistance, and reducing its nonlinear characteristics with current or voltage changes. Secondly, by employing multiple rectangular gate slots and optimizing the gate width and spacing based on the intrinsic transconductance constraints of the epitaxial structure, the stability of the device's transconductance is ensured, avoiding transconductance instability caused by source contact resistance fluctuations, and enhancing the device's linearity. Finally, the comb-shaped gate design allows the gate to control the two-dimensional electron gas from both sides of the channel, effectively reducing the impact of early electron mobility saturation and improving overall linearity. This not only improves the stability of the source access resistance and maintains transconductance stability but also improves signal linearity in high-frequency applications, effectively avoiding signal distortion and enhancing the performance of gallium nitride HEMTs in high-frequency, high-power applications, especially suitable for the low-noise, high-linearity, and high-power-efficiency requirements of 5G communications.

[0121] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the protection scope of the present invention.

Claims

1. An epitaxial structure of a gallium nitride thin film, characterized in that, include: Substrate, buffer layer, GaN thin film, AlGaN barrier layer, insulating layer, comb gate, multi-contact source and drain; The substrate, the buffer layer, the GaN thin film, the AlGaN barrier layer, and the insulating layer are stacked sequentially. A two-dimensional electron gas layer is formed in the GaN thin film; The insulating layer has multiple rectangular gate slots, a first source slot, and a second source slot. The height of the rectangular gate slots is greater than the first height from the two-dimensional electron gas layer to the insulating layer, and each of the rectangular gate slots is uniformly arranged in the lateral direction of the epitaxial structure. The bottoms of the first source slot and the second source slot both extend to the bottom of the AlGaN barrier layer. The comb-shaped gate has a plurality of rectangular gate roots that match each of the rectangular gate root slots. The bottom of the rectangular gate root slots extends below the two-dimensional electron gas layer to achieve multi-sided control of the two-dimensional electron gas. The width of each rectangular gate root and the spacing between adjacent rectangular gate roots in the longitudinal direction of the epitaxial structure are constrained by the actual intrinsic transconductance of the epitaxial structure. The multi-contact source electrode has a first contact pin and a second contact pin that match both the first source electrode slot and the second source electrode slot; When a conduction voltage is applied to the comb-shaped gate, the two-dimensional electron gas layer between the multi-contact source and the drain becomes conductive, forming a conductive channel.

2. The epitaxial structure of a gallium nitride thin film according to claim 1, wherein The method for determining the width of the rectangular grid and the spacing between adjacent rectangular grids specifically includes: Determine the preset fluctuation range of the actual intrinsic transconductance of the epitaxial structure; Determine the relationship between the width of the rectangular gate root and the spacing between adjacent rectangular gate roots and the source access resistance; Determine the fill ratio fluctuation range with respect to the width of the rectangular grid and the spacing between adjacent rectangular grids; Under the constraints of the preset fluctuation range and the fill ratio fluctuation range, with the goal of minimizing the source access resistance, the width of the rectangular gate root and the spacing between adjacent rectangular gate roots are solved.

3. The epitaxial structure of gallium nitride thin films of claim 1, wherein, The first source slot and the second source slot penetrate the epitaxial structure in the longitudinal direction of the epitaxial structure.

4. The epitaxial structure of claim 1 wherein the gallium nitride film is a single crystal film. The insulating layer is specifically a SiN insulating layer.

5. A method for preparing an epitaxial structure of a gallium nitride thin film, wherein the method prepares the epitaxial structure of the gallium nitride thin film as described in claim 1, characterized in that, include: S1: Prepare the substrate; S2: The buffer layer, the GaN thin film, the AlGaN barrier layer and the insulating layer are grown sequentially on the substrate; S3: Combining the proximity effect pre-compensation algorithm, each of the rectangular gate root slots, the first source slot and the second source slot are formed on the insulating layer by electron beam lithography; S4: Deposit the comb-shaped gate in the rectangular gate root slot to form a gate contact; S5: Deposit the multi-contact source electrode in the first source slot and the second source slot, and deposit the drain electrode to form source contact and drain contact, thereby obtaining the epitaxial structure.

6. The method of claim 5, wherein the substrate is heated to a temperature of about 800°C to about 1000°C. The substrate includes a Si substrate and a sapphire substrate; Following S1, it also includes: The substrate undergoes a pretreatment process including chemical cleaning and surface passivation.

7. The method of claim 5, wherein the substrate is heated to a temperature of about 800°C to about 1000°C. Specifically, S2 is: The buffer layer, the GaN thin film, the AlGaN barrier layer, and the insulating layer are sequentially grown on the substrate using metal-organic chemical vapor deposition or molecular beam epitaxy.

8. The method for preparing an epitaxial structure of a gallium nitride thin film according to claim 5, characterized in that, S3 specifically includes: S301: Determine the initial exposure pattern on the insulating layer during electron beam lithography based on the preset two-dimensional pattern, wherein the initial exposure pattern includes a rectangular gate slot pattern, a first source slot pattern, and a second source slot pattern; S302: Establish a double Gaussian model to simulate the electron beam scattering energy distribution of the electron beam lithography technology; S303: Combine the aforementioned double Gaussian model to pre-correct the initial exposure pattern, thereby obtaining the pre-corrected initial exposure pattern; S304: Establish an optimization function with the objective of minimizing the deviation between the ideal exposure pattern and the pre-corrected initial exposure pattern, wherein the ideal exposure pattern is the exposure area pattern corresponding to the preset two-dimensional pattern; S305: Iteratively update the pre-corrected initial exposure pattern with the goal of minimizing the optimization function; S306: Output the updated pre-corrected initial exposure pattern as the electron beam lithography region; S307: Based on the obtained electron beam lithography area, each of the rectangular gate slots, the first source slot, and the second source slot is formed on the insulating layer using the electron beam lithography technology.

9. The method of claim 8, wherein the substrate is heated to a temperature of about 800°C to about 1000°C. Specifically, S303 is: The initial exposure pattern is convolved with the double Gaussian model to obtain the pre-corrected initial exposure pattern.

10. The method of claim 5, wherein the substrate is heated to a temperature of about 800°C to about 1000°C. Following S5, it also includes: The epitaxial structure undergoes post-processing including annealing.

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