Wireless charging ground end anti-saturation PID control method and system

CN122001064BActive Publication Date: 2026-08-28GUANGDONG TITAN INTELLIGENT POWER CO LTD
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Patent Information

Application Number
CN202610450648.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-04-08
Publication Date
2026-08-28
Estimated Expiration
2046-04-08

AI Technical Summary

Technical Problem

但现有PI控制器不会主动“暂停”,反而持续运算和调整,既增加控制器负担,又引入不必要的控制噪声;6、归根结底,现有方案都是在积分项“出问题后”再补救,而非在不可靠反馈条件下主动避免无效积分

Benefits of technology

[0003] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and to provide a wireless charging ground terminal anti-saturation PID control method and system.

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Abstract

The application relates to the technical field of wireless charging and discloses a wireless charging ground terminal anti-saturation PID control method and system, which comprises the following steps: S1, acquiring a voltage error value Verr of a system in a current control period; S2, if the absolute value of the voltage error value Verr is greater than a first threshold value Vth and less than or equal to a second threshold value Voff, entering S3, otherwise, entering S4, wherein the second threshold value Voff is greater than the first threshold value Vth; S3, maintaining the controller output value of the current control period as the controller output value of the last control period and stopping the update of the integral control item; and S4, updating the control output value of the current control period based on the voltage error value Verr, performing proportional integral (PI) control operation to update the controller output value of the current control period. The application solves the problems of anti-saturation and safety of a wireless charging system power control loop in view of the high-delay feedback and resonance dynamic characteristics of the wireless charging system.
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Description

Technical Field

[0001] This invention relates to the field of wireless charging technology, and in particular to a method and system for anti-saturation PID control of the ground terminal in wireless charging. Background Technology

[0002] Currently, commonly used anti-integral saturation methods in industrial control (such as integral limiting, conditional integration, and inverse calculation) are effective in local closed-loop systems (such as motor drives and DC-DC power supplies), but they are clearly unsuitable for wireless charging systems with centralized ground control, mainly in the following aspects: 1. Ignoring error distortion caused by communication delay. These methods assume the error signal is real-time, but the voltage / current feedback received by the ground in wireless charging often lags by tens of milliseconds. Updating the integral term with the delayed error, even with limiting, may still accumulate in the wrong direction and saturate after long-term operation; 2. Still "blindly adjusting" in steady state. Even if the system has stabilized near the target value, traditional PI will still continuously fine-tune the output based on the delay error. This adjustment not only fails to improve accuracy but also causes the output to fluctuate around the steady-state point due to "outdated correction," affecting charging stability; 3. No ability to cope with long-term drift. Although the charging time for these wireless charging systems used in AGVs and industrial robots is usually only tens of minutes to an hour, the output current gradually decreases during the constant voltage stage of the charging process (especially when it is close to full charge), and the error signal amplitude is weak and changes slowly. During this stage, if the controller continues to adjust the PI based on feedback with communication delay, even if sensor zero drift, communication errors, or small load fluctuations only introduce a small one-way residual, the integral term may continue to accumulate and approach the limiting boundary within tens of minutes. 4. Slight disturbances during charging (such as vehicle position shift or contact impedance changes) will cause significant overshoot during recovery adjustment due to saturated integral terms, affecting charging accuracy and system stability. 5. Dynamic and steady-state performance are difficult to balance. Some solutions (such as inverse calculation) rely on output saturation to trigger integral correction, but wireless charging output is usually not saturated under normal operating conditions, causing the correction mechanism to fail. Excessive suppression of integrals weakens the system's response speed to real disturbances (such as coil shift). 6. The system's inherent steady-state holding capability is not utilized. The resonant cavity (LCC-SS or LCC-LCC) of resonant wireless charging has a certain "self-sustaining" characteristic near the steady-state operating point—the control quantity remains unchanged for a short time, and the output can still maintain stability. However, existing PI controllers do not actively "pause," but instead continue to calculate and adjust, increasing the controller's burden and introducing unnecessary control noise. 7. Ultimately, existing solutions only remedy problems after they occur in the integral term, rather than actively avoiding invalid integration under unreliable feedback conditions. For industrial wireless charging systems that emphasize long-term reliability and steady-state accuracy, this passive strategy is clearly insufficient. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and to provide a wireless charging ground terminal anti-saturation PID control method and system.

[0004] The technical solution of the present invention is as follows: On one hand, the present invention discloses a wireless charging ground terminal anti-saturation PID control method, which includes the following steps: S1. In the current control cycle, obtain the system voltage error value Verr; S2. If the absolute value of the voltage error value Verr is greater than the first threshold Vth and less than or equal to the second threshold Voff, then proceed to S3; otherwise, proceed to S4, wherein the second threshold Voff is greater than the first threshold Vth. S3. Maintain the controller output value of the current control cycle as the controller output value of the previous control cycle, and stop updating the integral control term; S4. Based on the voltage error value Verr, update the control output value of the current control cycle, and perform proportional-integral (PI) control calculation to update the controller output value of the current control cycle.

[0005] As can be seen from the above scheme, this invention transforms the judgment logic into efficient Boolean operations. This logic essentially consists of two comparisons and a logical "AND": the relevant threshold judgment is pre-completed in non-interrupted operation cycles, and the result is stored in the form of a status identifier; in time-sensitive execution environments such as interruptions or CLA, only the status identifier is read and the Boolean operation is performed, avoiding real-time numerical calculations. This operational logic effectively avoids complex numerical calculations, significantly reduces processing overhead within a single cycle, and ensures rapid response and stability of control. This invention can proactively pause PI calculations based on hysteresis error when the system enters a high-precision steady-state condition, maintaining the control output of the previous cycle unchanged and stopping the update of the integral term; when a significant disturbance is detected, it can promptly resume closed-loop regulation. This avoids the accumulation of invalid integrals due to communication delays at the source, effectively suppresses integral saturation after long-term operation and the resulting overshoot phenomenon, and improves the system's steady-state accuracy, dynamic robustness, and long-term operational reliability.

[0006] S2 includes the following steps: S2.1 In the microprocessor of the system, a first state identifier and a second state identifier are calculated based on the voltage error value Verr; S2.2 In the interrupt service routine of the system or in the control law accelerator independent of the microprocessor, read the first status identifier and the second status identifier, and perform a logical AND operation on the first status identifier and the second status identifier; In S2.1, the first state identifier is used to identify whether the absolute value of the voltage error value Verr is greater than the first threshold Vth, and the second state identifier is used to identify whether the absolute value of the voltage error value Verr is less than or equal to the second threshold Voff.

[0007] The steps of calculating the first and second state identifiers in S2.1 and obtaining the voltage error value Verr in S1 are both completed within the same cycle.

[0008] In S2.2, the control law accelerator task, triggered by a timer interrupt, is executed. The control law accelerator shares memory space with the microprocessor to exchange the first state identifier, the second state identifier, and the control output value.

[0009] S1 includes the following steps: S1.1. Collect the secondary side output voltage of the wireless charging system to obtain the actual output voltage value; S1.2. Obtain the voltage error value Verr according to the following formula; Verr = Vref - Vfb; Where Vref is the output voltage reference value and Vfb is the actual output voltage value.

[0010] On the other hand, the present invention discloses a wireless charging system using a wireless charging anti-saturation PID control method. The system includes a primary resonant cavity assembly, a primary inverter connected to the primary resonant cavity assembly, a secondary resonant cavity assembly, and a secondary receiver connected to the secondary resonant cavity assembly. The primary resonant cavity assembly and the secondary resonant cavity assembly are mutually inducted.

[0011] The primary-side inverter employs a phase-shifted full-bridge circuit, and the controller output value is the phase shift angle of the phase-shifted full-bridge. Attached Figure Description

[0012] Figure 1 This is a flowchart illustrating the present invention; Figure 2 This is a schematic diagram of a wireless charging system that applies anti-saturation control methods; Figure 3 This is a schematic diagram of the control logic of the power control circuit; Figure 4 This is a schematic diagram of the software process. Detailed Implementation

[0013] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0014] like Figures 1 to 4As shown, the present invention provides an anti-saturation PID control method for the ground end of wireless charging, which comprises the following steps: S1: In the current control cycle, acquire the voltage error value Verr of the system; S2: If the absolute value of the voltage error value Verr is greater than a first threshold Vth and less than or equal to a second threshold Voff, proceed to S3; otherwise, proceed to S4, wherein the second threshold Voff is greater than the first threshold Vth; S3: Maintain the controller output value of the current control cycle as the controller output value of the previous control cycle, and stop updating the integral control term; S4: Update the control output value of the current control cycle based on the voltage error value Verr, and execute proportional-integral PI control calculation to update the controller output value of the current control cycle.

[0015] In this embodiment, in S4, when performing conventional PID control, the voltage error value Verr is input into an anti-saturation PID controller, a control signal is generated through proportional, integral and differential calculations while integral saturation is suppressed, the control signal is input into a primary-side inverter to adjust primary-side power transmission, and a voltage feedback signal is updated in real time according to the adjustment result, so as to update the controller output value of the current control cycle and stabilize the output voltage at a set value.

[0016] The beneficial effects of the present invention are: 1. A control logic based on double-threshold judgment and output maintenance is introduced into a voltage control loop; 2. When the voltage error Verr of the current control cycle satisfies |Verr|>Vth (saturation threshold) and |Verr|≤Voff (cancellation threshold, where Voff>Vth), the controller maintains the output control value of the previous cycle (phase-shift angle φ or duty cycle D) and suspends updating, so as to avoid over-adjustment or oscillation caused by continuous accumulation of integral terms; 3. Decoupling numerical judgment from Boolean logic execution to realize forward shifting of computing load: 4. The double-threshold comparison operation is not performed in high-timeliness processes such as real-time interrupts or coprocessors (e.g., CLA), but is completed in advance in non-critical execution processes such as the main loop, and the judgment result is stored in the form of a Boolean flag bit; only the flag bit is read and a logical AND operation is executed in the interrupt or CLA task, thereby avoiding floating-point operations, absolute value function calls and complex conditional branches, and significantly reducing the computational overhead within a single control cycle; 5. The control logic is applicable to a variety of power conversion topologies and has topology independence for power conversion: 6. Regardless of whether the system adopts a phase-shifted full-bridge (output with phase shift angle φ∈[0,π]) or a Buck+ inverter structure (output with duty cycle D∈[0,100%]), the anti-saturation mechanism of this invention can be directly embedded in the voltage loop. Only the physical meaning and numerical range of the control quantity need to be adapted, without modifying the core logic. 7. Applicable to wireless charging systems with communication delay and resonant dynamic characteristics.

[0017] This invention employs two independent threshold comparisons, rather than direct numerical calculations for conditional judgment, because each control cycle is extremely short (typically only a few microseconds), demanding extremely high computational efficiency. In such real-time control systems, any additional arithmetic operations or function calls can introduce unacceptable latency. Within these microsecond-level control cycles, floating-point operations, function calls, and complex conditional expressions significantly increase the computational load and can even cause delays in control flow. For example, excessive interrupt time can stall software flow or affect the operation of the next interrupt.

[0018] S2 includes the following steps: S2.1 In the microprocessor of the system, a first state identifier and a second state identifier are calculated based on the voltage error value Verr; S2.2 In the interrupt service routine of the system or in the control law accelerator independent of the microprocessor, read the first status identifier and the second status identifier, and perform a logical AND operation on the first status identifier and the second status identifier; In S2.1, the first state identifier is used to identify whether the absolute value of the voltage error value Verr is greater than the first threshold, and the second state identifier is used to identify whether the absolute value of the voltage error value Verr is less than or equal to the second threshold Voff.

[0019] The steps of calculating the first and second state identifiers in S2.1 and obtaining the voltage error value Verr in S1 are both completed within the same cycle.

[0020] In S2.2, the control law accelerator task, triggered by a timer interrupt, is executed. The control law accelerator shares memory space with the microprocessor to exchange the first state identifier, the second state identifier, and the control output value.

[0021] S1 includes the following steps: S1.1. Collect the secondary side output voltage of the wireless charging system to obtain the actual output voltage value; S1.2. Obtain the voltage error value Verr according to the following formula; Verr = Vref - Vfb; Where Vref is the output voltage reference value and Vfb is the actual output voltage value.

[0022] On the other hand, the present invention discloses a system applying a wireless charging anti-saturation PID control method. The system is a wireless charging system, including a primary resonant cavity assembly, a primary inverter connected to the primary resonant cavity assembly, a secondary resonant cavity assembly, and a secondary receiver connected to the secondary resonant cavity assembly. The primary resonant cavity assembly and the secondary resonant cavity assembly are mutually inducted.

[0023] In this embodiment, the wireless charging anti-saturation PID control method is applied to the PID controller of the voltage closed-loop control loop, which is located in the control section of the primary-side inverter. The resonant cavity is a bilateral SS-type, bilateral LCC-type, or LCC-SS-type resonant network. When the resonant cavity is bilateral SS-type, the primary-side resonant cavity assembly and the secondary-side resonant cavity assembly adopt an SS-type resonant network; when the resonant cavity is bilateral LCC-type, the primary-side resonant cavity assembly and the secondary-side resonant cavity assembly adopt an LCC-type resonant cavity network; when the resonant cavity is LCC-SS-type, the primary-side resonant cavity assembly and the secondary-side resonant cavity assembly adopt an LCC-SS-type resonant network. However, the technical solution used at the secondary-side receiver is irrelevant to the implementation process of this invention, therefore, no limitation is placed on the form of the receiver.

[0024] The primary-side inverter employs a phase-shifted full-bridge circuit, and the controller output value is the phase shift angle of the phase-shifted full-bridge.

[0025] like Figure 2 As shown, the primary-side inverter is a primary-side inverter that can function like... Figure 2 Similarly, a phase-shifted full-bridge inverter is used as the primary-side inverter, and then the component is driven by phase-shifted full-bridge modulation. Alternatively, a buck converter can be added at the front end, and the inverter can be driven with a fully open phase shift angle or a larger phase shift angle. Figure 2 The definitions of the various components and symbols are as follows: V dp It is the inverter input voltage; U piILrp is the primary side midpoint voltage; Idp is the primary side resonant current; Sp1~Sp4 are the primary side inverter switching transistors 1~4; the primary side resonant cavity assembly and the secondary side resonant cavity assembly represent the above-mentioned double-sided SS, double-sided LCC, or LCC-SS resonant cavity types. M is mutual inductance; Lp is the self-inductance of the transmitting coil; Ls is the self-inductance of the receiving coil; Vds is the rectifier bridge output voltage; Usi is the secondary side midpoint voltage; ILrs is the secondary side resonant current; IRectify is the rectifier bridge current; Sp1~Sp4 are the secondary side rectifier bridge switching transistors 1~4; if passive rectification is used, this will be replaced by diodes or other types of devices; Cf is the secondary side filter capacitor; IOut is the output current; VOut is the output voltage.

[0026] This invention is applied to the power control loop of this system. For phase-shifted full-bridge modulation, the output control value is the "phase shift value φ". For a buck converter + inverter topology, the output control value is the "duty cycle D". There is no fundamental difference in the control method between the two. In engineering applications, it is necessary to distinguish their value ranges (the phase shift value is calculated in angles or radians, with a range of [0, π]; while the duty cycle is generally calculated as a percentage, with a range of [0, 100%]). In one embodiment, the present invention uses a DSP (model Haawking_DSC28035) from Beijing Haoxin as the ground controller of the wireless charging system. The algorithm mentioned in this invention is also implemented in this DSP.

[0027] like Figure 3 The power control logic shown is typically added to the voltage loop. In a power control loop module, the outer loop is usually used for voltage control, while the inner loop is used for current control. This control logic executes in the discrete-time domain and is usually triggered by periodic wake-up events from timer interrupts or coprocessors (such as CLA, Control Law Accelerator, which is a standalone 32-bit floating-point math hardware accelerator) at fixed time intervals. Its software flow diagram is shown below. Figure 3 As shown. When the system is running in steady state, if the voltage error Verr in the current control cycle ("one cycle") exceeds the preset saturation threshold Vth, the saturation threshold Vth is usually a relatively small value, which is 0.5V in this embodiment, but does not exceed the cancellation threshold Voff (i.e., Verr≤Voff, the cancellation threshold Voff is a larger value used to forcibly release the anti-saturation integral algorithm during dynamic processes, which is 3V in this embodiment), then the controller will maintain the output control value of the previous cycle and will not update it.

[0028] like Figure 4As shown, the method of using this invention involves forcibly waking up the Control Law Accelerator (CLA) via software in the interrupt event triggered by Timer T1. The logical judgments and PI calculations involved in the algorithm of this invention are all completed within the CLA process. This is because the interrupt event of the ground controller of the wireless charging system in this embodiment includes not only some logical judgment processes but also some SPI communication-related software processes. Since SPI is prone to problems when operating the RF module, such as the inability to determine the address and whether reception is complete, these algorithmic processes cannot be performed within the interrupt event.

[0029] In the CLA process invoked in this embodiment of the invention, since the software flow time is relatively short, the final calculated control value usually needs to be output before the interrupt event ends in order not to affect system operation. Furthermore, the CLA and CPU do not share storage space, so there are three types of values: "values ​​that can only be read from the CLA to the CPU," "values ​​that can only be read from the CPU to the CLA," and "values ​​that can only be read within the CLA." Therefore, careful construction of the algorithm process and data structure declarations within the CLA is crucial. Thus, this invention pre-calculates processes such as "numerical calculation of voltage error Verr" and "voltage error Verr exceeding the preset saturation threshold Vth," maintaining these status indicators as Boolean values. Within the CLA, only Boolean operations on the status indicators are performed, reserving valuable calculation time for more critical components such as the power loop's PI calculations and the phase-locked loop.

[0030] The procedure within the CLA in this embodiment of the invention is as follows: float u_duty_piout; Uint16 u_IdsSet, u_IdsRef; / / ============================================================================================================== Voltage loop ClaDataReg.u_piVds.ref=CpuToClaReg.u_VdsRef * 10; / / ================================================================================================================PI Calculation ClaDataReg.u_piVds.fed = CpuToClaReg.Vds; ClaDataReg.u_piVds.err = ClaDataReg.u_piVds.ref-ClaDataReg.u_piVds.fed; ClaDataReg.u_piVds.err = LIMIT(ClaDataReg.u_piVds.err,700,-700); / / -7~7 if(ABS(ClaDataReg.u_piVds.err)>100) { ClaDataReg.u_piVds.kp = 0.08; / / 0.12; / / 15.3V overshoot ClaDataReg.u_piVds.ki = 0.008; } else / / <1 { ClaDataReg.u_piVds.kp = 0.06; / / 0.08; / / 15.3V overshoot ClaDataReg.u_piVds.ki = 0.0006; } PiCal(&ClaDataReg.u_piVds); / / ============================================================================================================== Voltage loop / / ===============================================================================================================Current loop u_IdsRef = CpuToClaReg.u_IdsRef * 10; if(CpuToClaReg.u_IdsLimit==CurrentMAX) / / To prevent the voltage from being pulled down when the test CC is under full load due to an excessively large current sample, while also ensuring that the voltage can be properly reduced when a load reduction is needed. u_IdsSet=u_IdsRef; else u_IdsSet=MIN(u_IdsRef,CpuToClaReg.u_IdsLimit); / / Temperature ClaDataReg.u_piIdsCtrlClear = (ClaDataReg.u_piIds.ref != u_IdsSet); ClaDataReg.u_piIds.ref = u_IdsSet; / / = ClaDataReg.u_piIds.fed = CpuToClaReg.Ids; / / output current ClaDataReg.u_piIds.err=ClaDataReg.u_piIds.ref - ClaDataReg.u_piIds.fed; ClaDataReg.u_piIds.err=LIMIT(ClaDataReg.u_piIds.err,700,-700); / / -7~7 if(ClaDataReg.u_piIds.fed < 200) { ClaDataReg.u_piIds.kp = 0.05; ClaDataReg.u_piIds.ki = 0.005; } else { if(ABS(ClaDataReg.u_piIds.err)>600) { ClaDataReg.u_piIds.kp = 0.08; ClaDataReg.u_piIds.ki = 0.007; } else if(ABS(ClaDataReg.u_piIds.err)>400) { ClaDataReg.u_piIds.kp = 0.07; ClaDataReg.u_piIds.ki = 0.005; } else if( ABS(ClaDataReg.u_piIds.err)>100 ) { ClaDataReg.u_piIds.kp = 0.06; ClaDataReg.u_piIds.ki = 0.004; } else if(ABS(ClaDataReg.u_piIds.err)>50) { ClaDataReg.u_piIds.kp = 0.03; ClaDataReg.u_piIds.ki = 0.003; } else { ClaDataReg.u_piIds.kp = 0.03; ClaDataReg.u_piIds.ki = 0.0002; } } if(ABS(ClaDataReg.u_piIds.err) <= 5) ClaDataReg.u_piIdsCtrl = 1; if(ClaDataReg.u_piIdsCtrlClear) ClaDataReg.u_piIdsCtrl = 0; if(ClaDataReg.u_piIdsCtrl) { if(ABS(ClaDataReg.u_piIds.err) > 30) ClaDataReg.u_piIdsCtrl = 0; else ClaDataReg.u_piIds.errLast = ClaDataReg.u_piIds.err; } else PiCal(&ClaDataReg.u_piIds); / / ==============================================================================================================Current loop if( ClaDataReg.u_piIds.piout > ClaDataReg.u_piVds.piout ) { ClaDataReg.u_piIds.ioutMax = MIN(ClaDataReg.u_piVds.piout + 30,1000); / / <=1 ClaDataReg.u_piIds.pioutMax = MIN(ClaDataReg.u_piVds.piout + 50,1000); / / <=1 ClaDataReg.u_piVds.ioutMax = 1000; ClaDataReg.u_piVds.pioutMax = 1000; } else { ClaDataReg.u_piVds.ioutMax = MIN(ClaDataReg.u_piIds.piout + 30,1000); / / <=1 ClaDataReg.u_piVds.pioutMax = MIN(ClaDataReg.u_piIds.piout + 50,1000); / / <=1 ClaDataReg.u_piIds.ioutMax = 1000; ClaDataReg.u_piIds.pioutMax = 1000; } u_duty_piout = MIN(ClaDataReg.u_piIds.piout,ClaDataReg.u_piVds.piout); ClaDataReg.duty_set = u_duty_piout; The first part of the code sets different values ​​for the pi parameter for different error ranges. The middle part is the execution... Figure 2 The mentioned anti-saturation algorithm's logical process involves calling the function for pi calculation, and finally, operations within fixed upper and lower limits of the integral value.

[0031] The function called for the Pi operation is as follows: / / ################################################################################### / / -------------------------------------Function Definition------------------------------------- / ************************************************************************************ @Function: void PiCal(PI_REGS* pi) @Input: Pointer to the PI structure @Output: None @Description: PI calculation ************************************************************************************ / / / ################################################################################### void PiCal(PI_REGS* pi) { pi->iout = pi->ioutLast + pi->ki * pi->errLast; if (pi->iout > pi->ioutMax) pi->iout = pi->ioutMax; if (pi->iout < pi->ioutMin) pi->iout = pi->ioutMin; pi->piout = pi->kp * pi->err + pi->iout; if(pi->piout > pi->pioutMax){ pi->piout = pi->pioutMax; } if (pi->piout < pi->pioutMin){ pi->piout = pi->pioutMin; } / * Update the previous value * / pi->errLast = pi->err; pi->ioutLast = pi->iout; } The above describes a common discrete process for interpolation-based pi calculation. In this example, the output duty cycle is used as the control value. If it needs to be changed to the output phase shift angle, only the range needs to be modified; the control logic and trend of change are almost identical in both cases.

[0032] Compared with existing technologies, the present invention has the following significant advantages and positive effects when applied to the power control loop of a wireless charging system, typically in the outer voltage loop: 1. Effectively suppresses steady-state oscillations and overshoot caused by integral saturation, while avoiding the failure of traditional anti-saturation methods in high-latency systems. Existing anti-saturation strategies such as "reverse calculation" or "conditional integration" perform well in conventional power electronic systems, but have serious limitations in wireless charging scenarios: on the one hand, the system relies on wireless communication to obtain feedback information from the receiver, resulting in unpredictable communication delays; on the other hand, the resonant topology itself has strong nonlinearity and phase sensitivity characteristics. In this context, "reverse calculation" induces continuous output voltage oscillations because the integral correction cannot be synchronized with the time-varying operating conditions; while "conditional integration," although it can limit the integral growth, leads to an unavoidable static error in steady state. If this error manifests as a continuously high output voltage, it can easily cause overcharging risks in battery charging applications, threatening safety and lifespan. This invention abandons the direct correction of the integral term and instead maintains the control output within a specific small error range, cleverly utilizing the energy maintenance capability of the resonant cavity itself to achieve natural steady state, thus avoiding oscillations and eliminating static deviations.

[0033] 2. Significantly reduces the computational burden within the real-time control cycle, meeting the stringent timing requirements of microsecond-level interrupt response. Floating-point operations or function calls are avoided in high-priority interrupts or CLAs; instead, numerical comparisons are performed in non-critical paths, and the results are cached as Boolean status indicators. In a real-time control cycle, only two register reads and one logical AND operation are required to determine whether to maintain the control value from the previous cycle. This design completely avoids time-consuming operations such as floating-point calculations, comparisons, and branch jumps, significantly compressing the CLA task execution time. It ensures that all control calculations are completed and the phase shift angle φ or duty cycle D is output within microseconds, thereby guaranteeing the determinism of PWM updates and preventing stagnation or loss of the next cycle due to interrupt timeouts.

[0034] 3. High versatility, adaptable to various power conversion topologies, requiring only adjustment of the physical meaning and value range of the control variables. The core logic of this invention does not depend on the specific modulation method. Whether it is a phase-shifted full-bridge topology (output is the phase shift angle φ, value range [0,π]) or a Buck+ inverter structure (output is the duty cycle D, value range [0,100%]), the control essence is single-variable regulation, and the anti-saturation mechanism of this invention can be seamlessly embedded in the voltage loop. This topology independence greatly enhances the engineering reuse value of the solution.

[0035] 4. Improves the long-term reliability of the system and the safety of battery charging. By preventing continuous high voltage output due to integral saturation, this invention reduces the possibility of overcharging the battery during the constant voltage stage, making it particularly suitable for unattended wireless charging scenarios (such as electric vehicles and consumer electronics).

[0036] The traditional anti-saturation method of "reverse calculation" may become oscillatory in such high-latency application environments. Due to irregular delays and other factors, the traditional anti-saturation scheme correctly reduces the integral value in each frame. This leads to significant voltage ripple in the wireless charging system during steady-state output.

[0037] The use of conditional integration in wireless charging systems introduces static errors that cannot be eliminated over extended periods of operation. Maintaining a high output voltage for an extended period during battery charging can lead to overcharging.

[0038] This invention utilizes the characteristics of the resonant cavity used in wireless charging systems, as well as the fact that such systems need to obtain control information from the receiving end via wireless communication. By maintaining the control value of the previous step within a small error value, the system maintains stability and eliminates integral errors through the characteristics of the resonant cavity itself.

[0039] In summary, this invention proposes a lightweight, robust, and low-overhead anti-integral saturation control logic to address the unique high-delay feedback and resonant dynamic characteristics of wireless charging systems. This not only solves the adaptability problem of traditional methods in this scenario but also achieves synergistic optimization in terms of real-time performance, stability, and security, demonstrating outstanding substantive features and significant progress.

[0040] Finally, it should be emphasized that the above description is not intended to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A wireless charging ground terminal anti-saturation PID control method, characterized in that, The method includes the following steps: S1. In the current control cycle, obtain the system voltage error value Verr; S2. If the absolute value of the voltage error value Verr is greater than the first threshold Vth and less than or equal to the second threshold Voff, then proceed to S3; otherwise, proceed to S4, wherein the second threshold Voff is greater than the first threshold Vth. S3. Maintain the controller output value of the current control cycle as the controller output value of the previous control cycle, and stop updating the integral control term; S4. Update the control output value of the current control cycle based on the voltage error value Verr, and perform proportional-integral (PI) control calculation to update the controller output value of the current control cycle. S2 includes the following steps: S2.1 In the microprocessor of the system, a first state identifier and a second state identifier are calculated based on the voltage error value Verr; S2.2 In the interrupt service routine of the system or in the control law accelerator independent of the microprocessor, read the first status identifier and the second status identifier, and perform a logical AND operation on the first status identifier and the second status identifier; In S2.1, the first state identifier is used to identify whether the absolute value of the voltage error value Verr is greater than the first threshold Vth, and the second state identifier is used to identify whether the absolute value of the voltage error value Verr is less than or equal to the second threshold Voff.

2. The wireless charging ground terminal anti-saturation PID control method according to claim 1, characterized in that, The steps of calculating the first and second state identifiers in S2.1 and obtaining the voltage error value Verr in S1 are both completed within the same cycle.

3. The wireless charging ground terminal anti-saturation PID control method according to claim 2, characterized in that, In S2.2, the control law accelerator task, triggered by a timer interrupt, is executed. The control law accelerator shares memory space with the microprocessor to exchange the first state identifier, the second state identifier, and the control output value.

4. The wireless charging ground terminal anti-saturation PID control method according to claim 3, characterized in that, S1 includes the following steps: S1.

1. Collect the secondary side output voltage of the wireless charging system to obtain the actual output voltage value; S1.

2. Obtain the voltage error value Verr according to the following formula; Verr = Vref - Vfb; Where Vref is the output voltage reference value and Vfb is the actual output voltage value.

5. A wireless charging system employing the anti-saturation PID control method for wireless charging ground terminals according to any one of claims 1-4, characterized in that: The system includes a primary-side resonant cavity assembly, a primary-side inverter connected to the primary-side resonant cavity assembly, a secondary-side resonant cavity assembly, and a secondary-side receiver connected to the secondary-side resonant cavity assembly, wherein the primary-side resonant cavity assembly and the secondary-side resonant cavity assembly are mutually inducted.

6. The wireless charging system according to claim 5, characterized in that: The primary-side inverter employs a phase-shifted full-bridge circuit, and the controller output value is the phase shift angle of the phase-shifted full-bridge.

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