Analog circuit system block diagram component connection detection method

Abstract

This invention discloses a method for detecting component connections in an analog circuit system block diagram, comprising: acquiring and preprocessing the analog circuit system block diagram to be detected; inputting the preprocessed block diagram into a pre-trained component block detection model to obtain the category and location of circuit components in the block diagram, as well as the location information of wires, wire arrows, wire intersections, and text interference areas; using the location information of the wire arrows, wire intersections, and text interference areas to obtain and clean up candidate binary images of wires, then executing a skeletonization algorithm to connect gaps, obtaining the final wire skeleton diagram, and finally using path tracing to obtain a connection relationship table of circuit components. This invention significantly reduces manual annotation costs, improves the automation and accuracy of component detection and connection analysis, and provides an efficient and reliable technical solution for the intelligent analysis of analog circuit system block diagrams.

Description

Technical Field

[0001] This invention belongs to the field of electronic design automation technology, specifically a method for detecting the connection of components in an analog circuit system block diagram. Background Technology

[0002] In the field of Electronic Design Automation (EDA), analog circuit system block diagrams are crucial for describing circuit structure and signal flow. With the comprehensive digitization of technical documentation, the challenge of automatically and accurately identifying components and their connections from massive amounts of image-formatted block diagrams to support automated circuit analysis, simulation, and retrieval has become a key technical hurdle hindering further advancements in EDA. Currently, the interpretation of such block diagrams still heavily relies on manual analysis, which is not only inefficient but also susceptible to errors due to subjective factors, making it difficult to meet the demands of large-scale applications in complex engineering scenarios.

[0003] In existing research, one mainstream approach relies on rule-driven geometric feature analysis, such as edge detection, contour extraction, and morphological operations to locate component boxes and connections. However, these methods are extremely vulnerable in complex situations involving inconsistent drawing standards, overlapping text, and intersecting or overlapping lines. Their core rules are often set by human experience, making it difficult to cover the diverse deformations in real engineering drawings. This leads to a significant drop in detection accuracy when components are highly dense or when special connection symbols such as dashed lines and arrows are present. Another approach attempts to introduce traditional machine learning models, but these typically still rely on manual feature design, resulting in limited model expressive power and generalization performance, making it difficult to grasp the overall topological structure and semantic relationships of the diagram.

[0004] In summary, existing technologies face three main bottlenecks when processing block diagrams of analog circuit systems: First, insufficient perception capability. Traditional computer vision algorithms struggle to reliably distinguish functional component boxes from interfering elements such as text labels, legends, and shadows in complex backgrounds, easily leading to missed detections and false detections. Second, fragile connection relationship analysis. Connection tracing methods based on low-level pixel features are highly susceptible to text occlusion, line intersections, and noise interference, making it difficult to reliably reconstruct the logical connections between components. Third, insufficient overall integration. Existing methods generally treat component detection and connection analysis separately, lacking an end-to-end collaborative modeling mechanism. This causes errors to accumulate at each stage of the process, significantly weakening the overall parsing effect.

[0005] Therefore, there is an urgent need for an automated detection method that can deeply integrate image features and semantic information and has both strong generalization and robustness. Summary of the Invention

[0006] The purpose of this invention is to address the problems in the existing technology, such as the difficulty in automatically detecting component blocks in analog circuit system block diagrams, the low accuracy in identifying connecting elements such as wires and arrows, and the reliance on manual interpretation of the connection relationships between components. This invention provides a new method and system for detecting the connection relationships of components in analog circuit system block diagrams, enabling automatic and high-precision analysis of components and their connection relationships in the block diagram, significantly reducing the workload of manual annotation and inspection, and improving the intelligent processing capabilities of circuit documentation.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] In a first aspect, the present invention provides a method for detecting the connection of components in an analog circuit system block diagram, comprising the following steps:

[0009] Obtain the block diagram of the analog circuit system to be tested and perform preprocessing;

[0010] The preprocessed analog circuit system block diagram is input into the pre-trained component box detection model to obtain the output result. The component box detection model includes a component detection module and a connection element detection module. The component detection module is used to detect and output the category and position of the circuit components in the analog circuit system block diagram. The connection element detection module is used to detect and output the position information of wires, wire arrows, wire intersections and text interference areas in the analog circuit system block diagram.

[0011] Using the positional information of the conductor arrows, conductor intersections, and text interference areas, corresponding masks are generated and merged to obtain an interference mask; based on the conductor width, a thick or thin line enhancement strategy is selected, and candidate binary images of the conductors are segmented; the interference mask is then used for purification operations.

[0012] The skeletonization algorithm is performed on the cleaned candidate binary graph of the conductor. In the vicinity of the text interference region, the covered skeleton is connected by interpolation and shortest path search strategy to obtain the final conductor skeleton graph.

[0013] Path tracing is performed on the final skeleton diagram to obtain a table of connection relationships for the circuit components;

[0014] Table showing the categories, locations, and connections of output circuit components.

[0015] Furthermore, the training steps of the pre-trained component box detection model include:

[0016] The original sample image is obtained, and the document structure is extracted by combining MSER-based text candidate region extraction, Canny edge detection and morphological dilation. The Otsu threshold segmentation is combined to extract the contour and calculate the geometric features to select the initial candidate component boxes.

[0017] The initial candidate component boxes are automatically scored and manually corrected to construct an initial set of golden labels.

[0018] A batch training and incremental annotation strategy is adopted to train the YOLO object detection model using the initial golden annotation set. After each batch of training, some unlabeled images are extracted and inference is performed using the current model. The inference results are manually corrected and fed back to the training set for iterative fine-tuning until the model converges.

[0019] Furthermore, the step of selecting a thick or thin wire enhancement strategy based on the wire width specifically includes:

[0020] The component location information output by the component detection module is used to generate a component mask to remove the component region from the image;

[0021] Perform pixel-level width statistics on the image after removing component regions, and calculate the average width of connected pixels;

[0022] When the average width is greater than a preset threshold, it is determined to be a coarse line image, and an enhancement strategy combining grayscale stretching and morphological erosion is adopted; when the average width is less than or equal to the preset threshold, it is determined to be a thin line image, and an enhancement strategy combining guided filtering and morphological dilation is adopted.

[0023] Furthermore, the step of using interpolation and shortest path search strategies to bridge gaps in the covered skeleton near the text interference region specifically includes:

[0024] When the skeletonization algorithm reaches the mask edge of the text interference region and the skeleton is interrupted, the tangent direction vector at the interruption point is recorded.

[0025] On the opposite side edge of the text interference area mask, search for potential skeleton connection points along the extension region of the tangent direction vector; if a connection point that satisfies the direction consistency constraint is found, establish a virtual connection path between the interruption point and the connection point to complete the gap bridging.

[0026] Furthermore, the path tracing employs breadth-first search (BFS), specifically:

[0027] An index grid is created outside the component's boundary. The pixels in the skeleton diagram are traversed. If a skeleton pixel is adjacent to the component's box boundary and is not within the text interference area, the point is marked as the component's connection entry and exit point.

[0028] Starting from the aforementioned connection entry and exit points, perform a breadth-first search (BFS).

[0029] The BFS search terminates the current path when it encounters any of the following conditions:

[0030] 1) The path reaches the boundary of another component box;

[0031] 2) The path enters the candidate area of ​​the guide arrow;

[0032] 3) The path length exceeds the preset limit;

[0033] For a path with component boxes as endpoints, if there is a wire arrow on the path, the input or output direction of the starting and ending components is determined according to the direction of the arrow; if there is no arrow on the path, the direction is determined according to the position of the path in the component box enclosure relationship and the number of paths in the same direction.

[0034] Furthermore, the connection table is obtained in the following way:

[0035] The system counts the cumulative number of contacts between each component pair in each direction, determines whether there is a valid connection between the circuit components based on a preset contact number threshold, and finally generates and outputs a list containing valid connected circuit component pairs and their connection directions.

[0036] In a second aspect, the present invention provides an analog circuit system block diagram component connection detection system for implementing the above method, comprising:

[0037] The image acquisition module is used to acquire block diagram images of analog circuit systems and perform preprocessing.

[0038] The component bounding box detection model is used to perform target detection on the preprocessed image through the component detection module and the connection element detection module, and outputs the category and position of circuit components, as well as the position information of wires, wire arrows, wire intersections and text interference areas.

[0039] The skeletonization module is used to generate a skeleton diagram of connected wires;

[0040] The connection analysis module is used to perform path search on the skeleton diagram to obtain a connection relationship table of circuit components;

[0041] The results output module is used to output a table showing the categories, locations, and connection relationships of circuit components.

[0042] Thirdly, the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to perform the method described thereon.

[0043] Fourthly, the present invention provides a computing device, including a memory and a processor, wherein the memory stores executable code, and the processor executes the executable code to implement the method described above.

[0044] Compared with the prior art, the present invention has the following beneficial effects:

[0045] This invention constructs a component box detection model to detect components and connecting elements separately, avoiding mutual interference between single multi-objective models when there are small targets and large differences in categories; it uses text detection results as an interference mask in the skeletonization and path search process to effectively prevent text strokes from damaging the wire structure, and achieves robust processing of complex annotations, circuit description texts and legends.

[0046] This invention employs a conductor extraction process that combines adaptive linewidth enhancement, morphological operations, and skeletonization, supplemented by a gap bridging strategy and a connectivity-based BFS path search mechanism. This approach maintains the continuity of the conductor skeleton even in the presence of intersections, bends, dashed lines, and local breaks, significantly improving the completeness and accuracy of the reconstructed connection paths.

[0047] This invention introduces strategies such as directional history constraints, dynamic main direction selection at intersections, and direction-aware jumps in text regions into path tracing. It combines arrow direction with component encirclement rules to perform multi-source information fusion judgment, making the determination of input / output relationships between components more reliable. It can automatically generate high-quality component connection topologies, providing efficient and reliable basic data for the automatic analysis, simulation modeling, and intelligent retrieval of analog circuit system block diagrams.

[0048] In summary, this invention achieves end-to-end automatic detection and parsing of block diagram components and connections in analog circuit systems, significantly improving the processing efficiency and intelligence level of image format block diagrams in the EDA process, and has broad engineering application value. Attached Figure Description

[0049] To more clearly illustrate the technical solution of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0050] Figure 1 : Overall flowchart of the block diagram component connection detection method for analog circuit systems based on deep learning.

[0051] Figure 2 : Schematic diagram of component frame detection process.

[0052] Figure 3 : Schematic diagram of the core processing of connection relationship analysis.

[0053] Figure 4 Example of a block diagram for a coarse-coded analog circuit system.

[0054] Figure 5 Training monitoring curves during the fine-tuning process of the YOLO model.

[0055] Figure 6 Training results of YOLO model for detecting bounding boxes, points, text, and arrows.

[0056] Figure 7 Example diagram of block diagram components and connection relationships for detecting analog circuit systems.

[0057] Figure 8 : A schematic diagram of breadth-first search (BFS) on the skeleton.

[0058] Figure 9 A schematic diagram showing the conversion of the analog circuit area into a single-pixel-wide skeleton. Detailed Implementation

[0059] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the embodiments described herein are for illustrative purposes only and are not intended to limit the scope of protection of the present invention. For those skilled in the art, equivalent substitutions or improvements made without departing from the concept of the present invention should fall within the scope of protection of the present invention.

[0060] like Figure 1 As shown in the figure, this embodiment provides a method for detecting the connection of analog circuit system block diagram components based on deep learning. The overall process includes the following steps:

[0061] S1: Obtain the block diagram image of the analog circuit system and perform coarse detection and automatic scoring of the component boxes to construct the initial golden label set of the component boxes;

[0062] S2: The component box detection model is trained based on the golden annotation set, and the model is optimized by batch training and incremental annotation strategy;

[0063] S3: Detect the connecting elements in the image to obtain the positional information of wire arrows, wire intersections, and text regions;

[0064] S4: Preprocess and skeletonize the image to generate a uniform wire skeleton diagram;

[0065] S5: Perform path tracing on the skeleton graph based on a breadth-first search strategy, combine the connection element detection results with component position information, identify the connection relationships between components, and output a list of connection relationships.

[0066] like Figure 2 As shown, step S1 can be further subdivided into the following sub-steps:

[0067] S101: Image preprocessing and document border positioning.

[0068] The block diagram image of the analog circuit system to be detected is acquired, and the image is processed by size normalization, grayscale conversion, and noise filtering. Canny edge detection is used to extract the image edges, and morphological dilation and closing operations are used to enhance edge connectivity. Connectivity analysis and boundary filtering operators are used to retain only the large connected regions connected to the image edges, thereby obtaining the document physical border mask. The area outside the border is then cropped.

[0069] Canny edge detection specifically includes:

[0070]

[0071]

[0072]

[0073]

[0074] in, This represents the original grayscale image as input. Indicates The two-dimensional Gaussian blur kernel with standard deviation; This represents the output image after Gaussian smoothing and denoising. This represents the gradient component in the x-direction (horizontal). This represents the gradient component in the y-direction (vertical); Indicates the gradient magnitude; Indicates the gradient direction; This represents the final binarized edge image; This indicates a double-threshold hysteresis connection; Indicates a high threshold; This indicates a low threshold.

[0075] The specifics of expansion and border positioning are as follows:

[0076]

[0077]

[0078]

[0079] in, Represents the edge graph The result after expansion; Represents the structuring element used for the expansion operation; A function representation of the expansion operation with B as the structuring element; It means that you thought Morphological closing operation of structuring elements; This represents a more complete and coherent candidate bounding box region mask obtained after the closing operation; This represents a filtering operator whose function is to select from... Only those elements that are adjacent to the image boundary are retained. Connected regions; This indicates the final physical border area of ​​the document.

[0080] S102: Extraction of candidate text regions.

[0081] MSER (Mean Stable Extreme Value Detection) is performed on the cropped grayscale image to obtain multiple candidate connected regions. For each region, statistics such as the bounding rectangle height, aspect ratio, convex hull solidity, and bounding box fill rate are calculated. The text scale interval is determined using the height mean and standard deviation. Atypical text blocks are eliminated based on aspect ratio and solidity constraints, while masks of suspected text regions are retained. The stability and geometric features of the extracted text can be calculated using the following formula.

[0082] Specifically, the MSER algorithm is used to extract candidate text regions from the grayscale image. The text scale is estimated based on height statistics, and a mask is selected by combining aspect ratio and solidity to retain typical printed text regions, as shown below:

[0083]

[0084]

[0085]

[0086]

[0087]

[0088]

[0089]

[0090] in: This represents the connected regions extracted when the grayscale threshold is t-Δ. : This represents the connected region extracted when the grayscale threshold is t+Δ, where Δ is the preset grayscale change step size; Represents the pixel area of ​​region Rt; MSR represents the stability of the region, which measures the relative magnitude of the area change before and after the grayscale change; N represents the number of candidate regions currently participating in the statistics. This represents the height of the bounding rectangle of the i-th region; This represents the average height of all candidate regions; The standard deviation of height, Indicates the aspect ratio; Indicates the solidity of the convex hull. This represents the actual pixel area of ​​the i-th candidate connected region. This represents the area of ​​the convex hull of the i-th candidate connected region; The value indicates the fill rate of the outer frame; the three indicators Hi, Ai, and Si correspond to the three constraints of height, aspect ratio, and solidity, respectively.

[0091] S103: Component candidate contour extraction and shape classification.

[0092] The image after removing the text mask is segmented using Otsu's global thresholding algorithm to obtain a binary image. Morphological opening is then performed on the binary image to remove isolated noise. All closed contours are extracted using a contour tracking algorithm. For each contour, geometric features such as area, perimeter, minimum bounding rectangle, aspect ratio, rectangularity, and circularity are calculated, and the contours are sorted by area. Based on these geometric features, the contours are classified into predefined shapes such as rectangles, triangles, or circles, and their potential as component boxes is determined by considering line width and fill rate.

[0093] Specifically, Otsu thresholding and morphological opening operations are performed on the grayscale image to extract the contour and calculate its geometric features, and the candidate regions are classified as rectangles, triangles or circles.

[0094] Otsu thresholding (global thresholding) includes:

[0095] 1. Gray-level histogram and probability

[0096]

[0097]

[0098]

[0099] total

[0100]

[0101] in, Indicates the number of gray levels (usually 256); N represents the total number of pixels total = |Ω|; Represents the pixel count for grayscale k; This represents the probability of grayscale value k. This represents the global grayscale mean.

[0102] 2. Cumulative distribution and class mean

[0103]

[0104]

[0105]

[0106]

[0107] in, , These represent the probability quality of the foreground or background at threshold t, respectively. , This represents the average gray level of the two classes.

[0108] 3. Inter-class variance and optimal threshold

[0109]

[0110]

[0111] in, Represents the inter-class variance (Otsu's maximization objective); This represents the Otsu's optimal threshold. x represents the parameter that maximizes the objective.

[0112] 4. Binarization

[0113]

[0114] in, This represents the binary mask (thresholding result).

[0115] The morphological opening operation is represented as:

[0116]

[0117] in, This represents the result of performing an opening operation on B.

[0118] Based on area sorting, and combined with the number of child frames, line width and fill rate rules for verification, non-component areas are eliminated, and true component candidate frames are retained.

[0119] S104: Container frame and non-component area culling.

[0120] For rectangular candidate boxes obtained from shape classification, the number of sub-boxes contained within them, the degree of overlap with other candidate boxes, and whether they touch the image boundary are counted. Image-level features such as the Gini coefficient and containerization index of the candidate box area distribution are also calculated. If the candidate box area is too large, contains a large number of other candidate boxes, or is attached to the image boundary, it is identified as a document container box or title box and is removed. Only candidate component boxes with appropriate size and reasonable internal structure are retained.

[0121] S105: Automated scoring and sorting.

[0122] For each remaining candidate box, metrics such as boundary closure, minimum coverage of four sides, ring ratio, text ratio, area, and number of touchpoints are calculated. These metrics are then weighted and combined using preset weights to obtain a comprehensive score. High-scoring candidate boxes are characterized by intact boundaries, hollow interiors or minimal text, and limited overlap with other boxes. Candidate boxes with severe overlap, solid filling, or suspected text backgrounds are penalized.

[0123] Specifically, for each candidate box, calculate its boundary closure, minimum coverage of four sides, ring ratio, text ratio, area, and number of touch edges;

[0124] At the image level, the overlap rate of candidate boxes, the presence of large container boxes, and the Gini coefficient of area distribution are statistically analyzed.

[0125] The overlap rate is expressed as:

[0126]

[0127]

[0128]

[0129] in, This represents the i-th candidate box (axis-aligned rectangle); This represents the overlap rate of candidate box i; Indicates the image-level overlap rate; This represents the intersection-union ratio (IU / UU) of candidate boxes i and j; The threshold for classifying IoU as "significantly overlapping"; Let S represent the area of ​​set S.

[0130] The existence of a large container frame is represented as follows:

[0131]

[0132]

[0133]

[0134]

[0135] in, Indicates will Shrink the inner bounding box by ε pixels on each side (to avoid misjudgment due to boundary adhesion); This indicates that the index is included; if it falls completely, then... It is 1 if it is true, otherwise it is 0; This indicates the proportion of other boxes contained in candidate box i; Indicates all The maximum value; This indicates whether a large container box exists (1 indicates that it exists); 1 represents the container threshold; 1{·} is the indicator function.

[0136] Gini coefficient of area distribution Represented as:

[0137]

[0138]

[0139]

[0140] The overall score for each candidate box i is represented as:

[0141]

[0142]

[0143]

[0144] in, Indicates the basic weight; , express When changes occur, weights and The magnitude or intensity of the resulting change; This represents the area of ​​the i-th frame; This indicates the total number of candidate boxes included in the statistics; This represents the i-th area value after sorting by area in ascending order; This represents the average area of ​​all candidate boxes; The reference Gini is 0.5 in this embodiment. This represents the amplification factor for the containerization penalty when a container frame exists. (Effective when =1).

[0145] The above features are weighted and combined to obtain a comprehensive score, and the candidate boxes are sorted and filtered based on the score.

[0146] The final block diagram of the coarse-scaled analog circuit system obtained from the above steps is as follows: Figure 4 As shown.

[0147] S106: Construction of the initial gold annotation set.

[0148] Candidate bounding boxes are sorted based on their overall scores. Several images with the highest scores are automatically selected as high-quality samples. The positions and categories of these bounding boxes are then manually checked and slightly corrected to obtain the initial set of golden annotations for the bounding boxes. For example... Figure 5 The diagram shows batch training and incremental annotation. Based on a batch of data (n=200), n / 4 (approximately 50 samples) are sampled from it for this round of model fine-tuning. train / box_loss is the bounding box regression loss on the training set, measuring the difference between the model's predicted bounding box positions and the ground truth labeled boxes. val / box_loss is the bounding box regression loss on the validation set. As can be seen from the figure, both curves show a continuous decreasing trend and gradually converge. This indicates that the model is effectively learning how to more accurately locate targets, and there is no significant discrepancy between the training loss and the validation loss, indicating no overfitting and a healthy training process. The stable decrease in loss shows that through incremental annotation and fine-tuning, the model's ability to predict component box positions is continuously improving. Metrics / precision(B) represents the object detection precision calculated on the validation set, i.e., the proportion of true objects within the bounding boxes predicted by the model. It shows that the precision curve starts at a relatively low level, rises rapidly with training, and eventually stabilizes at a high level close to 1.0. This indicates that after fine-tuning, the model's false positive rate is significantly reduced, and the prediction results become very reliable. Through the aforementioned training strategy, the final component box detection model can highly accurately identify components in the image, rarely misclassifying non-component regions as components. Metrics / mAP50(B) represents the average precision at an Intersection over Union (IoU) threshold of 0.5, where mAP50 is the most crucial comprehensive performance metric in object detection. It considers both precision and recall. The curve starts from a low value and climbs rapidly with training, eventually reaching an excellent level close to 1.0. A high mAP50 means that the model not only has high accuracy but also high coverage (high recall), that is, it can find most of the true components in the graph while ensuring that the found components are basically correct. It proves that the complete pipeline from coarse annotation to the golden annotation set and then to incremental training is very effective.

[0149] Step S2 specifically includes:

[0150] S201: Initial model training.

[0151] Using the gold annotation set obtained in step S106 as training data, a target detection network based on YOLOv8n is constructed. The component box category is used as the detection category. The center point coordinates, width and height and category label of the component box are encoded. The standard target detection loss function is used for training to obtain the initial component box detection model.

[0152] S202: Batch Sample Inference and Error Analysis.

[0153] A large number of unlabeled bounding box images are input into the initial model in batches for inference to obtain the component bounding box prediction results for each image. For each batch of images, a portion of the samples are extracted for manual review based on indicators such as model confidence, number of candidate boxes, and image complexity.

[0154] S203: Manual Incremental Labeling and Golden Set Expansion.

[0155] In the extracted samples, the component boxes predicted by the model are manually added, deleted, modified and corrected. Missed components are labeled, falsely detected components are deleted, and boxes with incorrect categories are corrected. The corrected labeling results are incorporated into the golden label set.

[0156] S204: Model fine-tuning and iterative convergence.

[0157] Retrain or fine-tune the YOLOv8n model on the expanded gold annotation set and update the model parameters; repeat steps S202 to S204 until the detection accuracy on the validation set reaches the preset threshold or converges to obtain the final component box detection model.

[0158] Through the above-described cyclic incremental annotation and model fine-tuning strategy, this embodiment can obtain a high-quality and robust component box detection model with low labor costs.

[0159] like Figure 3 As shown, steps S3 and S4 can be specifically implemented as follows:

[0160] S301: Connectivity element training and detection.

[0161] Based on a manually labeled dataset, four independent YOLO object detection models were constructed, using component boxes, wire arrows, wire intersections, and text regions as detection categories. After training, the four models were invoked on the image to be detected to perform inference, obtaining the location information of component boxes, wire arrow candidate boxes, intersection candidate boxes, and text interference regions. Figure 6As shown, Component Detect: The curve starts close to (0, 1.0) and quickly rises to a precision and recall close to 1.0, remaining high throughout (very close to the top right corner). Dot Detect: The curve also starts high and converges quickly, exhibiting excellent overall performance, very close to the level of component detection. Text Detect: The curve shows good overall performance, but slightly lower than component and dot detection. Precision and recall eventually stabilize at a high level, but there are some fluctuations in the initial stage. Arrow Detect: This is the model with the most significant curve fluctuations among the four. Although it eventually achieves good precision and recall, its stability during training is not as good as the other models. Figure 6 This demonstrates the use of multiple dedicated YOLO models to handle different tasks, resulting in highly targeted and effective performance on their respective key tasks. This collaboration forms a powerful joint detection capability, and these high-performance models form the cornerstone of the entire automated detection process. The precise component, intersection, arrow, and text location information they provide enables accurate execution of subsequent skeletonization, intelligent path tracing, and connection relationship determination, ultimately achieving the patented benefit of "significantly improving the automation and accuracy of component detection and connection analysis." The text region is subsequently used to mark interference areas that may lead to connection interruptions.

[0162] Example diagram of analog circuit system block diagram components and connection relationships detection. Figure 7 As shown.

[0163] S302: Linewidth adaptive enhancement and conductor region segmentation.

[0164] The intersections of the conductors, arrows, and text regions are masked and merged. Based on the statistical results of the conductor width in the image, a thick or thin line enhancement strategy is selected. Gray-scale stretching or guided filtering is performed on the area near the conductors to improve the contrast of the wire mesh. Subsequently, the enhanced image is segmented by fusion of adaptive thresholding and Otsu thresholding to obtain a binary image of the conductor candidates. Then, broken line segments are connected by morphological closing operations, and minimum connected component filtering is performed to remove isolated noise points and small pseudo-lines.

[0165] Specifically, the enhancement strategy selection includes: after scaling the image to 1500px wide, determining whether the median width of the lines is less than or equal to 2 pixels. If it is greater than 2 pixels, it is a thick line, and the thick line enhancement strategy is selected; if it is less than or equal to 2 pixels, it is a thin line, and the thin line enhancement strategy is selected.

[0166] S303: Skeletonization and notch bridging.

[0167] A thinning / skeletonization algorithm is applied to the purified binary region of the conductor to obtain a conductor skeleton diagram with uniform linewidth; for example... Figure 9 As shown, based on the detection results of wire intersections, the connectivity of the local skeleton is repaired. In the vicinity of the text region, interpolation and shortest path search strategies are used to bridge the gaps in the covered skeleton, so that the overall skeleton structure maintains global connectivity as much as possible, and the final skeleton diagram is obtained.

[0168] S401: Component entrance / exit positioning.

[0169] For each component box, a narrow search region is constructed along its outer edge. Skeleton pixels are traversed within this region. If a skeleton pixel is adjacent to the component box boundary and is not within the text interference region, the point is marked as the component's connection entry / exit point. An anchor point index table from the component to the skeleton is then established for subsequent path searches.

[0170] S402: Breadth-first search path tracing.

[0171] Using each entry / exit point as a starting node, perform an independent breadth-first search on the skeleton graph. For example... Figure 8 During the search process, the direction of travel in the most recent steps is recorded as the direction history. When the intersection is reached or there are multiple candidate directions, the branch that is most consistent with the direction history is selected first to keep the path smooth and avoid frequent backtracking.

[0172] S403: Path termination and validity judgment.

[0173] The BFS search terminates the current path when it encounters any of the following conditions:

[0174] 1) The path reaches the boundary of another component box;

[0175] 2) The path enters the candidate area of ​​the guide arrow;

[0176] 3) The path length exceeds the preset limit or the connectivity is significantly weakened.

[0177] For a path with component box to component box as the endpoint, if there is a wire arrow on the path, the input / output direction of the starting and ending components is determined according to the direction of the arrow; if there is no arrow on the path, a comprehensive judgment is made based on the position of the path in the component box enclosure relationship and the number of paths in the same direction.

[0178] S404: Generate a list of connection relationships.

[0179] For any two component boxes, count the number of valid paths from component A to component B obtained in step S403; when the number is greater than the preset touch threshold, it is determined that there is a valid physical connection between A and B, and its direction attribute is recorded; traversing all component pairs, the complete component connection topology can be obtained and output in the form of a structured list.

[0180] Through the above embodiments, the present invention can not only automatically identify the position and category of component boxes in analog circuit system block diagrams, but also stably restore the true connection relationship between components in cases of complex text obscuring, wire crossing, and local breakage, greatly reducing the workload of manual interpretation and verification.

[0181] In this embodiment, the deep learning-based analog circuit system block diagram component connection detection system provided by the present invention may include: an image acquisition module, a component detection module, a connection element detection module, a skeletonization processing module, a connection analysis module, and a result output module. The functions of each module correspond to the processing flow of steps S1 to S5 in the aforementioned embodiments, and will not be repeated here. The modules in the system can be deployed in software form on the same computing device, or they can be deployed in a distributed manner on multiple servers, communicating and collaborating via a network.

[0182] To verify the effectiveness of the method of the present invention, the analog circuit was tested under the experimental environment shown in Table 1, and the results are shown in Table 2.

[0183] Table 1 Experimental Environment of the Analog Circuit System Block Diagram Component Connection Detection Method Proposed in This Invention

[0184] category Configuration operating system Linux CPU Intel(R) Xeon(R) Gold 6348 CPU @ 2.6GHz GPU NVIDIA GeForce RTX 4090 RAM 500GB Pytorch 3.9.21 Pytorch Geometric 2.6.1

[0185] Table 2

[0186] mass distribution range Test set 1* Test set 2* Test set 3* Score [0.0-0.1) 0 (0.0%) 0 (0.0%) 0 (0.0%) [0.1-0.2) 0 (0.0%) 0 (0.0%) 0 (0.0%) [0.2-0.3) 0 (0.0%) 0 (0.0%) 0 (0.0%) [0.3-0.4) 0 (0.0%) 0 (0.0%) 0 (0.0%) [0.4-0.5) 0 (0.0%) 0 (0.0%) 0 (0.0%) [0.5-0.6) 0 (0.0%) 2 (1.0%) 5 (2.5%) [0.6-0.7) 0 (0.0%) 8 (4.0%) 15 (7.5%) [0.7-0.8) 0 (0.0%) 30 (15.0%) 40 (20.0%) [0.8-0.9) 2 (1.0%) 70 (35.0%) 80 (40.0%) [0.9-1.0) 198 (99%) 90 (45.0%) 60 (30.0%) total 200 200 200 average 0.997 0.885 0.855 0.9208

[0187] *Note: Test set 1 represents a "simple, high-quality test set," typically corresponding to circuit diagrams generated directly by a computer with clean backgrounds and clear lines. Test sets 2 and 3 represent "difficult" or "low-quality (e.g., scanned / hand-drawn)" test sets, typically corresponding to circuit diagrams with noise, blurriness, scanned images, or hand-drawn styles.

[0188] The above embodiments do not constitute a limitation of the present invention. Any modifications, equivalent substitutions and improvements made by those skilled in the art within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method of analog circuit system block diagram component connection detection, the method comprising: Includes the following steps: Obtain the block diagram of the analog circuit system to be tested and perform preprocessing; The preprocessed analog circuit system block diagram is input into the pre-trained component box detection model to obtain the output result. The component box detection model includes a component detection module and a connection element detection module. The component detection module is used to detect and output the category and position of the circuit components in the analog circuit system block diagram. The connection element detection module is used to detect and output the position information of wires, wire arrows, wire intersections and text interference areas in the analog circuit system block diagram. Using the positional information of the conductor arrows, conductor intersections, and text interference areas, corresponding masks are generated and merged to obtain an interference mask; based on the conductor width, a thick or thin line enhancement strategy is selected, and candidate binary images of the conductors are segmented; the interference mask is then used for purification operations. The skeletonization algorithm is performed on the cleaned candidate binary graph of the conductor. In the vicinity of the text interference region, the covered skeleton is connected by interpolation and shortest path search strategy to obtain the final conductor skeleton graph. The method of using interpolation and shortest path search strategies to bridge gaps in the covered skeleton near the text interference region specifically includes: when the skeletonization algorithm reaches the mask edge of the text interference region and the skeleton is interrupted, recording the tangent direction vector at the interruption point; searching for potential skeleton continuation points along the extension region of the tangent direction vector on the opposite side edge of the mask of the text interference region; if a continuation point that satisfies the direction consistency constraint is found, establishing a virtual connection path between the interruption point and the continuation point to complete the gap bridging; Path tracing is performed on the final skeleton graph to obtain a connection table of circuit components; the path tracing uses a breadth-first search, specifically: An index grid is created outside the component's boundary. The pixels in the skeleton diagram are traversed. If a skeleton pixel is adjacent to the component's box boundary and is not within the text interference area, the point is marked as the component's connection entry and exit point. Starting from the aforementioned connecting entrance and exit, perform a breadth-first search; The breadth-first search terminates the current path if it encounters any of the following conditions: 1) The path reaches the boundary of another component box; 2) The path enters the candidate area of ​​the guide arrow; 3) The path length exceeds the preset limit; For a path with component box to component box as the endpoint, if there is a wire arrow on the path, the input or output direction of the starting and ending components is determined according to the direction of the arrow; if there is no arrow on the path, the direction is determined according to the position of the path in the component box enclosure relationship and the number of paths in the same direction. Table showing the categories, locations, and connections of output circuit components.

2. The analog circuitry block diagram component connection detection method of claim 1, wherein, The training steps for the pre-trained component box detection model include: The original sample image is obtained, and the document structure is extracted by combining text candidate region extraction, edge detection and morphological dilation. The contour is extracted by combining Otsu threshold segmentation and geometric features are calculated to select the initial candidate component boxes. The initial candidate component boxes are automatically scored and manually corrected to construct an initial set of golden labels. A batch training and incremental annotation strategy is adopted to train the YOLO object detection model using the initial golden annotation set. After each batch of training, some unlabeled images are extracted and inference is performed using the current model. The inference results are manually corrected and fed back to the training set for iterative fine-tuning until the model converges.

3. The analog circuit schematic component connection detection method of claim 1, wherein, The selection of a thick or thin wire enhancement strategy based on the wire width specifically includes: The component location information output by the component detection module is used to generate a component mask to remove the component region from the image; The image after removing component regions is statistically analyzed at the pixel level, and the average width of connected pixels is calculated. When the average width is greater than a preset threshold, it is determined to be a coarse line image, and an enhancement strategy combining grayscale stretching and morphological erosion is adopted. When the average width is less than or equal to the preset threshold, it is determined to be a thin line image, and an enhancement strategy combining guided filtering and morphological dilation is adopted.

4. The method for detecting the connection of analog circuit system block diagram components according to claim 1, characterized in that, The connection table is obtained in the following way: The system counts the cumulative number of contacts between each component pair in each direction, determines whether there is a valid connection between the circuit components based on a preset contact number threshold, and finally generates and outputs a list containing valid connected circuit component pairs and their connection directions.

5. An analog circuitry block assembly connection detection system implementing the method of any one of claims 1-4, characterized by include: The image acquisition module is used to acquire block diagram images of analog circuit systems and perform preprocessing. The component bounding box detection model is used to perform target detection on the preprocessed image through the component detection module and the connection element detection module, and outputs the category and position of circuit components, as well as the position information of wires, wire arrows, wire intersections and text interference areas. The skeletonization module is used to generate a skeleton diagram of connected wires; The connection analysis module is used to perform path search on the skeleton diagram to obtain a connection relationship table of circuit components; The results output module is used to output a table showing the categories, locations, and connection relationships of circuit components.

6. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed in a computer, causes the computer to perform the method as described in any one of claims 1-4.

7. A computing device, comprising: The method includes a memory and a processor, wherein the memory stores executable code, and the processor executes the executable code to implement the method as described in any one of claims 1-4.

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