Manufacturing method of glass substrate, glass substrate and packaging structure
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-04-15
- Publication Date
- 2026-08-14
AI Technical Summary
[0005]基于此,有必要针对玻璃基板难以产业化制备的技术问题,提供一种玻璃基板的制作方法、玻璃基板及封装结构
[0048]上述实施例提供的玻璃基板的制作方法中,先对玻璃芯板上通孔的第二通孔部进行填充,在通孔中段的第二通孔部中形成第二导电部,之后再分别在第一通孔部和第三通孔部中形成第一导电部和第三导电部,这样先制作第二导电部,且制作第二导电部的过程中,第一通孔部和第三通孔部中还没有形成导电材料,第一通孔部和第三通孔部保持畅通,不会影响电镀溶液向第二通孔部的流动交换,可以在第二通孔部内形成桥连封闭的第二导电部,保证第二导电部的电性能和长期可靠性。
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Figure CN122028746B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to methods for manufacturing glass substrates, glass substrates, and packaging structures. Background Technology
[0002] With the development of technologies such as high-performance computing, artificial intelligence, and 5G communication, semiconductor chips are evolving towards higher integration, higher computing speed, higher power density, and smaller size. The requirements for the substrate that carries the chips and provides electrical interconnection and mechanical support are also constantly increasing.
[0003] Traditional substrates primarily use organic substrates, but their performance in terms of flatness, fine circuitry, and signal transmission speed no longer meets the requirements for substrates. Glass substrates, due to their superior physical, chemical, and electrical properties, are considered a viable alternative to organic substrates and a suitable substrate for next-generation advanced packaging.
[0004] However, the difficulty in industrializing the production of glass substrates has limited their large-scale application. Summary of the Invention
[0005] Therefore, it is necessary to provide a method for manufacturing glass substrates, as well as a glass substrate and its packaging structure, to address the technical problem of the difficulty in industrializing the production of glass substrates.
[0006] In a first aspect, this application provides a method for manufacturing a glass substrate, the method comprising the following steps:
[0007] A glass core board is provided, and a through hole is formed through the glass core board along the thickness direction of the glass core board. The through hole includes a first through hole portion, a second through hole portion and a third through hole portion arranged along its own axial direction. The second through hole portion is connected between the first through hole portion and the third through hole portion.
[0008] A second conductive portion is formed in the second through-hole portion;
[0009] A first conductive portion is formed in the first through-hole portion, and the first conductive portion is connected to the side of the second conductive portion facing the first through-hole portion; a third conductive portion is formed in the third through-hole portion, and the third conductive portion is connected to the side of the second conductive portion facing the third through-hole portion.
[0010] In some embodiments, the step of forming a second conductive portion in the second through-hole portion includes:
[0011] A seed layer is formed at least on the inner wall of the through hole, the seed layer including a second seed layer covering the inner wall of the second through hole portion;
[0012] The second conductive portion is electroplated, and the second conductive portion grows on the surface of the second seed layer and fills the space formed by the second seed layer enclosing the second through hole.
[0013] In some embodiments, the seed layer further includes a first seed layer and a third seed layer respectively covering the inner wall of the first through-hole and the inner wall of the third through-hole, and the step of forming the seed layer at least on the inner wall of the through-hole further includes the following steps:
[0014] A buffer layer is formed within the space enclosed by the seed layers in the through hole. The buffer layer covers the first seed layer and the third seed layer, and exposes the second seed layer.
[0015] Optionally, the height of the second seed layer along the thickness direction of the glass core plate is 10um-20um.
[0016] In some embodiments, the diameters of the first through-hole and the third through-hole are both larger than the diameter of the second through-hole; the step of forming a buffer layer within the space enclosed by the seed layer in the through-hole includes:
[0017] The space enclosed by the seed layer within the through hole is filled with a buffer material.
[0018] A through hole is made through the buffer material along the axial direction of the through hole to expose the second seed layer, while the remaining buffer material covers the first seed layer and the third seed layer to form the buffer layer;
[0019] Optionally, in the direction from the first through hole to the third through hole, the diameter of the first through hole gradually decreases; in the direction from the third through hole to the first through hole, the diameter of the third through hole gradually decreases.
[0020] Optionally, in the direction from the first through hole to the second through hole, the diameter of the second through hole gradually decreases and then gradually increases; the maximum diameter of the second through hole facing the first through hole is the same as the minimum diameter of the first through hole, and the maximum diameter of the second through hole facing the third through hole is the same as the minimum diameter of the third through hole.
[0021] Optionally, the through-hole is configured as an hourglass shape.
[0022] In some embodiments, the step of etching the buffer material to create a through-hole along the axial direction of the through-hole includes:
[0023] A first via is etched into the buffer material within the first through-hole portion, and the remaining buffer material within the first through-hole portion covers the first seed layer and forms a first buffer layer.
[0024] A third via is etched into the buffer material within the third through-hole portion, and the remaining buffer material within the third through-hole portion covers the third seed layer and forms a third buffer layer.
[0025] A second via is etched into the buffer material within the second through-hole portion, the buffer material within the second through-hole portion is removed and the second seed layer is exposed, and the second via connects the first via and the third via to form the via, and the first buffer layer and the third buffer layer are combined to form the buffer layer;
[0026] Optionally, the second via overlaps with the space formed by the second seed layer enclosing the second through-hole portion;
[0027] Optionally, the diameter of the first via is greater than the minimum diameter of the through hole and less than the maximum diameter of the through hole, and the diameter of the second via is greater than the minimum diameter of the through hole and less than the maximum diameter of the through hole;
[0028] Optionally, the ratio of the diameter of the first via to the minimum diameter of the through hole is 1.05-1.15; the ratio of the diameter of the second via to the minimum diameter of the through hole is 1.05-1.15.
[0029] Optionally, the diameter of the first via is equal to the diameter of the second via.
[0030] In some embodiments, the steps of forming a first conductive portion in the first through-hole portion and forming a third conductive portion in the third through-hole portion include:
[0031] The first conductive portion is electroplated, and the first conductive portion is grown from the surface of the second conductive portion facing the first via and fills the first via.
[0032] The third conductive portion is electroplated, and the third conductive portion is grown from the surface of the second conductive portion facing the third via and fills the third via.
[0033] Secondly, this application provides a glass substrate, comprising:
[0034] A glass core board, wherein a through hole is formed through the glass core board along its own thickness direction, the through hole including a first through hole portion, a second through hole portion and a third through hole portion arranged along its own axial direction, the second through hole portion connecting the first through hole portion and the third through hole portion;
[0035] A conductive structure includes a first conductive portion, a second conductive portion, and a third conductive portion. The second conductive portion is filled in a second through-hole portion. The first conductive portion is connected to the side of the second conductive portion facing the first through-hole portion and is located in the first through-hole portion. The third conductive portion is connected to the side of the second conductive portion facing the second through-hole portion and is located in the third through-hole portion.
[0036] In some embodiments, the glass substrate further includes a seed layer, the seed layer including at least a second seed layer covering the inner wall of the second through hole;
[0037] The second conductive portion is formed by electroplating the second seed layer, and the second conductive portion fills the space enclosed by the second seed layer in the second through hole portion. The first conductive portion is formed by electroplating the surface of the second conductive portion facing the first through hole portion, and the third conductive portion is formed by electroplating the surface of the second conductive portion facing the third through hole portion.
[0038] Optionally, the height of the second seed layer along the thickness direction of the glass core plate is 10µm-20µm;
[0039] Optionally, the diameters of the first through hole and the third through hole are both larger than the diameter of the second through hole; the diameter of the first through hole gradually decreases in the direction from the first through hole to the third through hole; and the diameter of the third through hole gradually decreases in the direction from the third through hole to the first through hole.
[0040] Optionally, in the direction from the first through hole to the third through hole, the diameter of the second through hole gradually decreases and then gradually increases; the maximum diameter of the second through hole facing the end of the first through hole is the same as the minimum diameter of the first through hole, and the maximum diameter of the second through hole facing the end of the third through hole is the same as the minimum diameter of the third through hole.
[0041] Optionally, the through-hole is configured as an hourglass shape.
[0042] In one embodiment, the seed layer further includes a first seed layer and a third seed layer that respectively cover the inner wall of the first through-hole portion and the inner wall of the third through-hole portion, and the glass substrate further includes a buffer layer that covers the first seed layer and the third seed layer, and the second seed layer is exposed relative to the buffer layer;
[0043] The buffer layer includes a first buffer layer and a third buffer layer that respectively cover the first seed layer and the third seed layer. The first buffer layer forms a first via within the first through-hole portion, and the first conductive portion fills the first via. The third buffer layer forms a third via within the third through-hole portion, and the third conductive portion fills the third via.
[0044] Optionally, the diameter of the first via is greater than the minimum diameter of the through hole and less than the maximum diameter of the through hole, and the diameter of the third via is greater than the minimum diameter of the through hole and less than the maximum diameter of the through hole;
[0045] Optionally, the ratio of the diameter of the first via to the minimum diameter of the through hole is 1.05-1.15; the ratio of the diameter of the third via to the minimum diameter of the through hole is 1.05-1.15.
[0046] Optionally, the diameter of the first via is equal to the diameter of the third via.
[0047] Thirdly, this application provides a packaging structure, including a glass substrate formed by the above-described glass substrate manufacturing method, or including the above-described glass substrate.
[0048] In the glass substrate manufacturing method provided in the above embodiments, the second through-hole portion of the through-hole on the glass core board is first filled, and a second conductive portion is formed in the second through-hole portion in the middle section of the through-hole. Then, the first conductive portion and the third conductive portion are formed in the first through-hole portion and the third through-hole portion respectively. In this way, the second conductive portion is manufactured first, and during the manufacturing process of the second conductive portion, conductive material has not yet been formed in the first through-hole portion and the third through-hole portion. The first through-hole portion and the third through-hole portion remain unobstructed, which will not affect the flow and exchange of electroplating solution to the second through-hole portion. A bridged and closed second conductive portion can be formed in the second through-hole portion, ensuring the electrical performance and long-term reliability of the second conductive portion.
[0049] Subsequently, after the second conductive portion is formed, the first and third conductive portions are formed on both sides of the second conductive portion along its axial direction to complete the filling of the through-hole. In this way, by fabricating the second conductive portion first and then the first and third conductive portions, voids and gaps in the second conductive portion are prevented, the fabrication difficulty of the second conductive portion within the through-hole is reduced, the electrical performance and long-term reliability of the glass substrate are guaranteed, and the industrial-scale preparation and large-scale application of the glass substrate are promoted. Attached Figure Description
[0050] Figure 1 This is a schematic flowchart of a method for manufacturing a glass substrate according to an embodiment of this application;
[0051] Figure 2 This is a cross-sectional schematic diagram of a glass substrate in one embodiment of this application;
[0052] Figure 3 This is a schematic diagram of the structure of the glass core plate in one embodiment of this application;
[0053] Figure 4 This is a schematic diagram of the first intermediate process in a method for manufacturing a glass substrate according to an embodiment of this application;
[0054] Figure 5 This is a schematic diagram of the second intermediate process in a method for manufacturing a glass substrate according to an embodiment of this application;
[0055] Figure 6 This is a schematic diagram of the third intermediate process in a glass substrate manufacturing method according to an embodiment of this application;
[0056] Figure 7 This is a schematic diagram of the fourth intermediate process in a glass substrate fabrication method according to an embodiment of this application;
[0057] Figure 8 This is a schematic diagram of the fifth intermediate process in a glass substrate fabrication method according to an embodiment of this application;
[0058] Figure 9 This is a schematic diagram of the sixth intermediate process in the glass substrate manufacturing method of one embodiment of this application;
[0059] Figure 10 This is a schematic diagram of the seventh intermediate process in the method for manufacturing a glass substrate according to an embodiment of this application.
[0060] Reference numerals: 100, glass substrate; 10, glass core board; 11, through hole; 112, first through hole portion; 114, second through hole portion; 116, third through hole portion; 12, first surface; 14, second surface; 30, conductive structure; 32, first conductive portion; 34, second conductive portion; 36, third conductive portion; 50, seed layer; 52, first seed layer; 54, second seed layer; 56, third seed layer; 60, buffer material; 70, buffer layer; 72, first buffer layer; 74, third buffer layer; 76, via; 761, first via; 763, second via; 765, third via; 82, first redistribution layer; 821, first insulating layer; 823, first conductive pattern 823; 84, second redistribution layer; 841, second insulating layer; 843, second conductive pattern 843. Detailed Implementation
[0061] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.
[0062] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0063] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0064] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0065] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0066] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.
[0067] As described in the background section, organic substrates are mainly made of organic materials (such as epoxy resin, polyimide, etc.). Organic substrates have low surface flatness and high roughness, limiting the manufacturing of fine circuits with linewidths below 10μm. Furthermore, organic substrates have high dielectric constants (Dk) and dielectric losses (Df), resulting in significant signal transmission delay losses, making it difficult to meet the demands of high-frequency and high-speed applications. Moreover, the coefficient of thermal expansion (CTE) of organic substrates differs greatly from that of silicon chips, easily leading to warping, stress concentration, and other problems due to thermal mismatch, affecting packaging reliability and yield.
[0068] Glass substrates possess characteristics such as high surface flatness, adjustable coefficient of thermal expansion, and extremely low dielectric constant and dielectric loss, meeting the requirements of carrier substrates and holding promise as a replacement for organic substrates, supporting next-generation advanced packaging. The high surface flatness of glass substrates facilitates micron-level or even submicron-level fine circuit processing, enabling ultra-high-density wiring. The extremely low dielectric constant and dielectric loss of glass substrates are beneficial for high-speed, low-latency signal transmission, improving signal transmission speed and integrity. Furthermore, by adjusting the glass composition, the coefficient of thermal expansion of the glass substrate can be made close to that of silicon chips, thereby significantly reducing thermal mismatch stress. They also possess good chemical and dimensional stability, resisting environmental corrosion and providing better protection for the chip.
[0069] Glass substrates require through-glass vias (TGVs) to be formed and filled with metal to achieve three-dimensional vertical interconnection and electrical connection. Generally, electroplating is used to fill the TGVs with metal, with the metal material growing and depositing from the sidewalls towards the center. However, the metal material grows and deposits faster at the top and bottom sections near the opening, easily achieving radial bridging and closure first. In the middle section, because it is farther from the opening, the metal material grows and deposits more slowly. The metal material that bridges and closes the middle section first can easily block the middle section, making it difficult for the electroplating solution to exchange with the middle section. Bridging and closing the metal material in the middle section is also difficult, and voids or gaps are likely to exist in the filled metal material, increasing interconnect resistance and severely affecting the electrical performance and long-term reliability of the glass substrate.
[0070] Therefore, TGV filling remains a challenge for the industry, especially the bridging of the middle section of glass through-holes, which still faces mass production difficulties, making it difficult to industrialize the preparation of glass substrates and restricting the large-scale application of glass substrates.
[0071] Firstly, such as Figure 1 As shown, this exemplary embodiment provides a method for manufacturing a glass substrate, including the following steps:
[0072] Step S100, as follows Figures 2-3 As shown, a glass core plate 10 is provided, and a through hole 11 is formed in the glass core plate 10 along the thickness direction of the glass core plate 10. The through hole 11 includes a first through hole portion 112, a second through hole portion 114 and a third through hole portion 116 arranged along its own axial direction. The second through hole portion 114 is connected between the first through hole portion 112 and the third through hole portion 116, that is, the second through hole portion 114 is located in the middle section of the through hole 11. The first through hole portion 112 and the third through hole portion 116 are respectively close to the openings at both ends of the through hole 11.
[0073] According to some embodiments of this application, the diameters of the first through-hole portion 112 and the third through-hole portion 116 are both larger than the diameter of the second through-hole portion 114. That is, the diameter of the second through-hole portion 114 is smaller, while the diameters at both ends of the through-hole 11 where the first through-hole portion 112 and the third through-hole portion 116 are located are larger. Thus, the through-hole 11 is thinner in the middle and thicker at both ends, and the diameter of the second through-hole portion 114 in the middle section is even smaller, making it easier to electroplate a radially upwardly bridging and closed second conductive portion 34 to prevent the formation of holes and gaps within the second conductive portion 34.
[0074] Optionally, in the direction from the first through hole 112 to the third through hole 116, the diameter of the first through hole 112 gradually decreases; in the direction from the third through hole 116 to the first through hole 112, the diameter of the third through hole 116 gradually decreases. That is, the diameters of both the first through hole 112 and the second through hole 114 gradually decrease in the direction close to the second through hole 114, so that the diameters of both the first through hole 112 and the third through hole 116 gradually decrease to mate with the second through hole 114.
[0075] Optionally, in the direction from the first through-hole 112 to the third through-hole 116, the diameter of the second through-hole 114 gradually decreases and then gradually increases, that is, the diameter of the second through-hole 114 first decreases and then increases, with the smallest diameter in the middle section of the second through-hole 114. The maximum diameter of the end of the second through-hole 114 facing the first through-hole 112 is the same as the minimum diameter of the first through-hole 112, so that the diameters at the connection between the second through-hole 114 and the first through-hole 112 are the same, and the second through-hole 114 and the first through-hole 112 transition smoothly; the maximum diameter of the end of the second through-hole 114 facing the third through-hole 116 is the same as the minimum diameter of the third through-hole 116, so that the diameters at the connection between the second through-hole 114 and the third through-hole 116 are the same, and the second through-hole 114 and the third through-hole 116 transition smoothly. For example, the through-hole 11 is constructed in an hourglass shape, and the cross-section of the through-hole 11 is "X" shaped.
[0076] Understandably, in some other embodiments, the through hole 11 may also be constructed in other shapes, such as the second through hole portion 114 being constructed as a straight hole, and the diameters of the first through hole portion 112 and the third through hole portion 116 gradually decreasing in the direction close to the second through hole portion 114, which is not limited here.
[0077] Step S300, as follows Figure 7 As shown, the second conductive portion 34 is formed in the second through-hole portion 114. That is, the second conductive portion 34 is first formed in the middle section of the through-hole 11. At this time, the first through-hole portion 112 and the third through-hole portion 116 have not yet formed conductive material, and the first through-hole portion 112 and the third through-hole portion 116 remain unobstructed, which will not affect the effective bridging and sealing of the second conductive portion 34. For example, the second conductive portion 34 is formed by electroplating. During the electroplating process of the second conductive portion 34, the first through-hole portion 112 and the third through-hole portion 116 remain unobstructed, allowing the electroplating solution to flow fully into the second through-hole portion 114 without affecting the electroplating reaction in the second through-hole portion 114. The second conductive portion 34 can be effectively electroplated and bridged. The forming process of the second conductive portion 34 is simplified, which facilitates industrial-scale preparation.
[0078] Step S500, as follows Figure 8As shown, a first conductive portion 32 is formed in the first through-hole portion 112, and the first conductive portion 32 is connected to the side of the second conductive portion 34 facing the first through-hole portion 112; a third conductive portion 36 is formed in the third through-hole portion 116, and the third conductive portion 36 is connected to the side of the second conductive portion 34 facing the third through-hole portion 116. That is, after the second conductive portion 34 in the middle section is formed, the first conductive portion 32 is formed by connecting it to one axial side of the second conductive portion 34, and the third conductive portion 36 is formed by connecting it to the other axial side of the second conductive portion 34. In this way, the conductive structure 30 formed by the interconnection of the first conductive portion 32, the second conductive portion 34, and the third conductive portion 36 fills the entire through-hole 11.
[0079] For example, a second conductive portion 34 is first electroplated into the second through-hole portion 114. Then, a first conductive portion 32 and a third conductive portion 36 are formed by electroplating. The first conductive portion 32 is formed by electroplating the surface of the second conductive portion 34 facing the first through-hole portion 112, and the third conductive portion 36 is formed by electroplating the surface of the second conductive portion 34 facing the third through-hole portion 116. After the second conductive portion 34 is filled into the second through-hole portion 114, the second conductive portion 34 divides the through-hole 11 into two blind holes. Then, metal materials can be deposited on the upper and lower surfaces of the second conductive portion 34 along the axial direction. During the deposition process, the metal material is deposited from the bottom layer near the second conductive portion 34 to the outer layer away from the second conductive portion 34 and closer to the opening. During the electroplating of the first conductive portion 32 and the third conductive portion 36, the opening of the through-hole 11 remains unobstructed and does not affect the electroplating reaction. In this way, the opening of the through-hole 11 remains unobstructed during the fabrication of the second conductive portion 34, the first conductive portion 32, and the third conductive portion 36, and a conductive structure 30 with better reliability can be produced.
[0080] In the glass substrate 100 manufacturing method provided in the above embodiment, the second through hole portion 114 of the through hole 11 on the glass core plate 10 is first filled, and a second conductive portion 34 is formed in the second through hole portion 114 in the middle section of the through hole 11. Then, a first conductive portion 32 and a third conductive portion 36 are formed in the first through hole portion 112 and the third through hole portion 116, respectively. In this way, the second conductive portion 34 is manufactured first, and during the manufacturing process of the second conductive portion 34, conductive material has not yet been formed in the first through hole portion 112 and the third through hole portion 116. The first through hole portion 112 and the third through hole portion 116 remain unobstructed, which will not affect the flow and exchange of electroplating solution to the second through hole portion 114. The second conductive portion 34 can be formed in the second through hole portion 114 through a bridged and closed structure, ensuring the electrical performance and long-term reliability of the second conductive portion 34.
[0081] Subsequently, after the second conductive portion 34 is formed, the first conductive portion 32 and the third conductive portion 36 are formed on both sides of the second conductive portion 34 along its axial direction to complete the filling of the through hole 11. In this way, by fabricating the second conductive portion 34 first and then the first and third conductive portions 32 and 36, voids and gaps in the second conductive portion 34 are prevented, reducing the fabrication difficulty of the second conductive portion 34 within the through hole 11, ensuring the electrical performance and long-term reliability of the glass substrate 100, and promoting the industrial-scale preparation and large-scale application of the glass substrate 100.
[0082] According to some embodiments of this application, step S300 includes steps S320 and S340.
[0083] Step S320, as follows Figure 4 As shown, a seed layer 50 is formed at least on the inner wall of the through hole 11. The seed layer 50 includes a second seed layer 54 covering the inner wall of the second through hole portion 114, that is, the second seed layer 54 is formed at least on the inner wall of the second through hole portion 114, so as to provide a good growth interface for the metal material that subsequently fills the second conductive portion 34 in the second through hole portion 114. The seed layer 50 can be a two-layer structure, including an adhesion layer and a seed crystal layer formed sequentially.
[0084] The adhesive layer is used to enhance the bonding force between the first conductive part 32 and the glass core plate 10. The adhesive layer can be a titanium layer or a tantalum nitride layer.
[0085] The seed layer is used to provide a uniform current path and growth starting surface for subsequent electroplating of metal materials. The seed layer can be a copper layer.
[0086] For example, physical vapor deposition (PVD) or atomic layer deposition (ALD) can be used to form the seed layer 50.
[0087] In step S340, the second conductive part 34 is electroplated. The second conductive part 34 grows on the surface of the second seed layer 54 and fills the space formed by the second seed layer 54 enclosing the second through hole 114.
[0088] For example, when copper is electroplated into the second through-hole 114, the copper grows from the surface of the second seed layer 54. Since there is no metal material filling the first through-hole 112 and the second through-hole 114 at this time, the first through-hole 112 and the second through-hole 114 remain unobstructed. The electroplating solution can flow and exchange fully into the second through-hole 114. The metal particles in the electroplating solution can be easily electroplated and deposited in the second through-hole 114, which can effectively form a bridged and closed second conductive part 34, ensuring the conductivity and reliability of the second conductive part 34.
[0089] According to some embodiments of this application, the seed layer 50 further includes a first seed layer 52 and a third seed layer 56 that respectively cover the inner wall of the first through hole portion 112 and the inner wall of the third through hole portion 116, that is, the seed layer 50 is formed at least in the through hole 11 of the glass core plate 10, and the seed layer 50 covers the inner walls of the first through hole portion 112, the second through hole portion 114 and the third through hole portion 116.
[0090] Furthermore, step S320 is followed by step S330.
[0091] Step S330, as follows Figure 6 As shown, a buffer layer 70 is formed within the space enclosed by the seed layer 50 in the through hole 11. The buffer layer 70 covers the first seed layer 52 and the third seed layer 56, and exposes the second seed layer 54.
[0092] In this way, a buffer layer 70 is formed within the through-hole 11, covering the first seed layer 52 and the third seed layer 56, while exposing the second seed layer 54, i.e., partially covering the seed layer 50. During subsequent electroplating, the metal material will only grow and deposit on the exposed surface of the second seed layer 54, while the first seed layer 52 and the third seed layer 56 will not undergo electroplating. Thus, the second conductive portion 34 is formed by electroplating the second seed layer 54 into the second through-hole portion 114, while no metal material is electroplated into the first through-hole portion 112 and the second through-hole portion 114. This allows the first and second through-hole portions 112 and 114 to remain unobstructed, enabling the electroplating solution to flow and exchange into the second through-hole portion 114. This allows for an effective electroplating reaction within the second through-hole portion 114, forming a closed-bridged second conductive portion 34. This ensures the conductivity and stability of the second conductive portion 34, enabling mass production of the second conductive portion 34.
[0093] For example, the second seed layer 54 is exposed relative to the buffer layer 70 on both sides of the radially opposite sides of the through hole 11. The exposed second seed layer 54 is annular in shape matching the inner wall shape of the second through hole portion 114. In this way, when electroplating is performed on the second seed layer 54 laterally, the metal material can grow from both sides of the second seed layer 54 radially toward the middle to form a bridged and closed second conductive portion 34.
[0094] For example, the material of the buffer layer 70 is an organic material, such as at least one of polyimide, epoxy resin, and Ajinomoto thickening film.
[0095] For example, the height of the second seed layer 54 along the thickness direction of the glass core plate 10 is 10um-20um. That is, in the vertical section perpendicular to the glass core plate 10, the projected height of the second seed layer 54 is 10um-20um.
[0096] According to some embodiments of this application, step S330 includes steps S332 and S334.
[0097] Step S332, as follows Figure 5 As shown, a buffer material 60 is filled in the space enclosed by the seed layer 50 within the through hole 11. For example, the buffer material 60 is injected into the space enclosed by the seed layer 50 within the through hole 11, so that the buffer material 60 fills the space enclosed by the seed layer 50.
[0098] Step S334, as Figure 6 As shown, a through hole 76 is formed through the buffer material 60 along the axial direction of the through hole 11 to expose the second seed layer 54. At the same time, the remaining buffer material 60 covers the first seed layer 52 and the third seed layer 56 to form a buffer layer 70. In other words, when the through hole 76 is formed in the buffer material 60, the buffer material 60 in the second through hole portion 114 is removed to expose the second seed layer 54, while a portion of the buffer material 60 in the first through hole portion 112 is retained to cover the first seed layer 52, and a portion of the buffer material 60 in the third through hole portion 116 is retained to cover the third seed layer 56. Thus, a buffer layer 70 is formed that exposes the second seed layer 54 and covers the first seed layer 52 and the third seed layer 56.
[0099] In one specific embodiment, the diameters of the first through-hole 112 and the third through-hole 116 are both larger than the diameter of the second through-hole 114. That is, the through-hole 11 is narrower in the middle and wider at both ends. The seed layer 50 is formed on the inner wall of the through-hole 11. The space enclosed by the seed layer 50 and the buffer material 60 filling this space are also narrower in the middle and wider at both ends. When a through-hole 76 is subsequently opened through the buffer material 60, which is narrower in the middle and wider at both ends, the through-hole 76 can completely remove the buffer material 60 when it passes through the middle section, exposing the second seed layer 54. When the through-hole 76 passes through the wider upper and lower sections of the buffer material 60, it can retain some of the buffer material 60 to cover the first seed layer 52 and the third seed layer 56. Thus, by utilizing the structure of the through-hole 11, which is narrower in the middle and wider at both ends, the required buffer layer 70 can be formed after opening the through-hole 76 in the buffer material 60, allowing the buffer layer 70 to both expose the second seed layer 54 and cover the first seed layer 52 and the third seed layer 56.
[0100] Specifically, step S334 includes steps S3341, S3343, and S3345.
[0101] Step S3341: A first via 761 is etched into the buffer material 60 in the first through hole portion 112, and the remaining buffer material 60 in the first through hole portion 112 covers the first seed layer 52 and forms the first buffer layer 72.
[0102] In step S3343, a third via 765 is etched into the buffer material 60 in the third via portion 116, and the remaining buffer material 60 in the third via portion 116 covers the third seed layer 56 and forms the third buffer layer 74.
[0103] In step S3345, a second via 763 is etched into the buffer material 60 in the second through hole portion 114, the buffer material 60 in the second through hole portion 114 is removed and the second seed layer 54 is exposed, and the second via 763 connects the first via 761 and the third via 765 to form a via 76, and the first buffer layer 72 and the third buffer layer 74 are combined to form a buffer layer 70.
[0104] For the through hole 11, which is narrow in the middle and wide at both ends, when the through hole 76 is opened through the buffer material 60 inside the through hole 11, it is opened from the upper and lower sides of the buffer material 60 in the axial direction into the buffer material 60. The first through hole 761 is opened gradually into the buffer material 60 on one side of the axial direction, and the third through hole 765 is opened gradually into the buffer material 60 on the other side of the axial direction. The first through hole 761 and the third through hole 765 are gradually opened into the buffer material 60 until the second through hole 763 is opened to connect the first through hole 761 and the third through hole 765, thus forming the through hole 76 that penetrates the entire buffer material 60 in the axial direction.
[0105] For example, the second via 763 coincides with the space enclosed by the second seed layer 54 within the second through-hole portion 114. That is, when the second via 763 is opened, all the buffer material 60 within the space enclosed by the second seed layer 54 is removed, so that the space enclosed by the second via 763 and the second seed layer 54 coincides, exposing the second seed layer 54. Optionally, the diameter of the first via 761 is equal to the diameter of the second via 763.
[0106] Furthermore, the diameter of the first via 761 is greater than the minimum diameter of the through hole 11 and less than the maximum diameter of the through hole 11, and the diameter of the second via 763 is greater than the minimum diameter of the through hole 11 and less than the maximum diameter of the through hole 11.
[0107] When creating the vias 76 in the buffer material 60 from the outside in, the first via 761 and the third via 765 are created first, and the innermost second via 763 is created last. Therefore, the diameters of the first via 761 and the third via 765 cannot be smaller than the diameter of the second via 763. The diameter of the second via 763 matches the minimum diameter of the through hole 11. Therefore, the diameters of the first via 761 and the third via 765 must be larger than the minimum diameter of the through hole 11 so that when the second via 763 is created later, its diameter matches the minimum diameter of the through hole 11, exposing the second seed layer 54. At the same time, the diameter of the first via 761 must be smaller than the maximum diameter of the through hole 11 so that a certain amount of buffer material 60 can be reserved in the first through hole portion 112 to cover the first seed layer 52. The diameter of the third via 765 must also be smaller than the maximum diameter of the through hole 11 so that a certain amount of buffer material 60 can be reserved in the third through hole portion 116 to cover the third seed layer 56.
[0108] For example, the through hole 11 is constructed in the shape of an hourglass, the diameter of the first through hole 761 is equal to the minimum diameter of the first seed layer 52, and the diameter of the third through hole 765 is equal to the minimum diameter of the third seed layer 56.
[0109] For example, the ratio of the diameter of the first via 761 to the minimum diameter of the through hole 11 is 1.05-1.15, and the ratio of the diameter of the second via 763 to the minimum diameter of the through hole 11 is also 1.05-1.15. That is, the diameter of the first via 761 is 5%-15% larger than the minimum diameter of the middle section of the through hole 11, and the diameter of the second via 763 is 5%-15% larger than the minimum diameter of the middle section of the through hole 11. This effectively exposes the second seed layer 54 by creating the second via 763.
[0110] Understandably, in some other embodiments, the buffer layer 70 may also be formed by other processes, such as by vapor deposition, and is not limited here.
[0111] According to some embodiments of this application, such as Figure 7-8 As shown, step S500 includes steps S520 and S540.
[0112] In step S520, the first conductive part 32 is electroplated. The first conductive part 32 is grown from the surface of the second conductive part 34 facing the first via 761 and fills the first via 761.
[0113] In step S540, the third conductive part 36 is electroplated. The third conductive part 36 is grown from the surface of the second conductive part 34 facing the third via 765 and fills the third via 765.
[0114] After etching the via 76 into the buffer material 60, the conductive structure 30 can be electroplated. In the initial stage of electroplating, the second seed layer 54 grows to form the second conductive part 34, which is then connected to the second via 114. The second conductive part 34 divides the via 11 into two blind holes, and the metal material can grow on the surface of the second conductive part 34 and gradually deposit and fill the first via 761 and the third via 765 from the bottom layer to the outside layer. That is, the first conductive part 32 and the third conductive part 36 are gradually formed from the bottom of the blind hole to the outside. In this way, the second conductive part 34 is electroplated first, and then the metal material is gradually deposited on the upper and lower surfaces of the second conductive part 34 to form the first conductive part 32 and the third conductive part 36. The entire electroplating process will not result in the via 11 being blocked and affecting the electroplating reaction. This can produce a conductive structure 30 with better reliability and promote the mass production of the conductive structure 30.
[0115] Furthermore, the first conductive portion 32 fills the first through-hole 761 formed by the first buffer layer 72. The first buffer layer 72 exists between the first conductive portion 32 and the glass core plate 10, buffering and absorbing the stress between the first conductive portion 32 and the glass core plate 10, reducing the risk of cracking. The third conductive portion 36 fills the third through-hole 765 formed by the third buffer layer 74, buffering the stress between the third conductive portion 36 and the glass core plate 10, reducing the risk of cracking. Specifically, the conductive structure 30 is made of metallic material. The conductive structure 30 and the glass core plate 10 have significantly different coefficients of thermal expansion. The buffer layer 70 absorbs this difference in expansion, preventing excessive stress from being stored at their interface, which could lead to cracks in the glass core plate 10.
[0116] According to some embodiments of this application, such as Figure 10 As shown, the glass core plate 10 includes a first surface 12 and a second surface 14 disposed opposite to each other along its own thickness direction, and step S700 is included after step S500.
[0117] In step S700, a first redistribution layer 82 is formed on the first surface 12 of the glass core plate 10, and a second redistribution layer 84 is formed on the second surface 14 of the glass core plate 10. The first redistribution layer 82 is in contact with one end of the conductive structure 30, and the second redistribution layer 84 is in contact with the other end of the conductive structure 30. Specifically, as shown... Figure 9 As shown, before fabricating the first superwiring layer 82 and the second superwiring layer 84, the first surface 12 and the second surface 14 can be ground. On the one hand, the first surface 12 and the second surface 14 can be flattened to facilitate the subsequent fabrication of the first superwiring layer 82 and the second superwiring layer 84. On the other hand, the metal layer covering the first surface 12 and the second surface 14 when the seed layer 50 is fabricated can be removed.
[0118] The first rewiring layer 82 includes a first insulating layer 821 and several layers of first conductive patterns 823. The several layers of first conductive patterns 823 are disposed within the first insulating layer 821. The bottom layer of first conductive patterns 823, closest to the glass core plate 10, is electrically connected to the conductive structure 30. The top layer of first conductive patterns 823, furthest from the glass core plate 10, is exposed relative to the first insulating layer 821. The number of layers of first conductive patterns 823 can be selected according to different requirements. The first conductive patterns 823 are disposed on the first surface 12 of the glass core plate 10 and are electrically connected to the conductive structure 30 within the glass core plate 10. The first conductive patterns 823 can rewire the circuitry from the conductive structure 30, connecting it to different circuit units, thereby improving circuit flexibility and modular design.
[0119] The second wiring layer 84 includes a second insulating layer 841 and several layers of second conductive patterns 843. The layers of second conductive patterns 843 are disposed within the second insulating layer 841. The bottom layer of second conductive patterns 843, closest to the glass core plate 10, is electrically connected to the conductive structure 30. The top layer of second conductive patterns 843, furthest from the glass core plate, is exposed relative to the second insulating layer 841. The number of layers of second conductive patterns 843 can be selected according to different requirements. The second conductive patterns 843 are disposed on the second surface 14 of the glass core plate 10 and are electrically connected to the conductive structure 30 within the glass core plate 10. The second conductive patterns 843 can rewire signals from the conductive structure 30 and connect them to different circuit units, improving circuit flexibility and modular design.
[0120] For example, the first super-wiring layer 82 and the second super-wiring layer 84 are fabricated by PVD sputtering, coating, photolithography, development, electroplating, resist removal and etching processes. The materials of the first conductive pattern 823 and the second conductive pattern 843 can be metals such as Cu, Al, Ni, and Au. The first insulating layer 821 and the second insulating layer 841 can be prepared by coating and lamination methods.
[0121] Secondly, such as Figure 10As shown, this example embodiment provides a glass substrate 100, including a glass core plate 10 and a conductive structure 30. A through hole 11 is formed through the glass core plate 10 along its thickness direction. The through hole 11 includes a first through hole portion 112, a second through hole portion 114, and a third through hole portion 116 arranged along its axial direction. The second through hole portion 114 connects to the first through hole portion 112 and the third through hole portion 116. The conductive structure 30 includes a first conductive portion 32, a second conductive portion 34, and a third conductive portion 36. The second conductive portion 34 fills within the second through hole portion 114. The first conductive portion 32 and the side of the second conductive portion 34 facing the first through hole portion 112 are connected and located within the first through hole portion 112. The third conductive portion 36 and the side of the second conductive portion 34 facing the third through hole portion 116 are connected and located within the third through hole portion 116.
[0122] The through-hole 11 of the aforementioned glass core plate 10 includes a first through-hole portion 112, a second through-hole portion 114, and a third through-hole portion 116. During the manufacturing process, a second conductive portion 34 can be formed first in the second through-hole portion 114 in the middle section of the through-hole 11. Then, a first conductive portion 32 and a third conductive portion 36 can be formed in the first through-hole portion 112 and the third through-hole portion 116, respectively. In this way, the second conductive portion 34 is manufactured first, and during the manufacturing process of the second conductive portion 34, conductive material has not yet been formed in the first through-hole portion 112 and the third through-hole portion 116. The first through-hole portion 112 and the third through-hole portion 116 remain unobstructed, which will not affect the exchange of electroplating solution during the electroplating process of the second conductive portion 34. A bridged and closed second conductive portion 34 can be formed in the second through-hole portion 114 to ensure the electrical performance and long-term reliability of the second conductive portion 34.
[0123] Subsequently, after the second conductive portion 34 is formed, the first conductive portion 32 and the third conductive portion 36 are formed and connected to both sides of the second conductive portion 34 along its axial direction to complete the filling of the through hole 11. In this way, by fabricating the second conductive portion 34 first and then the first and third conductive portions 32 and 36, voids and gaps in the second conductive portion 34 are prevented, reducing the fabrication difficulty of the second conductive portion 34 within the through hole 11, ensuring the electrical performance and long-term reliability of the glass substrate 100, and promoting the industrial-scale preparation and large-scale application of the glass substrate 100.
[0124] According to some embodiments of this application, the diameters of the first through-hole portion 112 and the third through-hole portion 116 are both larger than the diameter of the second through-hole portion 114. That is, the diameter of the second through-hole portion 114 is smaller, while the diameters at both ends of the through-hole 11 where the first through-hole portion 112 and the third through-hole portion 116 are located are larger. Thus, the through-hole 11 is thinner in the middle and thicker at both ends, and the diameter of the second through-hole portion 114 in the middle section is even smaller, making it easier to electroplate a radially upwardly bridging and closed second conductive portion 34 to prevent the formation of holes and gaps within the second conductive portion 34.
[0125] Optionally, in the direction from the first through hole 112 to the third through hole 116, the diameter of the first through hole 112 gradually decreases; in the direction from the third through hole 116 to the first through hole 112, the diameter of the third through hole 116 gradually decreases. That is, the diameters of both the first through hole 112 and the second through hole 114 gradually decrease in the direction close to the second through hole 114, so that the diameters of both the first through hole 112 and the third through hole 116 gradually decrease to mate with the second through hole 114.
[0126] Optionally, in the direction from the first through-hole 112 to the third through-hole 116, the diameter of the second through-hole 114 gradually decreases and then gradually increases, that is, the diameter of the second through-hole 114 first decreases and then increases, with the smallest diameter in the middle section of the second through-hole 114. The maximum diameter of the end of the second through-hole 114 facing the first through-hole 112 is the same as the minimum diameter of the first through-hole 112, so that the diameters at the connection between the second through-hole 114 and the first through-hole 112 are the same, and the second through-hole 114 and the first through-hole 112 transition smoothly; the maximum diameter of the end of the second through-hole 114 facing the third through-hole 116 is the same as the minimum diameter of the third through-hole 116, so that the diameters at the connection between the second through-hole 114 and the third through-hole 116 are the same, and the second through-hole 114 and the third through-hole 116 transition smoothly. For example, the through-hole 11 is constructed in an hourglass shape, and the cross-section of the through-hole 11 is "X" shaped.
[0127] Understandably, in some other embodiments, the through hole 11 may also be constructed in other shapes, such as the second through hole portion 114 being constructed as a straight hole, and the diameters of the first through hole portion 112 and the third through hole portion 116 gradually decreasing in the direction close to the second through hole portion 114, which is not limited here.
[0128] According to some embodiments of this application, the glass substrate 100 further includes a seed layer 50, which includes at least a second seed layer 54 covering the inner wall of the second through hole portion 114.
[0129] The seed layer 50 can be a two-layer structure, comprising an adhesion layer and a seed crystal layer formed sequentially. The adhesion layer is used to enhance the adhesion between the first conductive part 32 and the glass core plate 10. The adhesion layer can be a titanium layer or a tantalum nitride layer. The seed crystal layer is used to provide a uniform current path and growth starting surface for subsequent electroplating of metal materials. The seed crystal layer can be a copper layer.
[0130] For example, physical vapor deposition (PVD) or atomic layer deposition (ALD) can be used to form the seed layer 50.
[0131] Furthermore, the second conductive portion 34 is formed by electroplating the second seed layer 54, and the second conductive portion 34 fills the space enclosed by the second seed layer 54 within the second through-hole portion 114; the first conductive portion 32 is formed by electroplating the surface of the second conductive portion 34 facing the first through-hole portion 112, and the third conductive portion 36 is formed by electroplating the surface of the second conductive portion 34 facing the third through-hole portion 116. That is, the second conductive portion 34 is first electroplated and filled within the second through-hole portion 114, and then the first conductive portion 32 and the third conductive portion 36 are formed by electroplating on the upper and lower surfaces of the second conductive portion 34, respectively.
[0132] During the electroplating of the second conductive portion 34 within the second through-hole portion 114, the first through-hole portion 112 and the third through-hole portion 116 remain unobstructed, allowing the electroplating solution to flow fully into the second through-hole portion 114 without affecting the electroplating reaction within it. This effectively bridges the second conductive portion 34 during electroplating. After the second conductive portion 34 is filled into the second through-hole portion 114, it divides the through-hole 11 into two blind holes. Metal materials can then be deposited on the upper and lower surfaces of the second conductive portion 34 along its axial direction. During deposition, the metal material gradually deposits from the bottom layer near the second conductive portion 34 towards the outer layer away from the opening. The opening of the through-hole 11 remains unobstructed during the electroplating of the first conductive portion 32 and the third conductive portion 36, without affecting the electroplating reaction. Thus, the opening of the through-hole 11 remains unobstructed during the fabrication of the second conductive portion 34, the first conductive portion 32, and the third conductive portion 36, enabling the fabrication of a conductive structure 30 with high reliability.
[0133] Furthermore, the seed layer 50 also includes a first seed layer 52 and a third seed layer 56 that respectively cover the inner walls of the first through-hole portion 112 and the third through-hole portion 116, and a second seed layer 54 is located between the first seed layer 52 and the third seed layer 56. The glass substrate 100 also includes a buffer layer 70 that covers the first seed layer 52 and the third seed layer 56, and the second seed layer 54 is exposed relative to the buffer layer 70. The second conductive portion 34 is formed by electroplating growth of the second seed layer 54 and fills the second through-hole portion 114.
[0134] A buffer layer 70 is formed within the through-hole 11, covering the first seed layer 52 and the third seed layer 56 while exposing the second seed layer 54, thus partially covering the seed layer 50. During subsequent electroplating, metal material will only grow and deposit on the exposed surface of the second seed layer 54, while the first seed layer 52 and the third seed layer 56 will remain covered and will not undergo electroplating. In this way, the second seed layer 54 first fills the second through-hole 114 with electroplated metal material to form the second conductive portion 34, while the first through-hole 112 and the second through-hole 114 will not be electroplated with metal material. The first through-hole 112 and the second through-hole 114 remain unobstructed, allowing the electroplating solution to flow and exchange into the second through-hole 114, thereby enabling effective electroplating reactions within the second through-hole 114 to form a closed-bridged second conductive portion 34. This ensures the conductivity and stability of the second conductive portion 34, enabling mass production of the second conductive portion 34.
[0135] For example, the material of the buffer layer 70 is an organic material, such as at least one of polyimide, epoxy resin, and Ajinomoto thickening film.
[0136] For example, the height of the second seed layer 54 along the thickness direction of the glass core plate 10 is 10um-20um. That is, in the vertical section perpendicular to the glass core plate 10, the projected height of the second seed layer 54 is 10um-20um.
[0137] According to some embodiments of this application, the buffer layer 70 includes a first buffer layer 72 and a third buffer layer 74 that respectively cover the first seed layer 52 and the third seed layer 56. The first buffer layer 72 forms a first through hole 761 within the first through hole portion 112, and the third buffer layer 74 forms a third through hole 765 within the third through hole portion 116.
[0138] In the process of fabricating the buffer layer 70, the space enclosed by the seed layer 50 within the through hole 11 is first filled with buffer material 60, and then a through hole 76 is formed through the buffer material 60 to form the buffer layer 70. Specifically, the through hole 76 is formed through the buffer material 60 along the axial direction of the through hole 11 to expose the second seed layer 54, while the remaining buffer material 60 covers the first seed layer 52 and the third seed layer 56 to form the buffer layer 70.
[0139] In one specific embodiment, the diameters of the first through-hole 112 and the third through-hole 116 are both larger than the diameter of the second through-hole 114. That is, the through-hole 11 is narrower in the middle and wider at both ends. A seed layer 50 is formed on the inner wall of the through-hole 11. The space enclosed by the seed layer 50 and the buffer material 60 filling this space are also narrower in the middle and wider at both ends. When a through-hole 76 is subsequently opened through the buffer material 60, which is narrower in the middle and wider at both ends, the through-hole 76 can completely remove the buffer material 60 when it passes through the middle section, exposing the second seed layer 54. When the through-hole 76 passes through the wider upper and lower sections of the buffer material 60, it can retain a portion of the buffer material 60 to cover the first seed layer 52 and the third seed layer 56. Thus, by utilizing the structure of the through-hole 11, which is narrower in the middle and wider at both ends, the required buffer layer 70 can be formed after opening the through-hole 76 in the buffer material 60. The buffer layer 70 includes a first buffer layer 72 and a third buffer layer 74, respectively covering the first seed layer 52 and the third seed layer 56.
[0140] The via 76 includes a first via 761 and a third via 765 formed by a first buffer layer 72 and a third buffer layer 74, respectively. The via 76 also includes a second via 763 communicating between the first via 761 and the second via 763. The second via 763 overlaps with the space enclosed by the second seed layer 54 within the second through-hole portion 114. That is, when the second via 763 is opened, all the buffer material 60 within the space enclosed by the second seed layer 54 is removed, so that the second via 763 overlaps with the space enclosed by the second seed layer 54, exposing the second seed layer 54. Optionally, the diameter of the first via 761 is equal to the diameter of the second via 763.
[0141] Furthermore, the diameter of the first via 761 is greater than the minimum diameter of the through hole 11 and less than the maximum diameter of the through hole 11, and the diameter of the third via 765 is greater than the minimum diameter of the through hole 11 and less than the maximum diameter of the through hole 11.
[0142] When creating the vias 76 in the buffer material 60 from the outside in, the first via 761 and the third via 765 are created first, and the innermost second via 763 is created last. Therefore, the diameters of the first via 761 and the third via 765 cannot be smaller than the diameter of the second via 763. The diameter of the second via 763 matches the minimum diameter of the through hole 11. Therefore, the diameters of the first via 761 and the third via 765 must be larger than the minimum diameter of the through hole 11 so that when the second via 763 is created later, its diameter matches the minimum diameter of the through hole 11, exposing the second seed layer 54. At the same time, the diameter of the first via 761 must be smaller than the maximum diameter of the through hole 11 so that a certain amount of buffer material 60 can be reserved in the first through hole portion 112 to cover the first seed layer 52. The diameter of the third via 765 must also be smaller than the maximum diameter of the through hole 11 so that a certain amount of buffer material 60 can be reserved in the third through hole portion 116 to cover the third seed layer 56.
[0143] For example, the through hole 11 is constructed in the shape of an hourglass, the diameter of the first through hole 761 is equal to the minimum diameter of the first seed layer 52, and the diameter of the third through hole 765 is equal to the minimum diameter of the third seed layer 56.
[0144] For example, the ratio of the diameter of the first via 761 to the minimum diameter of the through hole 11 is 1.05-1.15, and the ratio of the diameter of the third via 765 to the minimum diameter of the through hole 11 is also 1.05-1.15. That is, the diameter of the first via 761 is 5%-15% larger than the minimum diameter of the middle section of the through hole 11, and the diameter of the third via 765 is 5%-15% larger than the minimum diameter of the middle section of the through hole 11. This effectively allows the second via 763 to be opened to expose the second seed layer 54.
[0145] Furthermore, the first conductive portion 32 is filled in the first via 761, and the first conductive portion 32 is formed by electroplating the surface of the second conductive portion 34 facing the first via 761; the third conductive portion 36 is filled in the third via 765, and the third conductive portion 36 is formed by electroplating the surface of the second conductive portion 34 facing the third via 765.
[0146] After etching the via 76 into the buffer material 60, the conductive structure 30 can be electroplated. In the initial stage of electroplating, the second seed layer 54 grows to form the second conductive part 34, which is then connected to the second via 114. The second conductive part 34 divides the via 11 into two blind holes, and the metal material can grow on the surface of the second conductive part 34 and gradually deposit and fill the first via 761 and the third via 765 from the bottom layer to the outside layer. That is, the first conductive part 32 and the third conductive part 36 are gradually formed from the bottom of the blind hole to the outside. In this way, the second conductive part 34 is electroplated first, and then the metal material is gradually deposited on the upper and lower surfaces of the second conductive part 34 to form the first conductive part 32 and the third conductive part 36. The entire electroplating process will not result in the via 11 being blocked and affecting the electroplating reaction. This can produce a conductive structure 30 with better reliability and promote the mass production of the conductive structure 30.
[0147] Furthermore, the first conductive portion 32 fills the first through-hole 761 formed by the first buffer layer 72. The first buffer layer 72 exists between the first conductive portion 32 and the glass core plate 10, buffering and absorbing the stress between the first conductive portion 32 and the glass core plate 10, reducing the risk of cracking. The third conductive portion 36 fills the third through-hole 765 formed by the third buffer layer 74, buffering the stress between the third conductive portion 36 and the glass core plate 10, reducing the risk of cracking. Specifically, the conductive structure 30 is made of metallic material. The conductive structure 30 and the glass core plate 10 have significantly different coefficients of thermal expansion. The buffer layer 70 absorbs this difference in expansion, preventing excessive stress from being stored at their interface, which could lead to cracks in the glass core plate 10.
[0148] According to some embodiments of this application, the glass substrate 100 further includes a first redistribution layer 82 and a second redistribution layer 84. The glass core plate 10 includes a first surface 12 and a second surface 14 opposite to each other along its own thickness direction. The first redistribution layer 82 is disposed on the first surface 12 and electrically connected to one end of the conductive structure 30 in the glass core plate 10. The second redistribution layer 84 is disposed on the second surface 14 and electrically connected to the other end of the conductive structure 30 in the glass core plate 10. Thus, the first redistribution layer 82 and the second redistribution layer 84 are connected through the conductive structure 30.
[0149] Specifically, the first rewiring layer 82 includes a first insulating layer 821 and several layers of first conductive patterns 823. The several layers of first conductive patterns 823 are disposed within the first insulating layer 821, and the bottom layer of first conductive patterns 823 closest to the glass core 10 is electrically connected to the conductive structure 30, while the top layer of first conductive patterns 823 furthest from the glass core 10 is exposed relative to the first insulating layer 821. The number of layers of first conductive patterns 823 can be selected according to different requirements. The first conductive patterns 823 are disposed on the first surface 12 of the glass core 10 and are electrically connected to the conductive structure 30 in the glass core 10. The first conductive patterns 823 can rewire the circuitry from the conductive structure 30, connecting it to different circuit units, thereby improving the flexibility and modular design of the circuit.
[0150] The second wiring layer 84 includes a second insulating layer 841 and several layers of second conductive patterns 843. The layers of second conductive patterns 843 are disposed within the second insulating layer 841. The bottom layer of second conductive patterns 843, closest to the glass core plate 10, is electrically connected to the conductive structure 30. The top layer of second conductive patterns 843, furthest from the glass core plate, is exposed relative to the second insulating layer 841. The number of layers of second conductive patterns 843 can be selected according to different requirements. The second conductive patterns 843 are disposed on the second surface 14 of the glass core plate 10 and are electrically connected to the conductive structure 30 within the glass core plate 10. The second conductive patterns 843 can rewire signals from the conductive structure 30 and connect them to different circuit units, improving circuit flexibility and modular design.
[0151] Thirdly, this example embodiment provides a packaging structure, including a glass substrate 100 formed by the manufacturing method of the glass substrate 100 described in any of the above embodiments, or including the glass substrate 100 provided in any of the above embodiments.
[0152] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0153] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.
Claims
1. A method for manufacturing a glass substrate, characterized in that, The method for manufacturing the glass substrate includes the following steps: A glass core board is provided, and a through hole is formed through the glass core board along the thickness direction of the glass core board. The through hole includes a first through hole portion, a second through hole portion and a third through hole portion arranged along its own axial direction. The second through hole portion is connected between the first through hole portion and the third through hole portion. A second conductive portion is formed in the second through-hole portion; A first conductive portion is formed in the first through-hole portion, and the first conductive portion is connected to the side of the second conductive portion facing the first through-hole portion; a third conductive portion is formed in the third through-hole portion, and the third conductive portion is connected to the side of the second conductive portion facing the third through-hole portion; The step of forming a second conductive portion in the second through-hole portion includes: A seed layer is formed at least on the inner wall of the through hole, the seed layer including a second seed layer covering the inner wall of the second through hole portion; The second conductive portion is electroplated on the surface of the second seed layer and fills the space formed by the second seed layer within the second through hole. Meanwhile, no metal material is electroplated within the first through hole and the third through hole, and the first through hole and the third through hole remain unobstructed. The seed layer further includes a first seed layer and a third seed layer respectively covering the inner wall of the first through hole and the inner wall of the third through hole. After the step of forming the seed layer at least on the inner wall of the through hole, the step further includes the following steps: A buffer layer is formed within the space enclosed by the seed layers in the through hole. The buffer layer covers the first seed layer and the third seed layer, and exposes the second seed layer.
2. The method for manufacturing a glass substrate according to claim 1, characterized in that, The diameters of the first through-hole and the third through-hole are both larger than the diameter of the second through-hole; the step of forming a buffer layer within the space enclosed by the seed layer in the through-hole includes: The space enclosed by the seed layer within the through hole is filled with a buffer material. A through hole is made through the buffer material along the axial direction of the through hole to expose the second seed layer, while the remaining buffer material covers the first seed layer and the third seed layer to form the buffer layer.
3. The method for manufacturing a glass substrate according to claim 2, characterized in that, The step of etching the buffer material to create a via along the axial direction of the through hole includes: A first via is etched into the buffer material within the first through-hole portion, and the remaining buffer material within the first through-hole portion covers the first seed layer and forms a first buffer layer. A third via is etched into the buffer material within the third through-hole portion, and the remaining buffer material within the third through-hole portion covers the third seed layer and forms a third buffer layer. A second via is etched into the buffer material within the second through-hole portion, the buffer material within the second through-hole portion is removed and the second seed layer is exposed, and the second via connects the first via and the third via to form the via, and the first buffer layer and the third buffer layer are combined to form the buffer layer; the space formed by the second via and the second seed layer enclosing each other within the second through-hole portion coincides.
4. The method for manufacturing a glass substrate according to claim 3, characterized in that, The steps of forming a first conductive portion in the first through-hole portion and forming a third conductive portion in the third through-hole portion include: The first conductive portion is electroplated, and the first conductive portion is grown from the surface of the second conductive portion facing the first via and fills the first via. The third conductive portion is electroplated, and the third conductive portion is grown from the surface of the second conductive portion facing the third via and fills the third via.
5. A glass substrate, characterized in that, include: A glass core board, wherein a through hole is formed through the glass core board along its own thickness direction, the through hole including a first through hole portion, a second through hole portion and a third through hole portion arranged along its own axial direction, the second through hole portion connecting the first through hole portion and the third through hole portion; A conductive structure includes a first conductive portion, a second conductive portion, and a third conductive portion. The second conductive portion is filled in a second through-hole portion. The first conductive portion is connected to the side of the second conductive portion facing the first through-hole portion and is located in the first through-hole portion. The third conductive portion is connected to the side of the second conductive portion facing the second through-hole portion and is located in the third through-hole portion. The glass substrate further includes a seed layer, which includes at least a second seed layer covering the inner wall of the second through-hole portion; the second conductive portion is formed by electroplating the second seed layer and fills the space enclosed by the second seed layer within the second through-hole portion; the seed layer further includes a first seed layer and a third seed layer respectively covering the inner wall of the first through-hole portion and the inner wall of the third through-hole portion; the glass substrate further includes a buffer layer, which covers the first seed layer and the third seed layer, and the second seed layer is exposed relative to the buffer layer.
6. The glass substrate according to claim 5, characterized in that, The first conductive portion is formed by electroplating the surface of the second conductive portion facing the first through hole portion, and the third conductive portion is formed by electroplating the surface of the second conductive portion facing the third through hole portion.
7. The glass substrate according to claim 5, characterized in that, The buffer layer includes a first buffer layer and a third buffer layer that respectively cover the first seed layer and the third seed layer. The first buffer layer forms a first via within the first through-hole portion, and the first conductive portion fills the first via. The third buffer layer forms a third via within the third through-hole portion, and the third conductive portion fills the third via.
8. The glass substrate according to claim 7, characterized in that, The diameters of the first through hole and the third through hole are both greater than the diameter of the second through hole; the diameter of the first through hole is greater than the minimum diameter of the through hole and less than the maximum diameter of the through hole, and the diameter of the third through hole is greater than the minimum diameter of the through hole and less than the maximum diameter of the through hole.
9. The glass substrate according to claim 8, characterized in that, The ratio of the diameter of the first via to the minimum diameter of the through hole is 1.05-1.15; the ratio of the diameter of the third via to the minimum diameter of the through hole is 1.05-1.
15.
10. A packaging structure, characterized in that, The glass substrate formed by the method of manufacturing the glass substrate according to any one of claims 1-4, or the glass substrate according to any one of claims 5-9.
Citation Information
Patent Citations
Glass core plate of FCBGA packaging substrate and manufacturing method thereof
CN119132977A
Glass support plate, preparation method thereof and packaging structure
CN121586492A