Clock delay modulation circuit, clock generation device, data receiver and system

Abstract

The invention discloses a clock delay modulation circuit, a clock generation device, a data receiver and a system. The clock delay modulation circuit comprises an enabling unit used for receiving a to-be-modulated clock signal and an enabling signal and generating a modulation control signal based on the to-be-modulated clock signal and the enabling signal; the output unit is connected with the enabling unit and is used for outputting a modulated clock signal; and the modulation unit is connected with the enabling unit and the output unit, and is used for changing the load of the enabling unit based on the modulation control signal so as to adjust the delay of the modulated clock signal relative to the clock signal to be modulated. By adopting the scheme, the shmoo loss of the data receiver can be reduced.

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