Flip Micro-LED device and preparation method and application thereof

Abstract

The present application relates to the technical field of photoelectric chip manufacturing, in particular to a flip Micro-LED device and a preparation method and application thereof. The preparation method is characterized in that: a wet etching process is used to etch the exposed GaN homogeneous substrate, a concave cavity structure is formed on the N-polarity surface of the GaN homogeneous substrate, the diameter of the concave cavity structure gradually decreases along the target direction, the included angle between the side wall of the concave cavity structure and the target direction is any value between 0° and 15°, and the target direction is the direction from the N-polarity surface of the GaN homogeneous substrate to the Ga-polarity surface of the GaN homogeneous substrate; and the GaN homogeneous substrate is flip connected to the substrate through the p-electrode structure and the n-electrode structure to obtain the flip Micro-LED device. The process has high controllability and low cost, can avoid the problems of the need for complex equipment and high production cost, and makes the production of the flip Micro-LED device more economical and feasible.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic chip manufacturing technology, specifically to a flip-chip Micro-LED device, its fabrication method, and its applications. Background Technology

[0002] Micro-LEDs, with their superior characteristics such as high brightness, high efficiency, long lifespan, and fast response, have been widely regarded as the core direction of next-generation display technology. However, with the miniaturization of Micro-LED chips, their light emission behavior exhibits a typical Lambertian distribution. This distribution characteristic causes serious beam divergence and inter-pixel crosstalk problems, which not only significantly reduce the clarity and contrast of the displayed image but also severely restricts its application in systems with extremely high optical precision requirements, such as augmented reality and near-eye displays. Meanwhile, traditional sapphire substrate-based Micro-LED devices suffer from high defect density and poor thermal conductivity due to lattice mismatch, limiting their internal quantum efficiency and reliability. This makes solving the beam divergence problem a fundamental material bottleneck.

[0003] To address this issue, some researchers have proposed Micro-LED devices based on gallium nitride (GaN) homogeneous substrates. For example, patent application number CN202610107276.2 discloses a method for forming a tapered structure on a GaN homogeneous substrate using a dry etching process. While this method can effectively reduce the beam divergence angle, dry etching is difficult, complex, costly, and has a low yield, which limits its practical application.

[0004] The patent application CN202511732313.0 describes the fabrication of a reflector cup micro / nano structure using a relatively thick GaN homogeneous substrate, combined with freeform surface characteristics to improve beam collimation and light extraction efficiency. However, this scheme employs a combination of a reflector cup and a microlens, resulting in high structural complexity and numerous challenges in design and manufacturing, leading to a significant increase in production costs. More importantly, the patent only provides the design concept without outlining a specific feasible fabrication method. Furthermore, it lacks sufficient and in-depth analysis of the feasibility and yield rate of this scheme in actual production, which undoubtedly limits its widespread adoption in practical applications.

[0005] Therefore, there is an urgent need to provide a simple, controllable, and low-cost method for fabricating flip-chip Micro-LED devices. Summary of the Invention

[0006] The purpose of this invention is to provide a method for fabricating flip-chip Micro-LED devices. By using a wet etching process to form a concave cavity structure on the N-polar surface of a GaN homogeneous substrate, the beam collimation and light extraction efficiency of the flip-chip Micro-LED device are significantly improved.

[0007] To achieve the above objectives, the present invention provides the following technical solution: a method for fabricating a flip-chip Micro-LED device, comprising the following steps:

[0008] S1. Obtain a GaN homogeneous substrate and deposit a hard mask layer on the N-polar surface of the GaN homogeneous substrate;

[0009] S2. After coating the hard mask layer with photoresist, exposure and development processes are performed to form a mask pattern and expose the hard mask layer above multiple target areas.

[0010] S3. The exposed hard mask layer is etched using a dry etching process to expose the GaN homogeneous substrate in the target area.

[0011] S4. The exposed GaN homogeneous substrate is etched using a wet etching process to form a cavity structure on the N-polar surface of the GaN homogeneous substrate. The diameter of the cavity structure gradually decreases along the target direction, and the angle between the sidewall of the cavity structure and the target direction is any value between 0° and 15°. The target direction is the direction from the N-polar surface of the GaN homogeneous substrate to the Ga-polar surface of the GaN homogeneous substrate.

[0012] S5. The hard mask layer is removed by wet etching.

[0013] S6. Deposit a current spreading layer at the position corresponding to the cavity structure on the Ga polar surface of the GaN homogeneous substrate;

[0014] S7. Etch the region on the Ga polar surface of the GaN homogeneous substrate located on the periphery of the current spreading layer to form a mesa structure at the current spreading layer.

[0015] S8. A p-electrode structure is formed on the mesa structure, and an n-electrode structure is formed on the GaN homogeneous substrate in the region located on the periphery of the mesa structure. The GaN homogeneous substrate is flip-chip connected to the substrate through the p-electrode structure and the n-electrode structure to obtain a flip-chip Micro-LED device.

[0016] Furthermore, in step S4, the corrosion treatment uses a medium-strong acid solution, the corrosion temperature is any value between 160℃ and 230℃, and the corrosion rate is controlled within the range of 0.1μm / min to 2μm / min.

[0017] Furthermore, the corrosive solution is a 0.5M-5M phosphoric acid solution.

[0018] Furthermore, the thickness of the GaN homogeneous substrate is controlled within the range of 90μm-150μm; the ratio of the depth of the cavity structure to the thickness of the GaN homogeneous substrate is any value between 0.3 and 0.85.

[0019] Further, in step S1, the deposition rate of the hard mask layer is any value between 80 nm / min and 85 nm / min;

[0020] The thickness of the hard mask layer is controlled within the range of 150μm-500μm, and the material is silicon oxide, silicon nitride, or Al2O3.

[0021] Further, in step S3, the hard mask layer is etched at an etching rate of 160nm / min-175nm / min under the conditions of CF4 atmosphere, bias power of 120W-180W and plasma source power of 800W-1200W.

[0022] Further, in step S6, an indium tin oxide target is used to deposit the current spread layer at a deposition temperature of 250℃-350℃, a power of 70W-120W, and an oxygen flow rate of 80sccm-120sccm, with a deposition rate of 0.05nm / s-0.5nm / s.

[0023] The thickness of the current spreading layer is any value between 120nm and 150nm.

[0024] Further, in step S7, the Ga polar surface of the GaN homogeneous substrate is etched in a mixed atmosphere including Cl2, BCl3 and Ar at an etching rate of 400 nm / min-450 nm / min, and etched to a depth of 0.9 μm-1.2 μm below the surface of the GaN homogeneous substrate.

[0025] This application also provides a flip-chip Micro-LED device, which is prepared by the above-described preparation method.

[0026] This application also provides the application of the above-mentioned flip-chip Micro-LED devices in display devices.

[0027] The beneficial effects of this invention are as follows: The method for fabricating a flip-chip Micro-LED device provided in this application forms a concave cavity structure by etching the N-polar surface of a GaN homogeneous substrate using a wet etching process, and controls the angle between the sidewall of the concave cavity structure and the target direction to be between 0° and 15°. This allows the light beam to gradually collimate after multiple total internal reflections within the concave cavity, significantly reducing the beam divergence angle and effectively improving the light extraction efficiency and collimation of the flip-chip Micro-LED device. Therefore, this Micro-LED device possesses higher optical precision and stronger luminous efficiency, meeting the display effect requirements of high-precision applications such as augmented reality and near-eye displays.

[0028] The method for fabricating flip-chip Micro-LED devices provided in this application effectively reduces the technical difficulty and manufacturing cost in the production process by combining a GaN homogeneous substrate with a wet etching process, while ensuring high performance and high reliability of the devices. Compared with traditional dry etching processes, wet etching offers higher controllability and lower cost, avoiding the need for complex equipment and high production expenses. This makes the production of flip-chip Micro-LED devices more economical and feasible. Furthermore, wet etching effectively avoids lattice damage problems that may occur during dry etching, significantly improving the overall quality and stability of the devices.

[0029] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0030] Figure 1 This is a process flow diagram of a method for fabricating a flip-chip Micro-LED device according to an embodiment of the present invention;

[0031] Figure 2 This is a process flow diagram of the fabrication method of the flip-chip Micro-LED device shown in Embodiment 1 of the present invention;

[0032] Figure 3 This is a two-dimensional Cartesian coordinate light intensity cross-section of the Micro-LED device shown in Embodiment 1 of the present invention;

[0033] Figure 4 This is a two-dimensional polar coordinate light intensity cross-section of the Micro-LED device shown in Embodiment 1 of the present invention;

[0034] Figure label:

[0035] 1. GaN homogeneous substrate; 2. Hard mask layer; 3. Photoresist layer; 4. Mask pattern; 5. Cavity structure; 6. Current spreading layer; 7. First protective layer; 8. Mesa structure; 9. Second protective layer; 10. Electrode sheet; 11. Electrode post; 12. Substrate. Detailed Implementation

[0036] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0038] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0039] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0040] A preferred embodiment of this application illustrates a method for fabricating a flip-chip Micro-LED device, such as... Figure 1 As shown, it includes the following steps:

[0041] S1. Obtain GaN homogeneous substrate 1, the result is as follows: Figure 1 As shown in (a); and a hard mask layer 2 is deposited on the N-polar surface of the GaN homogeneous substrate 1, with the result as shown in (a). Figure 1 As shown in (b);

[0042] S2. After coating photoresist onto the hard mask layer 2, exposure and development processes are performed to form the mask pattern 4, exposing the hard mask layer 2 above multiple target areas. The result is as follows: Figure 1 As shown in (c);

[0043] S3. The exposed hard mask layer 2 is etched using a dry etching process to expose the GaN homogeneous substrate 1 in the target area. The result is as follows: Figure 1 As shown in (d);

[0044] S4. The exposed GaN homopolymer substrate 1 is etched using a wet etching process to form a cavity structure 5 on the N-polar surface of the GaN homopolymer substrate 1. The diameter of the cavity structure 5 gradually decreases along the target direction, and the angle between the sidewall of the cavity structure 5 and the target direction is any value between 0° and 15°. The target direction is the direction from the N-polar surface of the GaN homopolymer substrate 1 to the Ga-polar surface of the GaN homopolymer substrate 1. The result is as follows: Figure 1 As shown in (e);

[0045] S5. The hard mask layer 2 was removed by wet etching, and the result is as follows: Figure 1 As shown in (f);

[0046] S6. Deposit a current spreading layer 6 on the Ga polar surface of the GaN homogeneous substrate 1 at the position corresponding to the cavity structure 5.

[0047] S7. Etch the region on the Ga polar surface of the GaN homogeneous substrate 1 located around the current spreading layer 6 to form a mesa structure 8 at the current spreading layer 6. The result is as follows. Figure 1 As shown in (h);

[0048] S8. A p-electrode structure is formed on the mesa structure 8, and an n-electrode structure is formed on the GaN homogeneous substrate 1 in the region located around the mesa structure 8. The result is as follows: Figure 1 As shown in (i), the GaN homogeneous substrate 1 is flip-chip bonded to the substrate 12 using p-electrode and n-electrode structures to obtain a flip-chip Micro-LED device, as shown in the figure. Figure 1 As shown in (j).

[0049] In step S1, by selecting a GaN homogeneous substrate 1 of appropriate thickness as the basic structure, its large physical thickness provides sufficient vertical etching space for constructing the deep cavity structure 5. By depositing a hard mask layer 2 on the N-polar surface of the GaN homogeneous substrate 1, the GaN homogeneous substrate 1 can be protected in subsequent photolithography and etching processes, while precisely controlling the subsequent etching areas to avoid damage to parts that do not need to be etched.

[0050] In step S2, photoresist is coated on the hard mask layer 2. After exposure and development, a precise mask pattern 4 is formed to expose the hard mask layer 2 above multiple target areas, thereby precisely controlling the subsequent processing positions of the hard mask layer 2 and the GaN homogeneous substrate 1. The target area refers to the area on the GaN homogeneous substrate 1 where a pre-defined etching process forms a cavity structure 5.

[0051] In step S3, a dry etching process is used to precisely remove the exposed hard mask layer 2 by utilizing its anisotropic etching characteristics, thereby exposing the GaN homogeneous substrate 1 in the target area, ensuring that a specific area on the GaN homogeneous substrate 1 is precisely etched to form a cavity structure 5.

[0052] In step S4, a wet etching process is used to etch the GaN homogeneous substrate 1. This process utilizes the significant difference in etching rates between the N-polar and Ga-polar surfaces in the etching solution to selectively etch the GaN homogeneous substrate 1, forming a cavity structure 5 of a specific shape on the exposed GaN homogeneous substrate 1. The diameter of this cavity structure 5 gradually decreases along the target direction, causing its sidewalls to form a specific angle with the target direction. This ensures that the light beam undergoes multiple total internal reflections within the cavity structure 5 before being collimated and output, thereby significantly improving the beam collimation of the flip-chip Micro-LED device and enhancing its light extraction efficiency and light emission uniformity.

[0053] In step S5, after the cavity structure 5 is completed, the hard mask layer 2, which serves as a protective layer and pattern guide, is removed to create conditions for subsequent processes. Simultaneously, it ensures that the surface of the GaN homogeneous substrate 1 is clean and free of residue, providing higher accuracy for subsequent processes.

[0054] In step S6, the current spreading layer 6 typically possesses good conductivity and light transmittance. To ensure the uniformity of current distribution and the stability of device light emission, a current spreading layer 6, such as an ITO thin film, can be fabricated on the surface of the p-type and / or n-type regions. This current spreading layer 6 enables the injected current to diffuse uniformly to each Micro-LED pixel area, avoiding localized uneven light emission or efficiency degradation caused by current accumulation, thereby significantly improving the device's light emission uniformity and overall performance, and enhancing the device's stability and reliability.

[0055] In step S7, the mesa structure 8 is formed by etching, which facilitates the formation of subsequent electrode structures and device packaging. Simultaneously, this structure provides electrical isolation, reducing leakage current, improving the electrical performance of the device, and effectively preventing current crosstalk between pixels. Furthermore, passivating the sidewalls of the mesa structure 8 can effectively reduce light energy loss and guide light from inside the chip to emerge efficiently, significantly improving overall light extraction efficiency.

[0056] In step S8, the p-electrode structure and n-electrode structure are used to inject positive and negative charges, respectively, to ensure the electrical connection and light emission function of the device. Using a flip-chip connection to connect the GaN homogeneous substrate 1 to the substrate 12 helps to effectively dissipate heat, significantly improving the heat dissipation performance of the device and ensuring the efficient operation of the Micro-LED device.

[0057] In one embodiment, in step S4, the etching solution used for the etching process is a medium-strong acid solution, the etching temperature is any value between 160℃ and 230℃, and the etching rate is controlled within the range of 0.1μm / min to 2μm / min. During the etching process, the uniformity of the etching rate can be ensured by strictly controlling the concentration of the etching solution and the stability of the etching temperature, thereby obtaining a cavity structure 5 with accurate morphology and good quality of the sidewall and bottom surfaces. After the etching is completed, the residual etching solution on its surface can be removed by promptly taking out the GaN homogeneous substrate 1 and repeatedly washing it with deionized water to terminate the etching reaction. In some embodiments, the etching solution is preferably a 0.5M-5M phosphoric acid solution. In the hot phosphoric acid system, the etching rate difference between the N polar surface and the Ga polar surface is significant, with a etching selectivity ratio of approximately greater than 10:1, and the etching rate of the N polar surface is approximately 1μm / min at a temperature of approximately 190℃. Therefore, a cavity structure 5 with a large depth and a specific taper can be formed by precisely controlling the etching time. This wet etching process is simple and controllable, and can avoid the lattice damage caused by dry etching to the GaN homogeneous substrate 1, and obtain an atomically flat sidewall surface.

[0058] In one embodiment, to ensure the excellent performance and stability of the flip-chip Micro-LED device, the thickness of the GaN homopolymer substrate 1 is preferably controlled within the range of 90μm-150μm. By limiting the thickness of the GaN homopolymer substrate 1 within this range, it is ensured that it provides reliable mechanical support for the entire device. Simultaneously, it creates favorable conditions for subsequent process steps, such as etching and deposition, reducing process difficulty and errors, and improving process success rate. Meanwhile, the ratio of the depth of the cavity structure 5 to the thickness of the GaN homopolymer substrate 1 is limited to any value between 0.3 and 0.85. By limiting the ratio of the depth of the cavity structure 5 to the substrate thickness, it is possible to ensure that the cavity structure 5 has sufficient depth to effectively improve the device's beam collimation performance, while effectively preventing problems such as weakened support effect of the GaN homopolymer substrate 1 and reduced structural stability and reliability due to excessive depth of the cavity structure 5. This achieves the effect of effectively optimizing the optoelectronic performance of the device and improving the overall quality and reliability of the device.

[0059] In one embodiment, in step S1, the thickness of the obtained GaN homogeneous substrate 1 can first be thinned to the desired value using a chemical mechanical polishing (CMP) process, and then a hard mask layer 2 can be deposited on the N-polar surface of the GaN homogeneous substrate 1 using a plasma-enhanced chemical vapor deposition (PECVD) process. Furthermore, the deposition rate of the hard mask layer 2 is any value between 80 nm / min and 85 nm / min; the thickness of the hard mask layer 2 is controlled within the range of 150 μm to 500 μm, and the material is silicon oxide, silicon nitride, or Al2O3. In some embodiments, when using the chemical mechanical polishing (CMP) process to thin the GaN homogeneous substrate 1, the preferred equipment is an ASP-400c polishing machine, with process parameters set to a revolution speed of 20 r / min-50 r / min and a rotation speed of 70 r / min-120 r / min, using a SiO2 polishing slurry with a particle size of 80 nm-120 nm and a polyurethane polishing pad, and polishing under a pressure of 1 kg-3 kg for 5 min-15 min. During the thinning process, three GaN homogeneous substrates 1 can be processed simultaneously. Specifically, the three samples are arranged in an equilateral triangle around a tray, fixed with low-temperature wax, and then heated to 50°C-80°C for curing. Subsequently, the tray is mounted on the bottom of the polishing head, and the samples are polished by pressing them against a rotating polishing pad under a set pressure. Finally, the sample surface is thoroughly cleaned with deionized water to remove residual polishing liquid and reaction products. In other embodiments, a hard mask layer 2 can be deposited in a mixed atmosphere including SiH4, N2O, and O2.

[0060] In one embodiment, in step S2, a negative photoresist, such as KMPE 3130A, is preferred. Since negative photoresists have poor adhesion, to enhance the adhesion between the photoresist layer and the GaN homogeneous substrate 1, the GaN homogeneous substrate 1 can be pretreated with HMDS (hexamethyldisilazane) before coating the photoresist, forming a hydrophobic organic film on the hard mask layer 2, thereby significantly improving the adhesion of the photoresist. Subsequently, the photoresist is spin-coated at a speed of 2000 r / min-4000 r / min to obtain a uniform photoresist layer with a thickness of approximately 1 μm-5 μm, and pre-baked at 70℃-120℃ to remove residual solvents and moisture inside the photoresist layer, ensuring stable drying of the photoresist film. During the exposure and development process, the GaN homogeneous substrate 1 coated with photoresist is first exposed in a photolithography machine to induce a cross-linking reaction in the patterned areas. After exposure, it is immediately baked at 100℃-110℃ to promote cross-linking and reduce standing wave effects. Subsequently, a 2%-3% developer solution is used for development to dissolve the unexposed areas. Finally, it is fixed in deionized water to completely remove residual developer. After exposure and development, the GaN homogeneous substrate 1 can be inspected under a microscope to observe the morphology of the photoresist and determine whether it meets the requirements of sharp mesa edges, uniform and consistent photoresist layer distribution, and no photoresist adhesion or residue around the mesa. This ensures thorough development and provides a reliable mask for subsequent etching processes. In this embodiment or other embodiments, in step S3, it is preferable to use an AOE etching machine to perform dry etching on the exposed hard mask layer 2. Prior to etching, silicone oil is uniformly coated on the back side of the GaN homogeneous substrate 1, i.e., the Ga polar side of the GaN homogeneous substrate 1, to enhance thermal conductivity, ensure uniform heating of the GaN homogeneous substrate 1 during etching, and prevent carbonization and deformation of the photoresist due to localized high temperatures. During etching, an atmosphere including CF4 is continuously supplied to the cavity, and the temperature inside the cavity is controlled within the range of 10℃-20℃, the bias power (RF power) within the range of 120W-180W, and the plasma source power (ICP power) within the range of 800W-1200W. The hard mask layer 2 is etched at an etching rate of 160nm / min-175nm / min.

[0061] In one embodiment, in step S5, buffered oxide etchant (BOE) is preferably used to remove the residual hard mask layer 2. In this embodiment or other embodiments, in step S6, an indium tin oxide target is preferably used, and the current spreading layer 6 is deposited at a deposition temperature of 250°C-350°C, a power of 70W-120W, and an oxygen flow rate of 80sccm-120sccm at a deposition rate of 0.05nm / s-0.5nm / s. By limiting the deposition temperature, the film crystal quality and adhesion can be ensured; by precisely limiting the power and ensuring the stability of the power during the deposition process, a stable plasma environment can be maintained. By limiting the oxygen flow rate to adjust the oxygen partial pressure, the oxygen vacancy concentration of the film can be effectively optimized, thereby controlling its conductivity. In addition, the thickness of the current spreading layer 6 is preferably any value between 120nm and 150nm; this thickness range can balance good current spreading capability and high optical transmittance, thereby meeting the dual requirements of flip-chip Micro-LED devices for electrical and optical performance.

[0062] In one embodiment, step S7 preferably employs an Apex SLR ICP etching system, and etches the Ga polar surface of the GaN homogeneous substrate 1 at an etching rate of 400 nm / min-450 nm / min in a mixed atmosphere comprising Cl2, BCl3, and Ar, etching down to 0.9 μm-1.2 μm below the surface of the GaN homogeneous substrate 1. This equipment is specifically designed for the etching process of GaN materials. Its high-density plasma characteristics can generate a highly uniform and energy-concentrated ion beam during the etching process, making the etching reaction more precise and controllable, thereby obtaining an etched structure with excellent morphological characteristics, meeting the requirements of high performance and high reliability of devices. During the etching process, Cl2 in the mixed atmosphere acts as the main reactive gas and reacts chemically with the GaN homogeneous substrate 1, BCl3 is used to remove the native oxides on the surface of the GaN homogeneous substrate 1, and Ar enhances the anisotropy of the etching through physical bombardment. Furthermore, during the etching process, the RF power is preferably controlled within the range of 30W-40W to control ion energy, the ICP power is preferably controlled within the range of 400W-600W to generate high-density plasma, and the chamber pressure is preferably maintained within the range of 10mTorr-15mTorr to ensure the uniformity and directionality of etching. In this embodiment or other embodiments, in step S8, both the p-electrode structure and the n-electrode structure include an electrode sheet 10 and an electrode post 11; wherein, the electrode sheet 10 can be made of any one of the metal materials Cr, Pt, and Au, or a Cr / Pt / Au multilayer metal composite structure. In the Cr / Pt / Au multilayer metal composite structure, the outermost Au layer serves as the electrode body, which not only has excellent conductivity but also effectively protects the underlying metal from oxidation during subsequent high-temperature processes. The bottom Cr layer works synergistically with the middle Pt layer, and due to its low work function, it can form good ohmic contact with n-type and p-type gallium nitride materials, thereby significantly reducing contact resistance, improving current injection efficiency, and ensuring the efficient and stable operation of the device. Electrode post 11 is preferably an In post.

[0063] This application also provides a flip-chip Micro-LED device, which is prepared using the above-described preparation method.

[0064] This application also provides the application of the above-mentioned flip-chip Micro-LED devices in display devices.

[0065] Example 1

[0066] S1, such as Figure 2As shown in (a), three GaN homogeneous substrates 1, each with a thickness of 500 μm, were obtained. The N-polarized surfaces of these GaN homogeneous substrates 1 were placed in an equilateral triangle arrangement around a tray, fixed with low-temperature wax, and then heated to 65°C for curing. Subsequently, the tray was placed at the bottom of the polishing head of an ASP-400c polishing machine, set to a revolution speed of 30 r / min and a rotation speed of 90 r / min. Polishing was performed using a SiO2 polishing slurry with a particle size of 100 nm and a polyurethane polishing pad, under a pressure of 2 kg, reducing the thickness of the GaN homogeneous substrates 1 to 120 μm. The results are shown in Figure 1. Figure 2 As shown in (b). Afterwards, the surface of the GaN homogeneous substrate 1 was thoroughly cleaned with deionized water to remove residual polishing solution and reaction products. The thinned GaN homogeneous substrate 1 was placed in a plasma-enhanced chemical vapor deposition (PECVD) system, and deposition was performed under the following conditions: RF power set to 20W, deposition temperature set to 350℃, and a mixed atmosphere of SiH4, N2O, and O2. The SiH4 flow rate was 4 sccm, the N2O flow rate was 710 sccm, and the O2 flow rate was 180 sccm. A silicon oxide layer with a thickness of approximately 300 nm was deposited on the N-polar surface of the GaN homogeneous substrate 1 as the hard mask layer 2. The results are shown in Figure 2. Figure 2 As shown in (c).

[0067] S2. First, the GaN homogeneous substrate 1 is pretreated with HDMS. Then, KMPE 3130A negative photoresist is used as the photoresist and spin-coated onto the hard mask layer 2 at 3000 r / min to obtain a uniform photoresist layer 3 with a thickness of approximately 2.3 μm. This layer is then pre-baked on a 90℃ hot plate for 60 s to remove residual solvent and moisture, ensuring stable drying of the photoresist film. The results are as follows: Figure 2 As shown in (d). Subsequently, the sample was exposed in a photolithography machine for 7.5 s to induce cross-linking in the patterned area. Immediately after exposure, it was baked at 105°C for 120 s to promote cross-linking and reduce standing wave effects. Then, it was developed with a 2.38% developer for 35 s to dissolve the unexposed areas. Following this, it was fixed in deionized water for 1 min to completely remove residual developer, forming mask pattern 4. The result is shown in (d). Figure 2 As shown in (e). Finally, the GaN homogeneous substrate 1 was examined under a microscope. The morphology of the photoresist layer 3 was observed under an optical microscope. GaN homogeneous substrate 1 that meets the requirements of having distinct edges and corners of the mesa, uniform and consistent photoresist layer distribution, and no photoresist adhesion or residue around the mesa was selected.

[0068] S3. First, uniformly coat the back of the GaN homogeneous substrate 1 with silicone oil to enhance thermal conductivity. Next, place the GaN homogeneous substrate 1 in an AOE etching machine and etch it at 15°C, RF power of 150W, ICP power of 1000W, and in a CF4 atmosphere at a etching rate of 168nm / min. This removes the exposed hard mask layer 2 and exposes the GaN homogeneous substrate 1 in the target area. The results are as follows: Figure 2 As shown in (f).

[0069] S4. Using a 2M phosphoric acid (H3PO4) solution as the etching solution, the exposed GaN homogeneous substrate 1 was etched at a constant temperature of 190℃ and an etching rate of 1μm / min. After etching for approximately 60 minutes, the GaN homogeneous substrate 1 was promptly removed and repeatedly rinsed with deionized water to remove residual phosphoric acid solution, thus terminating the etching reaction. A cavity structure 5 with a depth of 60μm was formed on the N-polar surface of the GaN homogeneous substrate 1. The diameter of the cavity structure 5 gradually decreases along the target direction, and the angle between the sidewall of the cavity structure 5 and the target direction is approximately 8°. The target direction is the direction from the N-polar surface of the GaN homogeneous substrate 1 to the Ga-polar surface of the GaN homogeneous substrate 1. The results are as follows. Figure 2 As shown in (g).

[0070] S5. Immerse the etched GaN homogeneous substrate 1 in BOE solution for 3 min to completely dissolve the exposed hard mask layer 2, thus removing the hard mask layer 2. Then, ultrasonically clean the GaN homogeneous substrate 1 in a mixture of acetone and isopropanol for 15 min, followed by ultrasonic cleaning in an alcohol solution for 5 min to remove residual organic contaminants and photoresist. Finally, thoroughly rinse the sample with deionized water and dry it with nitrogen gas to obtain a clean GaN homogeneous substrate 1 with a cavity structure 5, as shown in the figure. Figure 2 As shown in (h).

[0071] S6. Using indium tin oxide (ITO) as the target material, an ITO layer with a thickness of approximately 150 nm was deposited on the Ga polar surface of the GaN homopolymer substrate 1 at a deposition rate of 0.2 nm / s under conditions of 300℃, 90W power, and an oxygen atmosphere with a flow rate of 100 sccm. This layer served as the current spreading layer 6. The results are as follows: Figure 2 As shown in (i). Next, deposition was performed at a deposition temperature of 350°C, an RF power of 20W, and a mixed atmosphere comprising SiH4, N2O, and O2, with a SiH4 flow rate of 4 sccm, an N2O flow rate of 710 sccm, and an O2 flow rate of 180 sccm, at a deposition rate of 82 nm / min. A SiO2 layer with a thickness of approximately 600 nm was deposited on the current spreading layer 6 as the first protective layer 7. The result is shown in [Figure 1]. Figure 2As shown in (j). Then, KMPE 3130A negative adhesive was spin-coated onto the first protective layer 7, followed by exposure and development to form a photolithographic pattern. Afterwards, the GaN homogeneous substrate 1 was etched at 15°C, RF power of 150W, ICP power of 1000W, and in a CF4 atmosphere at a etching rate of 320nm / min to remove part of the first protective layer 7, exposing the underlying current spreading layer 6. The result is shown in (j). Figure 2 As shown in (k). A suitable amount of silicone grease was uniformly coated on the N-polar surface of the GaN homopolymer substrate 1 to enhance thermal conductivity, ensuring that heat during the etching process could be dissipated in a timely manner and maintaining the uniformity of the sample temperature distribution. Ion beam etching (IBE) was used, with an ion energy of 350 eV and an etching rate of approximately 21 nm / min, to directly bombard the exposed current spreading layer 6 on the surface of the GaN homopolymer substrate 1 using an Ar ion beam. Each etching cycle was set to 2 minutes and 15 seconds, followed by a 1-minute pause for heat dissipation. This "etch-pause" cycle was repeated four times to physically remove the current spreading layer 6 and to maximize the protection of the adhesive layer from thermal damage while ensuring that the ITO sidewalls were completely etched away. Finally, the current spreading layer 6 was formed only on the Ga polar surface of the GaN homopolymer substrate 1 at the location corresponding to the cavity structure 5, as shown in the figure. Figure 2 As shown in (l).

[0072] S7. Using an Apex SLR ICP etching system, at an RF power of 35W, an ICP power of 500W, a chamber pressure maintained at 12mTorr, and a mixed atmosphere including Cl2, BCl3, and Ar, the region located around the current spreading layer 6 on the Ga polar surface of the GaN homogeneous substrate 1 was etched at an etching rate of 428nm / min in an atmosphere containing Cl2, BCl3, and Ar. The flow rates were 32sccm for Cl2, 8sccm for BCl3, and 5sccm for Ar. A mesa structure 8 with a height of 1.2μm was formed at the current spreading layer 6. The results are as follows: Figure 2 As shown in the middle (m).

[0073] S8. At a deposition temperature of 350℃, an RF power of 20W, and in a mixed atmosphere including SiH4, N2O, and O2, a SiO2 layer with a thickness of approximately 200nm was deposited on the Ga polar surface of the GaN homogeneous substrate 1 at a deposition rate of 85nm / min, serving as the second protective layer 9. The results are as follows: Figure 2As shown in (n). The SiH4 flow rate is 4 sccm, the N2O flow rate is 710 sccm, and the O2 flow rate is 180 sccm. Next, KMPE 3130A negative resist is spin-coated onto the second protective layer 9, followed by exposure and development to form a photolithographic pattern. Then, a layer of silicone oil is uniformly applied to the N-polar surface of the GaN homogeneous substrate 1 to enhance thermal conductivity, ensuring uniform heat dissipation during etching and preventing photoresist carbonization due to localized overheating, thereby ensuring pattern accuracy and facilitating subsequent resist removal. Subsequently, the GaN homogeneous substrate 1 is etched at 15°C, with an RF power of 150W, an ICP power of 1000W, and an atmosphere of CF4 at a etching rate of 320 nm / min, removing part of the second protective layer 9 to expose the underlying current spreading layer 6 and a portion of the area surrounding the mesa structure 8. The results are shown in the figure. Figure 2 As shown in (o). Then, using a magnetron sputtering apparatus Lab18, a Cr / Pt / Au multilayer metal composite structure was deposited on the exposed current spread layer 6 and a portion of the area surrounding the mesa structure 8 to form the electrode sheet 10. The thicknesses of each metal layer in the electrode sheet 10 were 30 nm, 50 nm, and 200 nm, respectively. The results are shown in Figure 10. Figure 2 As shown in (p). Subsequently, a second protective layer 9 with a thickness of approximately 300 nm was deposited on the Cr / Pt / Au multilayer metal composite structure at a deposition temperature of 350℃, an RF power of 20W, and a mixed atmosphere including SiH4, N2O, and O2, at a deposition rate of 85 nm / min. The results are shown in Figure 9. Figure 2 As shown in (q). The second protective layer 9 on the Cr / Pt / Au multilayer metal composite structure was etched at 15℃, RF power of 150W, ICP power of 1000W, and in a CF4 atmosphere at a etching rate of 340nm / min. Part of the second protective layer 9 was removed, forming a well-defined and exposed contact window between the N and P electrodes. The results are shown in... Figure 2 As shown in (r). At a vacuum degree of 5×10 -4 Indium metal was heated and evaporated in a vacuum chamber at a current of 300 A to form In pillars with a thickness of approximately 2.5 μm in the electrode region, serving as electrode pillar 11. After deposition, the GaN homogeneous substrate 1 was allowed to cool naturally in the vacuum chamber for 15 minutes to prevent high-temperature oxidation and ensure the stability of the metal layer. Subsequently, the vacuum chamber was filled with gas to atmospheric pressure, and the GaN homogeneous substrate 1 with p-electrode and n-electrode structures was removed. The results are as follows. Figure 2 As shown in (s), the substrate was flip-chip bonded to the substrate 12 using p-electrode and n-electrode structures, and epoxy resin 301 curing adhesive was filled into the bonding area using a Musashi dispensing machine to obtain a flip-chip Micro-LED device. The results are shown in Figure 12. Figure 2 As shown in (t).

[0074] To evaluate the light emission performance of the flip-chip Micro-LED device prepared in Example 1, optical tests were performed. During testing, a rectangular receiver with dimensions of 400μm × 400μm was placed 200μm directly above the light-emitting surface of the device. The test conditions were set as follows: a Lambertian light source with a wavelength of 436nm and a power of 1W, and a emission angle of ±40°. The test results are as follows. Figure 3 , Figure 4 As shown.

[0075] from Figure 3 and Figure 4 As can be seen, this flip-chip Micro-LED device exhibits excellent beam collimation and a low emission angle. Its light intensity distribution displays a distinct peak, indicating highly concentrated beam energy. This demonstrates that the device's beam experiences almost no scattering in space, exhibiting excellent beam collimation and effectively reducing light loss. Regarding the beam divergence angle, tests show that the device's emission divergence angle is within ±18°, further validating its high collimation and low emission angle.

[0076] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0077] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A method for fabricating a flip-chip Micro-LED device, characterized in that, Includes the following steps: S1. Obtain a GaN homogeneous substrate and deposit a hard mask layer on the N-polar surface of the GaN homogeneous substrate; S2. After coating the hard mask layer with photoresist, exposure and development processes are performed to form a mask pattern and expose the hard mask layer above multiple target areas. S3. The exposed hard mask layer is etched using a dry etching process to expose the GaN homogeneous substrate in the target region. S4. The exposed GaN homogeneous substrate is etched using a wet etching process to form a cavity structure on the N-polar surface of the GaN homogeneous substrate. The diameter of the cavity structure gradually decreases along the target direction, and the angle between the sidewall of the cavity structure and the target direction is any value between 0° and 15°. The target direction is the direction from the N-polar surface of the GaN homogeneous substrate to the Ga-polar surface of the GaN homogeneous substrate. S5. The hard mask layer is removed by wet etching. S6. Deposit a current spreading layer at the position corresponding to the cavity structure on the Ga polar surface of the GaN homogeneous substrate; S7. Etch the region on the Ga polar surface of the GaN homogeneous substrate located on the periphery of the current spreading layer to form a mesa structure at the current spreading layer. S8. A p-electrode structure is formed on the mesa structure, and an n-electrode structure is formed on the GaN homogeneous substrate in the region located on the periphery of the mesa structure. The GaN homogeneous substrate is flip-chip connected to the substrate through the p-electrode structure and the n-electrode structure to obtain a flip-chip Micro-LED device.

2. The preparation method according to claim 1, characterized in that, In step S4, the corrosion treatment uses a medium-strong acid solution, the corrosion temperature is any value between 160℃ and 230℃, and the corrosion rate is controlled within the range of 0.1μm / min to 2μm / min.

3. The preparation method according to claim 2, characterized in that, The corrosive solution is a 0.5M-5M phosphoric acid solution.

4. The preparation method according to claim 1, characterized in that, The thickness of the GaN homogeneous substrate is controlled within the range of 90μm-150μm; the ratio of the depth of the cavity structure to the thickness of the GaN homogeneous substrate is any value between 0.3 and 0.

85.

5. The preparation method according to claim 1, characterized in that, In step S1, the deposition rate of the hard mask layer is any value between 80 nm / min and 85 nm / min; The thickness of the hard mask layer is controlled within the range of 150μm-500μm, and the material is silicon oxide, silicon nitride, or Al2O3.

6. The preparation method according to claim 1, characterized in that, In step S3, the hard mask layer is etched at an etching rate of 160nm / min-175nm / min under the conditions of CF4 atmosphere, bias power of 120W-180W and plasma source power of 800W-1200W.

7. The preparation method according to claim 1, characterized in that, In step S6, an indium tin oxide target is used to deposit the current spread layer at a deposition temperature of 250℃-350℃, a power of 70W-120W, and an oxygen flow rate of 80sccm-120sccm, with a deposition rate of 0.05nm / s-0.5nm / s. The thickness of the current spreading layer is any value between 120nm and 150nm.

8. The preparation method according to claim 1, characterized in that, In step S7, the Ga polar surface of the GaN homogeneous substrate is etched in a mixed atmosphere including Cl2, BCl3 and Ar at an etching rate of 400 nm / min-450 nm / min, and etched to a depth of 0.9 μm-1.2 μm below the surface of the GaN homogeneous substrate.

9. A flip-chip Micro-LED device, characterized in that, It is prepared by the preparation method according to any one of claims 1-8.

10. The application of the flip-chip Micro-LED device according to claim 9 in a display device.

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