Preparation method of packaging substrate and packaging substrate

Abstract

This application provides a method for fabricating a packaging substrate and the packaging substrate itself. The method for fabricating the packaging substrate includes: forming a through-hole in a first substrate, the first substrate including a first surface and a second surface disposed opposite to each other; forming a first photoresist layer on the first surface; patterning the first photoresist layer using the first substrate as a mask to form a first fabrication hole, the first fabrication hole and the first connection hole being connected; fabricating a first conductive post within the first connection hole and the first fabrication hole; removing the first photoresist layer so that a portion of the first conductive post is exposed through the first connection hole; and forming a second substrate on the first surface, the second substrate having a through-hole, the second substrate being fitted onto the first conductive post through the second connection hole. This application can improve the process performance of the packaging substrate.

Description

Technical Field

[0001] This application relates to the field of semiconductor equipment technology, and in particular to a method for preparing a packaging substrate and the packaging substrate itself. Background Technology

[0002] With the development of high-performance chips, chip integration is becoming increasingly higher, and interconnect density is also becoming increasingly dense. Traditional organic substrates can no longer meet the requirements in terms of flatness, fine lines, and signal transmission rates. In the packaging process, glass substrates can withstand higher temperatures better than organic substrates, and their coefficient of thermal expansion is similar to that of silicon, thereby reducing stress warping problems caused by thermal mismatch.

[0003] However, the process performance of the encapsulation substrate made of glass material still needs to be improved. Summary of the Invention

[0004] This application provides a method for preparing a packaging substrate and a packaging substrate, aiming to improve the process performance of the packaging substrate.

[0005] An embodiment of the first aspect of this application provides a method for preparing a packaging carrier, comprising: A through-hole is provided on a first substrate, and the first substrate includes a first surface and a second surface disposed opposite to each other. A first photoresist layer is formed on the first surface; Using the first substrate as a mask, the first photoresist layer is patterned to form the first fabrication hole, and the first fabrication hole and the first connection hole are connected. A first conductive post is fabricated within the first connecting hole and the first fabrication hole; Remove the first photoresist layer so that a portion of the first conductive post is exposed through the first connection hole; A second substrate is disposed on the first surface. The second substrate has a through second connection hole and is sleeved onto the first conductive post through the second connection hole.

[0006] According to an embodiment of the first aspect of this application, prior to the step of fabricating the first conductive post in the first connecting hole and the first fabrication hole, the method further includes: A second photoresist layer is formed on the second surface; The second photoresist layer is patterned to form a second fabrication hole, which is connected to the first connection hole. In the step of fabricating the first conductive post in the first connecting hole and the first preparation hole: the first conductive post is fabricated in the first connecting hole, the first preparation hole and the second preparation hole; In the step of removing the first photoresist layer so that a portion of the first conductive post is exposed through the first connection hole: the first photoresist layer and the second photoresist layer are removed so that a portion of the first conductive post is exposed through the first surface and the second surface. In the step of setting a second substrate on the first surface, the second substrate having a through second connection hole, and the second substrate being sleeved onto the first conductive post through the second connection hole: A third substrate is also provided on the second surface. The third substrate has a through third connection hole and is sleeved on the first conductive post through the third connection hole.

[0007] According to any of the foregoing embodiments of the first aspect of this application, prior to the step of patterning the second photoresist layer to form the second fabrication hole, and connecting the second fabrication hole and the first connection hole, the method further includes: A protective layer is formed on the surface of the first photoresist layer that is away from the first substrate and faces the first fabrication hole; In the step of patterning the second photoresist layer to form the second fabrication hole, and the second fabrication hole being connected to the first connection hole: using the first photoresist layer and the first substrate as masks, the second photoresist layer is patterned to form the second fabrication hole, and the second fabrication hole is connected to the first connection hole.

[0008] According to any of the foregoing embodiments of the first aspect of this application, prior to the step of patterning the first photoresist layer using the first substrate as a mask to form the first fabrication hole, and connecting the first fabrication hole and the first connection hole, the method further includes: A first seed layer is disposed on a first substrate, the first seed layer covering at least the second surface and the inner wall surface of the first substrate facing the first connection hole; After the step of removing the first photoresist layer to expose a portion of the first conductive post through the first connection hole, the method further includes: removing the first seed layer located on the second surface to form a first seed portion located in the first connection hole.

[0009] According to any of the foregoing embodiments of the first aspect of this application, a second substrate is disposed on a first surface, the second substrate having a through second connection hole, and the second substrate is sleeved onto the first conductive post through the second connection hole in the following step: Bond the second substrate to the first substrate; Alternatively, an adhesive layer can be provided between the second substrate and the first surface to bond the second substrate and the first surface together.

[0010] According to any of the foregoing embodiments of the first aspect of this application, in the step of providing a second substrate on a first surface, the second substrate having a through second connection hole, and the second substrate being sleeved on a first conductive post through the second connection hole: the first conductive post and the second substrate are spaced apart toward the hole wall of the second connection hole to form a first receiving gap; After the step of setting a second substrate on the first surface, the second substrate having a through second connection hole, and the second substrate being sleeved onto the first conductive post through the second connection hole, the method further includes: A first buffer filling section is prepared in the first receiving gap.

[0011] According to any of the foregoing embodiments of the first aspect of this application, the step of preparing the first buffer filling portion in the accommodating gap includes: A buffer preparation layer is formed by filling the surface of the second substrate and the first conductive pillar opposite to the first substrate and the receiving gap with buffer material. Grinding removes the buffer material located on the side of the second substrate and the first conductive post opposite to the first substrate, to obtain the first buffer filling portion located in the receiving gap.

[0012] According to any of the foregoing embodiments of the first aspect of this application, the step of preparing the first buffer filling portion in the accommodating gap includes: A buffer preparation layer is formed by filling the surface of the second substrate and the first conductive pillar opposite to the first substrate and the receiving gap with buffer material. The buffer preparation layer is patterned to form a first buffer hole, a first conductive post is exposed through the first buffer hole, a portion of the buffer material is located in the first receiving gap to form a first buffer filling portion, and a portion of the buffer material is located on the side of the second substrate away from the first substrate to form a first buffer layer.

[0013] An embodiment of the second aspect of this application also provides a packaging carrier, comprising: a substrate assembly including a first substrate and a second substrate stacked together, the first substrate having a through-hole and the second substrate having a through-hole, and the first and second connecting holes communicating with each other; a first conductive post located at the first and second connecting holes, and the first conductive post and the second substrate being spaced apart to form a first receiving gap facing the inner wall surface of the second connecting hole; and a first buffer filling portion located at the first receiving gap.

[0014] According to an embodiment of the second aspect of this application, the substrate assembly further includes a third substrate, which is disposed on the side of the first substrate away from the second substrate. The third substrate has a through-hole for a third connection hole, and a portion of the first conductive post is located in the third connection hole and is spaced apart from the inner wall surface of the third substrate facing the third connection hole to form a second receiving gap. The encapsulation carrier also includes a second buffer filling portion located in the second receiving gap.

[0015] The third aspect of this application also provides a semiconductor packaging structure, including a packaging substrate prepared by the preparation method of any of the first aspects of the above-described embodiments, or a packaging substrate provided by any of the second aspects of the above-described embodiments.

[0016] In the method for fabricating a packaging substrate provided in this application embodiment, a through-hole is first formed on a first substrate, the first connecting hole penetrating the first surface and the second surface of the first substrate; then a first photoresist layer is formed on the first surface, and then the first photoresist layer is patterned using the first substrate as a mask to form a first fabrication hole penetrating the first photoresist layer, the first fabrication hole and the first connecting hole being connected; next, a first conductive pillar is fabricated in the first fabrication hole and the first connecting hole, and the first photoresist layer is removed, so that the first conductive pillar located in the first fabrication hole can be exposed. Finally, a second substrate is formed on the first surface, and the second substrate can be fitted onto the first conductive pillar through the second connecting hole. On the one hand, this application embodiment directly uses the first substrate as a mask to pattern the first photoresist layer, without the need for an additional mask, which simplifies the fabrication process of the packaging substrate, improves the fabrication efficiency of the packaging substrate, and the aperture of the first fabrication hole and the aperture of the first connecting hole are close, so that the diameter of the first conductive pillar at different positions tends to be consistent. On the other hand, the packaged substrate formed includes a second substrate of a first substrate, and a part of the first conductive pillar is in the first substrate and another part is in the second substrate. This can reduce the difficulty of filling conductive materials and improve the problem of excessively deep openings on the same substrate, which affects the yield of the packaged substrate. Attached Figure Description

[0017] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, wherein the same or similar reference numerals denote the same or similar features.

[0018] Figure 1 This is a schematic diagram of a method for preparing a packaging carrier provided in an embodiment of this application; Figures 2 to 8 This is a schematic diagram of the fabrication process of a packaging carrier provided in an embodiment of this application; Figure 9 This is a schematic flowchart of a method for preparing a packaging carrier plate according to another embodiment of this application; Figures 10 to 22 This is a schematic diagram of the fabrication process of a packaging carrier provided in an embodiment of this application; Figure 23 This is a schematic flowchart of a method for preparing a packaging carrier plate according to another embodiment of this application; Figure 24 This is a schematic diagram of the fabrication process of a packaging carrier provided in another embodiment of this application; Figure 25 This is a schematic flowchart of a method for preparing a packaging carrier plate according to another embodiment of this application; Figure 26 This is a schematic diagram of the fabrication process of a packaging carrier provided in another embodiment of this application; Figure 27 This is a schematic flowchart of a method for preparing a packaging carrier plate according to another embodiment of this application; Figures 28 to 31 This is a schematic diagram of the fabrication process of a packaging substrate provided in another embodiment of this application.

[0019] Explanation of reference numerals in the attached figures: 100, First substrate; 110, First connecting hole; 101, First surface; 102, Second surface; 200, Second substrate; 210, Second connecting hole; 220, First receiving gap; 300, Third substrate; 310, Third connecting hole; 320, Second receiving gap; 410. First conductive post; 420. First seed section; 511, First buffer filling section; 512, Second buffer filling section; 521, First buffer layer; 522, Second buffer layer; 600, Add-on Components; 10. First photoresist layer; 11. First preparation hole; 20. Second photoresist layer; 21. Second preparation hole; 30. Protective layer; 40. First seed layer; Z, thickness direction. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0022] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. It should be noted that, unless otherwise specified, different features in the embodiments of this application can be combined with each other.

[0023] For ease of understanding, the accompanying diagram shows the mutually orthogonal X-axis, Y-axis, and Z-axis. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction relative to the plane containing the X and Y directions. Furthermore, a view where various elements are observed parallel to the plane containing the X and Y directions is called a top view. Alternatively, the planes in the X and Y directions can be planes parallel to the display surface of the display panel, and the Z-direction can be a direction parallel to the thickness direction of the display panel.

[0024] For certain elements, terms like "above" or "overhead" are sometimes used when describing the position of an element in the Z direction, and "below" or "under" are used when describing the position of an element in the opposite direction. Furthermore, when using terms like "above," "overhead," "below," "under," or "relative" to define the positional relationship between two elements, this includes not only the state where the two elements are directly adjacent, but also the state where the two elements are separated by gaps or other elements. Additionally, terms like "first," "second," and "third" are used only for distinguishing descriptions and should not be interpreted as indicating or implying relative importance.

[0025] The most crucial aspect of glass substrates is the fabrication of through-glass vias (TGVs), especially the drilling and filling of high aspect ratio TGVs, which remains a significant technical challenge for the substrate industry. Glass is a brittle material, and after metal is used to fill the TGVs, the difference in thermal expansion coefficients between the metal and glass leads to high stress and a high risk of cracking in the via walls.

[0026] To address the aforementioned technical problems, this application is proposed. For a better understanding of this application, the following is combined with the appendix. Figures 1 to 31 This application describes a method for preparing a packaging substrate and the packaging substrate itself, as provided in the embodiments of this application.

[0027] like Figure 1 As shown, an embodiment of the first aspect of this application provides a method for preparing a packaging carrier, comprising: Step S01: As Figure 2 As shown, a through first connection hole 110 is provided on the first substrate 100, and the first substrate 100 includes a first surface 101 and a second surface 102 disposed opposite to each other.

[0028] For example, the first surface 101 and the second surface 102 are disposed opposite each other along the thickness direction Z, the first connecting hole 110 penetrates the first substrate 100 along the thickness direction Z, and the first connecting hole 110 passes through the first surface 101 and the second surface 102.

[0029] Step S02: As Figure 3As shown, a first photoresist layer 10 is formed on the first surface 101.

[0030] Step S03: As Figure 4 and Figure 5 As shown, the first substrate 100 is used as a mask to pattern the first photoresist layer 10 to form the first preparation hole 11, and the first preparation hole 11 and the first connection hole 110 are connected.

[0031] Optionally, during steps S02 to S03, the first substrate 100 can be rotated so that it is positioned above the first photoresist layer 10, and then light can be irradiated from the side of the first substrate 100 opposite to the first photoresist layer 10. Figure 4 The direction of the light is indicated by an arrow.

[0032] Step S04: As Figure 6 As shown, a first conductive post 410 is prepared in the first connecting hole 110 and the first preparation hole 11.

[0033] Step S05: As Figure 7 As shown, the first photoresist layer 10 is removed so that a portion of the first conductive post 410 is exposed through the first connection hole 110.

[0034] Step S06: As Figure 8 As shown, a second substrate 200 is disposed on the first surface 101. The second substrate 200 has a through second connection hole 210 and is sleeved on the first conductive post 410 through the second connection hole 210.

[0035] In the method for fabricating a packaging substrate provided in this application embodiment, firstly, in step S01, a through-hole 110 is formed on the first substrate 100, the first connecting hole 110 penetrating the first surface 101 and the second surface 102 of the first substrate 100; then, in step S02, a first photoresist layer 10 is formed on the first surface 101; next, in step S03, the first photoresist layer 10 is patterned using the first substrate 100 as a mask to form a first fabrication hole 11 penetrating the first photoresist layer 10, the first fabrication hole 11 and the first connecting hole 110 being connected; next, in step S04, a first conductive post 410 is formed in the first fabrication hole 11 and the first connecting hole 110; and in step S05, the first photoresist layer 10 is removed, so that the first conductive post 410 located in the first fabrication hole 11 can be exposed. Finally, in step S06, a second substrate 200 is formed on the first surface 101 to form a packaging substrate, the second substrate 200 being able to be fitted onto the first conductive post 410 through the second connecting hole 210. On the one hand, in this embodiment, the first substrate 100 is directly used as a mask to pattern the first photoresist layer 10, eliminating the need for an additional mask. This simplifies the fabrication process of the packaging substrate and improves its fabrication efficiency. On the other hand, the fabricated packaging substrate includes a second substrate 200 of the first substrate 100. A portion of the first conductive pillar 410 is located within the first substrate 100, and another portion is located within the second substrate 200. The smaller opening depth on the different substrates reduces the difficulty of filling the conductive material and improves the problem of excessively deep openings on the same substrate, which affects the yield of the packaging substrate.

[0036] Furthermore, in this embodiment, the first substrate 100 is used as a mask to process the first photoresist layer 10. Light can pass through the first connection hole 110 to remove part of the first photoresist layer 10, thereby forming the first preparation hole 11. This allows the size of the first preparation hole 11 to be the same as the size of the first connection hole 110, and the axes of the first preparation hole 11 and the first connection hole 110 to be on the same straight line. This ensures the consistency of the radial dimension and the axial dimension of the first conductive pillar 410 formed. That is, the radial dimension of the first conductive pillar 410 is the same at different positions, and the different positions are coaxial. This improves the misalignment and excessive thinness at the connection position between the first conductive pillar 410 located in the first substrate 100 and the first conductive pillar 410 located in the second substrate 200, thereby improving the preparation yield of the first conductive pillar 410 and the current carrying capacity of the first conductive pillar 410.

[0037] There are various ways to configure the materials of the first substrate 100 and the second substrate 200, and the materials of the first substrate 100 and the second substrate 200 can be the same or different. For example, the first substrate 100 and the second substrate 200 can be made of the same material and both include glass. Compared with organic materials, glass materials can better withstand higher temperatures, and their coefficient of thermal expansion is similar to that of silicon, thereby reducing stress warping problems caused by thermal mismatch. The high flatness and low roughness of the glass substrate surface enable denser wiring. Glass substrates have extremely low dielectric constants and dielectric losses, which can improve signal transmission speed and signal integrity. At the same time, glass substrates have excellent chemical stability and can effectively resist environmental corrosion such as moisture, acids, and alkalis. With its superior physical, chemical, and electrical properties, glass substrates can replace organic substrates.

[0038] In some alternative embodiments, such as Figure 9 As shown, prior to step S04, the method for preparing the carrier plate further includes: Step S02': As Figure 10 As shown, a second photoresist layer 20 is disposed on the second surface 102.

[0039] Step S03': As Figure 11 As shown, the second photoresist layer 20 is patterned to form a second fabrication hole 21, which is connected to the first connection hole 110.

[0040] So if Figure 12 As shown, in step S04, a first conductive post 410 is fabricated within the first connecting hole 110, the first fabrication hole 11, and the second fabrication hole 21. Figure 13 As shown, in step S05: the first photoresist layer 10 and the second photoresist layer 20 are removed, so that a portion of the first conductive pillar 410 is exposed from the first surface 101 and the second surface 102. Figure 14 As shown, in step S06: a third substrate 300 is also provided on the second surface 102. The third substrate 300 has a through third connection hole 310, and the third substrate 300 is sleeved on the first conductive post 410 through the third connection hole 310.

[0041] In this embodiment, before fabricating the first conductive post 410, a second photoresist layer 20 is formed on the second surface 102 in step S02', and a second fabrication hole 21 penetrating the second photoresist layer 20 is formed in step S03'. The second fabrication hole 21 is connected to the first connection hole 110. During the fabrication of the first conductive post 410 in step S04, conductive material can flow into the first fabrication hole 11, the first connection hole 110, and the second fabrication hole 21, forming the first conductive post 410 located within these three holes. After removing the second photoresist layer 20 in step S05, a portion of the first conductive post 410 originally located within the second fabrication hole 21 is exposed. In step S06, the third substrate 300 can be fitted onto the first conductive post 410 through the third connection hole 310. The packaging substrate of this application embodiment includes three substrates: a first substrate 100, a second substrate 200, and a third substrate 300. This can further reduce the depth of the connecting holes on the same substrate, better improve the defects caused by excessive depth of glass through holes, and further improve the process performance and manufacturing yield of the packaging substrate.

[0042] Optionally, the third substrate 300 can be made of the same material as the first substrate 100 and the second substrate 200 to further simplify the manufacturing process of the packaging substrate.

[0043] Optionally, the first photoresist layer 10 and the second photoresist layer 20 can be made of the same material to further simplify the fabrication process of the packaging substrate.

[0044] Optionally, the thicknesses of the first photoresist layer 10, the second photoresist layer 20, and the first substrate 100 can be the same, ensuring that the first conductive post 410 has the same length within the first fabrication hole 11, the second fabrication hole 21, and the first connection hole 110. This results in the first conductive post 410 having the same length within the first substrate 100, the second substrate 200, and the third substrate 300, leading to a more balanced stress distribution on the first conductive post 410. Alternatively, the thickness of the first substrate 100 can be greater than the thickness of the first photoresist layer 10 and / or the second photoresist layer 20, or it can be less than the thickness of the first photoresist layer 10 and / or the second photoresist layer 20. When the second photoresist layer 20 and / or the third photoresist layer are removed, the exposed length of the first conductive post 410 is smaller, reducing the likelihood of breakage or other defects.

[0045] In some optional embodiments, the method further includes, before step S03': Figure 15 As shown, a protective layer 30 is formed on the surface of the first photoresist layer 10 facing away from the first substrate 100 and towards the first fabrication hole 11. In step S03', as... Figure 16As shown, using the first photoresist layer 10 and the first substrate 100 as masks, the second photoresist layer 20 is patterned to form a second preparation hole 21, which is connected to the first connection hole 110.

[0046] In these optional embodiments, before patterning the second photoresist layer 20, a protective layer 30 can be formed on the first photoresist layer 10. The protective layer 30 can cover the surface of the first photoresist layer 10 facing away from the substrate and the inner wall surface of the first photoresist layer 10 facing the first fabrication hole 11. Then, when patterning the second photoresist layer 20, the first substrate 100 with the first photoresist layer 10 and the protective layer 30 can be used as a mask to pattern the second photoresist layer 20. On the one hand, no additional mask is needed when patterning the second photoresist layer 20, which simplifies the fabrication process of the packaging substrate and improves the fabrication efficiency of the packaging substrate. On the other hand, by using the first substrate 100 and the first photoresist layer 10 as a mask to process the second photoresist layer 20, light can pass through the first preparation hole 11 and the first connection hole 110 to remove part of the second photoresist layer 20, thereby forming the second preparation hole 21. This allows the size of the second preparation hole 21 to be the same as the size of the first preparation hole 11 and the first connection hole 110, thereby ensuring the consistency of the radial dimensions of the first conductive pillar 410 and improving the preparation yield of the first conductive pillar 410.

[0047] There are various ways to set the material of the protective layer 30. For example, the material of the protective layer 30 may include titanium, so that the protective layer 30 has good light-shielding properties and a thin thickness.

[0048] In some optional embodiments, the method further includes, before step S03: Figure 17 As shown, a first seed layer 40 is provided on the first substrate 100, and the first seed layer 40 at least covers the second surface 102 and the inner wall surface of the first substrate 100 facing the first connection hole 110. Step S05 further includes: removing the first seed layer 40 located on the second surface 102 to form a first seed portion 420 located in the first connection hole 110. Optionally, the first seed layer 40 may cover the first surface 101, the second surface 102, and the inner wall surface of the first connection hole 110 of the first substrate 100, and step S05 further includes: removing the first seed layer 40 located on the first surface 101 and the second surface 102 to form a first seed portion 420 located in the first connection hole 110.

[0049] In these optional embodiments, prior to step S03, a first seed layer 40 is formed on the first substrate 100, the first seed layer 40 at least covering the second surface 102 and the inner wall surface of the first substrate 100 facing the first connection hole 110. For example... Figure 18 and Figure 19As shown, during the patterning process of the first photoresist layer 10 in step S03, the first seed layer 40 can provide protection to the first substrate 100, and the first seed layer 40 has good light-shielding properties, which can improve the preparation yield of the first photoresist layer 10. Figure 20 As shown, in step S04, when the first conductive pillar 410 is prepared, the first seed layer 40 located within the first connecting hole 110 can improve the preparation yield of the first conductive pillar 410. Figure 21 As shown, when the first seed layer 40 is removed in step S05, a portion of the first seed layer 40 located in the first connection hole 110 is retained to form a first seed portion 420 located in the first connection hole 110.

[0050] Furthermore, when preparing the first conductive post 410, if the entire deep hole formed by the combination of the first connecting hole 110 and the first preparation hole 11 is electroplated together, it will lead to problems such as plating solution consumption and exchange difficulties, and easy sealing and formation of voids. In the embodiments of this application, the first conductive post 410 can be electroplated in the first connecting hole 110 with the first seed portion 420 first, and then continue to grow into the first preparation hole 11, which can improve the preparation yield of the first conductive post 410.

[0051] Optionally, a first seed layer 40 can be prepared before step S02. In this case, the first seed layer 40 can cover the first surface 101, the second surface 102, and the inner wall surface of the first substrate 100 facing the first connection hole 110. In step S02, the first photoresist layer 10 can be disposed on the side of the first seed layer 40 facing away from the first surface 101. When the first photoresist layer 10 is patterned in step S03, the first seed layer 40 located on both the first surface 101 and the second surface 102 can be used as a mask, which can improve the preparation yield of the first preparation hole 11 and improve the problem of over-etching of the first photoresist layer 10. Then, in step S05, the first seed layer 40 located on the first surface 101 and the second surface 102 can be removed.

[0052] Optionally, the protective layer 30 can be made of the same material as the first seed layer 40 to simplify the fabrication process of the encapsulation substrate. In other embodiments, the protective layer 30 and the first seed layer 40 can be made of different materials. For example, the first seed layer 40 may include two or more sublayers, while the protective layer 30 may be a single-layer structure.

[0053] Optionally, in step S06, the second substrate 200 and the first substrate 100 can be bonded together; Alternatively, an adhesive layer can be provided between the second substrate 200 and the first surface 101 to bond the second substrate 200 and the first surface 101 together.

[0054] In these alternative embodiments, when the first substrate 100 and the second substrate 200 are bonded or adhered to each other, the connection strength between the first substrate 100 and the second substrate 200 can be improved, thereby further improving the yield of the packaging carrier.

[0055] Optionally, when the packaging substrate includes a third substrate 300, in step S06, the third substrate 300 and the first substrate 100 may be bonded together; or, an adhesive layer may be provided between the third substrate 300 and the second surface 102 to bond the third substrate 300 and the second surface 102. This improves the connection stability between the third substrate 300 and the first substrate 100.

[0056] Optionally, there are several ways to provide an adhesive layer between the first substrate 100 and the second substrate 200. For example, before the second substrate 200 is fitted onto the first conductive post 410, an adhesive layer can be coated on the first surface 101 of the first substrate 100. Alternatively, an adhesive layer can be coated on the surface of the second substrate 200, so that the second substrate 200 with the adhesive layer is fitted onto the first conductive post 410.

[0057] In some alternative embodiments, in step S06, such as Figure 22 As shown, the first conductive post 410 and the second substrate 200 are spaced apart from the wall of the second connection hole 210 to form a first receiving gap 220. Figure 23 As shown, after step S06, the following steps are also included: Step S07: As Figure 24 As shown, a first buffer filling portion 511 is prepared in the first receiving gap 220.

[0058] In these optional embodiments, the diameter of the second connecting hole 210 can be larger than the diameter of the first connecting hole 110. When the second substrate 200 is sleeved on the first conductive post 410, a first receiving gap 220 is formed between the hole walls of the first conductive post 410 and the second connecting hole 210. In step S07, a first buffer filling part 511 is provided in the first receiving gap 220. The first buffer filling part 511 can play a buffering role and improve the adverse problems caused by the different expansion rates of the first conductive post 410 and the second substrate 200.

[0059] There are various ways to prepare the first buffer filling portion 511. In some optional embodiments, such as... Figure 25 As shown, step S07 may include: Step S071: As Figure 26 As shown, a buffer preparation layer is formed by filling the surfaces of the second substrate 200 and the first conductive pillar 410 opposite to the first substrate 100 with buffer material and accommodating gaps.

[0060] Step S072: Grinding removes the buffer material located on the side of the second substrate 200 and the first conductive post 410 away from the first substrate 100, to obtain the first buffer filling part 511 located in the receiving gap.

[0061] Or, such as Figure 27 and Figure 28 As shown, step S072 may include: patterning the buffer preparation layer to form a first buffer hole, exposing the first conductive post 410 through the first buffer hole, forming a first buffer filling portion 511 by a portion of the buffer material located in the first receiving gap 220, and forming a first buffer layer 521 by a portion of the buffer material located on the side of the second substrate 200 away from the first substrate 100.

[0062] In these alternative embodiments, a buffer preparation layer is first formed, and then a first buffer filling portion 511 is formed using a grinding process or a patterning process.

[0063] Optionally, when the packaging substrate includes a third substrate 300, the diameter of the third connection hole 310 on the third substrate 300 can also be slightly larger than the diameter of the first connection hole 110, and a second receiving gap 320 can be formed between the first conductive post 410 and the hole wall of the third connection hole 310, such as... Figure 29 As shown, in step S07, a second buffer filling portion 512 can also be prepared within the second receiving gap 320. Alternatively, as... Figure 30 As shown, in step S07, a second buffer filling portion 512 and a second buffer layer 522 located on the side of the third substrate 300 opposite to the first substrate 100 can also be prepared within the second receiving gap 320.

[0064] Optional, such as Figure 31 As shown, after step S07, a layer-addition assembly 600 can be further fabricated. The layer-addition assembly 600 includes an insulating layer and conductive traces disposed on the insulating layer. The conductive traces and the first conductive post 410 are electrically connected to each other. The layer-addition assembly 600 can be disposed on the side of the second substrate 200 and / or the third substrate 300 opposite to the first substrate 100.

[0065] like Figure 31 As shown, an embodiment of the second aspect of this application also provides a packaging substrate, which can be prepared by any of the preparation methods of the first aspect embodiments described above.

[0066] Optionally, the encapsulation carrier includes: a substrate assembly including a first substrate 100 and a second substrate 200 stacked together, the first substrate 100 having a through-hole 110, the second substrate 200 having a through-hole 210, and the first connection hole 110 and the second connection hole 210 communicating with each other; a first conductive post 410 located at the first connection hole 110 and the second connection hole 210, and the first conductive post 410 and the second substrate 200 being spaced apart towards the inner wall surface of the second connection hole 210 to form a first receiving gap 220; and a first buffer filling portion 511 located at the first receiving gap 220.

[0067] In the packaging carrier provided in this application embodiment, the packaging carrier includes a substrate assembly, a first conductive post 410, and a first buffer filling portion 511. The substrate assembly includes a first substrate 100 and a second substrate 200. A first connection hole 110 on the first substrate 100 and a second connection hole 210 on the second substrate 200 are connected, so that the first conductive post 410 can be simultaneously located within the first connection hole 110 and the second connection hole 210. The first buffer filling portion 511 fills the first receiving gap 220 between the walls of the first conductive post 410 and the second connection hole 210, improving the stress problem of the first conductive post 410. This application embodiment divides the substrate assembly into two independent first substrates 100 and second substrates 200, which can reduce the depth of the first connection hole 110 and the second connection hole 210, improving the problem of poor packaging carrier caused by excessive hole depth.

[0068] In some optional embodiments, the packaging carrier may further include a third substrate 300, which is disposed on the side of the first substrate 100 opposite to the second substrate 200. The third substrate 300 has a through-hole 310, and a portion of the first conductive post 410 is located in the third connection hole 310 and is spaced apart from the inner wall surface of the third substrate 300 facing the third connection hole 310 to form a second receiving gap 320. The packaging carrier also includes a second buffer filling portion 512 located in the second receiving gap 320.

[0069] In these alternative embodiments, dividing the substrate assembly into a first substrate 100, a second substrate 200, and a third substrate 300 that are independent of each other can further reduce the depth of the vias on each substrate and improve the problem of poor filling of the first conductive post 410 due to excessive opening depth.

[0070] The third aspect of this application also provides a semiconductor packaging structure, including a packaging substrate prepared according to any of the first aspect embodiments or a packaging substrate provided according to any of the second aspect embodiments. Since the semiconductor packaging structure of this application includes a packaging substrate prepared according to any of the first aspect embodiments or a packaging substrate provided according to any of the second aspect embodiments, the display device of this application has the beneficial effects of the packaging substrate prepared according to any of the first aspect embodiments or the packaging substrate provided according to any of the second aspect embodiments, which will not be elaborated further here.

[0071] The above embodiments merely illustrate several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

[0072] Although this application has been described with reference to preferred embodiments, various modifications can be made thereto and components can be replaced with equivalents without departing from the scope of this application. In particular, the technical features mentioned in the various embodiments can be combined in any manner, provided there is no structural conflict. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A method for preparing a packaging carrier, characterized in that, include: A through-hole is provided on a first substrate, the first substrate including a first surface and a second surface disposed opposite to each other; A first photoresist layer is formed on the first surface; Using the first substrate as a mask, the first photoresist layer is patterned to form a first fabrication hole, and the first fabrication hole and the first connection hole are connected. A second photoresist layer is formed on the second surface; The second photoresist layer is patterned to form a second fabrication hole, which is connected to the first connection hole. A first conductive post is fabricated within the first connecting hole, the first fabrication hole, and the second fabrication hole; Remove the first photoresist layer and the second photoresist layer so that a portion of the first conductive pillar is exposed from the first surface and the second surface; A second substrate is disposed on the first surface, the second substrate having a through second connection hole, the second substrate being sleeved on the first conductive post through the second connection hole; a third substrate is disposed on the second surface, the third substrate having a through third connection hole, the third substrate being sleeved on the first conductive post through the third connection hole.

2. The preparation method according to claim 1, characterized in that, Before the step of patterning the second photoresist layer to form the second fabrication hole, wherein the second fabrication hole and the first connection hole are connected, the method further includes: A protective layer is formed on the surface of the first photoresist layer that is away from the first substrate and on the surface that faces the first fabrication hole; In the step of patterning the second photoresist layer to form a second fabrication hole, wherein the second fabrication hole and the first connection hole are connected: using the first photoresist layer and the first substrate as masks, the second photoresist layer is patterned to form a second fabrication hole, wherein the second fabrication hole and the first connection hole are connected.

3. The preparation method according to claim 1, characterized in that, Before the step of patterning the first photoresist layer using the first substrate as a mask to form the first fabrication hole, wherein the first fabrication hole and the first connection hole are connected, the method further includes: A first seed layer is disposed on the first substrate, the first seed layer at least covering the second surface and the inner wall surface of the first substrate facing the first connection hole; After removing the first photoresist layer to expose a portion of the first conductive post through the first connection hole, the method further includes removing the first seed layer located on the second surface to form a first seed portion located in the first connection hole.

4. The preparation method according to claim 1, characterized in that, In the step of providing a second substrate on the first surface, the second substrate having a through second connection hole, and the second substrate being sleeved onto the first conductive post through the second connection hole: Bond the second substrate to the first substrate; Alternatively, an adhesive layer can be provided between the second substrate and the first surface to bond the second substrate and the first surface together.

5. The preparation method according to claim 1, characterized in that, In the step of providing a second substrate on the first surface, the second substrate having a through second connection hole, and the second substrate being sleeved on the first conductive post through the second connection hole: the first conductive post and the second substrate are spaced apart from each other toward the hole wall of the second connection hole to form a first receiving gap; After the step of providing a second substrate on the first surface, the second substrate having a through second connection hole, and the second substrate being sleeved onto the first conductive post through the second connection hole, the method further includes: A first buffer filling portion is prepared in the first accommodating gap.

6. The preparation method according to claim 5, characterized in that, The step of preparing the first buffer filling portion in the accommodating gap includes: A buffer preparation layer is formed by filling the surfaces of the second substrate and the first conductive pillar opposite to the first substrate and the receiving gap with buffer material. Grinding removes the buffer material located on the side of the second substrate and the first conductive post opposite to the first substrate, to obtain a first buffer filling portion located in the receiving gap.

7. The preparation method according to claim 5, characterized in that, The step of preparing the first buffer filling portion in the accommodating gap includes: A buffer preparation layer is formed by filling the surfaces of the second substrate and the first conductive pillar opposite to the first substrate and the receiving gap with buffer material. The buffer preparation layer is patterned to form a first buffer hole, the first conductive post is exposed through the first buffer hole, a portion of the buffer material is located in the first receiving gap to form a first buffer filling portion, and a portion of the buffer material is located on the side of the second substrate away from the first substrate to form a first buffer layer.

8. A packaging substrate prepared by the preparation method according to any one of claims 1-7, characterized in that, include: A substrate assembly includes a first substrate, a second substrate, and a third substrate stacked together. The third substrate is disposed on the side of the first substrate opposite to the second substrate. The first substrate has a through-hole, the second substrate has a through-hole, and the first hole, the second hole, and the third hole are connected. The first conductive post is located at the first connecting hole, the second connecting hole, and the third connecting hole.

9. The packaging carrier board according to claim 8, characterized in that, The first conductive post and the second substrate are spaced apart to form a first receiving gap facing the inner wall surface of the second connection hole. The packaging carrier also includes a first buffer filling part, which is located in the first receiving gap. And / or, a portion of the first conductive post is located in the third connection hole and is spaced apart from the inner wall surface of the third substrate facing the third connection hole to form a second receiving gap, and the packaging carrier further includes a second buffer filling portion located in the second receiving gap.

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