Preparation method of glass core board, glass core board and encapsulation substrate

Abstract

This application belongs to the field of advanced packaging technology, specifically relating to a method for preparing a glass core board, the glass core board, and a packaging substrate. The method for preparing the glass core board includes: providing a pre-fabricated first glass layer, the first glass layer including an upper surface and a lower surface disposed opposite each other along its thickness direction, the first glass layer having a through-hole penetrating its own thickness, and a first conductive pillar segment filling the through-hole; casting multiple glass layers layer by layer on the upper surface and / or the lower surface of the first glass layer, and electroplating conductive pillar segments penetrating its own thickness in each glass layer, wherein the softening point of the multiple glass layers decreases sequentially according to the preparation order, and the multiple conductive pillar segments are sequentially center-aligned and coupled to form vertically interconnected conductive pillars. This application can realize the electroplating process of high aspect ratio through-holes on the glass core board, improve the electroplating yield, and meet the requirements of mass production.

Description

Technical Field

[0001] This application relates to the field of advanced packaging technology, and more specifically, to a method for preparing a glass core board, the glass core board, and a packaging substrate. Background Technology

[0002] With the rapid development of artificial intelligence (AI), AI chips are becoming increasingly integrated and denser in interconnection. Glass-based chip packaging can meet the high computing power and bandwidth requirements of AI chips, shorten signal transmission paths, and reduce power consumption, making it a strong competitor for next-generation packaging substrates and finding increasingly wider applications.

[0003] Through Glass Via (TGV) technology achieves vertical electrical interconnection of glass cores by forming micro-vias and filling them with electroplated metal materials. However, for TGVs with high aspect ratios, such as 20:1, the electroplating process for filling the vias is difficult, resulting in low product yield and failing to meet the requirements of mass production.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this application is to provide a method for preparing a glass core board, a glass core board and a packaging substrate, which can realize the electroplating process of high aspect ratio through holes on the glass core board, improve the electroplating yield and meet the requirements of mass production.

[0006] In a first aspect, this application provides a method for preparing a glass core board, comprising: providing a pre-formed first glass layer, the first glass layer including an upper surface and a lower surface disposed opposite to each other along its own thickness direction, the first glass layer having a through hole penetrating its own thickness, and a first conductive pillar segment filled in the through hole; casting multiple glass layers layer by layer on the upper surface and / or the lower surface of the first glass layer, and electroplating conductive pillar segments penetrating its own thickness in each glass layer, wherein the softening point of the multiple glass layers decreases sequentially according to the preparation order, and the multiple conductive pillar segments are sequentially center-aligned and coupled to form vertically interconnected conductive pillars.

[0007] In one possible implementation, multiple glass layers are successively cast on the upper and / or lower surfaces of the first glass layer, and conductive pillars are electroplated in each glass layer. This is achieved through the following cyclic steps: a photoresist layer is coated on the upper and / or lower surfaces of the i-th glass layer, where 1 ≤ i ≤ n-1, and n ≥ 2; an i+1-th conductive pillar is formed on the upper and / or lower surfaces of the i-th glass layer by exposure, development, and electroplating of a metal material, the i+1-th conductive pillar being aligned with and coupled to the center of the i-th conductive pillar; the photoresist layer is removed; a temporary glass layer is cast on the upper and / or lower surfaces of the i-th glass layer to cover the i+1-th conductive pillar, the thickness of the temporary glass layer being greater than the height of the i+1-th conductive pillar; the temporary glass layer is planarized to expose the surface of the i+1-th conductive pillar away from the i-th glass layer, and an i+1-th glass layer with the same height as the i+1-th conductive pillar is formed; the above cyclic steps are repeated until the n-th glass layer and the n-th conductive pillar are formed.

[0008] In one possible implementation, the ratio of the height of the conductive column segment to the maximum outer diameter of its cross-section is 4:1 to 5:1.

[0009] In one possible implementation, the maximum outer diameter of the cross-section of each conductive pillar segment decreases sequentially according to the order in which the glass layers they are located are prepared.

[0010] In one possible implementation, after removing the photoresist layer and before casting a temporary glass layer covering the (i+1)th conductive pillar segment on the upper and / or lower surface of the (i)th glass layer, the method for preparing the glass core board further includes: forming a buffer layer on the outer surface of the (i+1)th conductive pillar segment, wherein the thermal stability temperature of the buffer layer is greater than the softening point of the (i+1)th glass layer.

[0011] In one possible implementation, providing a prefabricated first glass layer includes: forming a through hole on the body of the first glass layer by laser-induced etching; and electroplating a metal material on the inner wall of the through hole to form a first conductive pillar segment.

[0012] In one possible implementation, before electroplating a metal material on the inner wall of the through hole to form the first conductive column segment, the method for preparing the glass core plate further includes forming a buffer layer on the inner wall of the through hole.

[0013] In one possible implementation, the buffer layer is made of inorganic oxides or polyimide.

[0014] Secondly, this application provides a glass core board, which is prepared using the glass core board preparation method of this application.

[0015] Thirdly, this application provides a packaging substrate, including the glass core plate of this application, the glass core plate having an upper surface and a lower surface disposed opposite to each other along its own thickness direction; and a redistribution layer disposed on the upper surface and / or the lower surface of the glass core plate, the redistribution layer including a dielectric layer and a circuit layer disposed within the dielectric layer, the circuit layer being electrically connected to the conductive pillars of the glass core plate.

[0016] According to the glass core board preparation method, glass core board and encapsulation substrate provided in this application, by casting multiple layers of glass with a specific softening point gradient layer by layer on the upper surface and / or lower surface of the pre-fabricated first glass layer, and electroplating conductive pillar segments penetrating its own thickness in each glass layer, the multiple conductive pillar segments of the final glass core board are aligned in the center and coupled to form vertically interconnected conductive pillars. Because the softening point of the upper glass layer is lower than that of the lower glass layer, it ensures that the already formed precision structure in the lower layer will not melt or deform during the casting of the upper molten glass layer, thus maintaining its solid integrity and achieving reliable integration of materials with different softening points. The small aspect ratio of each conductive column segment ensures the uniformity and density of metal deposition, avoiding defects in deep-hole electroplating. Multiple conductive column segments eventually form center-aligned and coupled conductive columns, realizing high-performance vertical electrical interconnection of the glass core board. This transforms the difficult problem of fabricating ultra-high aspect ratio through-holes and electroplating conductive columns in one go into the simple problem of electroplating medium aspect ratio conductive column segments multiple times. That is, the conductive columns are grown layer by layer on a glass core board with multiple glass layers having a specific softening point gradient. This fundamentally solves the technical bottleneck of fabricating and electroplating extremely high aspect ratio through-holes on a single glass core board in one go, improving the electroplating yield and meeting the requirements of mass production. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a glass core plate provided in an embodiment of this application; Figure 2 for Figure 1 The flowchart shown is a method for preparing glass core plates. Figure 3 for Figure 2 The diagram shows the structural schematics corresponding to each step of the glass core board preparation method. Figure 4 This is a schematic diagram of the structure of a glass core plate provided in another embodiment of this application; Figure 5 for Figure 4 The diagram shows the structural schematics corresponding to each step of the glass core board preparation method. Figure 6 This is a schematic diagram of the structure of a glass core plate provided in another embodiment of this application; Figure 7 for Figure 6 The diagram shows the structural schematics corresponding to each step of the glass core board preparation method. Figure 8 This is a schematic diagram of the structure of the packaging substrate provided in an embodiment of this application.

[0019] The main reference numerals are as follows: 10. Packaging substrate; 1. Glass core board; 2. Redistribution layer; 21. Dielectric layer; 22. Circuit layer; 1a, First glass layer; 1b, Second glass layer; 1c, Third glass layer; 11a, First conductive pillar segment; 11b, Second conductive pillar segment; 11c, Third conductive pillar segment; 11, Conductive pillar; H, Through hole; 101. Photoresist layer; 102. Temporary glass layer; 103. Buffer layer. Detailed Implementation

[0020] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0021] With the rapid development of AI, AI chips are becoming increasingly integrated and denser in interconnection. Glass-based chip packaging can meet the high demands of AI chips for computing power and bandwidth, shortening signal transmission paths and reducing power consumption, making it a strong competitor for next-generation packaging substrates with an ever-expanding application range. TGV technology achieves vertical electrical interconnection of the glass core board by forming micro-vias on the glass core board and filling them with electroplated metal materials. Forming micro-vias on the glass core board typically employs methods such as mechanical drilling, ultrasonic drilling, laser ablation, and laser-induced etching. However, for TGV holes with a high aspect ratio, such as 20:1, taper, rough hole walls, microcracks, and even glass breakage are prone to occur. It is difficult to guarantee the perpendicularity and consistency of the TGV holes. Furthermore, the electric and flow field distribution within high aspect ratio TGV holes is uneven, resulting in large differences in electroplating layer thickness, and even the formation of closed openings with hollow interiors. This leads to difficulties in filling the holes with electroplating, low product yield, and inability to meet the requirements of mass production.

[0022] Therefore, the purpose of this application is to provide a method for preparing a glass core board, which can realize the electroplating process of high aspect ratio through holes on the glass core board, improve the electroplating yield, and meet the requirements of mass production.

[0023] The specific steps of the glass core board preparation method provided in the embodiments of this application are described in detail below with reference to the accompanying drawings.

[0024] Figure 1 This is a schematic diagram of the structure of a glass core plate provided in one embodiment of this application. Figure 2 for Figure 1 The flowchart shown illustrates the preparation method of the glass core plate.

[0025] See Figure 1 This application provides a glass core board 1, comprising multiple layers of glass stacked together and conductive pillars 11 penetrating the multiple glass layers, with a diameter generally ranging from 10 μm to 100 μm. The conductive pillars 11 are manufactured using an electroplating process, and the material of the conductive pillars 11 can be Cu, Al, Ni, Au, etc. The number of conductive pillars 11 can be one or more. The aspect ratio of the conductive pillars 11 can be greater than or equal to 15:1, for example, 20:1. It is extremely difficult and has a low yield to fabricate high aspect ratio through-holes and achieve high-quality metal filling on a single piece of thick glass in a single operation. However, the glass core board fabrication method of this application adopts a "divide and conquer, build layer by layer" strategy, which enables the electroplating process of high aspect ratio through-holes on the glass core board, improving the electroplating yield and meeting the requirements of mass production.

[0026] See Figure 2 , showed Figure 1 The method for preparing a glass core board shown includes the following steps S1 to S2.

[0027] Step S1: Provide a prefabricated first glass layer 1a, the first glass layer 1a includes an upper surface and a lower surface disposed opposite to each other along its own thickness direction, the first glass layer 1a has a through hole H that penetrates its own thickness, and a first conductive column segment 11a filled in the through hole H.

[0028] Step S2: Multiple glass layers are cast layer by layer on the upper and / or lower surfaces of the first glass layer 1a, and each glass layer is electroplated with conductive pillar segments that penetrate its own thickness. The softening point of the multiple glass layers decreases sequentially according to the preparation order, and the multiple conductive pillar segments are aligned at the center and coupled to form vertically interconnected conductive pillars 11.

[0029] like Figure 1As shown, exemplarily, the number of glass layers is five: a first glass layer 1a located in the middle, two second glass layers 1b on the upper and lower surfaces of the first glass layer 1a, and two third glass layers 1c located on the two second glass layers 1b. Each of the five glass layers is provided with a conductive pillar segment that extends through and is aligned with each other along the thickness direction of the glass core plate 1. In other examples, the number of glass layers may also be, for example, three or more layers. Multiple glass layers may be stacked sequentially from bottom to top on the upper surface side of the first glass layer 1a, or multiple glass layers may be stacked sequentially from top to bottom on the lower surface side of the first glass layer 1a, and so on.

[0030] The softening point of the multilayer glass decreases sequentially according to the manufacturing order. If the temperature difference between the softening points of two adjacent glass layers is too large, a significant difference in thermal expansion may form between the two layers, resulting in shear and tensile stresses at the hole walls or interfaces, which can easily lead to glass layer cracking or microcrack propagation. If the temperature difference between the softening points of two adjacent glass layers is too small, the already formed precision structure of the lower layer may melt or deform when the upper molten glass layer is cast. Therefore, this application, after multiple experimental verifications, sets the temperature difference between adjacent glass layers to approximately 100°C to 300°C. For example, assuming that the first glass layer 1a uses borosilicate glass with a softening point of 800°C; the second glass layer 1b uses low-softening-point phosphate glass with a softening point of 500°C; and the third glass layer 1c uses special bismuthate glass with a softening point of 400°C, and so on, decreasing sequentially to form a temperature barrier. Because the softening point of the upper glass layer is lower than that of the lower glass layer, it ensures that the already formed precision structure in the lower layer will not melt or deform during the casting of the upper molten glass layer, thus maintaining its solid integrity and achieving reliable integration of materials with different softening points.

[0031] Therefore, by casting multiple glass layers with specific softening point gradients layer by layer on the upper and / or lower surfaces of the prefabricated first glass layer 1a, and electroplating conductive pillar segments penetrating its own thickness in each glass layer, the multiple conductive pillar segments of the final glass core board 1 are sequentially center-aligned and coupled to form vertically interconnected conductive pillars 11. Since the softening point of the upper glass layer is lower than that of the lower glass layer, it is ensured that the precision structure already formed in the lower layer will not melt or deform during the casting of the upper molten glass layer, and can remain solid and intact, thus achieving reliable integration of materials with different softening points.

[0032] The small aspect ratio of each conductive pillar segment ensures the uniformity and density of metal deposition, avoiding defects in deep-hole electroplating. Multiple conductive pillar segments eventually form center-aligned and coupled conductive pillars 11, realizing high-performance vertical electrical interconnection of the glass core board 1. This transforms the difficult problem of fabricating ultra-high aspect ratio through-holes and electroplating conductive pillars in one go into the simple problem of electroplating medium aspect ratio conductive pillar segments multiple times. That is, the conductive pillars 11 are grown layer by layer on the glass core board 1 with a multilayer glass layer with a specific softening point gradient. This fundamentally solves the technical bottleneck of fabricating and electroplating extremely high aspect ratio through-holes on a single glass core board 1 in one go, improving the electroplating yield and meeting the requirements of mass production.

[0033] Figure 3 for Figure 2 The diagram shows the structural schematics corresponding to each step of the glass core board preparation method.

[0034] In some embodiments, step S2, which involves casting multiple glass layers layer by layer on the upper and / or lower surface of the first glass layer 1a, with conductive pillar segments electroplated in each glass layer, is achieved through the following cyclic steps: Step S21: Coat the upper and / or lower surfaces of the i-th glass layer with a photoresist layer 101, where 1≤i≤n-1, n≥2; Step S22: By exposure, development and electroplating of metal materials, the (i+1)th conductive pillar segment is made on the upper and / or lower surface of the i-th glass layer. The (i+1)th conductive pillar segment is aligned with and coupled to the center of the i-th conductive pillar segment. Step S23: Remove photoresist layer 101; Step S24: Cast a temporary glass layer 102 covering the (i+1)th conductive column segment on the upper and / or lower surfaces of the i-th glass layer. The thickness of the temporary glass layer 102 is greater than the height of the (i+1)th conductive column segment. Step S25: Planarize the temporary glass layer 102 to expose the surface of the i+1 conductive pillar segment away from the i-th glass layer, and form the i+1 glass layer with the same height as the i+1 conductive pillar segment. Step S26: Repeat the above cyclic steps until the nth glass layer and the nth conductive pillar segment are formed.

[0035] See Figure 3 , showed Figure 2The following are schematic diagrams illustrating the structural steps of the glass core board fabrication method. Taking n=3 as an example, a second glass layer 1b is formed on the upper and lower surfaces of the first glass layer 1a, respectively. A first conductive pillar segment 11a is disposed within the first glass layer 1a, and a second conductive pillar segment 11b is disposed within the second glass layer 1b. Semiconductor photolithography is used to define the graphic position of the second conductive pillar segment 11b on the upper or lower surface of the first glass layer 1a. Then, metal material is electroplated to ensure that the central axis of the formed second conductive pillar segment 11b is precisely aligned with that of the first conductive pillar segment 11a, improving the alignment accuracy of the vertical interconnection. Then, a temporary glass 102 is cast and planarized to obtain a globally flat surface of the second glass layer 1b, providing a perfect substrate for the photolithography of the third layer. The formation process of the third conductive pillar segment 11c is similar to that of the second conductive pillar segment 11b, and the formation process of the third glass layer 1c is similar to that of the second glass layer 1b, and will not be described further.

[0036] It is understandable that multi-layered glass and its internal conductive pillars can also be fabricated using a "first fabricate glass layers, then fabricate conductive pillars" method. This requires creating through-holes in each glass layer using methods such as mechanical drilling, ultrasonic drilling, laser ablation, or laser-induced etching, and then electroplating metal material within these through-holes to form the conductive pillars. Because it is difficult to ensure the alignment accuracy of through-holes created in each glass layer with those in other glass layers, the central axis of the final conductive pillars has a low degree of coincidence, reducing the alignment accuracy of vertical interconnects.

[0037] Therefore, the embodiment of this application, through the preparation method of "first fabricating conductive pillar segments and then forming glass layers", can ensure that each conductive pillar segment is directly grown on the surface of the existing structure through photolithography and is aligned with the natural center of the underlying structure. This transforms the problem of macroscopic interlayer alignment into a mature microscopic photolithography pattern overlay process, and the alignment accuracy can be improved by 1-2 orders of magnitude to the nanometer level. Each time, only a conductive pillar segment with a limited height (such as a depth-to-width ratio of 4:1) is fabricated, and then wrapped and planarized with a glass layer. By stacking these segments in a cycle, an overall conductive pillar structure with a very high total depth-to-width ratio (such as 20:1) is created, which improves the feasibility of high depth-to-width ratio conductive pillars.

[0038] Furthermore, the newly cast glass layer combines with the lower glass layer in a molten / softened state, forming a near-integral, seamless glass-glass fusion. This means that the bonding or adhesion of heterogeneous interfaces is replaced by glass-body fusion, and the global, high-temperature bonding steps are replaced by local, low-temperature additive manufacturing steps. The interface is materially continuous, significantly reducing process damage to the existing structure and eliminating the main failure interface at its source, thus improving the quality and reliability of the interface. When casting the upper glass layer using the softening point gradient (high softening point of the lower layer and low softening point of the upper layer), the lower glass layer remains solid, with minimal thermal impact. Subsequent process temperatures only need to be below the transition point of the uppermost glass layer, simplifying the process. After the temporary glass layer 102 is cast, it is planarized and shaped, theoretically allowing the fabrication of a non-planar glass core plate 1 with a topological structure. For example, it can be locally thickened for reinforcement or form grooves for embedding chips. Different glass compositions can be flexibly selected for casting, such as adjusting the coefficient of thermal expansion and dielectric constant, to realize the application and integration of functionally graded materials.

[0039] All of the above processes adopt industry standard processes, which are mature and controllable, have low technical risks, and are easy to implement and promote on existing production lines.

[0040] It is understood that the number of glass layers and the number of conductive pillars can be even greater, and the above preparation method also applies. Each glass layer and the corresponding conductive pillar can be located on the upper surface or the lower surface of the first glass layer 1a, which will not be elaborated further.

[0041] In some embodiments, the ratio of the height of the conductive column segment to the maximum outer diameter of its cross-section is 4:1 to 5:1.

[0042] In the semiconductor and advanced packaging fields, when electroplating metal materials in through-holes with high aspect ratios (e.g., aspect ratio greater than 10:1), the electroplating solution is difficult to exchange, and the current density and additive concentration at the orifice and bottom are uneven. This can easily lead to premature closure of the orifice, leaving huge voids inside the hole; or uneven filling, forming internal defects. The process window is extremely narrow, and it is extremely sensitive to electroplating parameters (current, additives, stirring), resulting in low yield, poor repeatability, and seriously affecting conductivity, mechanical strength, and long-term reliability.

[0043] In this application, the cross-section of the conductive column can be circular or polygonal. When the cross-section is polygonal, the maximum diameter of its circumscribed circle is d, and the height of the conductive column is h, then h / d = 4:1~5:1. This h / d ratio represents a mature and optimized process window for existing metal electroplating processes to achieve bottom-up, defect-free, and highly uniform metal filling. Under these parameters, the convection of the electroplating solution, the effect of additives, and the current distribution are all at their optimal levels, ensuring uniform deposition of metal ions and the formation of a dense, non-porous column.

[0044] For the pre-fabricated first glass layer 1a, which serves as the foundation for the multilayer stacked structure of the entire glass core board 1, it needs to provide an absolutely flat, stable, and insulating substrate for subsequent precision photolithography, electroplating, and other operations. An opening is made in the first glass layer 1a and filled to form a reliable first conductive pillar segment 11a, the purpose of which is to provide a precise, electrically conductive electroplated contact for all subsequent layers. Hole-free electroplating filling within vias H with a small aspect ratio (e.g., ≤5:1) is a mature, well-mastered process with high yields in the semiconductor and packaging industries. Using this mature and reliable method to manufacture the foundation minimizes risk and controls costs, laying a solid and reliable foundation for the subsequent multilayer stacked structure.

[0045] For the second to nth glass layers, the positions and cross-sections of the conductive pillars are defined on a flat surface using patterned photolithography, and then the conductive pillars are grown upwards. Only shallow pillars (height-to-diameter ratio 4:1~5:1) are constructed each time. Electroplating on a flat surface ensures sufficient convection of the plating solution, uniform current distribution, and consistent additive action, achieving perfect bottom-up filling and obtaining dense, void-free, and uniformly crystalline metal pillars, resulting in an order-of-magnitude improvement in yield and reliability. Furthermore, excessively tall and thin conductive pillars are prone to tilting and breakage under the grinding pressure of the planarization temporary glass layer 102, while this h / d ratio provides sufficient mechanical support, improving the reliability of the conductive pillars in the planarization process. When performing photolithography and electroplating on the top of the conductive pillar, a flat and stable electrical contact surface is required. The flat pillar top formed by high-quality filling provides a perfect starting surface for the next process, ensuring precise alignment and electrical coupling of the conductive pillars between layers. Thus, dense, defect-free metal filling means lower resistance, more consistent impedance, and better signal transmission integrity, which is crucial for high-speed, high-frequency applications; the metal pillars have no voids inside and are tightly bonded to the glass, resulting in higher structural strength and fatigue resistance, and better able to withstand thermal and mechanical stresses during the packaging process; the solid metal pillars provide an efficient heat dissipation path from the chip to the substrate, and the defect-free pillars have higher thermal conductivity, which helps dissipate heat from the chip.

[0046] Therefore, with each conductive pillar segment having an h / d ratio of 4:1 to 5:1, and through multi-layer stacking, the final formed integral conductive pillar 11 can achieve an equivalent aspect ratio of 20:1 or even higher. This breaks down an extremely complex process into the superposition of multiple high-yield, mature process steps, achieving final product performance that is difficult to achieve using traditional methods. Operating within a mature process window means minimal process fluctuations, easy parameter control, and high and stable yields during production. This makes the preparation method highly repeatable and has the potential for large-scale production, reducing manufacturing costs.

[0047] In some embodiments, step S1, providing the prefabricated first glass layer 1a includes: Step S11: A through-hole H is formed on the first glass layer body by laser-induced etching; Step S12: Electroplating a metal material on the inner wall of the through hole H to form the first conductive column segment 11a.

[0048] The first glass layer is a pre-fabricated glass of a certain thickness. Laser-induced etching (LAI) is typically used to fabricate high-quality vias H with vertical, smooth sidewalls and minimal thermal damage, laying a precise and reliable foundation for the entire multilayer stacked structure. LAI uses ultrashort pulse lasers (such as femtosecond or picosecond lasers) to precisely irradiate the interior of the first glass layer, altering only the molecular structure of the irradiated area without damaging the surface, forming a modified region. The modified first glass layer is then immersed in a specialized etching solution (such as hydrofluoric acid solution). The etching rate of the modified region is much faster than that of the unmodified region, achieving selective etching between the modified and unmodified regions to form the via H. Metal is electroplated onto the inner wall of the via H to form the first conductive pillar segment 11a. Because the first conductive pillar segment 11a has a low height-to-depth ratio, it is easy to fabricate.

[0049] Optionally, before the first conductive pillar segment 11a fills the via H, a seed layer can be formed in the via H by physical vapor deposition (PVD) magnetron sputtering. The seed layer is typically made of metals such as copper (Cu), titanium (Ti), or chromium (Cr), and is deposited on the inner wall of the via H using either PVD or chemical vapor deposition (CVD). The thickness of the seed layer is typically between 0.1 μm and 0.5 μm, serving as a conductive substrate for subsequent electroplating of the filling metal material, providing the necessary conductive path and adhesion base for metal interconnection.

[0050] Because only the first glass layer 1a is prefabricated during the entire fabrication process of the glass core board 1, and through-hole H is formed by laser-induced etching, and the aspect ratio of through-hole H is low, for example, 4:1, it is easy to electroplate metal material on the inner wall of through-hole H to form the first conductive pillar segment 11a, thus reducing the fabrication difficulty. The conductive pillar segments corresponding to the remaining glass layers are respectively formed by mature photolithography pattern overlay technology with high alignment accuracy, which ultimately improves the feasibility of high aspect ratio conductive pillars 11 of the glass core board 1.

[0051] Figure 4 This is a schematic diagram of the structure of a glass core plate provided in another embodiment of this application. Figure 5 for Figure 4 The diagram shows the structural schematics corresponding to each step of the glass core board preparation method.

[0052] In some embodiments, the maximum outer diameter of the cross-section of each conductive pillar segment decreases sequentially according to the order in which the glass layers they are formed are prepared.

[0053] See Figure 4 and Figure 5 The glass core board 1 provided in this application embodiment is similar to... Figure 1 The glass core plate 1 shown has a similar structure, the only difference being that the maximum outer diameter of the cross-section of each conductive column segment is different.

[0054] Specifically, with Figure 4 Taking the glass core plate 1 shown as an example, a second glass layer 1b and a third glass layer 1c are formed on the upper and lower surfaces of the first glass layer 1a, respectively. The first glass layer 1a is provided with a first conductive pillar segment 11a, the second glass layer 1b is provided with a second conductive pillar segment 11b, and the third glass layer 1c is provided with a third conductive pillar segment 11c. The cross-sectional shape of each conductive pillar segment can be circular or polygonal. Among them, the maximum outer diameter of the cross-section of the first conductive pillar segment 11a is the largest, the maximum outer diameter of the cross-section of the second conductive pillar segment 11b is smaller than that of the first conductive pillar segment 11a, and the maximum outer diameter of the cross-section of the third conductive pillar segment 11c is smaller than that of the second conductive pillar segment 11b. Optionally, the difference in the maximum outer diameter of the cross-section of two adjacent conductive pillar segments is 10 μm. For example, the maximum outer diameter of the cross-section of the first conductive pillar segment 11a is 50 μm, the maximum outer diameter of the cross-section of the second conductive pillar segment 11b is 40 μm, and the maximum outer diameter of the cross-section of the third conductive pillar segment 11c is 30 μm. This can meet the alignment accuracy requirements of the photolithography equipment.

[0055] Since the internal stress of each glass layer is mainly concentrated on the upper or lower surface surrounding the conductive pillar segment, reducing the maximum outer diameter of each conductive pillar segment sequentially according to the fabrication order of each glass layer can reduce the stress on the upper or lower surface of the glass layer surrounding the conductive pillar segment, thereby reducing the risk of cracking in each glass layer. Simultaneously, the different maximum outer diameters of the cross-sections of each conductive pillar segment can be used to optimize current distribution, impedance matching, or adapt to different interconnect density requirements, thus broadening the application range of the product.

[0056] For the second to the nth glass layers, the position and cross-section of the conductive pillar segments are defined by patterned photolithography. Then, conductive pillar segments with different maximum outer diameters of cross-sections are grown upwards. Compared with the existing technology of opening holes and electroplating filling in the glass layers, this improves the alignment accuracy and reduces the manufacturing difficulty.

[0057] Figure 6 This is a schematic diagram of the structure of a glass core plate provided in another embodiment of this application. Figure 7 for Figure 6The diagram shows the structural schematics corresponding to each step of the glass core board preparation method.

[0058] In some embodiments, before electroplating a metal material on the inner wall of the through hole H to form the first conductive column segment in step S12, the method for preparing the glass core plate 1 further includes: Step S10: A buffer layer 103 is formed on the inner wall of the through hole H.

[0059] See Figure 6 and Figure 7 The glass core board 1 provided in this application embodiment is similar to... Figure 4 The glass core plate 1 shown has a similar structure, except that a buffer layer 103 is formed on the outer surface of the first conductive column segment 11a and the conductive column segments corresponding to each cast glass layer.

[0060] like Figure 7 As shown, due to the significant difference in the coefficients of thermal expansion between each conductive pillar segment and its corresponding glass layer body—for example, the coefficient of thermal expansion of the first conductive pillar segment is approximately 17 ppm / ℃, while that of the first glass layer body is approximately 4 ppm / ℃—their different coefficients of thermal expansion under the same heating conditions cause thermal stress to be generated within the glass surrounding each conductive pillar segment due to thermal expansion and contraction. This thermal stress can easily lead to cracks within the glass layer body, affecting the mechanical strength of each glass layer body. Therefore, in this embodiment, a buffer layer 103 is formed between the outer wall of the first conductive pillar segment 11a and the inner wall of the through-hole H. The buffer layer 103 can increase the bonding force between the metal material of the first glass layer body and the first conductive pillar segment 11a, buffer the thermal stress caused by the mismatch in the coefficients of thermal expansion between the metal material of the first glass layer body and the first conductive pillar segment 11a, reduce the risk of glass cracking, and improve the reliability and service life of subsequent packaging.

[0061] In some embodiments, the material of the buffer layer 103 is an inorganic oxide or polyimide.

[0062] The buffer layer can be made of inorganic oxides, such as silicon dioxide (SiO2), Si3N4, amorphous carbon, etc. Inorganic oxides have the following advantages: excellent thermal and chemical stability, which can withstand subsequent high-temperature processes (such as glass casting) without decomposition or denaturation; good insulation, ensuring electrical insulation between it and each conductive pillar segment; perfect compatibility with semiconductor processes, and can be deposited using standard processes such as plasma chemical vapor deposition (PECVD) and atomic layer deposition (ALD), resulting in uniform and dense film thickness and strong adhesion to the first glass layer. It is suitable for scenarios with extremely high requirements for thermal budget and process cleanliness, especially when the casting temperature of the temporary glass layer 102 is high, it can provide the most stable and reliable interface protection.

[0063] The buffer layer 103 can also be made of polyimide (PI), which has excellent flexibility and ductility, strong stress buffering capacity, and can effectively absorb strain energy; its low dielectric constant helps reduce the overall parasitic capacitance of the interconnect structure, which is beneficial for high-frequency and high-speed signal transmission; and it has a mature coating process that can be formed by spin coating, spraying, etc., with relatively low cost and simple process. PI is suitable for scenarios with the highest requirements for mechanical stress relief and where the operating temperature is not extremely high.

[0064] In some embodiments, after removing the photoresist layer in step S23 and before casting a temporary glass layer covering the (i+1)th conductive pillar segment on the upper and / or lower surface of the (i+1)th glass layer in step S24, the method for preparing the glass core plate 1 further includes: forming a buffer layer 103 on the outer surface of the (i+1)th conductive pillar segment, wherein the thermal stability temperature of the buffer layer 103 is greater than the softening point of the (i+1)th glass layer.

[0065] See Figure 6 and Figure 7 A buffer layer 103 is formed on the outer surface (including the outer peripheral surface and the end face) of the (i+1)th conductive pillar segment. The buffer layer 103 can increase the bonding force between each glass layer body and the metal material of the corresponding conductive pillar segment, buffer the thermal stress caused by the mismatch of the thermal expansion coefficients between each glass layer body and the metal material of the corresponding conductive pillar segment, reduce the risk of glass cracking, and improve the reliability and service life of subsequent packaging. Subsequently, when a temporary glass layer 102 covering the (i+1)th conductive pillar segment is cast on the upper surface and / or lower surface of the i-th glass layer, and the temporary glass layer 102 is planarized, the buffer layer 103 on the end face of the (i+1)th conductive pillar segment is removed, and only the buffer layer 103 on the outer peripheral surface of the (i+1)th conductive pillar segment is retained, which increases the bonding force between the corresponding glass layer body and the metal material of the conductive pillar segment.

[0066] Because the casting process of each glass layer will produce certain physical and chemical effects on the buffer layer 103, for example, the molten glass must be well wetted with the surface of the buffer layer 103 to ensure that the interface is free of bubbles and has a strong bond; the molten glass will shrink during the cooling and solidification process, generating thermal stress at the composite interface of the buffer layer 103 / glass layer / metal conductive column segment. The buffer layer can absorb and relax this stress to prevent interface cracking; at high temperatures, trace amounts of element interdiffusion may occur at the interface of different materials, enhancing the interfacial bonding force; therefore, the thermal stability temperature of the buffer layer 103 on the outer peripheral surface of the (i+1)th conductive column segment needs to be greater than the softening point of the (i+1)th glass layer. For example, if the second glass layer is cast at 450°C, then the buffer layer 103 on the outer peripheral surface of the second conductive column segment must be able to remain stable at this temperature.

[0067] If the buffer layer 103 is polyimide, such as PI-2611, its glass transition temperature (Tg) is typically above 300°C, and its decomposition temperature exceeds 500°C. When glass with a softening point potentially below 300°C (such as certain phosphate glasses or borosilicate glasses) is cast onto it, the PI layer remains in its glassy state, acting as a tough thin film that effectively buffers stress. The casting process is a heat treatment of the PI layer, which may further imidize it, but it remains stable as long as the temperature does not exceed its decomposition temperature.

[0068] If the buffer layer 103 is an inorganic oxide, such as SiO2, it is typically an amorphous thin film with an extremely high softening point, much higher than the lower softening point glass layer cast above. At the casting temperature, it remains solid, chemically stable, and will not be dissolved by the molten glass or undergo violent reactions, thus providing excellent interfacial adhesion and stress barrier.

[0069] As an optional implementation, the softening point of the first glass layer 1a prefabricated at the bottom layer of this application can be between 600°C and 800°C, or even higher, to provide a solid substrate. The softening point of the nth glass layer cast at the top layer can be around 300°C to 400°C to be compatible with subsequent low-temperature processes. The buffer layer 103 on the outer periphery of the conductive pillar segment of each glass layer can be made of a material with a suitable thermal stability temperature according to the softening point of the corresponding glass layer, thereby effectively alleviating the long-term thermomechanical stress caused by the mismatch of thermal expansion coefficients between the glass layer and the metal conductive pillar segment, and improving the reliability of the packaged device under long-term operation or temperature cycling.

[0070] Furthermore, this application provides a glass core board 1, comprising a pre-fabricated first glass layer 1a and multiple glass layers cast sequentially on the upper and / or lower surfaces of the first glass layer 1a. Each glass layer has a conductive pillar segment electroplated to penetrate its own thickness. The softening point of the multiple glass layers decreases sequentially according to the preparation order, and the multiple conductive pillar segments are sequentially center-aligned and coupled to form vertically interconnected conductive pillars. This glass core board 1 can be, for example, but not limited to, [other types of glass core boards]. Figure 1 , Figure 4 and Figure 6 The glass core board shown.

[0071] The glass core board 1 is prepared using the glass core board preparation method described above in this application. The metal material used for electroplating filler of the conductive pillar 11 can be Cu, Al, Ni, Au, etc. The number of conductive pillars 11 can be one or more. The aspect ratio of the conductive pillar 11 can be greater than or equal to 15:1, for example, the aspect ratio of the conductive pillar 11 is 20:1.

[0072] The glass core board 1 provided in this application embodiment is formed by casting multiple layers of glass with a specific softening point gradient on the upper and / or lower surfaces of the pre-fabricated first glass layer 1a, and electroplating conductive pillar segments that penetrate their own thickness in each glass layer, so that the multiple conductive pillar segments of the final glass core board 1 are aligned in the center and coupled to form vertically interconnected conductive pillars 11. Because the softening point of the upper glass layer is lower than that of the lower glass layer, it ensures that the already formed precision structure in the lower layer will not melt or deform during the casting of the upper molten glass layer, thus maintaining its solid integrity and achieving reliable integration of materials with different softening points. The small aspect ratio of each conductive column segment ensures the uniformity and density of metal deposition, avoiding defects in deep-hole electroplating. Multiple conductive column segments eventually form center-aligned and coupled conductive columns 11, realizing high-performance vertical electrical interconnection of the glass core plate 1. This transforms the problem of fabricating ultra-high aspect ratio through holes and electroplating conductive columns in one go into the simple problem of electroplating medium aspect ratio conductive column segments multiple times. That is, the conductive columns 11 are grown layer by layer on the glass core plate 1 with a specific softening point gradient, fundamentally solving the technical bottleneck of fabricating and electroplating ultra-high aspect ratio through holes on a single glass core plate 1 in one go, improving the electroplating yield and meeting the requirements of mass production.

[0073] Figure 8 This is a schematic diagram of the structure of the packaging substrate provided in an embodiment of this application.

[0074] See Figure 8 This application provides a packaging substrate 10, including a glass core plate 1 and a redistribution layer 2. The glass core plate 1 has an upper surface and a lower surface disposed opposite to each other along its own thickness direction. The redistribution layer 2 is disposed on the upper surface and / or the lower surface of the glass core plate 1. The redistribution layer 2 includes a dielectric layer 21 and a circuit layer 22 disposed in the dielectric layer 21. The circuit layer 22 is electrically connected to the conductive pillars of the glass core plate 1.

[0075] The redistribution layer 2 includes a dielectric layer 21 and a circuit layer 22 disposed within the dielectric layer 21. The circuit layer 22 is electrically connected to the conductive pillar 11. The dielectric layer 21 can be made of materials such as Ajinomoto film (ABF), PI, or glass, and is prepared on the upper and lower surfaces of the glass core board 1 by coating and lamination. The circuit layer 22 can be made of materials such as Cu, Al, Ni, or Au, and is fabricated by PVD magnetron sputtering, resist coating, photolithography, development, electroplating, resist removal, and etching processes. Depending on different requirements, the circuit layer 22 can have one or more layers. To achieve the electrical connection between the circuit layer 22 and the conductive pillar 11, a through-hole is formed in the dielectric layer 21, extending through the conductive pillar 11. Then, conductive material is filled into the through-hole to form a connector electrically connected to the conductive pillar 11. One end of the connector is electrically connected to the circuit layer 22, and the other end is electrically connected to the conductive pillar 11.

[0076] Optionally, the packaging substrate 10 further includes a solder resist ink layer, which covers the circuit layer 22, protecting the circuit layer 22 while also providing insulation.

[0077] The packaging substrate 10 of this application uses a glass core board 1 with a specific softening point gradient to achieve the layer-by-layer growth of conductive pillars 11. This fundamentally solves the technical bottleneck of fabricating and electroplating extremely high aspect ratio through holes on a single glass core board 1 at one time, improves the electroplating yield, and thus improves the electrical performance between the circuit layer 22 and the conductive pillars 11, meeting the requirements of mass production.

[0078] It should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Features defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0079] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of protection of the claims. In conclusion, the above description is merely a preferred embodiment of the technical solution of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for preparing a glass core board, wherein the glass core board is used as an encapsulation substrate, characterized in that, The method for preparing the glass core plate includes: A prefabricated first glass layer is provided, the first glass layer including an upper surface and a lower surface disposed opposite to each other along its own thickness direction, the first glass layer having a through hole penetrating its own thickness, and a first conductive column segment filling the through hole; Multiple glass layers are successively cast on the upper and / or lower surfaces of the first glass layer, and each glass layer is electroplated with conductive pillar segments that penetrate its own thickness. The softening point of the multiple glass layers decreases sequentially according to the preparation order. The multiple conductive pillar segments are sequentially center-aligned and coupled to form vertically interconnected conductive pillars. The conductive pillars are used to electrically connect the circuit layer of the redistribution layer of the packaging substrate.

2. The method for preparing a glass core board according to claim 1, characterized in that, The process of casting multiple glass layers layer by layer on the upper and / or lower surface of the first glass layer, with conductive pillar segments electroplated in each glass layer, is achieved through the following cyclic steps: A photoresist layer is coated on the upper and / or lower surfaces of the i-th glass layer, where 1≤i≤n-1, n≥2; By means of exposure, development and electroplating of metal materials, an i+1 conductive pillar segment is formed on the upper surface and / or lower surface of the i-th glass layer, wherein the i+1 conductive pillar segment is aligned with and coupled to the center of the i-th conductive pillar segment. Remove the photoresist layer; A temporary glass layer is cast on the upper and / or lower surface of the i-th glass layer to cover the (i+1)-th conductive column segment, wherein the thickness of the temporary glass layer is greater than the height of the (i+1)-th conductive column segment. The temporary glass layer is planarized to expose the surface of the i+1 conductive pillar segment away from the i-th glass layer, and an i+1 glass layer with the same height as the i+1 conductive pillar segment is formed. Repeat the above cyclic steps until the nth glass layer and the nth conductive pillar segment are formed.

3. The method for preparing the glass core board according to claim 1 or 2, characterized in that, The ratio of the height of the conductive column segment to the maximum outer diameter of its cross-section is 4:1 to 5:

1.

4. The method for preparing a glass core board according to claim 1 or 2, characterized in that, The maximum outer diameter of the cross-section of each conductive column segment decreases sequentially according to the order in which the glass layers they are formed are prepared.

5. The method for preparing a glass core board according to claim 2, characterized in that, After removing the photoresist layer and before casting a temporary glass layer covering the (i+1)th conductive pillar segment on the upper and / or lower surface of the i-th glass layer, the method for preparing the glass core board further includes: A buffer layer is formed on the outer surface of the (i+1)th conductive column segment, and the thermal stability temperature of the buffer layer is greater than the softening point of the (i+1)th glass layer.

6. The method for preparing a glass core board according to claim 1, characterized in that, The provision of the prefabricated first glass layer includes: The via is formed on the first glass layer body by laser-induced etching; Metal material is electroplated on the inner wall of the through hole to form the first conductive column segment.

7. The method for preparing a glass core board according to claim 6, characterized in that, Before electroplating a metal material on the inner wall of the through hole to form the first conductive column segment, the method for preparing the glass core plate further includes: A buffer layer is formed on the inner wall of the through hole.

8. The method for preparing a glass core plate according to claim 5 or 7, characterized in that, The material of the buffer layer is an inorganic oxide or polyimide.

9. A glass core board used in packaging substrates, characterized in that, The glass core board includes a pre-fabricated first glass layer and multiple glass layers cast layer by layer on the upper and / or lower surfaces of the first glass layer. Each glass layer is electroplated with conductive pillar segments that penetrate its own thickness. The softening point of the multiple glass layers decreases sequentially according to the preparation order. The multiple conductive pillar segments are aligned center-aligned and coupled to form vertically interconnected conductive pillars. The conductive pillars are used to electrically connect the circuit layers of the redistribution layer of the packaging substrate.

10. A packaging substrate, characterized in that, include: The glass core board as described in claim 9, wherein the glass core board has an upper surface and a lower surface disposed opposite to each other along its own thickness direction; and A redistribution layer is disposed on the upper and / or lower surface of the glass core plate. The redistribution layer includes a dielectric layer and a circuit layer disposed within the dielectric layer. The circuit layer is electrically connected to the conductive pillars of the glass core plate.

Images