Series topology circuit and solid state transformer for high voltage input

CN122068758BActive Publication Date: 2026-09-11SHENZHEN GOSPELL DIGITAL TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202610439530.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-04-03
Publication Date
2026-09-11
Estimated Expiration
2046-04-03

AI Technical Summary

Technical Problem

由于输入电压远超当前功率半导体可承受的耐压等级,基本都是采用多模块串联的方式,这会使变换器电路构造复杂,体积增大,生产成本增加,同时还影响变压器的可靠性

Benefits of technology

[0030] 1. The PFC circuit that is directly connected to the high voltage input uses fewer components, thus reducing the cost. It can quickly store energy through the energy storage inductor L1 and rapidly charge each capacitor in an equal manner. The circuit topology is simple, efficient, and highly reliable.

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Abstract

The application relates to a high-voltage input series topology circuit and a solid-state transformer, which comprises a PFC circuit and a conversion circuit connected to a high-voltage input; the PFC circuit comprises an energy storage inductor L1 connected to the high-voltage input, a multi-stage switching circuit and a plurality of input capacitors; the conversion circuit has corresponding multi-stage conversion units, and the respective secondary circuits of the conversion units are connected in parallel to output positive and negative poles, so that the voltages on the respective input capacitors are substantially equal; the multi-stage switching circuit is connected in a multi-stage series mode, each stage of the switching circuit is a full-bridge circuit structure and has two diodes and two power tubes; one power tube is initially closed, and the other power tube is controlled to be turned on or not turned on according to a signal, so that the energy storage inductor L1 can be rapidly charged when power is turned on, the power tube is switched on to sequentially charge the respective input capacitors, the voltage is reduced through the conversion unit, and then the voltage is output. The circuit structure is simple, low in cost, good in reliability and capable of meeting various application scenarios of high-voltage conversion into low-voltage.
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Description

Technical Field

[0001] This invention relates to the field of power electronic conversion equipment technology, specifically to a series topology circuit for high-voltage input and a solid-state transformer. Background Technology

[0002] In the current context of rapid economic development and ever-changing technological advancements, power electronic systems are playing an increasingly important role. Solid-State Transformers (SSTs), also known as Power Electronic Transformers (PETs) or intelligent transformers, are a new type of power equipment based on high-frequency power electronic conversion technology and high-frequency magnetic components. They aim to replace traditional power frequency transformers, achieving efficient power conversion, flexible control, and intelligent management.

[0003] In solid-state transformer applications, high-voltage AC power of 10kV or above is electronically converted into 800V DC power. Since the input voltage far exceeds the withstand voltage level of current power semiconductors, a multi-module series connection method is generally used. This makes the converter circuit complex, increases its size, increases production costs, and also affects the reliability of the transformer. Summary of the Invention

[0004] In view of this, a series topology circuit and solid-state transformer for high voltage input with simplified structure, low cost and high reliability are provided, which can meet the application scenarios of high voltage to low voltage conversion.

[0005] A series topology circuit for high-voltage input includes a PFC circuit and a conversion circuit. The PFC circuit is connected between the L line and N line of the high-voltage input. The conversion circuit converts the voltage transmitted by the PFC circuit and is connected to the positive output terminal VOUT+ and the negative output terminal VOUT-. The PFC circuit includes an energy storage inductor L1, a multi-stage switching circuit, and multiple input capacitors.

[0006] The energy storage inductor L1 is connected to the L line and / or N line of the high voltage input;

[0007] The conversion circuit has a multi-stage conversion unit with the same number of stages as the multi-stage switching circuit. The secondary circuits of each multi-stage conversion unit are connected in parallel to the positive output terminal VOUT+ and the negative output terminal VOUT- so that the voltage on each input capacitor is basically equal.

[0008] The multi-stage switching circuits are connected in series between the L and N lines of the high-voltage input. Each stage of the switching circuit is a full-bridge circuit structure and includes a first bridge arm diode, a second bridge arm diode, a third bridge arm power transistor, and a fourth bridge arm power transistor. The anode of the first bridge arm diode and the drain of the third bridge arm power transistor in the first stage are both connected to the energy storage inductor L1. The cathodes of the first and second bridge arm diodes in each stage are connected to the first terminal of the corresponding conversion unit and the input capacitor of the same stage. The sources of the third and fourth bridge arm power transistors in each stage are connected to the second terminal of the corresponding conversion circuit and the input capacitor of the same stage. The anode of the second bridge arm diode and the drain of the fourth bridge arm power transistor in each stage are connected to the anode of the first bridge arm diode and the drain of the third bridge arm power transistor in the next stage of the switching circuit. The anode of the second bridge arm diode and the drain of the fourth bridge arm power transistor in the last stage of the switching circuit are connected to the N line of the high-voltage input.

[0009] The gates of each power transistor are connected to a corresponding drive pin of the driver chip. The driver chip provides a closing signal to the fourth bridge arm power transistor of each stage during the positive half-cycle and a closing signal to the third bridge arm power transistor of each stage during the negative half-cycle, so as to form a series-connected switch combination structure in the positive and negative half-cycles respectively, and charge each input capacitor sequentially through the energy storage inductor L1.

[0010] Furthermore, each third-arm power transistor in each level of the switching circuit is switched synchronously or in phase-shifted, and each fourth-arm power transistor in each level of the switching circuit is switched synchronously or in phase-shifted.

[0011] Furthermore, the driving chip provides corresponding synchronous turn-on or turn-off signals to the third bridge arm power transistors of each stage during the positive half-cycle and corresponding synchronous turn-on or turn-off signals to the fourth bridge arm power transistors of each stage during the negative half-cycle, so that the multi-stage switching circuits are connected in series and the multiple input capacitors are connected in series; each power transistor is a MOSFET, IGBT, bipolar transistor, silicon carbide MOSFET or gallium nitride MOSFET.

[0012] Furthermore, during the positive half-cycle, each third-arm power transistor in each stage of the switching circuit switches simultaneously. When each third-arm power transistor is on, the first-arm diodes in each stage are reverse-biased and do not conduct, and the energy storage inductor L1 is charged. When each third-arm power transistor is off, the first-arm diodes in each stage conduct forward, and the energy storage inductor L1 charges the input capacitors of each stage. During the negative half-cycle, each fourth-arm power transistor in each stage of the switching circuit switches simultaneously. When each fourth-arm power transistor is on, the second-arm diodes in each stage are reverse-biased and do not conduct, and the energy storage inductor L1 is charged. When each fourth-arm power transistor is off, the second-arm diodes in each stage conduct forward, and the energy storage inductor L1 charges the input capacitors of each stage.

[0013] Furthermore, setting the number of stages of the switching circuit to n, when each third-arm power transistor and each fourth-arm power transistor in each stage of the switching circuit are switched simultaneously, when the inductor current is continuous, the duty cycle of the power transistor is... d The relationship between the input voltage and the voltage across the input capacitor is given by the following formula:

[0014] d = 1- V in / n * V c ;

[0015] In the formula, V in The input voltage is Vac.L - Vac.N, which is the voltage difference between the L and N lines (high voltage input). Vc This refers to the voltage of a single capacitor.

[0016] The ripple current on the energy storage inductor L1 satisfies the following formula:

[0017] ;

[0018] Where L is the inductance. f sw For switching frequency, I pp This represents the peak-to-peak value of the inductor current.

[0019] Furthermore, the number of stages in the switching circuit is set to n. During the positive half-cycle, the power transistors of each third bridge arm in each stage of the switching circuit switch alternately with a 120° phase. During the negative half-cycle, the power transistors of each fourth bridge arm in each stage of the switching circuit switch alternately with a 120° phase. The duty cycle of the power transistors is... d The relationship between the input voltage and the voltage across the input capacitor is given by the following formula:

[0020] d = 1- V in / n * V c ;

[0021] In the formula, V in The input voltage is Vac.L - Vac.N, which is the voltage difference between the L and N lines (high voltage input). Vc This refers to the voltage of a single capacitor.

[0022] The ripple current on the energy storage inductor L1 satisfies the following formula:

[0023] ;

[0024] Where L is the inductance. f sw For switching frequency, I pp This represents the peak-to-peak value of the inductor current.

[0025] Specifically, each conversion unit is a DC-DC conversion topology circuit. Each conversion unit includes a full-bridge rectifier circuit, an LLC resonant circuit, and an output rectifier circuit. Each full-bridge rectifier circuit includes four rectifier MOSFETs and has a positive output terminal and a negative output terminal. The LLC resonant circuit includes a resonant capacitor, a resonant inductor, and a transformer connected in series. One end of the resonant capacitor is connected to the positive output terminal of the full-bridge rectifier circuit, and the other end is connected to one end of the resonant inductor. The other end of the resonant inductor is connected to one end of the primary winding of the transformer, and the other end of the primary winding of the transformer is connected to the negative output terminal of the full-bridge rectifier circuit.

[0026] Specifically, each of the transformers has a center tap on its secondary winding, which is connected to the negative output terminal VOUT-. Each of the output rectifier circuits includes a first secondary diode and a second secondary diode. The anode of the first secondary diode is connected to the same-name terminal of the secondary winding of the transformer, and the anode of the second secondary diode is connected to the opposite-name terminal of the secondary winding of the transformer. The cathodes of the two secondary diodes are connected in parallel to the positive output terminal VOUT+.

[0027] Specifically, the same-name terminals and different-name terminals of the secondary windings of the multiple transformers are respectively connected to the positive output terminal VOUT+ through a secondary diode. Each of the secondary windings of the multiple transformers has a center tap, and each center tap is connected to the negative output terminal VOUT-. An output capacitor C5 is connected between the positive output terminal VOUT+ and the negative output terminal VOUT-.

[0028] And, a solid-state transformer for converting high-voltage alternating current to direct current voltage, comprising three-phase AC input voltage, each phase AC input voltage being connected to a series topology circuit of the high-voltage input as described above, the three series topologies of the three-phase high-voltage input being connected in a star or delta configuration.

[0029] The series topology circuit with high-voltage input described above has at least the following beneficial effects:

[0030] 1. The PFC circuit that is directly connected to the high voltage input uses fewer components, thus reducing the cost. It can quickly store energy through the energy storage inductor L1 and rapidly charge each capacitor in an equal manner. The circuit topology is simple, efficient, and highly reliable.

[0031] 2. By connecting the secondary side of the subsequent converter in parallel, the series bus voltage can be balanced;

[0032] 3. Diode clamping is used in each stage of the PFC circuit, which can effectively suppress the stress of the power transistor near the bus capacitor (such as input capacitors C1, C2, C3);

[0033] 4. Multi-stage switching circuits connected in series can effectively reduce input ripple through synchronous switching or phase-shifting control. For example, in phase-shifting control, the inductor ripple current is greatly reduced. Taking a three-stage switching circuit as an example, the three-phase interleaved ripple current is 1 / 9 of that when operating synchronously.

[0034] 5. When the above-mentioned series topology circuit with high voltage input is applied to a solid-state transformer, it can convert 10KV or higher AC power into 800V DC power through the circuit, which can meet various high-voltage to low-voltage application scenarios. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the series topology circuit for high-voltage input according to an embodiment of the present invention.

[0036] Figure 2 This is a schematic diagram of the equivalent circuit structure of the series topology circuit with high voltage input in an embodiment of the present invention when the half-bridge is turned on during the positive half-cycle.

[0037] Figure 3 This is a schematic diagram of the drive pulses of the series topology circuit with high voltage input in an embodiment of the present invention when the third bridge arm power transistors of each stage are switched alternately during the positive half-cycle.

[0038] Figure 4 It has Figure 1 A schematic diagram of a three-phase solid-state transformer connected in a star configuration to a PFC circuit in a series topology circuit with high-voltage input.

[0039] Figure 5 It has Figure 1A schematic diagram of a three-phase solid-state transformer connected in a delta configuration to a PFC circuit in a series topology circuit with high-voltage input. Detailed Implementation

[0040] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0041] Please see Figure 1 and Figure 2 This illustration shows a series topology circuit for high-voltage input provided by an embodiment of the present invention, including a PFC circuit and a conversion circuit. The PFC circuit is connected between the L line and N line of the high-voltage input. The conversion circuit converts the voltage transmitted by the PFC circuit and is connected to the positive output terminal VOUT+ and the negative output terminal VOUT-. The PFC circuit includes an energy storage inductor L1, a multi-stage switching circuit, and multiple input capacitors. The energy storage inductor L1 is connected to the L line and / or N line of the high-voltage input. The illustration shows the energy storage inductor L1 connected to the L line of the high-voltage input. Preferably, the energy storage inductor L1 is connected to the main circuit of the L line and the N line respectively. The conversion circuit has a multi-stage conversion unit with the same number of stages as the multi-stage switching circuit. The secondary circuits of each multi-stage conversion unit are connected in parallel to the positive output terminal VOUT+ and the negative output terminal VOUT- to ensure that the voltages on each input capacitor are approximately equal. The multi-stage switching circuits are connected in series between the L and N lines of the high-voltage input. Each stage of the switching circuit is a full-bridge circuit structure and includes a first bridge arm diode, a second bridge arm diode, a third bridge arm power transistor, and a fourth bridge arm power transistor. The anode of the first bridge arm diode and the drain of the third bridge arm power transistor in the first stage are both connected to the energy storage inductor L1. The second bridge arm diode of each stage... The cathodes of the first and second bridge arm diodes are connected to the first terminal of the corresponding conversion unit and the input capacitor of the current stage. The sources of the third and fourth bridge arm power transistors of each stage are connected to the second terminal of the corresponding conversion circuit and the input capacitor of the current stage. The anode of the second bridge arm diode and the drain of the fourth bridge arm power transistor of each stage are connected to the anode of the first bridge arm diode of the next stage switching circuit and the drain of the third bridge arm power transistor of the next stage switching circuit. The anode of the second bridge arm diode of the last stage switching circuit and the drain of the fourth bridge arm power transistor of the last stage switching circuit are connected to the N line of the high voltage input.

[0042] Each power transistor's gate is connected to a corresponding drive pin of the driver chip. The driver chip provides a closing signal to the fourth bridge arm power transistor of each stage during the positive half-cycle and a closing signal to the third bridge arm power transistor of each stage during the negative half-cycle. This forms a series-connected switch combination structure during the positive and negative half-cycles, respectively, and charges each input capacitor sequentially through the energy storage inductor L1. Providing a closing signal to the fourth bridge arm power transistor of each stage during the positive half-cycle and to the third bridge arm power transistor of each stage during the negative half-cycle primarily ensures that these two power transistors are initially turned on by default. For example, when a three-stage series structure is used, this is equivalent to... Figure 3 The circuit diagram shown.

[0043] Furthermore, the power transistors of each third arm in each level of the switching circuit are synchronously switched or phase-shifted, and the power transistors of each fourth arm in each level of the switching circuit are synchronously switched or phase-shifted. The phase-shifted switch is mainly used to allow the power transistors to be switched on or off by 120° phase shift when three-phase AC power is connected.

[0044] Furthermore, the driver chip provides corresponding synchronous turn-on or turn-off signals to the third bridge arm power transistors of each stage during the positive half-cycle and corresponding synchronous turn-on or turn-off signals to the fourth bridge arm power transistors of each stage during the negative half-cycle, so that the multi-stage switching circuits are connected in series and the multiple input capacitors are connected in series. Preferably, each power transistor is a MOSFET, IGBT, bipolar transistor, silicon carbide MOSFET, or gallium nitride MOSFET.

[0045] Furthermore, during the positive half-cycle, each third-arm power transistor in each stage of the switching circuit switches simultaneously. When each third-arm power transistor is on, the first-arm diodes in each stage are reverse-biased and do not conduct, and the energy storage inductor L1 is charged. When each third-arm power transistor is off, the first-arm diodes in each stage conduct forward, and the energy storage inductor L1 charges the input capacitors of each stage. During the negative half-cycle, each fourth-arm power transistor in each stage of the switching circuit switches simultaneously. When each fourth-arm power transistor is on, the second-arm diodes in each stage are reverse-biased and do not conduct, and the energy storage inductor L1 is charged. When each fourth-arm power transistor is off, the second-arm diodes in each stage conduct forward, and the energy storage inductor L1 charges the input capacitors of each stage.

[0046] Specifically, such as Figure 1The diagram illustrates a three-stage switching circuit in series. The first stage includes diode D1, diode D2, MOSFET Q1, and MOSFET Q2; the second stage includes diode D3, diode D4, MOSFET Q3, and MOSFET Q4; and the third stage includes diode D5, diode D6, MOSFET Q5, and MOSFET Q6. Diodes D1, D3, and D5 serve as the first bridge arm diodes for each stage; D2, D4, and D6 serve as the second bridge arm diodes; MOSFETs Q1, Q3, and Q5 serve as the third bridge arm power transistors; and Q2, Q4, and Q6 serve as the fourth bridge arm power transistors. The three-stage switching circuit corresponds to three input capacitors: C1, C2, and C3. Each input capacitor is connected to the cathode of one of the two diodes and the source of one of the two power transistors in each stage. For example, the cathodes of the first diode D1 and the second diode D2 are connected to the first terminal of the first input capacitor C1, and the sources of the first MOSFET Q1 and the second MOSFET Q2 are connected to the second terminal of the first input capacitor C1, and so on for the other stages.

[0047] like Figure 2 As shown, taking a three-stage switching circuit in series as an example, the driver chip provides a closing signal to the fourth bridge arm power transistor of each stage during the positive half-cycle. Furthermore, the third bridge arm power transistors in each stage of the switching circuit switch synchronously switch. During the positive half-cycle, the second MOSFET Q2, the fourth MOSFET Q4, and the sixth MOSFET Q6, as the fourth bridge arm power transistors of each stage, are closed, while the first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5, as the third bridge arm power transistors of each stage, are synchronously controlled to be on or off. Ignoring the conversion circuit on the right and only considering the PFC circuit on the left, it can be equivalent to... Figure 2 The circuit structure shown is shown.

[0048] exist Figure 2In the circuit structure, there are two control modes: 1) The first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5 switch simultaneously. 2) The first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5 switch with a 120° phase shift. In the first control mode, when the first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5 are turned on, the first diode D1, the third diode D3, and the fifth diode D5 are reverse-biased and cut off. The circuit quickly charges the energy storage inductor L1, increasing the energy stored in inductor L1. When the first MOSFET Q1, the third MOSFET Q3, and the fifth MOSFET Q5 are turned off, the first diode D1, the third diode D3, and the fifth diode D5 are forward-biased, and the energy storage inductor L1 charges the corresponding input capacitors C1, C2, and C3 through each diode, increasing the energy on each input capacitor and decreasing the energy in the energy storage inductor L1. This process repeats continuously, transferring input energy to each input capacitor, preferably through equalization charging and energy storage. The energy is then transferred to the secondary side via the subsequent conversion circuit, thus achieving the high-voltage to low-voltage conversion. Due to the diodes and clamping, the maximum stress on each MOSFET is equal to the capacitor voltage and the forward voltage drop of the diode. This enables the high-voltage input / low-voltage output power conversion.

[0049] In a specific application example, when the inductor current is continuous, the number of stages in the switching circuit is set to n. When the power transistors of each third and fourth bridge arm in each stage of the switching circuit are switched simultaneously, the first control mode is adopted. When the inductor current is continuous, the duty cycle of the power transistors is... d The relationship between the input voltage and the voltage across the input capacitor is given by the following formula:

[0050] d = 1- V in / n * V c ;

[0051] In the formula, V in The input voltage is Vac.L - Vac.N, which is the voltage difference between the L and N lines (high voltage input). Vc This refers to the voltage of a single capacitor.

[0052] The ripple current on the energy storage inductor L1 satisfies the following formula:

[0053] ;

[0054] Where L is the inductance. f sw For switching frequency, I pp This represents the peak-to-peak value of the inductor current. The peak-to-peak value refers to twice the peak value.

[0055] In another embodiment, the power transistors of each fourth bridge arm in the switching circuit are phase-shifted. The phase-shifting switch primarily allows the power transistors to switch on or off by 120° phase shift when three-phase AC power is connected. During the positive half-cycle, a second control mode is used. Taking a 3-stage switching circuit as an example, the driving sequence is as follows: Figure 3 As shown. During the negative half-cycle, the power transistors of each fourth bridge arm in each stage of the switching circuit switch alternately with a 120° phase shift. Similarly, setting the number of stages in the switching circuit to n, in this second control mode, the duty cycle of the power transistors... d The relationship between the input voltage and the voltage across the input capacitor is given by the following formula:

[0056] d = 1- V in / n * V c ;

[0057] In the formula, V in The input voltage is Vac.L - Vac.N, which is the voltage difference between the L and N lines (high voltage input). Vc This refers to the voltage of a single capacitor.

[0058] The ripple current on the energy storage inductor L1 satisfies the following formula:

[0059] ;

[0060] Where L is the inductance. f sw For switching frequency, I pp This represents the peak-to-peak value of the inductor current.

[0061] In the conversion circuit, each conversion unit is preferably a DC-DC conversion topology circuit. Each conversion unit includes a full-bridge rectifier circuit, an LLC resonant circuit, and an output rectifier circuit. Each full-bridge rectifier circuit includes four rectifier MOSFETs and has a positive output terminal and a negative output terminal. The LLC resonant circuit includes a resonant capacitor, a resonant inductor, and a transformer connected in series. One end of the resonant capacitor is connected to the positive output terminal of the full-bridge rectifier circuit, and the other end is connected to one end of the resonant inductor. The other end of the resonant inductor is connected to one end of the primary winding of the transformer, and the other end of the primary winding of the transformer is connected to the negative output terminal of the full-bridge rectifier circuit.

[0062] Specifically, the structures of each transformation unit are basically the same, such as Figure 1The following diagram illustrates the process using the first-stage conversion unit as an example. The first-stage conversion unit includes a seventh rectifier MOSFET Q7, an eighth rectifier MOSFET Q8, a ninth rectifier MOSFET Q9, and a tenth rectifier MOSFET Q10. The drains of the seventh rectifier MOSFET Q7 and the ninth rectifier MOSFET Q9 are connected to the cathodes of two diodes in the corresponding stage's switching circuit, as shown in the diagram, which represents the cathodes of the first diode D1 and the second diode D2 connected in the first-stage switching circuit. The source of the seventh rectifier MOSFET Q7 and the drain of the eighth rectifier MOSFET Q8 are both connected to the opposite-named terminal of the primary winding of the first transformer T1. The source of the ninth rectifier MOSFET Q9 and the drain of the tenth rectifier MOSFET Q10 are both connected to the same-named terminal of the primary winding of the first transformer T1. The source of the eighth rectifier MOSFET Q8 and the tenth rectifier MOSFET Q10 are both connected to the sources of the two power transistors in the first-stage switching circuit: the sources of the first MOSFET Q1 and the second MOSFET Q2.

[0063] In addition, there are multiple LLC resonant circuits, the number of which corresponds to the number of stages in the switching circuit and the number of stages or units in the conversion unit. For example, let's take... Figure 1 Taking the first stage of the three-stage circuit as an example, the LLC resonant circuit of the first stage includes a fourth resonant capacitor C4, a second resonant inductor L2, and a first transformer T1 connected in series. One end of the second resonant inductor L2 is connected to the fourth resonant capacitor C4, and the other end is connected to the same terminal of the primary winding of the first transformer T1.

[0064] Specifically, each of the transformers has a center tap on its secondary winding, which is connected to the negative output terminal VOUT-. Each of the output rectifier circuits includes a first secondary diode and a second secondary diode. The anode of the first secondary diode is connected to the same-name terminal of the secondary winding of the transformer, and the anode of the second secondary diode is connected to the opposite-name terminal of the secondary winding of the transformer. The cathodes of the two secondary diodes are connected in parallel to the positive output terminal VOUT+.

[0065] Specifically, the same-name terminals and different-name terminals of the secondary windings of the multiple transformers are respectively connected to the positive output terminal VOUT+ through a secondary diode. Each secondary winding of the multiple transformers has a center tap, and each center tap is connected to the negative output terminal VOUT-. An output capacitor C5 is connected between the positive output terminal VOUT+ and the negative output terminal VOUT-. Figure 1As shown, taking the first stage as an example, the same-named and opposite-named terminals of the secondary winding of the first transformer T1 are connected to the anodes of the first secondary diode D7 and the second secondary diode D8 in the first stage, respectively. The cathodes of the first secondary diode D7 and the second secondary diode D8 are connected in parallel to the positive output terminal VOUT+. The cathodes of the secondary diodes D9 and D10 in the second stage are also connected in parallel to the positive output terminal VOUT+. Similarly, the cathodes of the secondary diodes D11 and D12 in the third stage are also connected in parallel to the positive output terminal VOUT+. This connection method is used in circuits with more stages, and will not be elaborated further here.

[0066] In another aspect, this invention also provides a solid-state transformer for converting high-voltage alternating current into direct current. It includes a three-phase AC input voltage, each phase of which is connected to the series topology circuit of the high-voltage input described above. Different three-phase connection methods can be used in specific applications, for example... Figure 4 As shown, the three high-voltage inputs connected in series in a three-phase configuration are configured in a star topology. Figure 5 As shown, the three high-voltage inputs connected in series in a delta configuration are connected in a three-phase configuration.

[0067] It should be noted that the present invention is not limited to the above-described embodiments. Based on the inventive spirit of the present invention, those skilled in the art can make other changes, and these changes made in accordance with the inventive spirit of the present invention should be included within the scope of protection claimed by the present invention.

Claims

1. A series topology circuit for high-voltage input, comprising a PFC circuit and a conversion circuit, wherein the PFC circuit is connected between the L line and N line of the high-voltage input, and the conversion circuit converts the voltage transmitted by the PFC circuit and is connected to an output positive terminal VOUT+ and an output negative terminal VOUT-; characterized in that, The PFC circuit includes an energy storage inductor L1, a multi-stage switching circuit, and multiple input capacitors. The energy storage inductor L1 is connected to the L line or N line of the high voltage input; The conversion circuit has a multi-stage conversion unit with the same number of stages as the multi-stage switching circuit. The secondary circuits of each multi-stage conversion unit are connected in parallel to the positive output terminal VOUT+ and the negative output terminal VOUT- so that the voltage on each input capacitor is basically equal. The multi-stage switching circuits are connected in series between the L and N lines of the high-voltage input. Each stage of the switching circuit is a full-bridge circuit structure and includes a first bridge arm diode, a second bridge arm diode, a third bridge arm power transistor, and a fourth bridge arm power transistor. The anode of the first bridge arm diode and the drain of the third bridge arm power transistor in the first stage are both connected to the energy storage inductor L1. The cathodes of the first and second bridge arm diodes in each stage are connected to the first terminal of the corresponding conversion unit and the input capacitor of the same stage. The sources of the third and fourth bridge arm power transistors in each stage are connected to the second terminal of the corresponding conversion circuit and the input capacitor of the same stage. The anode of the second bridge arm diode and the drain of the fourth bridge arm power transistor in each stage are connected to the anode of the first bridge arm diode and the drain of the third bridge arm power transistor in the next stage of the switching circuit. The anode of the second bridge arm diode and the drain of the fourth bridge arm power transistor in the last stage of the switching circuit are connected to the N line of the high-voltage input. The gates of each power transistor are connected to a corresponding drive pin of the driver chip. The driver chip provides a closing signal to the fourth bridge arm power transistor of each stage during the positive half-cycle and a closing signal to the third bridge arm power transistor of each stage during the negative half-cycle, so as to form a series-connected switch combination structure during the positive and negative half-cycles and charge each input capacitor sequentially through the energy storage inductor L1.

2. The series topology circuit with high-voltage input as described in claim 1, characterized in that, Synchronous or phase-reversed switches for each third-arm power transistor in each level of the switching circuit, and synchronous or phase-reversed switches for each fourth-arm power transistor in each level of the switching circuit.

3. The series topology circuit with high-voltage input as described in claim 1, characterized in that, The driver chip provides corresponding synchronous turn-on or turn-off signals to the third bridge arm power transistors of each stage during the positive half-cycle and corresponding synchronous turn-on or turn-off signals to the fourth bridge arm power transistors of each stage during the negative half-cycle, so that the multi-stage switching circuits are connected in series and the multiple input capacitors are connected in series; each power transistor is a MOSFET, IGBT, bipolar transistor, silicon carbide MOSFET or gallium nitride MOSFET.

4. The series topology circuit with high-voltage input as described in claim 1, characterized in that, During the positive half-cycle, all third-arm power transistors in each stage of the switching circuit switch simultaneously switch on and off. When each stage's third-arm power transistor is on, the first-arm diodes in each stage are reverse-biased and do not conduct, and the energy storage inductor L1 charges. When each stage's third-arm power transistor is off, the first-arm diodes in each stage are forward-biased, and the energy storage inductor L1 charges the input capacitors of each stage. During the negative half-cycle, all fourth-arm power transistors in each stage of the switching circuit switch simultaneously switch on and off. When each stage's fourth-arm power transistor is on, the second-arm diodes in each stage are reverse-biased and do not conduct, and the energy storage inductor L1 charges. When each stage's fourth-arm power transistor is off, the second-arm diodes in each stage are forward-biased, and the energy storage inductor L1 charges the input capacitors of each stage.

5. The series topology circuit with high-voltage input as described in claim 1, characterized in that, Given a switching circuit with n stages, when all the third-arm and fourth-arm power transistors in each stage of the switching circuit are switched simultaneously, and the inductor current is continuous, what is the duty cycle of the power transistors? d The relationship between the input voltage and the voltage across the output capacitor is given by the following formula: d = 1- V in / n * V c ; In the formula, V in The input voltage is Vac.L - Vac.N, which is the voltage difference between the L and N lines (high voltage input). Vc This refers to the voltage of a single capacitor. The ripple current on the energy storage inductor L1 satisfies the following formula: ; Where L is the inductance. f sw For switching frequency, I pp This represents the peak-to-peak value of the inductor current.

6. The series topology circuit with high-voltage input as described in claim 1, characterized in that, The number of stages in the switching circuit is set to n. During the positive half-cycle, the power transistors of each third bridge arm in each stage of the switching circuit switch with a 120° phase shift. During the negative half-cycle, the power transistors of each fourth bridge arm in each stage of the switching circuit switch with a 120° phase shift. The duty cycle of the power transistors is... d The relationship between the input voltage and the voltage across the input capacitor is given by the following formula: d = 1- V in / n * V c ; In the formula, V in The input voltage is Vac.L - Vac.N, which is the voltage difference between the L and N lines (high voltage input). Vc This refers to the voltage of a single capacitor. The ripple current on the energy storage inductor L1 satisfies the following formula: ; Where L is the inductance. f sw For switching frequency, I pp This represents the peak-to-peak value of the inductor current.

7. The series topology circuit with high-voltage input as described in claim 1, characterized in that, Each conversion unit is a DC-DC conversion topology circuit. Each conversion unit includes a full-bridge rectifier circuit, an LLC resonant circuit, and an output rectifier circuit. Each full-bridge rectifier circuit includes four rectifier MOSFETs and has a positive output terminal and a negative output terminal. The LLC resonant circuit includes a resonant capacitor, a resonant inductor, and a transformer connected in series. One end of the resonant capacitor is connected to the positive output terminal of the full-bridge rectifier circuit, and the other end is connected to one end of the resonant inductor. The other end of the resonant inductor is connected to one end of the primary winding of the transformer, and the other end of the primary winding of the transformer is connected to the negative output terminal of the full-bridge rectifier circuit.

8. The series topology circuit with high-voltage input as described in claim 7, characterized in that, Each of the transformers has a center tap on its secondary winding connected to the negative output terminal VOUT-. Each of the output rectifier circuits includes a first secondary diode and a second secondary diode. The anode of the first secondary diode is connected to the same-name terminal of the secondary winding of the transformer, and the anode of the second secondary diode is connected to the opposite-name terminal of the secondary winding of the transformer. The cathodes of the two secondary diodes are connected in parallel to the positive output terminal VOUT+.

9. The series topology circuit with high-voltage input as described in claim 7, characterized in that, Each of the same-name terminals and different-name terminals of the secondary windings of the multiple transformers are connected to the positive output terminal VOUT+ through a secondary diode. Each of the secondary windings of the multiple transformers has a center tap, and each center tap is connected to the negative output terminal VOUT-. An output capacitor C5 is connected between the positive output terminal VOUT+ and the negative output terminal VOUT-.

10. A solid-state transformer for converting high-voltage alternating current to direct current, comprising a three-phase AC input voltage, characterized in that, Each phase of the AC input voltage is connected to a series topology circuit of the high voltage input as described in any one of claims 1-9, and the three series topologies of the three high voltage inputs connected in a three-phase configuration are configured in a star or delta configuration.

Citation Information

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