Display device

Abstract

The embodiment of the invention belongs to the display circuit technology, and provides a display device which comprises a display panel, a display module and a control module. A controller; the pixel driving circuit comprises an on-off control circuit of which the first end receives a light-emitting control signal and the second end is connected with a light-emitting device; the first end of the driving current control circuit receives the light-emitting control signal, the second end receives the first voltage, and the third end is connected with the third end of the on-off control circuit; the light-emitting time control circuit comprises a first resistor, a first transistor and a first control circuit; when the first transistor is switched on, voltage change of the first end of the first control circuit is controlled based on the first resistor and the second voltage, the first control circuit is switched on, and the third voltage controls voltage change of the fourth end of the driving current control circuit, so that the second end and the third end of the driving current control circuit are switched on; the first resistor controls the current of a branch where the first transistor and the first control circuit are located; according to the invention, line-by-line luminescence of pixels is realized, and the maximum brightness of the display panel is improved.

Description

Technical Field

[0001] This application relates to display circuit technology. More specifically, it relates to a display device. Background Technology

[0002] Compared to AMOLED (Active Matrix Organic Light Emitting Diode), μLED has advantages such as smaller size, faster response speed, higher luminous efficiency, stronger stability and longer lifespan. Therefore, display applications based on μLED have developed rapidly.

[0003] Figure 1 This is a schematic diagram of the structure of a pixel driving circuit in a related technology. Figure 2 This is a schematic diagram of a signal timing. In a related technology, it can be based on... Figure 2 The relevant signals shown are obtained through Figure 1 The pixel driving circuit shown drives the μLED and controls the μLED to emit light so that the display device can display the image. Figure 1 The pixel driving circuit shown employs a PWM (Pulse Width Modulation) + PAM (Pulse Amplitude Modulation) driving method, including 10 TFTs (Thin Film Transistors) and 3 capacitors. The PWM module controls the LED's emission time to adjust brightness. T6 is the driver TFT, and T6 and T2 form a threshold voltage (Vth) compensation structure to compensate for the threshold voltage of T6. The PAM module controls the current driving the LED; the PAM voltage is a fixed voltage, thus T10 generates a fixed current to drive the LED to emit light of a fixed wavelength.

[0004] because Figure 1 The pixel driving circuit shown uses the Sweep signal to make the LED light up. However, since there is no mature cascade circuit to drive the Sweep signal, multiple rows of pixels emit light in a concentrated manner, which shortens the maximum light-up time of each row of pixels, thus affecting the maximum brightness of the display panel. Summary of the Invention

[0005] This application provides a display device that can solve the problem in the related art where the pixel driving circuit uses the Sweep signal to realize the light emission of the LED, and the concentrated light emission of multiple rows of pixels shortens the maximum light emission time of each row of pixels, thus affecting the maximum brightness of the display panel.

[0006] In a first aspect, embodiments of this application provide a display device, the display device comprising:

[0007] A display panel includes a plurality of pixels, each pixel including at least one light-emitting device, the light-emitting device being used to emit light to enable the display panel to display an image;

[0008] A controller for providing control signals and data signals, the control signals including light emission control signals;

[0009] A pixel driving circuit is connected to the light-emitting device and the controller respectively, and is used to drive the light-emitting device according to the control signal and the data signal;

[0010] The pixel driving circuit includes:

[0011] An on / off control circuit has a first terminal that receives the light-emitting control signal and a second terminal that is connected to the first terminal of the light-emitting device, used to control the light-emitting device to emit light when it is turned on;

[0012] A drive current control circuit has a first terminal receiving the light-emitting control signal, a second terminal receiving a first voltage, and a third terminal connected to the third terminal of the on / off control circuit, used to control the current of the light-emitting device.

[0013] A light emission time control circuit, used to control the light emission time of the light-emitting device, includes: a first resistor, a first transistor, and a first control circuit;

[0014] The control terminal of the first transistor receives the light emission control signal, the first terminal receives the second voltage through the first resistor, and the second terminal is connected to the first terminal of the first control circuit. When the transistor is turned on, the voltage change of the first terminal of the first control circuit is controlled based on the first resistor and the second voltage to turn on the first control circuit.

[0015] The first resistor is used to control the current in the branch where the first transistor and the first control circuit are located;

[0016] The second terminal of the first control circuit receives a third voltage, and the third terminal is connected to the fourth terminal of the drive current control circuit. When the circuit is turned on, the voltage change of the fourth terminal of the drive current control circuit is controlled based on the third voltage, so that the second and third terminals of the drive current control circuit are turned on.

[0017] The second terminal of the light-emitting device receives the third voltage.

[0018] This embodiment provides a display device. When the first transistor is turned on, a second voltage, through the first resistor and the first transistor, controls the voltage at the first terminal of the first control circuit to gradually change, thereby turning on the first control circuit. Since the first control circuit is turned on, based on the third voltage received at the second terminal of the first control circuit, the voltage at the fourth terminal of the drive current control circuit changes, thereby turning on the second and third terminals of the drive current control circuit. When the on / off control circuit is turned on, the drive current control circuit, the on / off control circuit, and the branch containing the light-emitting device form a closed circuit, causing the light-emitting device to emit light. In this application, the second voltage can be simultaneously sent to multiple rows of pixels. Based on the first resistor controlling the current in the first transistor and the branch containing the first control circuit, the voltage at the first terminal of the first control circuit gradually changes to control the light-emitting device to emit light, eliminating the need for a sweep signal. Furthermore, since a mature cascading circuit exists for the light-emitting control signal, using this cascading circuit to transmit the light-emitting control signal allows for row-by-row pixel illumination, which helps to increase the light-emitting time of each pixel and improve the maximum brightness of the display panel.

[0019] In some embodiments of this application, the first control circuit includes:

[0020] The second transistor has its control terminal connected to the second terminal of the first transistor, and its first terminal connected to the fourth terminal of the drive current control circuit.

[0021] The third transistor has a control terminal that receives the light emission control signal, a first terminal that is connected to the second terminal of the second transistor, and a second terminal that receives the third voltage.

[0022] This embodiment provides a first control circuit. When the first transistor is turned on, the second voltage, through the first resistor and the first transistor, controls the voltage at the control terminal of the second transistor to change, thereby turning on the second transistor. Since the conduction of both the third transistor and the first transistor is controlled by the light emission control signal, the third transistor also conducts when the first transistor is turned on. The third voltage, through the third transistor and the second transistor, controls the voltage at the fourth terminal of the drive current control circuit.

[0023] In some embodiments of this application, the control signal further includes a first control signal and a second control signal; the data signal includes a first data signal; and the emission time control circuit further includes:

[0024] The fourth transistor has a control terminal that receives the first control signal, a first terminal that is connected to the first terminal of the second transistor, and a second terminal that is connected to the control terminal of the second transistor, and is used to perform threshold voltage compensation on the second transistor.

[0025] The fifth transistor has a control terminal that receives the second control signal, a first terminal that receives the first data signal, and a second terminal that is connected to the second terminal of the second transistor. When the transistor is turned on, the first data signal is written to the control terminal of the second transistor through the fourth transistor.

[0026] This embodiment provides a light emission time control circuit. A first data signal is written to the control terminal of a second transistor via a fourth and a fifth transistor to control the light emission time of the light-emitting device. Simultaneously, the fourth transistor can compensate for the threshold voltage of the second transistor, which helps to eliminate the influence of threshold voltage drift.

[0027] In some embodiments of this application, the drive current control circuit includes:

[0028] The sixth transistor has a control terminal that receives the light emission control signal and a first terminal that receives the first voltage.

[0029] The seventh transistor has its control terminal connected to the first terminal of the second transistor, its first terminal connected to the second terminal of the sixth transistor, and its second terminal connected to the third terminal of the on / off control circuit.

[0030] This embodiment provides a drive current control circuit. Since the control terminal of the seventh transistor is connected to the first terminal of the second transistor, when the second and third transistors are turned on, the voltage at the control terminal of the seventh transistor can be changed based on the third voltage received by the third transistor, thus turning on the seventh transistor. Simultaneously, since both the third and sixth transistors are controlled by the light-emitting control signal, the sixth transistor also turns on when the third transistor is turned on.

[0031] In some embodiments of this application, the control signal further includes a third control signal; the data signal further includes a second data signal; and the drive current control circuit further includes:

[0032] The eighth transistor has a control terminal that receives the third control signal, a first terminal that is connected to the control terminal of the seventh transistor, and a second terminal that is connected to the second terminal of the seventh transistor, and is used to perform threshold voltage compensation on the seventh transistor.

[0033] The ninth transistor has a control terminal that receives the third control signal, a first terminal that receives the second data signal, and a second terminal that is connected to the first terminal of the seventh transistor. When the transistor is turned on, the second data signal is written to the control terminal of the seventh transistor through the eighth transistor.

[0034] In this embodiment, when the third control signal controls the eighth and ninth transistors to turn on, the second data signal can be written to the control terminal of the seventh transistor through the eighth and ninth transistors. Simultaneously, the eighth transistor performs threshold voltage compensation on the seventh transistor, eliminating the influence of threshold voltage drift.

[0035] In some embodiments of this application, the on / off control circuit includes:

[0036] The tenth transistor has a control terminal that receives the light emission control signal, a first terminal that is connected to the second terminal of the seventh transistor, and a second terminal that is connected to the first terminal of the light-emitting device.

[0037] This embodiment provides an on / off control circuit. Based on the light emission control signal, the tenth transistor is also turned on when the sixth and seventh transistors are turned on, so that the branch where the light emission device is located is a closed circuit, thereby controlling the light emission device to emit light.

[0038] In some embodiments of this application, the control signal further includes a fourth control signal; the pixel driving circuit further includes: an eleventh transistor, whose control terminal receives the fourth control signal, its first terminal receives a reference signal, and its second terminal is connected to the control terminal of the seventh transistor and the first terminal of the fourth transistor respectively, for setting the voltage of the control terminal of the seventh transistor to the voltage corresponding to the reference signal when the transistor is turned on, and for setting the voltage of the control terminal of the second transistor to the voltage corresponding to the reference signal based on the fourth transistor when the fourth transistor is turned on.

[0039] In this embodiment, the eleventh transistor can set the voltage at the control terminal of the seventh transistor to the voltage corresponding to the reference signal, thereby eliminating the influence of residual charge. When the fourth transistor is turned on, it can also set the voltage at the control terminal of the second transistor to the voltage corresponding to the reference signal, thus resetting the voltage at the control terminal of the second transistor and eliminating the influence of residual charge.

[0040] In some embodiments of this application, the light emission control signal, the first control signal, the second control signal, the third control signal, the fourth control signal, the first data signal, and the second data signal are periodic signals, and there is a high-low level transition within the period;

[0041] The cycle includes at least: a first stage, a second stage, a third stage, a fourth stage, and a fifth stage;

[0042] The first control signal, in the first and second stages, is a level that controls the conduction of the fourth transistor, and is different from the level in other stages of the cycle;

[0043] The second control signal is at a level that controls the fifth transistor to turn on during the second stage, and is different from the level during other stages of the cycle;

[0044] The third control signal in the fourth stage is a level that controls the conduction of the eighth and ninth transistors, and is different from the level in other stages of the cycle;

[0045] The fourth control signal is a level that controls the eleventh transistor to be turned on in the first and third stages, and is different from the level in other stages of the cycle.

[0046] The level of the light emission control signal in the fifth stage is the level that controls the first transistor to turn on, and it is different from the level in other stages of the cycle;

[0047] The level of the first data signal in the second stage is different from the level in other stages within the cycle;

[0048] The level of the second data signal in the fourth stage is different from the level in other stages of the cycle;

[0049] The first transistor through the eleventh transistor are all at the same conduction level.

[0050] In this embodiment, by setting the levels of the first control signal, second control signal, third control signal, fourth control signal, light emission control signal, first data signal, and second data signal at each stage, the eleventh and fourth transistors are turned on in the first stage to reset the voltage at the control terminal of the second transistor. In the second stage, the fourth and fifth transistors are turned on to write the first data signal to the control terminal of the second transistor, and the fourth transistor performs threshold voltage compensation on the second transistor. In the third stage, the eleventh transistor is turned on to reset the voltage at the control terminal of the seventh transistor. In the fourth stage, the eighth and ninth transistors are turned on to write the second data signal to the control terminal of the seventh transistor, and the eighth transistor performs threshold voltage compensation on the seventh transistor. In the fifth stage, the first, third, sixth, and tenth transistors are turned on to make the light-emitting device emit light.

[0051] Secondly, embodiments of this application provide a display device, the display device comprising:

[0052] A display panel includes a plurality of pixels, each pixel including at least one light-emitting device, the light-emitting device being used to emit light to enable the display panel to display an image;

[0053] A controller for providing control signals and data signals, the control signals including light emission control signals;

[0054] A pixel driving circuit, connected to the light-emitting device and the controller respectively, is used to drive the light-emitting device according to the control signal and the data signal, and includes: an on / off control circuit, a driving current control circuit, and a light-emitting time control circuit; the light-emitting time control circuit includes a first resistor, a first transistor, and a first control circuit.

[0055] The pixel driving circuit is specifically configured as follows:

[0056] When the light emission control signal is at a level that controls the first transistor to turn on, the control terminal of the first transistor receives the light emission control signal, the first terminal receives the second voltage through the first resistor, and the first transistor turns on.

[0057] The second voltage, through the first resistor and the first transistor, controls the voltage change at the first terminal of the first control circuit, and the first control circuit is turned on.

[0058] Based on the third voltage received at the second terminal of the first control circuit, when the first control circuit is turned on, the voltage change at the fourth terminal of the drive current control circuit is controlled so that the second and third terminals of the drive current control circuit are turned on.

[0059] Based on the light emission control signal, the on / off control circuit is turned on, and based on the first voltage received at the second terminal of the drive current control circuit, the light emission device is controlled to emit light through the drive current control circuit and the on / off control circuit.

[0060] After the light emission control signal undergoes a level shift from the level controlling the first transistor to turn on, the drive current control circuit and the on / off control circuit are disconnected, and the light emission device stops emitting light.

[0061] This embodiment provides a display device. When the light-emitting control signal is at the level that controls the first transistor to conduct, a second voltage gradually changes the voltage at the first terminal of the first control circuit through the first voltage and the first transistor, thereby turning on the first control circuit. Since the first control circuit is on, based on the third voltage received at the second terminal of the first control circuit, the voltage at the fourth terminal of the drive current control circuit changes, thereby turning on the second and third terminals of the drive current control circuit. When the on / off control circuit is on, the drive current control circuit, the on / off control circuit, and the branch containing the light-emitting device form a closed circuit, causing the light-emitting device to emit light. In this application, the second voltage can be simultaneously sent to multiple rows of pixels. Based on the first resistor controlling the current of the first transistor and the branch containing the first control circuit, the voltage at the first terminal of the first control circuit gradually changes to control the light-emitting device to emit light, eliminating the need for a sweep signal. Furthermore, since a mature cascading circuit exists for the light-emitting control signal, using this cascading circuit to transmit the light-emitting control signal allows for row-by-row pixel illumination, which helps to increase the emission time of each pixel and improve the maximum brightness of the display panel.

[0062] In some embodiments of this application, the control signal further includes a first control signal and a second control signal; the data signal includes a first data signal; and the first control circuit includes a second transistor and a third transistor.

[0063] The light emission timing control circuit further includes: a fourth transistor and a fifth transistor;

[0064] The emission timing control circuit is specifically configured as follows:

[0065] When the second control signal is at the level that controls the fifth transistor to turn on, the control terminal of the fifth transistor receives the second control signal, the first terminal receives the first data signal, the fifth transistor turns on, and the voltage at the second terminal of the second transistor is set to the voltage corresponding to the first data signal, so that the second transistor turns on.

[0066] When the first control signal is at the level that controls the fourth transistor to turn on, the control terminal of the fourth transistor receives the first control signal, and based on the second transistor, sets the voltage at the first terminal of the fourth transistor to the voltage corresponding to the first data signal, turns on the fourth transistor to write the first data signal to the control terminal of the second transistor, and performs threshold voltage compensation on the second transistor, setting the voltage at the control terminal of the second transistor to the sum of the voltage corresponding to the first data signal and the threshold voltage.

[0067] In this embodiment, when the second control signal is at the level that enables the fifth transistor to conduct and the first control signal is at the level that enables the fourth transistor to conduct, the first data signal is written to the control terminal of the second transistor through the fifth and fourth transistors to control the light emission time of the light-emitting device. Simultaneously, the fourth transistor can compensate for the threshold voltage of the second transistor, eliminating the influence of threshold voltage drift.

[0068] In some embodiments of this application, the control signal further includes a third control signal; the data signal further includes a second data signal; and the drive current control circuit includes a sixth transistor, a seventh transistor, an eighth transistor, and a ninth transistor.

[0069] The drive current control circuit is specifically configured as follows:

[0070] When the light emission control signal is at the level that controls the sixth transistor to turn on, the control terminal of the sixth transistor receives the light emission control signal, the first terminal receives the first voltage, the sixth transistor turns on, and sets the voltage at the first terminal of the seventh transistor to the first voltage;

[0071] Based on the third transistor and the second transistor, the voltage at the control terminal of the seventh transistor changes to the third voltage, and the seventh transistor is turned on;

[0072] When the third control signal is at a level that controls the eighth transistor and the ninth transistor to turn on, the control terminal of the ninth transistor receives the third control signal, the first terminal receives the second data signal, the ninth transistor turns on, so as to set the voltage of the first terminal of the seventh transistor to the voltage corresponding to the second data signal, and the seventh transistor turns on.

[0073] Based on the seventh transistor, the voltage at the second terminal of the eighth transistor is set to the voltage corresponding to the second data signal. The control terminal of the eighth transistor receives the third control signal, and the eighth transistor is turned on to write the second data signal into the control terminal of the seventh transistor. Threshold voltage compensation is performed on the seventh transistor, and the voltage at the control terminal of the seventh transistor is set to the sum of the voltage corresponding to the second data signal and the threshold voltage.

[0074] In this embodiment, when the light-emitting control signal is at the level that controls the sixth transistor to conduct, the sixth transistor conducts. At this time, the second and third transistors also conduct. The third voltage, through the third and second transistors, controls the voltage change at the control terminal of the seventh transistor, thus controlling the seventh transistor to conduct and enabling the light-emitting device to emit light. When the third control signal controls the eighth and ninth transistors to conduct, the second data signal can be written to the control terminal of the seventh transistor through the eighth and ninth transistors. Simultaneously, the eighth transistor performs threshold voltage compensation on the seventh transistor, eliminating the influence of threshold voltage drift. Attached Figure Description

[0075] To more clearly illustrate the implementation methods in the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0076] Figure 1 This is a schematic diagram of the structure of a pixel driving circuit in a related technology;

[0077] Figure 2 This is a schematic diagram of a signal timing.

[0078] Figure 3 A schematic diagram of a planar architecture for a display device provided in an embodiment of this application. Figure 1 ;

[0079] Figure 4 A schematic diagram of a planar architecture for a display device provided in an embodiment of this application. Figure 2 ;

[0080] Figure 5 A schematic diagram of the structure of a display device provided in this application embodiment. Figure 1 ;

[0081] Figure 6 A schematic diagram of a pixel driving circuit provided in an embodiment of this application. Figure 1 ;

[0082] Figure 7 A schematic diagram of a pixel driving circuit provided in an embodiment of this application. Figure 2 ;

[0083] Figure 8 A timing diagram of related signals for a P-type thin-film transistor provided in an embodiment of this application;

[0084] Figure 9 A schematic diagram of the structure of a pixel driving circuit corresponding to a P-type thin-film transistor in the first stage provided in an embodiment of this application;

[0085] Figure 10 A schematic diagram of the structure of a pixel driving circuit corresponding to a P-type thin-film transistor in the second stage provided in this application embodiment;

[0086] Figure 11 A schematic diagram of the structure of a pixel driving circuit corresponding to a P-type thin-film transistor in the third stage provided in an embodiment of this application;

[0087] Figure 12 A schematic diagram of the structure of a pixel driving circuit corresponding to a P-type thin-film transistor in the fourth stage provided in this application embodiment;

[0088] Figure 13 A schematic diagram of the structure of a pixel driving circuit corresponding to a P-type thin-film transistor in the fifth stage provided in this application embodiment;

[0089] Figure 14 This application provides a schematic diagram of the structure of a pixel driving circuit corresponding to an N-type thin-film transistor.

[0090] Figure 15 This is a timing diagram of the relevant signals of an N-type thin-film transistor provided in an embodiment of this application. Detailed Implementation

[0091] To make the objectives, implementation methods and advantages of this application clearer, the exemplary implementation methods of this application will be clearly and completely described below with reference to the accompanying drawings of the exemplary embodiments of this application. Obviously, the described exemplary embodiments are only some embodiments of this application, and not all embodiments.

[0092] It should be noted that the brief descriptions of terms in this application are only for the convenience of understanding the embodiments described below, and are not intended to limit the embodiments of this application. Unless otherwise stated, these terms should be understood in their ordinary and common meaning.

[0093] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover but not exclusively include, for example, a product or device that includes a series of components is not necessarily limited to those that are explicitly listed, but may include other components that are not explicitly listed or that are inherent to such product or device.

[0094] In the field of display applications, thin-film transistor (TFT) materials, represented by low-temperature polycrystalline silicon (LTPS), have become an important material in the display industry due to their advantages such as high electron mobility, high-resolution driving capability, fast panel response time, and low power consumption. Currently, there are two key issues that urgently need to be addressed regarding active μLED display technology:

[0095] 1. Mass conversion technology for μLEDs. To reduce costs and maximize the advantages of μLEDs, mass conversion technology for μLEDs is crucial.

[0096] 2. Gray-scale unfolding design scheme for μLED. Due to the very steep IV characteristic curve of μLED, that is, the voltage change between the two levels corresponding to the transition from low gray-scale current to high gray-scale current is small, making it difficult to unfold the grayscale using the traditional analog voltage driving method, i.e., PAM driving method.

[0097] In μLED display circuits based on LTPS thin-film transistors, most existing technologies use traditional 2T1C pixel circuits combined with micro silicon-based CMOS (Complementary Metal Oxide Semiconductor) driving to achieve high grayscale display.

[0098] However, active μLED display technology based on micro-silicon CMOS driving is expensive, and using PAM driving means that the driving circuit requires an extremely fast clock signal to meet extremely high voltage resolution. At the same time, using CMOS driving has a certain impact on the flexibility, transparency, and thickness of the display panel.

[0099] In addition, digital pulse width modulation (PWM) driving has also received considerable attention. PWM driving controls the brightness perceived by the human eye by controlling the duration of μLED illumination. Under the same driving current and refresh rate, the greater the proportion of μLED illumination time to the total refresh time, the higher the brightness perceived by the human eye. This method allows for precise control of grayscale brightness.

[0100] Using PWM driving, the drive control signal can be generated by the surface-mount (GOA) circuit. PWM driving divides each display frame into n equally proportioned subframes. Each pixel unit needs to be turned on once within each subframe. The data voltage input to the IC determines whether the μLED emits light for the corresponding time in that subframe, which can achieve a higher grayscale.

[0101] However, due to the limited driving speed of the GOA circuit, when the resolution is high, multiple turns on result in a long period of time that cannot be used for light emission, thus limiting the improvement of grayscale.

[0102] In one related technology, a PWM+PAM driving method can also be used. This scheme can achieve a high grayscale level and does not have excessively high requirements for the driving speed of the GOA circuit. However, in the current scheme, the PAM driver TFT is affected by the uniformity of the manufacturing process. The TFT threshold voltage drift affects the magnitude of the LED driving current, resulting in non-uniform wavelength of LED emission, which affects the display color and effect. In addition, the existing pixel driving circuit has a current charging phenomenon during operation, resulting in high power consumption.

[0103] Figure 1 The pixel driving circuit shown uses the PWM+PAM driving method, because Figure 1 The pixel driving circuit shown requires controlling the LED's light emission via a Sweep signal. Since the Sweep signal is a ramp signal and lacks a mature cascading circuit for driving it, multiple rows of pixels emit light simultaneously, shortening the maximum emission time for each row and thus affecting the display panel's maximum brightness. Meanwhile, Figure 1 In the pixel driving circuit shown, the PAM driver TFT, i.e. T10, does not perform threshold voltage compensation. Threshold voltage drift will cause differences in the emission wavelength of different pixel LEDs, resulting in non-uniform LED light wavelength and affecting the display effect.

[0104] Based on this, this application provides a display device including multiple pixels, a controller, and a pixel driving circuit. Each pixel includes at least one light-emitting device. The pixel driving circuit includes an on / off control circuit, a driving current control circuit, and a light-emitting time control circuit. The light-emitting time control circuit includes a first resistor, a first transistor, and a first control circuit. When the first transistor is turned on, a second voltage passes through the first resistor and the first transistor, controlling the voltage at the first terminal of the first control circuit to gradually change, thereby turning on the first control circuit. Since the first control circuit is turned on, based on the third voltage received at the second terminal of the first control circuit, the voltage at the fourth terminal of the driving current control circuit changes, thereby turning on the second and third terminals of the driving current control circuit. When the on / off control circuit is turned on, the driving current control circuit, the on / off control circuit, and the branch containing the light-emitting device form a closed circuit, causing the light-emitting device to emit light. In this application, the second voltage can be simultaneously sent to multiple rows of pixels. Based on the first resistor controlling the current in the branch containing the first transistor and the first control circuit, the voltage at the first terminal of the first control circuit gradually changes, causing the light-emitting device to emit light, eliminating the need for a sweep signal. Meanwhile, since there is a mature transmission circuit for the light emission control signal, the light emission control signal can be transmitted in stages using the transmission circuit, which can control the pixels to emit light line by line. This is beneficial to increasing the light emission time of each pixel and thus increasing the maximum brightness of the display panel.

[0105] Figure 3 A schematic diagram of a planar architecture for a display device provided in an embodiment of this application. Figure 1 , Figure 4 A schematic diagram of a planar architecture for a display device provided in an embodiment of this application. Figure 2 The following is combined with Figure 3 and Figure 4 The structure of the display device is explained as shown.

[0106] Display devices may include: control circuits, data driving circuits, gate driving circuits, display panels, and power supply circuits, etc.

[0107] The display panel includes multiple scan lines and multiple data lines, as well as multiple pixels P, each of which has a corresponding pixel driving circuit.

[0108] The gate driving circuit includes a scan signal generation circuit and an EM control signal generation circuit. The scan signal is used to generate a scan signal and is sent to the pixel driving circuit via a scan line. The scan signal includes, but is not limited to, the first control signal, second control signal, third control signal, and fourth control signal of this application.

[0109] The EM control signal generation circuit generates the EM control signal and sends it to the pixel driving circuit through the corresponding scan line. The EM control signal is the light emission control signal in this application.

[0110] The data driving circuit generates data signals and transmits these data signals to the pixel driving circuit via data lines. These data signals include, but are not limited to, the first data signal and the second data signal of this application.

[0111] The control circuit is connected to both the gate drive circuit and the data drive circuit. The control circuit can generate pixel data corresponding to each pixel P based on the received image signal, and can also generate a data control signal based on a timing signal. It then sends the data control signal and pixel data to the data drive circuit to generate a data signal.

[0112] The control circuit can also generate a scan control signal based on the timing signal and provide the scan control signal to the gate drive circuit so that the gate drive circuit can generate a scan signal and an EM control signal.

[0113] The power supply circuit is connected to the control circuit, gate drive circuit, data drive circuit and display panel respectively, to provide the corresponding operating voltage.

[0114] The technical solution of this application will be described in detail below with reference to specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0115] Figure 5 A schematic diagram of the structure of a display device provided in this application embodiment. Figure 1 ,refer to Figure 5 As shown, the display device includes:

[0116] The display panel 10 includes a plurality of pixels, each pixel including at least one light-emitting device 101, the light-emitting device 101 being used to emit light to enable the display panel 10 to display an image;

[0117] Controller 20 is used to provide control signals and data signals, the control signals including a light emission control signal EM;

[0118] The pixel driving circuit 30 is connected to the light-emitting device 101 and the controller 20 respectively, and is used to drive the light-emitting device 101 according to the control signal and the data signal;

[0119] The pixel driving circuit 30 includes:

[0120] The on / off control circuit 301 has a first terminal that receives the light emission control signal EM and a second terminal that is connected to the first terminal of the light emission device 101, and is used to control the light emission device 101 to emit light when it is turned on.

[0121] The driving current control circuit 302 has a first terminal receiving the light emission control signal EM, a second terminal receiving the first voltage VDD, and a third terminal connected to the third terminal of the on / off control circuit 301, and is used to control the current of the light emission device 101.

[0122] The light emission time control circuit 303 is used to control the light emission time of the light-emitting device 101, and includes: a first resistor R1, a first transistor T1 and a first control circuit 3031;

[0123] The control terminal of the first transistor T1 receives the light emission control signal EM, the first terminal receives the second voltage VGL through the first resistor R1, and the second terminal is connected to the first terminal of the first control circuit 3031. When the transistor is turned on, the control terminal of the first control circuit 3031 is controlled based on the first resistor R1 and the second voltage VGL to turn on the first control circuit 3031.

[0124] The first resistor R1 is used to control the current in the branch where the first transistor T1 and the first control circuit 3031 are located;

[0125] The second terminal of the first control circuit 3031 receives a third voltage VSS, and the third terminal is connected to the fourth terminal of the drive current control circuit 302. When the circuit is turned on, the third voltage VSS is used to control the voltage change of the fourth terminal of the drive current control circuit 302 so that the second and third terminals of the drive current control circuit 302 are turned on.

[0126] The second terminal of the light-emitting device 101 receives the third voltage VSS.

[0127] In some embodiments, the light-emitting device 101 may be a Mini-LED, Micro-LED, etc.

[0128] When the light-emitting control signal EM is at the level that controls the first transistor T1 to turn on, the first transistor T1 is turned on, and the first resistor R1, the first transistor T1, and the branch containing the first control circuit 3031 are connected. Based on the first resistor R1, the current in the branch containing the first transistor T1 and the first control circuit 3031 is reduced, that is, the current charged into the first control circuit 3031 by the second voltage VGL when the first transistor T1 is turned on is reduced, so that the voltage at the first terminal of the first control circuit 3031 changes slowly until the first control circuit 3031 is turned on, which is beneficial for controlling the light-emitting time of the light-emitting device 101.

[0129] In this application, the pixel driving circuit 30 includes multiple transistors of the same type, which can be either P-type thin-film transistors or N-type thin-film transistors. Both P-type and N-type thin-film transistors include a gate, a source, and a drain. In this application, the control terminal of the transistor is the gate, and the first terminal can be the source and the second terminal can be the drain, or the first terminal can be the drain and the second terminal can be the source, as long as the transistor is turned on or off.

[0130] Thin-film transistors (TFTs) are subject to certain conditions for conduction, and these conditions vary depending on the type of TFT. For P-type TFTs, the conduction condition is Vgs < Vth, while for N-type TFTs, the conduction condition is Vgs > Vth. Here, Vgs represents the voltage difference between the gate and source of the TFT, and Vth represents the threshold voltage of the TFT.

[0131] The first voltage VDD, the second voltage VGL, and the third voltage VSS are all fixed voltage values ​​that can be provided by a DC power supply. Their voltage magnitudes only need to meet the conditions for the corresponding transistors to turn on and off.

[0132] Figure 6 A schematic diagram of a pixel driving circuit provided in an embodiment of this application. Figure 1 ,refer to Figure 6 As shown, in one implementation scenario, the first control circuit 3031 includes:

[0133] The second transistor T2 has its control terminal connected to the second terminal of the first transistor T1, and its first terminal connected to the fourth terminal of the drive current control circuit 302.

[0134] The third transistor T3 has a control terminal that receives the light emission control signal EM, a first terminal that is connected to the second terminal of the second transistor T2, and a second terminal that receives the third voltage VSS.

[0135] Since the third transistor T3 is of the same type as the first transistor T1, the third transistor T3 will also conduct when the light-emitting control signal EM is at the level that controls the first transistor T1 to conduct. Simultaneously, the conduction of the on / off control circuit 301 is also controlled by the light-emitting control signal EM; when the light-emitting control signal EM is at the level that controls the first transistor T1 to conduct, the on / off control circuit 301 will also conduct.

[0136] When the first transistor T1 is turned on, the second voltage VGL gradually changes the voltage at the control terminal of the second transistor T2 through the first resistor R1 and the first transistor T1, so that the second transistor T2 is turned on. Since the third transistor T3 is also turned on, based on the third voltage VSS received at the second terminal of the third transistor T3, when both the second transistor T2 and the third transistor T3 are turned on, the voltage at the fourth terminal of the drive current control circuit 302 changes through the third transistor T3 and the second transistor T2, so that the second and third terminals of the drive current control circuit 302 are turned on. At the same time, since the on / off control circuit 301 is turned on, the light-emitting device 101 emits light.

[0137] Still referencing Figure 6 As shown, in some embodiments, the control signal further includes a first control signal S1 and a second control signal S2; the data signal includes a first data signal Date_PWM; the light emission time control circuit 303 further includes:

[0138] The fourth transistor T4 has a control terminal that receives the first control signal S1, a first terminal that is connected to the first terminal of the second transistor T2, and a second terminal that is connected to the control terminal of the second transistor T2, and is used to perform threshold voltage compensation on the second transistor T2.

[0139] The fifth transistor T5 has a control terminal that receives the second control signal S2, a first terminal that receives the first data signal Date_PWM, and a second terminal that is connected to the second terminal of the second transistor T2. When the transistor is turned on, it is used to write the first data signal Date_PWM into the control terminal of the second transistor T2 through the fourth transistor T4.

[0140] When the second control signal S2 is at the level that controls the fifth transistor T5 to turn on, the fifth transistor T5 turns on. At this time, the first control signal S1 can be controlled to be at the level that controls the fourth transistor T4 to turn on. Through the fourth transistor T4, the first data signal Date_PWM is written to the control terminal of the second transistor T2.

[0141] The fourth transistor T4 and the second transistor T2 form a threshold voltage compensation structure. Therefore, when the first control signal S1 is at the level that controls the fourth transistor T4 to turn on, the threshold voltage of the second transistor T2 can be compensated based on the fourth transistor T4, avoiding the influence of threshold voltage drift. At this time, the voltage at the control terminal of the second transistor T2 is the sum of the voltage corresponding to the first data signal Date_PWM and the threshold voltage.

[0142] In some embodiments, the light emission timing control circuit 303 further includes:

[0143] A first capacitor C1 has its first terminal connected to the control terminal of the second transistor T2, and its second terminal receiving a third voltage VSS. Based on the first capacitor C1, the voltage at the control terminal of the second transistor T2 is maintained at a certain value. Specifically, when the first data signal Date_PWM is written to the control terminal of the second transistor T2, and threshold voltage compensation is performed on the second transistor T2, the voltage at the control terminal of the second transistor T2 is maintained as the sum of the voltage corresponding to the first data signal Date_PWM and the threshold voltage, based on the first capacitor C1.

[0144] This application provides a display device, including a display panel 10, a controller 20, and a pixel driving circuit 30. The display panel 10 includes multiple pixels, each pixel including at least one light-emitting device 101. The controller 20 provides control signals and data signals to the pixel driving circuit 30, causing the pixel driving circuit 30 to drive the light-emitting device 101 according to the control signals and data signals. The control signals include a light-emitting control signal EM. The pixel driving circuit 30 includes an on / off control circuit 301, a drive current control circuit 302, and a light-emitting time control circuit 303. The light-emitting time control circuit 303 includes a first resistor R1, a first transistor T1, and a first control circuit 3031. When the first transistor T1 is turned on, a second voltage VGL, through the first resistor R1 and the first transistor T1, controls the voltage at the first terminal of the first control circuit 3031 to gradually change, thereby turning on the first control circuit 3031. Based on the third voltage VSS received at the second terminal of the first control circuit 3031, the voltage at the fourth terminal of the drive current control circuit 302 is controlled to change, thereby turning on the second and third terminals of the drive current control circuit 302. When the on / off control circuit 301 is turned on, the light-emitting device 101 emits light because the driving current control circuit 302, the on / off control circuit 301, and the branch containing the light-emitting device 101 are all in a closed circuit. In this application, the second voltage VGL can be sent to multiple rows of pixels simultaneously. Based on the first resistor R1 controlling the current of the first transistor T1 and the branch containing the first control circuit 3031, the voltage at the first terminal of the first control circuit 3031 gradually changes to control the light-emitting device 101 to emit light, without the need for a Sweep signal. Furthermore, since the light-emitting control signal EM has a mature cascading circuit, using the cascading circuit to transmit the light-emitting control signal EM allows for row-by-row light emission control, which helps to increase the light-emitting time of each frame of pixels and improve the maximum brightness of the display panel 10.

[0145] Figure 7 A schematic diagram of a pixel driving circuit provided in an embodiment of this application. Figure 2 ,refer to Figure 7 As shown, in some embodiments, the drive current control circuit 302 includes:

[0146] The sixth transistor T6 has a control terminal that receives the light emission control signal EM and a first terminal that receives the first voltage VDD.

[0147] The seventh transistor T7 has its control terminal connected to the first terminal of the second transistor T2, its first terminal connected to the second terminal of the sixth transistor T6, and its second terminal connected to the third terminal of the on / off control circuit 301.

[0148] Since the sixth transistor T6 is of the same type as the first transistor T1, the sixth transistor T6 will also turn on when the light emission control signal EM is at the level that controls the first transistor T1 to turn on.

[0149] As can be seen from the above embodiments, when the light emission control signal EM is at the level that controls the first transistor T1 to turn on, the first transistor T1, the second transistor T2, and the third transistor T3 are all turned on. Based on the third voltage VSS, the voltage at the control terminal of the seventh transistor T7 changes through the second transistor T2 and the third transistor T3, thereby turning on the seventh transistor T7.

[0150] In some embodiments, still refer to Figure 7 As shown, the control signal further includes a third control signal S3; the data signal further includes a second data signal Date_PAM; the drive current control circuit 302 further includes:

[0151] The eighth transistor T8 receives the third control signal S3 at its control terminal, its first terminal is connected to the control terminal of the seventh transistor T7, and its second terminal is connected to the second terminal of the seventh transistor T7, and is used to perform threshold voltage compensation on the seventh transistor T7.

[0152] The ninth transistor T9 has a control terminal that receives the third control signal S3, a first terminal that receives the second data signal Date_PAM, and a second terminal that is connected to the first terminal of the seventh transistor T7. When the transistor is turned on, the second data signal Date_PAM is written to the control terminal of the seventh transistor T7 through the eighth transistor T8.

[0153] When the third control signal S3 is at the level that controls the conduction of the eighth transistor T8 and the ninth transistor T9, based on the ninth transistor T9, the voltage at the first terminal of the seventh transistor T7 can be set to the voltage V corresponding to the second data signal Date_PAM. Date_PAM Based on the eighth transistor T8, the second data signal Date_PAM can be written to the control terminal of the seventh transistor T7.

[0154] Meanwhile, the eighth transistor T8 and the seventh transistor T7 form a threshold voltage compensation structure. When the eighth transistor T8 is turned on, the threshold voltage of the seventh transistor T7 can be compensated to eliminate the influence of threshold voltage drift. This avoids the impact of threshold voltage drift on the magnitude of the driving current of the light-emitting device 101, thereby improving the uniformity of the emitted light from the light-emitting device 101 and enhancing the display effect. At this time, the voltage at the control terminal of the seventh transistor T7 is maintained as the sum of the voltage corresponding to the second data signal Date_PAM and the threshold voltage.

[0155] In one implementation scenario, the second data signal Date_PAM is a fixed voltage value, which can generate a stable driving current to ensure that the light-emitting device 101 emits light of a fixed wavelength.

[0156] In some embodiments, the drive current control circuit 302 further includes:

[0157] The second capacitor C2 has its first terminal receiving the first voltage VDD and its second terminal connected to the control terminal of the seventh transistor T7. Based on the second capacitor C2, the voltage at the control terminal of the seventh transistor T7 is maintained at a certain value. Specifically, after the second data signal Date_PAM is written to the control terminal of the seventh transistor T7 and threshold voltage compensation is performed, based on the second capacitor C2, the voltage at the control terminal of the seventh transistor T7 is maintained as the sum of the voltage corresponding to the second data signal Date_PAM and the threshold voltage.

[0158] In some embodiments, reference Figure 7 As shown, the on / off control circuit 301 includes:

[0159] The tenth transistor T10 receives the light emission control signal EM at its control terminal, and its first terminal is connected to the second terminal of the seventh transistor T7, while its second terminal is connected to the first terminal of the light-emitting device 101.

[0160] Since the tenth transistor T10 is of the same type as the first transistor T1, the tenth transistor T10 will also turn on when the light emission control signal EM is at the level that controls the first transistor T1 to turn on.

[0161] In some embodiments, still refer to Figure 7 As shown, the control signal further includes a fourth control signal S4; the pixel driving circuit 30 further includes: an eleventh transistor T11, whose control terminal receives the fourth control signal S4, its first terminal receives a reference signal REF, and its second terminal is connected to the control terminal of the seventh transistor T7 and the first terminal of the fourth transistor T4 respectively. When the transistor is turned on, the voltage at the control terminal of the seventh transistor T7 is set to the voltage corresponding to the reference signal REF. It is also used to, when the fourth transistor T4 is turned on, set the voltage at the control terminal of the second transistor T2 to the voltage corresponding to the reference signal REF based on the fourth transistor T4.

[0162] When the fourth control signal S4 is at the level that controls the eleventh transistor T11 to turn on, the eleventh transistor T11 turns on, which sets the voltage at the control terminal of the seventh transistor T7 to the voltage corresponding to the reference signal REF, thereby resetting the voltage at the control terminal of the seventh transistor T7 and eliminating the influence of residual charge. The voltage corresponding to the reference signal REF is also a fixed voltage value.

[0163] When the fourth control signal S4 is at the level that controls the eleventh transistor T11 to conduct, and the first control signal S1 is at the level that controls the fourth transistor T4 to conduct, both the eleventh transistor T11 and the fourth transistor T4 are conducting. Therefore, the voltage at the control terminal of the second transistor T2 can be set to the voltage corresponding to the reference signal REF through the fourth transistor T4, thereby resetting the voltage at the control terminal of the second transistor T2 and eliminating the influence of the residual charge.

[0164] In summary, in the drive current control circuit 302, the second data signal Date_PAM is written to the control terminal of the seventh transistor T7 through the eighth transistor T8 and the ninth transistor T9. The eighth transistor T8 also performs threshold voltage compensation on the seventh transistor T7 to eliminate the influence of threshold voltage drift and improve the uniformity of the emitted light from the light-emitting device 101. Based on the eleventh transistor T11, the voltage at the control terminal of the seventh transistor T7 and the voltage at the control terminal of the second transistor T2 can be reset to eliminate the influence of residual charge.

[0165] In one or more embodiments of this application, the light emission control signal EM, the first control signal S1, the second control signal S2, the third control signal S3, the fourth control signal S4, the first data signal Date_PWM, and the second data signal Date_PAM are periodic signals, and there is a high-low level transition within the period;

[0166] The cycle includes at least: a first stage, a second stage, a third stage, a fourth stage, and a fifth stage;

[0167] The first control signal S1 is a level that controls the fourth transistor T4 to be turned on in the first stage and the second stage, and the level is different from that in other stages of the cycle;

[0168] The second control signal S2 is at a level that controls the fifth transistor T5 to be turned on in the second stage, and is different from the level in other stages of the cycle;

[0169] The third control signal S3 in the fourth stage is a level that controls the conduction of the eighth transistor T8 and the ninth transistor T9, and is different from the level in other stages of the cycle.

[0170] The fourth control signal S4 is the level at which the eleventh transistor T11 is turned on in the first stage and the third stage, and is different from the level in other stages of the cycle.

[0171] The level of the light emission control signal EM in the fifth stage is the level that controls the first transistor T1 to turn on, and is different from the level in other stages of the cycle; the level of the first data signal Date_PWM in the second stage is different from the level in other stages of the cycle;

[0172] The level of the second data signal Date_PAM in the fourth stage is different from the level in other stages of the cycle;

[0173] The first transistor T1 to the eleventh transistor T11 are all turned on at the same level.

[0174] In the first stage, the first control signal S1 is at a level that controls the fourth transistor T4 to turn on, and the fourth transistor T4 turns on. The fourth control signal S4 is at a level that controls the eleventh transistor T11 to turn on, and the eleventh transistor T11 turns on. Based on the reference signal REF received at the first terminal of the eleventh transistor T11, the voltage at the control terminal of the second transistor T2 is set to the voltage corresponding to the reference signal REF through the eleventh transistor T11 and the fourth transistor T4.

[0175] In the second stage, the first control signal S1 is at a level that controls the fourth transistor T4 to turn on, and the fourth transistor T4 is turned on. The second control signal S2 is at a level that controls the fifth transistor T5 to turn on, and the fifth transistor T5 is turned on. The first data signal Date_PWM is at a high level. Through the fifth transistor T5 and the fourth transistor T4, the first data signal Date_PWM is written to the control terminal of the second transistor T2, and threshold voltage compensation is performed on the second transistor T2 based on the fourth transistor T4.

[0176] In the third stage, the fourth control signal S4 is the level that controls the eleventh transistor T11 to turn on. When the eleventh transistor T11 turns on, the voltage at the control terminal of the seventh transistor T7 is set to the voltage corresponding to the reference signal REF.

[0177] In the fourth stage, the third control signal S3 is at a level that controls the conduction of the eighth transistor T8 and the ninth transistor T9, and the eighth transistor T8 and the ninth transistor T9 are turned on. The second data signal Date_PAM is at a high level, and through the eighth transistor T8 and the ninth transistor T9, the second data signal Date_PAM is written to the control terminal of the seventh transistor T7, and the threshold voltage compensation of the seventh transistor T7 is performed through the eighth transistor T8.

[0178] In the fifth stage, the light-emitting control signal EM is at the level that controls the first transistor T1 to conduct, and the first transistor T1 conducts. Since the control terminals of the third transistor T3, the sixth transistor T6, and the tenth transistor T10 also receive the light-emitting control signal EM and are of the same type as the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10 also conduct. The second voltage VGL, through the first resistor R1 and the first transistor T1, controls the voltage at the control terminal of the second transistor T2 to gradually change, thereby turning on the second transistor T2. The third voltage VSS, through the third transistor T3 and the second transistor T2, controls the voltage at the control terminal of the seventh transistor T7 to change, thereby turning on the seventh transistor T7. Since the sixth transistor T6, the seventh transistor T7, and the tenth transistor T10 are all conducting, the light-emitting device 101 emits light based on the first voltage VDD and the third voltage VSS.

[0179] In summary, by reasonably setting the levels of the light-emitting control signal EM, the first control signal S1, the second control signal S2, the third control signal S3, the fourth control signal S4, the first data signal Date_PWM, and the second data signal Date_PAM at each stage, the light-emitting device 101 can emit light.

[0180] Based on the above embodiments, the following embodiment provides a detailed description of the driving process of the pixel driving circuit 30 in the display device.

[0181] Referring to the above Figure 5 As shown, in one or more embodiments of this application, a display device includes:

[0182] The display panel 10 includes a plurality of pixels, each pixel including at least one light-emitting device 101, the light-emitting device 101 being used to emit light to enable the display panel 10 to display an image;

[0183] Controller 20 is used to provide control signals and data signals, the control signals including a light emission control signal EM;

[0184] A pixel driving circuit 30 is connected to the light-emitting device 101 and the controller 20 respectively, and is used to drive the light-emitting device 101 according to the control signal and the data signal. It includes: an on / off control circuit 301, a driving current control circuit 302 and a light-emitting time control circuit 303; the light-emitting time control circuit 303 includes a first resistor R1, a first transistor T1 and a first control circuit 3031.

[0185] The pixel driving circuit 30 is specifically configured as follows:

[0186] When the light emission control signal EM is at the level that controls the first transistor T1 to turn on, the control terminal of the first transistor T1 receives the light emission control signal EM, and the first terminal receives the second voltage VGL through the first resistor R1, and the first transistor T1 turns on.

[0187] The second voltage VGL controls the voltage change at the first terminal of the first control circuit 3031 through the first resistor R1 and the first transistor T1, and the first control circuit 3031 is turned on.

[0188] Based on the third voltage VSS received at the second terminal of the first control circuit 3031, when the first control circuit 3031 is turned on, the voltage change at the fourth terminal of the drive current control circuit 302 is controlled so that the second and third terminals of the drive current control circuit 302 are turned on.

[0189] Based on the light emission control signal EM, the on / off control circuit 301 is turned on, and based on the first voltage VDD received at the second terminal of the drive current control circuit 302, the light emission device 101 is controlled to emit light through the drive current control circuit 302 and the on / off control circuit 301.

[0190] After the light emission control signal EM undergoes a level shift from the level controlling the first transistor T1 to be turned on, the drive current control circuit 302 and the on / off control circuit 301 are disconnected, and the light emission device 101 stops emitting light.

[0191] As can be seen from the above embodiments, the level of the light emission control signal EM in the fifth stage is the level that controls the first transistor T1 to turn on, and it is different from the level in other stages of the cycle. Therefore, the first transistor T1 is turned on in the fifth stage and turned off in other stages.

[0192] In one implementation scenario, referring to the above... Figure 7 As shown, the on / off control circuit 301 includes a tenth transistor T10, whose control terminal receives a light-emitting control signal EM. In the fifth stage, when the light-emitting control signal EM is at the level that controls the first transistor T1 to turn on, since the type of the tenth transistor T10 is the same as the type of the first transistor T1, the tenth transistor T10 also turns on.

[0193] In one implementation scenario, the first control circuit 3031 includes a second transistor T2 and a third transistor T3. In the fifth stage, when the light-emitting control signal EM is at a level that controls the first transistor T1 to turn on, the third transistor T3 also turns on because its control terminal receives the light-emitting control signal EM. Since the first transistor T1 is on, based on the second voltage VGL and the first resistor R1, the voltage at the control terminal of the second transistor T2 gradually changes, causing the second transistor T2 to turn on.

[0194] The third voltage VSS changes the voltage at the fourth terminal of the drive current control circuit 302 through the third transistor T3 and the second transistor T2, turning on the drive current control circuit 302. Since the on / off control circuit 301 is also turned on, there is a voltage difference between the two ends of the light-emitting device 101 based on the first voltage VDD and the third voltage VSS, so the light-emitting device 101 emits light.

[0195] When the level of the light-emitting control signal EM is changed from the level that controls the first transistor T1 to be turned on, the branch where the light-emitting device 101 is located is open-circuited because the tenth transistor T10 is turned off, so the light-emitting device 101 does not emit light.

[0196] Since the light-emitting control signal EM has a different level in the first to fourth stages compared to the fifth stage, the first transistor T1, the third transistor T3, and the tenth transistor T10 are all turned off in the first to fourth stages, and the light-emitting device 101 does not emit light.

[0197] This application provides a display device, including a display panel 10, a controller 20, and a pixel driving circuit 30. The display panel 10 includes a plurality of pixels, each pixel including at least one light-emitting device 101. The controller 20 provides control signals and data signals to the pixel driving circuit 30, causing the pixel driving circuit 30 to drive the light-emitting device 101 according to the control signals and data signals. The control signals include a light-emitting control signal EM. The pixel driving circuit 30 includes an on / off control circuit 301, a drive current control circuit 302, and a light-emitting time control circuit 303. The light-emitting time control circuit 303 includes a first resistor R1, a first transistor T1, and a first control circuit 3031. When the light-emitting control signal EM is at a level that controls the first transistor T1 to conduct, the first transistor T1 conducts, and a second voltage VGL, through the first resistor R1 and the first transistor T1, controls the voltage at the first terminal of the first control circuit 3031 to gradually change, thereby turning on the first control circuit 3031. Based on the third voltage VSS received at the second terminal of the first control circuit 3031, the voltage change at the fourth terminal of the drive current control circuit 302 is controlled to turn on the second and third terminals of the drive current control circuit 302. When the on / off control circuit 301 is turned on, the light-emitting device 101 emits light because the drive current control circuit 302, the on / off control circuit 301, and the branch containing the light-emitting device 101 are connected. In this application, the second voltage VGL can be sent to multiple rows of pixels simultaneously. Based on the first resistor R1, the current of the first transistor T1 and the branch containing the first control circuit 3031 is controlled, thereby controlling the voltage at the first terminal of the first control circuit 3031 to gradually change, so as to control the light-emitting device 101 to emit light, without the need to use a Sweep signal. At the same time, since there is a mature cascading circuit for the light-emitting control signal EM, the cascading circuit can be used to cascade the light-emitting control signal EM, thereby controlling the pixels to emit light row by row, which is beneficial to increasing the light-emitting time of each frame of pixels and improving the maximum brightness of the display panel 10.

[0198] Referring to the above Figure 7 As shown, in one or more embodiments of this application, the control signal further includes a first control signal S1 and a second control signal S2; the data signal includes a first data signal Date_PWM; the first control circuit 3031 includes a second transistor T2 and a third transistor T3;

[0199] The light emission timing control circuit 303 further includes: a fourth transistor T4 and a fifth transistor T5;

[0200] The light emission timing control circuit 303 is specifically configured as follows:

[0201] When the second control signal S2 is at the level that controls the fifth transistor T5 to turn on, the control terminal of the fifth transistor T5 receives the second control signal S2, the first terminal receives the first data signal Date_PWM, the fifth transistor T5 turns on, and sets the voltage at the second terminal of the second transistor T2 to the voltage corresponding to the first data signal Date_PWM, so that the second transistor T2 turns on.

[0202] When the first control signal S1 is at the level that controls the fourth transistor T4 to turn on, the control terminal of the fourth transistor T4 receives the first control signal S1, and based on the second transistor T2, sets the voltage of the first terminal of the fourth transistor T4 to the voltage corresponding to the first data signal Date_PWM, and turns on the fourth transistor T4 to write the first data signal Date_PWM to the control terminal of the second transistor T2, and performs threshold voltage compensation on the second transistor T2, setting the voltage of the control terminal of the second transistor T2 to the sum of the voltage corresponding to the first data signal Date_PWM and the threshold voltage.

[0203] As can be seen from the above embodiments, the second control signal S2 is at the level that controls the fifth transistor T5 to turn on in the second stage, and is different from the level in other stages of the cycle. Therefore, the fifth transistor T5 is turned on in the second stage and turned off in other stages.

[0204] The first control signal S1 is used in the first and second stages to control the conduction level of the fourth transistor T4, and its level is different from that in other stages of the cycle. Therefore, the fourth transistor T4 is turned on in the first and second stages and turned off in other stages.

[0205] In the second stage, the second control signal S2 controls the conduction level of the fifth transistor T5, and the first control signal S1 controls the conduction level of the fourth transistor T4. Through the fifth transistor T5 and the fourth transistor T4, the first data signal Date_PWM is written to the control terminal of the second transistor T2 to control the emission time of the light-emitting device 101. At the same time, the fourth transistor T4 performs threshold voltage compensation on the second transistor T2, eliminating the influence of threshold voltage drift.

[0206] In some embodiments, the control signal further includes a third control signal S3; the data signal further includes a second data signal Date_PAM; the drive current control circuit 302 includes: a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, and a ninth transistor T9;

[0207] The drive current control circuit 302 is specifically configured as follows:

[0208] When the light emission control signal EM is at the level that controls the sixth transistor T6 to turn on, the control terminal of the sixth transistor T6 receives the light emission control signal EM, the first terminal receives the first voltage VDD, the sixth transistor T6 turns on, and sets the voltage of the first terminal of the seventh transistor T7 to the first voltage VDD.

[0209] Based on the third transistor T3 and the second transistor T2, the voltage at the control terminal of the seventh transistor T7 changes to the third voltage VSS, and the seventh transistor T7 is turned on;

[0210] When the third control signal S3 is at a level that controls the eighth transistor T8 and the ninth transistor T9 to be turned on, the control terminal of the ninth transistor T9 receives the third control signal S3, and the first terminal receives the second data signal Date_PAM. The ninth transistor T9 is turned on to set the voltage of the first terminal of the seventh transistor T7 to the voltage corresponding to the second data signal Date_PAM. The seventh transistor T7 is turned on.

[0211] Based on the seventh transistor T7, the voltage at the second terminal of the eighth transistor T8 is set to the voltage corresponding to the second data signal Date_PAM. The control terminal of the eighth transistor T8 receives the third control signal S3, and the eighth transistor T8 is turned on to write the second data signal Date_PAM into the control terminal of the seventh transistor T7. Threshold voltage compensation is performed on the seventh transistor T7, and the voltage at the control terminal of the seventh transistor T7 is set to the sum of the voltage corresponding to the second data signal Date_PAM and the threshold voltage.

[0212] As can be seen from the above embodiments, the level of the light emission control signal EM in the fifth stage is the level that controls the first transistor T1 to turn on, and it is different from the level in other stages of the cycle. As for the sixth transistor T6, its type is the same as that of the first transistor T1. Therefore, the sixth transistor T6 is turned on in the fifth stage and turned off in other stages.

[0213] Since the third control signal S3 is at a level that controls the conduction of the eighth transistor T8 and the ninth transistor T9 in the fourth stage, and is different from the level in other stages of the cycle, the eighth transistor T8 and the ninth transistor T9 are turned on in the fourth stage and turned off in other stages.

[0214] In the fourth stage, the second data signal Date_PAM is written to the control terminal of the seventh transistor T7 through the eighth transistor T8 and the ninth transistor T9 to control the current driving the light-emitting device 101. At the same time, the eighth transistor T8 can perform threshold voltage compensation for the seventh transistor T7, eliminating the influence of threshold voltage drift and improving the uniformity of light emission from the light-emitting device 101.

[0215] Referring to the above Figure 7 As shown, in some embodiments, the control signal further includes a fourth control signal S4; the pixel driving circuit 30 further includes:

[0216] The eleventh transistor T11 has a control terminal that receives a fourth control signal S4, a first terminal that receives a reference signal REF, and a second terminal that is connected to the control terminal of the seventh transistor T7 and the first terminal of the fourth transistor T4, respectively. When the transistor is turned on, the transistor T11 is used to set the voltage at the control terminal of the seventh transistor T7 to the voltage corresponding to the reference signal REF. The transistor T11 is also used to set the voltage at the control terminal of the second transistor T2 to the voltage corresponding to the reference signal REF, based on the fourth transistor T4, when the transistor T4 is turned on.

[0217] As can be seen from the above embodiments, the fourth control signal S4 is the level that controls the eleventh transistor T11 to be turned on in the first and third stages, and is different from the level in other stages of the cycle. Therefore, the eleventh transistor T11 is turned on in the first and third stages and turned off in other stages.

[0218] In the first stage, since the first control signal S1 is at the level that controls the fourth transistor T4 to turn on, the fourth transistor T4 is turned on. Through the eleventh transistor T11 and the fourth transistor T4, the voltage at the control terminal of the second transistor T2 is set to the voltage corresponding to the reference signal REF, thereby resetting the voltage at the control terminal of the second transistor T2.

[0219] In the third stage, the eleventh transistor T11 is turned on, and through the eleventh transistor T11, the voltage at the control terminal of the seventh transistor T7 is set to the voltage corresponding to the reference signal REF, thereby resetting the voltage at the control terminal of the eleventh transistor T11.

[0220] In one implementation scenario, the pixel driving circuit 30 further includes a second capacitor C2, with its first terminal receiving a first voltage VDD and its second terminal connected to the control terminal of the seventh transistor T7. Based on the second capacitor C2, the voltage at the control terminal of the seventh transistor T7 is maintained at the voltage V corresponding to the reference signal REF. REF .

[0221] In summary, in the first stage, the voltage at the control terminal of the second transistor T2 is reset to the voltage corresponding to the reference signal REF by using the eleventh transistor T11 and the fourth transistor T4. In the second stage, the first data signal Date_PWM is written to the control terminal of the second transistor T2 by using the fifth transistor T5 and the fourth transistor T4, while threshold voltage compensation is performed on the second transistor T2 based on the fourth transistor T4 to eliminate the influence of threshold voltage drift. In the third stage, the voltage at the control terminal of the seventh transistor T7 is reset to the voltage corresponding to the reference signal REF by using the eleventh transistor T11. In the fourth stage, the second data signal Date_PAM is written to the control terminal of the seventh transistor T7 by using the eighth transistor T8 and the ninth transistor T9, and threshold voltage compensation is performed on the seventh transistor T7 based on the eighth transistor T8 to eliminate the influence of threshold voltage drift.

[0222] In this application, the pixel driving circuit 30 includes eleven transistors, which can all be P-type thin-film transistors or all be N-type thin-film transistors. An embodiment is provided below, taking an example where all eleven transistors are P-type thin-film transistors and the light-emitting device 101 is an LED, to illustrate the state of each transistor and the state of the LED at each stage.

[0223] Figure 8 This application provides a timing diagram of a P-type thin-film transistor, used to represent the level states of the related signals in five stages. The related signals include control signals and data signals. The control signals include a first control signal S1, a second control signal S2, a third control signal S3, a fourth control signal S4, and a light emission control signal EM. The data signals include a first data signal Date_PWM and a second data signal Date_PAM.

[0224] As can be seen from the above embodiments, the conduction condition of a P-type thin-film transistor is Vgs < Vth. In this application, by reasonably setting the voltage values ​​of the first control signal S1, the second control signal S2, the third control signal S3, the fourth control signal S4, the first data signal Date_PWM, the second data signal Date_PAM, the reference signal REF, the first voltage VDD, the second voltage VGL, and the third voltage VSS, it can be considered that when the voltage at the control terminal of the P-type thin-film transistor is low, the conduction condition Vgs < Vth is met, and the transistor conducts. When the voltage at the control terminal of the transistor is high, Vgs > Vth, and the transistor is off.

[0225] In this embodiment, the voltage can be set to VGH when the first control signal S1, the second control signal S2, the third control signal S3, the fourth control signal S4, and the light emission control signal EM are high, and to VGL when they are low. Wherein, VGH > the first voltage VDD, VGL < the third voltage VSS, and VGL < VDD. REF .

[0226] Phase 1:

[0227] Depend on Figure 8 It can be seen that in the first stage, the first control signal S1 is low, the second control signal S2 is high, the third control signal S3 is high, the fourth control signal S4 is low, the light emission control signal EM is high, the first data signal Date_PWM is low, and the second data signal Date_PAM is low.

[0228] Figure 9 A schematic diagram of the pixel driving circuit corresponding to a P-type thin-film transistor in the first stage provided in this application embodiment is shown below. Figure 9 As shown, for the eleventh transistor T11, the fourth control signal S4 received at its control terminal is at a low level, and the eleventh transistor T11 is turned on.

[0229] For the fourth transistor T4, based on the eleventh transistor T11, the voltage at the first terminal of the fourth transistor T4 is set to the voltage V corresponding to the reference signal REF. REF When the first control signal S1 received at the control terminal of the fourth transistor T4 is low, the fourth transistor T4 is turned on, the reference signal REF charges the first capacitor C1, and the voltage at point A is set to the voltage V corresponding to the reference signal REF. REF Based on the first capacitor C1, the voltage at point A is kept at V. REF Point A is used to characterize the second terminal of the fourth transistor T4, the second terminal of the first transistor T1, the control terminal of the second transistor T2, and the first terminal of the first capacitor C1.

[0230] For the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10, the light emission control signal EM received at their control terminals is at a high level, so the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10 are all turned off.

[0231] For the fifth transistor T5, the second control signal S2 received at the control terminal is at a high level, and the fifth transistor T5 is turned off.

[0232] For the eighth transistor T8 and the ninth transistor T9, the third control signal S3 received at their control terminals is at a high level, so both the eighth transistor T8 and the ninth transistor T9 are disconnected.

[0233] For the second transistor T2, the voltage at the control terminal, i.e., point A, is V. REF However, since both the third transistor T3 and the fifth transistor T5 are off, there is no voltage source at their second terminals and no current flows through them. Therefore, the second transistor T2 can be considered to be off.

[0234] For the seventh transistor T7, based on the eleventh transistor T11, the voltage at the control terminal is V. REF However, since the sixth transistor T6, the ninth transistor T9, the eighth transistor T8 and the tenth transistor T10 are all off, there is no voltage source at the first and second terminals of the seventh transistor T7 and no current flows through it. Therefore, the seventh transistor T7 can also be considered to be in the off state.

[0235] Since the sixth transistor T6, the seventh transistor T7, and the tenth transistor T10 are all off, the LED does not emit light.

[0236] Phase Two:

[0237] Depend on Figure 8 It can be seen that in the second stage, the first control signal S1 is low, the second control signal S2 is low, the third control signal S3 is high, the fourth control signal S4 is high, the light emission control signal EM is high, the first data signal Date_PWM is high, and the second data signal Date_PAM is low.

[0238] Figure 10 A schematic diagram of the pixel driving circuit corresponding to a P-type thin-film transistor in the second stage provided in this application embodiment is shown below. Figure 10 As shown, for the fourth transistor T4, the first control signal S1 received by the control terminal is low, and the fourth transistor T4 is turned on.

[0239] For the fifth transistor T5, when the second control signal S2 received by the control terminal is low, the fifth transistor T5 is turned on, setting the voltage at the second terminal of the second transistor T2 to the voltage V corresponding to the first data signal Date_PWM. Date_PWM This causes the second transistor T2 to conduct, and through the fourth transistor T4, V... Date_PWM Write to the control terminal of the second transistor T2.

[0240] Simultaneously, based on the fourth transistor T4, threshold voltage compensation is performed on the second transistor T2, therefore the voltage at the control terminal of the second transistor T2 is V. Date_PWM +Vth2, where Vth2 is the threshold voltage of the second transistor T2.

[0241] For the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10, the light emission control signal EM received at their control terminals is at a high level, so the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10 are all turned off.

[0242] For the eleventh transistor T11, the fourth control signal S4 received at its control terminal is at a high level, therefore the eleventh transistor T11 is turned off.

[0243] For the eighth transistor T8 and the ninth transistor T9, the third control signal S3 received at their control terminals is at a high level, so both the eighth transistor T8 and the ninth transistor T9 are disconnected.

[0244] For the seventh transistor T7, there is no voltage source at its first and second terminals, so the seventh transistor T7 can be considered to be in the off state.

[0245] Since the sixth transistor T6, the seventh transistor T7, and the tenth transistor T10 are all off, the LED does not emit light during this stage.

[0246] Phase Three:

[0247] Depend on Figure 8 It can be seen that in the third stage, the first control signal S1 is high, the second control signal S2 is high, the third control signal S3 is high, the fourth control signal S4 is low, the light emission control signal EM is high, and the first data signal Date_PWM and the second data signal Date_PAM are both low.

[0248] Figure 11 A schematic diagram of the pixel driving circuit corresponding to a P-type thin-film transistor in the third stage provided in this application embodiment is shown below. Figure 11 As shown, for the eleventh transistor T11, since the fourth control signal S4 received at the control terminal is low, the eleventh transistor T11 is turned on, and the reference signal REF charges the second capacitor C2, so that the voltage at point B is set to the voltage V corresponding to the reference signal REF. REF And based on the second capacitor C2, the voltage at the control terminal of the seventh transistor T7 is maintained at V. REF Point B can be used to represent the control terminal of the seventh transistor T7, the second terminal of the second capacitor C2, the second terminal of the eleventh transistor T11, and the first terminal of the eighth transistor T8.

[0249] For the fourth transistor T4, since the first control signal S1 received by the control terminal is at a high level, the fourth transistor T4 is turned off.

[0250] For the fifth transistor T5, since the second control signal S2 received by the control terminal is at a high level, the fifth transistor T5 is turned off.

[0251] For the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10, the light emission control signal EM received at their control terminals is at a high level, so the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10 are all turned off.

[0252] For the second transistor T2, since the third transistor T3 and the fifth transistor T5 are both off, there is no voltage source at its second terminal and no current flows through it. Therefore, the second transistor T2 can be considered to be in the off state.

[0253] For the eighth transistor T8 and the ninth transistor T9, the third control signal S3 received at their control terminals is at a high level, so both the eighth transistor T8 and the ninth transistor T9 are disconnected.

[0254] For the seventh transistor T7, since the sixth transistor T6, the ninth transistor T9, the tenth transistor T10 and the eighth transistor T8 are all in the off state, there is no voltage source across the seventh transistor T7 and no current flows through it. Therefore, the seventh transistor T7 can be considered to be in the off state.

[0255] Since the sixth transistor T6, the seventh transistor T7, and the tenth transistor T10 are all off, the LED does not emit light during this stage.

[0256] Phase Four:

[0257] Depend on Figure 8 It can be seen that in the fourth stage, the first control signal S1, the second control signal S2 and the fourth control signal S4 are all at high level, the third control signal S3 is at low level, the light emission control signal EM is at high level, the first data signal Date_PWM is at low level, and the second data signal Date_PAM is at high level.

[0258] Figure 12 A schematic diagram of the pixel driving circuit corresponding to a P-type thin-film transistor in the fourth stage provided in this application embodiment is shown below. Figure 12 As shown, for the eighth transistor T8, the third control signal S3 received at its control terminal is low, and the eighth transistor T8 is turned on.

[0259] For the ninth transistor T9, when the third control signal S3 received at its control terminal is low, the ninth transistor T9 is turned on, setting the voltage at the first terminal of the seventh transistor T7 to the voltage V corresponding to the second data signal Date_PAM. Date_PAM This turns on the seventh transistor T7. The eighth transistor T8 then transmits the voltage V corresponding to the second data signal Date_PAM.Date_PAM Write the control terminal of the seventh transistor T7. Simultaneously, since the eighth transistor T8 can perform threshold voltage compensation on the seventh transistor T7, the voltage at the control terminal of the seventh transistor T7 is set to V. Date_PAM +Vth7, where Vth7 represents the threshold voltage of the seventh transistor T7.

[0260] For the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10, the light emission control signal EM received at their control terminals is at a high level, so the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10 are all turned off.

[0261] For the fourth transistor T4, the first control signal S1 received at its control terminal is at a high level, and the fourth transistor T4 is turned off.

[0262] For the fifth transistor T5, the second control signal S2 received at its control terminal is at a high level, and the fifth transistor T5 is turned off.

[0263] For the second transistor T2, since the third transistor T3 and the fifth transistor T5 are both off, there is no voltage source at its second terminal and no current flows through it. Therefore, the second transistor T2 can be considered to be in the off state.

[0264] For the eleventh transistor T11, the fourth control signal S4 received at its control terminal is at a high level, and the eleventh transistor T11 is turned off.

[0265] Since the sixth transistor T6 and the tenth transistor T10 are disconnected, the LED does not emit light during this stage.

[0266] Phase 5:

[0267] Depend on Figure 8 It can be seen that in the fifth stage, the first control signal S1, the second control signal S2, the third control signal S3 and the fourth control signal S4 are all at high level, the light emission control signal EM is at low level, and the first data signal Date_PWM and the second data signal Date_PAM are at low level.

[0268] Figure 13 A schematic diagram of the pixel driving circuit corresponding to a P-type thin-film transistor in the fifth stage provided in this application embodiment is shown below. Figure 13 As shown, for the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10, the light emission control signal EM received by the control terminal is at a low level, so the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10 are all turned on.

[0269] With the first transistor T1 turned on, the second voltage VGL gradually charges point A based on the first resistor R1. The magnitude of the current is determined by the voltage difference between point A and VGL, as well as the value of the first resistor R1. The voltage at point A, which is the voltage at the control terminal of the second transistor T2, is determined by VGL. Date_PWM +Vth2 gradually decreases until the second transistor T2 turns on.

[0270] Because the third transistor T3 is turned on, the third voltage VSS charges point B through the third transistor T3 and the second transistor T2, and the voltage at point B is determined by VSS. Date_PAM As +Vth7 gradually decreases to the third voltage VSS, the seventh transistor T7 turns on.

[0271] For the fourth transistor T4, the first control signal S1 received at its control terminal is at a high level, and the fourth transistor T4 is turned off.

[0272] For the fifth transistor T5, the second control signal S2 received at its control terminal is at a high level, and the fifth transistor T5 is turned off.

[0273] For the eleventh transistor T11, the fourth control signal S4 received at its control terminal is at a high level, and the eleventh transistor T11 is turned off.

[0274] For the eighth transistor T8 and the ninth transistor T9, the third control signal S3 received at their control terminals is at a high level, so both the eighth transistor T8 and the ninth transistor T9 are disconnected.

[0275] Since the sixth transistor T6, the seventh transistor T7, and the tenth transistor T10 are all turned on, the branch containing the light-emitting device 101 is switched on and off, and the light-emitting device 101 emits light in the fifth stage.

[0276] As can be seen from the above, whether the light-emitting device 101 emits light is related to whether the seventh transistor T7 is turned on, and whether the seventh transistor T7 is turned on is related to the second transistor T2. The conduction time of the second transistor T2 is related to the voltage V corresponding to the first data signal Date_PWM. Date_PWM This is relevant, therefore the voltage V corresponding to the first data signal Date_PWM can be changed. Date_PWM By controlling the conduction time of the second transistor T2 in the fifth stage, the light emission time of the light-emitting device 101 is controlled, thereby achieving the purpose of displaying different brightness levels.

[0277] The above describes the state of the light-emitting device 101 at each stage within a cycle. After the current cycle ends, the next cycle begins, and the above process is repeated.

[0278] This application embodiment is described with all eleventh transistors T1 to T11 being P-type thin-film transistors. In another implementation scenario, all eleventh transistors T1 to T11 can also be N-type thin-film transistors. In this case, the architecture of the pixel driving circuit 30 can be referred to... Figure 14 As shown, Figure 14 This is a schematic diagram of the pixel driving circuit corresponding to an N-type thin-film transistor provided in an embodiment of this application.

[0279] Based on the conduction principle of N-type thin-film transistors, the voltage levels of related signals such as the first control signal S1, the second control signal S2, the third control signal S3, the fourth control signal S4, the light emission control signal EM, the first data signal Date_PWM, and the second data signal Date_PAM at various stages differ from those of P-type thin-film transistors. For details, please refer to [reference needed]. Figure 15 As shown, Figure 15 This is a timing diagram of the relevant signals of an N-type thin-film transistor provided in an embodiment of this application.

[0280] The driving principle of the pixel driving circuit corresponding to the N-type thin film transistor can be referred to the driving principle of the pixel driving circuit 30 corresponding to the P-type thin film transistor mentioned above, and will not be described in detail in this application.

[0281] In summary, the pixel driving circuit 30 of this application includes 11T2C1 R, and uses a PWM+PAM driving method to drive the light-emitting device 101. Specifically, in the fifth stage, the light-emitting control signal EM is the level that controls the conduction of the first transistor T1, the third transistor T3, the sixth transistor T6, and the tenth transistor T10. The second voltage VGL, through the first resistor R1 and the first transistor T1, controls the voltage at the control terminal of the second transistor T2 to gradually change, so that the second transistor T2 conducts. The third voltage VSS, through the second transistor T2 and the third transistor T3, controls the voltage at the control terminal of the seventh transistor T7 to change, so that the seventh transistor T7 conducts. The light-emitting device 101 emits light, which can be achieved without the need for a Sweep signal. At the same time, the second voltage VGL can be sent to multiple rows of pixels simultaneously. By using a cascading transmission circuit to transmit the light-emitting control signal EM, the pixels can be controlled to emit light row by row, which is beneficial to increasing the light-emitting time of each frame of pixels and improving the maximum brightness of the display panel 10. In addition, this application performs threshold voltage compensation on both the second transistor T2 and the seventh transistor T7, which is beneficial to improving the display effect. The pixel driving circuit 30 of this application does not exhibit charging during operation, thus reducing driving power consumption. Furthermore, the pixel driving circuit 30 includes a smaller number of transistors, which helps save area occupied by the pixel driving circuit 30 in the display panel 10, effectively improving pixel density and panel resolution.

[0282] This application provides a pixel driving circuit 30, including:

[0283] The on / off control circuit 301 has a first terminal that receives a light emission control signal EM and a second terminal that is connected to the first terminal of the light emission device 101. It is used to control the light emission device 101 to emit light when it is turned on.

[0284] The driving current control circuit 302 has a first terminal receiving the light emission control signal EM, a second terminal receiving the first voltage VDD, and a third terminal connected to the third terminal of the on / off control circuit 301, and is used to control the current of the light emission device 101.

[0285] The light emission time control circuit 303 is used to control the light emission time of the light-emitting device 101, and includes: a first resistor R1, a first transistor T1 and a first control circuit 3031;

[0286] The control terminal of the first transistor T1 receives the light emission control signal EM, the first terminal receives the second voltage VGL through the first resistor R1, and the second terminal is connected to the first terminal of the first control circuit 3031. When the transistor is turned on, the control terminal of the first control circuit 3031 is controlled based on the first resistor R1 and the second voltage VGL to turn on the first control circuit 3031.

[0287] The first resistor R1 is used to control the current in the branch where the first transistor T1 and the first control circuit 3031 are located;

[0288] The second terminal of the first control circuit 3031 receives a third voltage VSS, and the third terminal is connected to the fourth terminal of the drive current control circuit 302. When the circuit is turned on, the third voltage VSS is used to control the voltage change of the fourth terminal of the drive current control circuit 302 so that the second and third terminals of the drive current control circuit 302 are turned on.

[0289] The specific driving process of the pixel driving circuit 30 can be referred to in the above embodiments, and will not be repeated here.

[0290] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

[0291] For ease of explanation, the above description has been provided in conjunction with specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the embodiments to the specific forms disclosed above. Various modifications and variations can be obtained based on the above teachings. The selection and description of the above embodiments are for the purpose of better explaining the principles and practical applications, thereby enabling those skilled in the art to better utilize the described embodiments and various different variations of embodiments suitable for specific use considerations.

Claims

1. A display device, characterized in that, The display device includes: A display panel includes a plurality of pixels, each pixel including at least one light-emitting device, the light-emitting device being used to emit light to enable the display panel to display an image; A controller for providing control signals and data signals, the control signals including light emission control signals; A pixel driving circuit is connected to the light-emitting device and the controller respectively, and is used to drive the light-emitting device according to the control signal and the data signal; The pixel driving circuit includes: An on / off control circuit has a first terminal that receives the light-emitting control signal and a second terminal that is connected to the first terminal of the light-emitting device, used to control the light-emitting device to emit light when it is turned on; A drive current control circuit has a first terminal receiving the light-emitting control signal, a second terminal receiving a first voltage, and a third terminal connected to the third terminal of the on / off control circuit, used to control the current of the light-emitting device. A light emission time control circuit, used to control the light emission time of the light-emitting device, includes: a first resistor, a first transistor, and a first control circuit; The control terminal of the first transistor receives the light emission control signal, the first terminal receives the second voltage through the first resistor, and the second terminal is connected to the first terminal of the first control circuit. When the transistor is turned on, the voltage change of the first terminal of the first control circuit is controlled based on the first resistor and the second voltage to turn on the first control circuit. The first resistor is used to control the current in the branch where the first transistor and the first control circuit are located; The second terminal of the first control circuit receives a third voltage, and the third terminal is connected to the fourth terminal of the drive current control circuit. When the circuit is turned on, the voltage change of the fourth terminal of the drive current control circuit is controlled based on the third voltage, so that the second and third terminals of the drive current control circuit are turned on. The second terminal of the light-emitting device receives the third voltage.

2. The display device according to claim 1, characterized in that, The first control circuit includes: The second transistor has its control terminal connected to the second terminal of the first transistor, and its first terminal connected to the fourth terminal of the drive current control circuit. The third transistor has a control terminal that receives the light emission control signal, a first terminal that is connected to the second terminal of the second transistor, and a second terminal that receives the third voltage.

3. The display device according to claim 2, characterized in that, The control signal further includes a first control signal and a second control signal; the data signal includes a first data signal; the emission time control circuit further includes: The fourth transistor has a control terminal that receives the first control signal, a first terminal that is connected to the first terminal of the second transistor, and a second terminal that is connected to the control terminal of the second transistor, and is used to perform threshold voltage compensation on the second transistor. The fifth transistor has a control terminal that receives the second control signal, a first terminal that receives the first data signal, and a second terminal that is connected to the second terminal of the second transistor. When the transistor is turned on, the first data signal is written to the control terminal of the second transistor through the fourth transistor.

4. The display device according to claim 3, characterized in that, The drive current control circuit includes: The sixth transistor has a control terminal that receives the light emission control signal and a first terminal that receives the first voltage. The seventh transistor has its control terminal connected to the first terminal of the second transistor, its first terminal connected to the second terminal of the sixth transistor, and its second terminal connected to the third terminal of the on / off control circuit.

5. The display device according to claim 4, characterized in that, The control signal further includes a third control signal; the data signal further includes a second data signal; the drive current control circuit further includes: The eighth transistor has a control terminal that receives the third control signal, a first terminal that is connected to the control terminal of the seventh transistor, and a second terminal that is connected to the second terminal of the seventh transistor, and is used to perform threshold voltage compensation on the seventh transistor. The ninth transistor has a control terminal that receives the third control signal, a first terminal that receives the second data signal, and a second terminal that is connected to the first terminal of the seventh transistor. When the transistor is turned on, the second data signal is written to the control terminal of the seventh transistor through the eighth transistor.

6. The display device according to claim 4, characterized in that, The on / off control circuit includes: The tenth transistor has a control terminal that receives the light emission control signal, a first terminal that is connected to the second terminal of the seventh transistor, and a second terminal that is connected to the first terminal of the light-emitting device.

7. The display device according to claim 5, characterized in that, The control signal further includes a fourth control signal; the pixel driving circuit further includes an eleventh transistor, whose control terminal receives the fourth control signal, whose first terminal receives a reference signal, and whose second terminal is connected to the control terminal of the seventh transistor and the first terminal of the fourth transistor respectively, for setting the voltage of the control terminal of the seventh transistor to the voltage corresponding to the reference signal when the transistor is turned on, and for setting the voltage of the control terminal of the second transistor to the voltage corresponding to the reference signal based on the fourth transistor when the fourth transistor is turned on.

8. The display device according to claim 7, characterized in that, The light emission control signal, the first control signal, the second control signal, the third control signal, the fourth control signal, the first data signal, and the second data signal are periodic signals, and there is a high-low level transition within the period; The cycle includes at least: a first stage, a second stage, a third stage, a fourth stage, and a fifth stage; The first control signal, in the first and second stages, is a level that controls the conduction of the fourth transistor, and is different from the level in other stages of the cycle; The second control signal is at a level that controls the fifth transistor to turn on during the second stage, and is different from the level during other stages of the cycle; The third control signal in the fourth stage is a level that controls the conduction of the eighth and ninth transistors, and is different from the level in other stages of the cycle; The fourth control signal is a level that controls the eleventh transistor to be turned on in the first and third stages, and is different from the level in other stages of the cycle. The light emission control signal in the fifth stage is at the level that controls the first transistor to turn on, and is different from the level in other stages of the cycle; the level of the first data signal in the second stage is different from the level in other stages of the cycle. The level of the second data signal in the fourth stage is different from the level in other stages of the cycle; The first transistor through the eleventh transistor are all at the same conduction level.

9. A display device, characterized in that, The display device includes: A display panel includes a plurality of pixels, each pixel including at least one light-emitting device, the light-emitting device being used to emit light to enable the display panel to display an image; A controller for providing control signals and data signals, the control signals including light emission control signals; A pixel driving circuit, connected to the light-emitting device and the controller respectively, is used to drive the light-emitting device according to the control signal and the data signal, and includes: an on / off control circuit, a driving current control circuit, and a light-emitting time control circuit; the light-emitting time control circuit includes a first resistor, a first transistor, and a first control circuit. The pixel driving circuit is specifically configured as follows: When the light emission control signal is at a level that controls the first transistor to turn on, the control terminal of the first transistor receives the light emission control signal, the first terminal receives the second voltage through the first resistor, and the first transistor turns on. The second voltage, through the first resistor and the first transistor, controls the voltage change at the first terminal of the first control circuit, and the first control circuit is turned on. Based on the third voltage received at the second terminal of the first control circuit, when the first control circuit is turned on, the voltage change at the fourth terminal of the drive current control circuit is controlled so that the second and third terminals of the drive current control circuit are turned on. Based on the light emission control signal, the on / off control circuit is turned on, and based on the first voltage received at the second terminal of the drive current control circuit, the light emission device is controlled to emit light through the drive current control circuit and the on / off control circuit. After the light emission control signal undergoes a level shift from the level controlling the first transistor to turn on, the drive current control circuit and the on / off control circuit are disconnected, and the light emission device stops emitting light.

10. The display device according to claim 9, characterized in that, The control signal further includes a first control signal and a second control signal; the data signal includes a first data signal; the first control circuit includes a second transistor and a third transistor; The light emission timing control circuit further includes: a fourth transistor and a fifth transistor; The emission timing control circuit is specifically configured as follows: When the second control signal is at the level that controls the fifth transistor to turn on, the control terminal of the fifth transistor receives the second control signal, the first terminal receives the first data signal, the fifth transistor turns on, and the voltage at the second terminal of the second transistor is set to the voltage corresponding to the first data signal, so that the second transistor turns on. When the first control signal is at the level that controls the fourth transistor to turn on, the control terminal of the fourth transistor receives the first control signal, and based on the second transistor, sets the voltage at the first terminal of the fourth transistor to the voltage corresponding to the first data signal, turns on the fourth transistor to write the first data signal to the control terminal of the second transistor, and performs threshold voltage compensation on the second transistor, setting the voltage at the control terminal of the second transistor to the sum of the voltage corresponding to the first data signal and the threshold voltage.

11. The display device according to claim 10, characterized in that, The control signal further includes a third control signal; the data signal further includes a second data signal; the drive current control circuit includes: a sixth transistor, a seventh transistor, an eighth transistor, and a ninth transistor; The drive current control circuit is specifically configured as follows: When the light emission control signal is at the level that controls the sixth transistor to turn on, the control terminal of the sixth transistor receives the light emission control signal, the first terminal receives the first voltage, the sixth transistor turns on, and sets the voltage at the first terminal of the seventh transistor to the first voltage; Based on the third transistor and the second transistor, the voltage at the control terminal of the seventh transistor changes to the third voltage, and the seventh transistor is turned on; When the third control signal is at a level that controls the eighth transistor and the ninth transistor to turn on, the control terminal of the ninth transistor receives the third control signal, the first terminal receives the second data signal, the ninth transistor turns on, so as to set the voltage of the first terminal of the seventh transistor to the voltage corresponding to the second data signal, and the seventh transistor turns on. Based on the seventh transistor, the voltage at the second terminal of the eighth transistor is set to the voltage corresponding to the second data signal. The control terminal of the eighth transistor receives the third control signal, and the eighth transistor is turned on to write the second data signal into the control terminal of the seventh transistor. Threshold voltage compensation is performed on the seventh transistor, and the voltage at the control terminal of the seventh transistor is set to the sum of the voltage corresponding to the second data signal and the threshold voltage.

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