A multi-parameter synchronous testing method for an optical communication laser chip

Abstract

The application discloses a kind of optical communication laser chip multi-parameter synchronous test methods, specifically related to optical communication device test technical field;The present application covers full working condition test scene, fully reflects chip actual application performance, by presetting multiple groups of test environment temperature, gradient driving current cycle test is matched, the dynamic law line of chip under different temperature, flow condition is obtained, the range of change of environment and working state in the actual application of chip is completely covered, compared with single working condition test, can more comprehensive capture the trend of change of chip performance with temperature, flow parameter, accurately assess environmental adaptability and dynamic stability, avoid the risk that qualified chip performance does not meet the standard under extreme working condition.

Description

Technical Field

[0001] This invention relates to the field of optical communication device testing technology, and more specifically, to a method for synchronous testing of multiple parameters of an optical communication laser chip. Background Technology

[0002] As the core component of optical communication systems, semiconductor laser chips directly determine the transmission quality, speed, and stability of optical communication links based on their performance parameters. With the continuous evolution of optical communication technology towards higher speeds, longer distances, and higher reliability, the need for accurate evaluation of the multi-dimensional performance of laser chips, such as photoelectric conversion efficiency, spectral stability, beam quality, and environmental adaptability, is becoming increasingly urgent.

[0003] However, the existing testing process for optical communication laser chips still has the following technical shortcomings: Traditional tests are often conducted only under a single ambient temperature or fixed drive current, ignoring the wide temperature range and dynamic current changes that chips may face in optical communication scenarios. Since the performance parameters of laser chips are highly sensitive to temperature and drive current, the test results under a single operating condition cannot fully reflect the environmental adaptability and dynamic working stability of the chip in actual applications, which can easily lead to qualified chips failing to meet performance standards under extreme operating conditions. Furthermore, the test data for each parameter are mostly stored and analyzed independently, lacking a unified quantitative fusion mechanism. For example, the evaluation standards for parameters such as photoelectric conversion efficiency, side-mode suppression ratio, and beam divergence angle are independent, making it impossible to intuitively reflect the overall performance of the chip through comprehensive coefficients. At the same time, there is a lack of effective characterization of the dynamic changes of parameters. It is difficult to judge the performance trend of the chip under different driving current and temperature conditions based solely on discrete parameter values, resulting in limited guiding value of test results for chip selection and optimization design.

[0004] To address this, a method for synchronous testing of multiple parameters of optical communication laser chips is proposed. Summary of the Invention

[0005] To overcome the above-mentioned defects of the prior art, embodiments of the present invention provide a method for synchronous testing of multiple parameters of an optical communication laser chip.

[0006] To achieve the above objectives, the present invention provides the following technical solution: A method for synchronous testing of multiple parameters of an optical communication laser chip includes: S1: Pre-build the test environment temperatures for each group of tests required for the chip, as the test environment conditions for each group; S2: The drive signal is output according to the initially set drive current to drive the laser chip under test to work and output laser. The laser is introduced into a beam splitter prism group with a fixed split ratio and divided into three paths, which are respectively guided to three detection channels for photoelectric characteristics, spectral characteristics and beam quality. S3: The three beams from the same source synchronously trigger their respective detection channels and carry out data acquisition in parallel. After the acquisition is completed, the data packets with timestamps aligned are uploaded to construct a full-dimensional dataset, including photoelectric performance coefficients, spectral performance coefficients, beam performance coefficients, and stability evaluation coefficients. S4: According to the preset drive current gradient, execute steps S2 to S3 in a loop; each loop adjusts the drive current according to the drive current gradient, and synchronously obtains the full-dimensional parameter set under different drive current conditions, so as to obtain the dynamic law line of the chip under test changing with the drive current under the same test environment conditions. S5: After obtaining the full set of parameters under different drive current conditions in the current test environment, change the chip ambient temperature to the next set of test environment conditions according to S1, and execute steps S2 to S4 until all test environment conditions are completed, and obtain the dynamic law line of the chip under test changing with drive current under different test environment conditions. S6: Based on the dynamic law line of the chip under test changing with the driving current under different test environment conditions, output the comprehensive performance coefficient of the chip under test under different test environment conditions, integrate the comprehensive performance coefficient, performance performance and dynamic law line of the chip under test under different test environment conditions as the test result of the chip under test.

[0007] Specifically, the logic for obtaining the photoelectric performance coefficient; The first beam enters the photoelectric characteristic detection channel, is converted into an electrical signal by the photodetector, and the voltage signal is collected synchronously to calculate the real-time output optical power. The chip operating voltage is obtained, and the photoelectric conversion efficiency and power stability are output based on the output optical power and operating voltage. After combining with the target output power, the photoelectric performance coefficient is output after weighted fusion.

[0008] Specifically, the logic for obtaining the spectral performance coefficients; The second beam enters the spectral characteristic detection channel, triggering it to acquire the spectral curve of the current beam and extract the center wavelength, side-mode suppression ratio, and spectral width. After calculating the absolute difference between the center wavelength and spectral width and the set target wavelength and standard spectral width of the chip, respectively, the wavelength accuracy and width compliance are obtained. The spectral performance coefficient is output after weighted fusion of wavelength accuracy, width compliance and side-mode suppression ratio.

[0009] Specifically, the logic for obtaining the beam performance coefficient; The third beam enters the beam quality detection channel, triggering it to capture a far-field spot image. Based on the image analysis, the beam divergence angle and spot ellipticity are calculated. After weighted fusion of the beam divergence angle and spot ellipticity, the beam performance coefficient is output.

[0010] Specifically, the logic for obtaining the stability evaluation coefficient; Real-time temperature data of the substrate of the chip under test is collected, and the temperature stability coefficient is obtained after calculating the standard deviation. The stability evaluation coefficient is obtained by dividing the preset maximum allowable temperature stability coefficient under the current driving current condition by the currently calculated temperature stability coefficient.

[0011] Specifically, the logic for drawing dynamic pattern lines; The photoelectric performance coefficient, spectral performance coefficient, beam performance coefficient and stability evaluation coefficient under different driving current conditions are weighted and fused to output the single driving current performance coefficient of the chip under test under different driving current conditions in the same test environment. The passing performance coefficient is preset for the single drive current performance coefficient of the chip under test under different drive current conditions under the same test environment. The performance coefficient of the chip under test under different drive current conditions is obtained by calculating the ratio of the corresponding single drive current performance coefficient to the pass performance coefficient. A Cartesian coordinate system is plotted with the drive current condition on the horizontal axis and the performance value on the vertical axis. The numerical points of the performance value of the chip under test under different drive current conditions are plotted in the coordinate system, and adjacent numerical points are connected to obtain the dynamic law line of the chip under test changing with the drive current.

[0012] Specifically, the output logic for the overall performance coefficient; After determining the division interval based on the preset division logic, for the dynamic law line under a certain test environment condition, the dynamic law line is divided according to the driving current interval to obtain the low driving law line, medium driving law line and high driving law line. The performance reference value of the preset performance level is used as a baseline, and a line segment is extended horizontally to the right from the performance reference value. The three driving law lines (low, medium, and high) are quantized separately, and the interval independent coefficients of each interval are calculated and then weighted and fused to output the comprehensive performance coefficient.

[0013] Specifically, the logic for calculating the interval independence coefficients; For the three drive law lines of low, medium and high, the number of data points with performance level values ​​higher than the baseline in each interval is counted, and the ratio of the data points in each interval is calculated to obtain the low drive compliance ratio, medium drive compliance ratio and high drive compliance ratio. The average value of each group of performance level values ​​within the intervals corresponding to the three driving law lines (low, medium, and high) is calculated. Taking the average value of each interval as the starting point, a line segment is extended horizontally to the right as the performance average line of each interval. The position of the performance average line of each interval is located, and the vertical distance between each performance average line and the x-axis is obtained and recorded as the average line distance. The vertical distance between the baseline line and the x-axis is obtained and recorded as the baseline distance. The ratio of the average line distance of each interval as the numerator and the baseline distance as the denominator is calculated, and the performance distance ratio of each interval is output. Based on the low-drive compliance ratio, medium-drive compliance ratio, and high-drive compliance ratio of each interval, and after weighted fusion with the corresponding performance distance ratio, the interval independence coefficients of each interval are obtained.

[0014] Specifically, the logic for determining performance; The overall performance coefficient of the chip under test under different test environments is compared with the preset expected performance coefficient under different test environments. If the overall performance coefficient of the chip under test under a certain test environment is lower than the expected performance coefficient, the performance is determined to be lower than expected, and vice versa.

[0015] The technical effects and advantages of this invention are as follows: (1) The laser is divided into three beams of the same source by a beam splitting prism group with a fixed splitting ratio. The three detection channels of photoelectric, spectral and beam quality are synchronously triggered to collect data in parallel. Combined with the timestamp alignment technology, it is ensured that each parameter is obtained based on the same working condition, and the intrinsic correlation between parameters is fully preserved. This solves the problem of evaluation deviation caused by parameter timing differences in traditional serial testing, and provides accurate data support for chip comprehensive performance analysis. (2) Covering all working condition test scenarios, comprehensively reflecting the actual application performance of the chip. By presetting multiple sets of test environment temperatures and combining gradient drive current cycle test, the dynamic law line of the chip under different temperature and current conditions is obtained, which fully covers the range of environmental and working state changes in actual chip applications. Compared with single working condition test, it can more comprehensively capture the trend of chip performance changes with temperature and current parameters, accurately evaluate environmental adaptability and dynamic stability, and avoid the risk of qualified chips failing to meet performance standards under extreme working conditions. (3) By using multi-dimensional coefficient weighted fusion, dynamic pattern line drawing, and interval independent coefficient calculation, discrete parameters are transformed into intuitive comprehensive performance coefficients and performance judgment results. At the same time, the dynamic pattern line clearly presents the chip performance change trend, which solves the problems of fragmented traditional test data and lack of quantitative standards for evaluation. It provides more targeted reference for chip selection, optimization design and quality control, while simplifying the data interpretation process and improving test efficiency. Attached Figure Description

[0016] Figure 1This is a flowchart of a method for synchronous testing of multiple parameters of an optical communication laser chip according to the present invention; Figure 2 This is a schematic diagram of the dynamic pattern line in the multi-parameter synchronous testing method for optical communication laser chips of the present invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] like Figure 1 As shown, a method for synchronous testing of multiple parameters of an optical communication laser chip is as follows: S1: Pre-build a set of test temperature points, which includes the test environment temperatures of each group required for chip testing. Use the test environment temperatures of each group in the set of test temperature points as the test environment conditions for each group. For example, start the environmental simulation chamber and adjust the test environment parameters to the preset range, such as the temperature of 23°C, and keep the environmental parameters stable. Adjust the chip temperature to the first test environment temperature point (such as 25°C), and monitor the temperature change rate in real time through the thermal balance prediction algorithm. When the change rate is lower than the preset reference change rate, such as 0.01°C / min, it is determined that the chip has reached the thermal balance state.

[0019] S2: According to the initially set drive current, the output drive signal is filtered and noise-reduced to drive the laser chip under test to work and output laser. The output laser first passes through fiber coupling and spatial collimation to form a stable test beam. Then, the beam is guided into a beam splitter prism group with a fixed splitting ratio (e.g., according to an optical power ratio of 3:4:3) and split into three paths. This design ensures that the three beams originate from the same laser output moment, have strict homology, and are respectively guided to three detection channels: photoelectric characteristics, spectral characteristics, and beam quality. Preparation before testing the laser chip under test: Start the pre-installed vision-guided robot arm to pick up the bare chip under test from the chip hopper and place it on the corresponding specification carrier adapter; the industrial camera acquires chip images, the chip electrode position is located by template matching algorithm, and the probe station is controlled to move automatically so that the probe makes precise contact with the electrode. After contact, the conductivity is tested to ensure that the excitation signal and voltage acquisition path are normal.

[0020] S3: The three beams from the same source synchronously trigger their respective detection channels and carry out data acquisition in parallel. After the acquisition is completed, the data packets with timestamps aligned are uploaded to construct a full-dimensional dataset, including photoelectric performance coefficients, spectral performance coefficients, beam performance coefficients, and stability evaluation coefficients. Specifically: The first beam (e.g., accounting for 30%) enters the photoelectric characteristic detection channel, is converted into an electrical signal by the photodetector, and the voltage signal is synchronously acquired by the high-precision data acquisition card to calculate the real-time output optical power. Through formula The output optical power was calculated. ;in The voltage signal of the photodetector acquired by the data acquisition card. For the gain of the detector amplifier circuit, This is the detector responsivity calibration coefficient (unit: V / W). =30% is the splitting ratio of the first beam; obtained through standard signal source calibration method; Obtained through standard light source calibration method.

[0021] Obtain the chip's operating voltage using the formula. Calculate the chip operating voltage ;in This is the original voltage value. For voltage calibration coefficient, Baseline voltage offset; Obtained through standard voltage source calibration method. Obtained through no-load baseline testing.

[0022] Based on the output optical power and operating voltage, the output photoelectric conversion efficiency and power stability are combined with the target output power and weighted fusion to output the photoelectric performance coefficient. Photoelectric conversion efficiency ; This is the current drive current; Power stability ; and These are the maximum and minimum power values ​​within 100ms under the current drive current. Average power; Using formula The photoelectric performance coefficient was calculated. ;in , as well as The preset standard photoelectric conversion efficiency, the maximum allowable power fluctuation value, and the target output power under the current driving current conditions are respectively: , as well as The weighting coefficients are set, and their sum is one.

[0023] The second beam (e.g., accounting for 40%) enters the spectral characteristic detection channel (e.g., a spectrometer), triggering it to acquire the spectral curve of the current beam and extract the center wavelength, side-mode suppression ratio, and spectral width. Additional notes: Using the formula for the center wavelength Perform calibration: The calibrated center wavelength was obtained. ;in This is the preset wavelength temperature compensation coefficient. This is the current substrate temperature of the chip. This is a preset reference temperature; for example, 25°C. Using formulas to measure spectral intensity calibration The calibrated spectral intensity was obtained. ,in The splitting ratio for the second beam is 40%. This is the preset spectrometer intensity calibration coefficient; Then the edge mode suppression ratio ;in The peak intensity of the main mode, This represents the peak strength of the strongest edge model.

[0024] After calculating the absolute difference between the center wavelength and spectral width and the set target wavelength and standard spectral width of the chip, respectively, the wavelength accuracy and width compliance are obtained. The spectral performance coefficients are output after weighted fusion of wavelength accuracy, width compliance, and side-mode suppression ratio. Using formula Calculated spectral performance coefficients ;in , as well as These are the maximum allowable wavelength offset, the maximum allowable spectral width deviation, and the standard side-mode suppression ratio preset under the current driving current conditions. , as well as The weighting coefficients are set, and their sum is one; and This indicates wavelength accuracy and width compliance.

[0025] The third beam (e.g., accounting for 30%) enters the beam quality detection channel (e.g., CCD or CMOS beam analyzer), triggering it to capture the far-field or the beam spot image after lens transformation, and calculates the beam divergence angle and beam spot ellipticity based on image analysis. Additional notes: Spot ellipticity ,in and These represent the diameters of the major and minor axes of the light spot, respectively. Beam divergence angle ;in Where L is the spot size and L is the spot acquisition distance.

[0026] The beam performance coefficient is output after weighted fusion of beam divergence angle and beam spot ellipticity; Using formula The beam performance coefficient was calculated. ;in , The maximum allowable ellipticity and maximum allowable divergence angle are preset under the current driving current conditions, respectively. , The weighting coefficients are set, and their sum is one.

[0027] Real-time temperature data of the substrate of the chip under test is collected, and the temperature stability coefficient is obtained after calculating the standard deviation. The stability evaluation coefficient is obtained by dividing the preset maximum allowable temperature stability coefficient under the current driving current condition by the currently calculated temperature stability coefficient.

[0028] S4: Execute steps S2 to S3 in a loop according to the preset drive current gradient (e.g., from 0mA to the rated current of 200mA, with a step size of 5mA and an initial current of 5mA); adjust the drive current according to the drive current gradient in each loop, and synchronously obtain the full-dimensional parameter set under different drive current conditions, so as to obtain the dynamic law line of the chip under test changing with the drive current under the same test environment conditions. Specifically: The photoelectric performance coefficient, spectral performance coefficient, beam performance coefficient and stability evaluation coefficient under different driving current conditions are weighted and fused to output the single driving current performance coefficient of the chip under test under different driving current conditions in the same test environment. The stability evaluation coefficient is labeled as After normalizing the photoelectric performance coefficient, spectral performance coefficient, beam performance coefficient, and stability evaluation coefficient, the formula was used. The single-drive flow performance coefficient was calculated. ; , , as well as The weighting coefficients are set, and their sum is one; The pass / fail performance coefficients for single drive current performance of the chip under test under different drive current conditions in the same test environment are preset; these coefficients are set in conjunction with the chip design specifications. The ratio of the corresponding single-drive flow performance coefficient to the passing performance coefficient is calculated; the single-drive flow performance coefficient is the numerator, and the passing performance coefficient is the denominator. The performance values ​​of the chip under test under different drive current conditions were obtained. Draw a Cartesian coordinate system with the horizontal axis representing the driving current condition (from smallest to largest) and the vertical axis representing the performance level value. Plot the numerical points in the coordinate system corresponding to the performance values ​​of the chip under test under different driving current conditions, and connect adjacent numerical points to obtain the dynamic law line of the chip under test changing with the driving current.

[0029] S5: After obtaining the full set of parameters under different drive current conditions in the current test environment, change the chip ambient temperature to the next set of test environment conditions according to S1. After the chip reaches thermal equilibrium, execute steps S2 to S4 until all test environment conditions are completed, and obtain the dynamic law line of the chip under test changing with drive current under different test environment conditions. S6: Based on the dynamic law line of the chip under test changing with the driving current under different test environment conditions, output the comprehensive performance coefficient of the chip under test under different test environment conditions, integrate the comprehensive performance coefficient, performance and dynamic law line of the chip under test under different test environment conditions as the test result of the chip under test. Specifically: S6-1: The gradient range based on the driving current is divided into three driving current intervals according to the set division ratio, including low driving current interval, medium driving current interval and high driving current interval. For a dynamic law line under a certain test environment condition, the dynamic law line is divided according to the driving current interval to obtain low driving law line, medium driving law line and high driving law line. Example range division: low range 0~50mA, middle range 50~150mA, high range 150~200mA (can be adjusted according to chip design thresholds).

[0030] The performance reference value of the preset performance level is used as a baseline, and a line segment is extended horizontally to the right from the performance reference value. Baseline parameters: preset performance reference value (e.g., 1.0, corresponding to the chip's qualified performance threshold), the baseline is a horizontal line segment with "performance level value = 1.0".

[0031] S6-2: Quantize the three driving law lines of low, medium and high respectively, calculate the interval independent coefficients of each interval, and then perform weighted fusion to output the comprehensive performance coefficient; For the three drive law lines of low, medium and high, the number of data points with performance level values ​​higher than the baseline in each interval is counted, and the ratio of the data points in each interval is calculated to obtain the low drive compliance ratio, medium drive compliance ratio and high drive compliance ratio. The average value of each group of performance level values ​​in the intervals corresponding to the three driving law lines of low, medium and high is calculated. Taking the average value of each interval as the starting point, a line segment is extended horizontally to the right as the performance average line of each interval. Locate the position of the performance moving average in each interval, and obtain the vertical distance between each performance moving average and the x-axis, which is denoted as the moving average distance; Obtain the perpendicular distance between the baseline and the x-axis, and record it as the baseline distance; The ratio is calculated by using the average distance of each interval as the numerator and the baseline distance as the denominator, and the performance distance ratio of each interval is output. Based on the low-drive compliance ratio, medium-drive compliance ratio and high-drive compliance ratio of each interval, and combined with the corresponding performance distance ratio, the interval independence coefficients of each interval are obtained by weighted fusion. That is, through the formula After weighted calculation, the interval independence coefficients corresponding to the low drive current interval, medium drive current interval, and high drive current interval are output respectively. , Where i = 1, 2, or 3, when i = 1, and These represent the performance distance ratios calculated for the low drive compliance ratio and the low drive current range, respectively. and Weighting coefficients for low drive compliance ratio and performance distance ratio when calculating the interval independence coefficient for the low drive current range; When i=2 and These represent the mid-drive compliance ratio and the performance distance ratio calculated in the mid-drive current range, respectively. and The weighting coefficients for the mid-drive compliance ratio and performance distance ratio when calculating the interval independence coefficients for the mid-drive current range; When i=3 and These represent the performance distance ratios calculated for the high drive compliance ratio and the high drive current range, respectively. and The weighting coefficients for high drive compliance ratio and performance distance ratio when calculating the interval independence coefficient for the high drive current range.

[0032] Based on the chip application scenario, the interval weights are set, and the interval independence coefficients of each interval are weighted and fused to output the comprehensive performance coefficient of the chip under test under different test environment conditions. That is, using formulas Perform weighted calculations and output the overall performance coefficient. ;in , as well as The weighting coefficients are the comprehensive performance coefficients for each interval, and their sum is one.

[0033] S6-3: Compare the overall performance coefficient of the chip under test under different test environment conditions with the preset expected performance coefficient under different test environment conditions. If the overall performance coefficient of the chip under test under a certain test environment condition is lower than the expected performance coefficient, the performance is determined to be lower than expected, and vice versa.

[0034] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, ATA hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. The semiconductor medium can be a solid-state ATA hard disk.

[0035] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0036] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0037] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0038] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0039] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0040] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable ATA hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0041] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for synchronous testing of multiple parameters of an optical communication laser chip, characterized in that, include: S1: Pre-build the test environment temperatures for each group of tests required for the chip, as the test environment conditions for each group; S2: Output a drive signal according to the initially set drive current to drive the laser chip under test to work and output laser. The laser is introduced into a beam splitter prism group with a fixed splitting ratio. The laser is divided into three paths by the beam splitter prism group and guided to three detection channels for photoelectric characteristics, spectral characteristics and beam quality, respectively. S3: The three beams from the same source synchronously trigger their respective detection channels and perform data acquisition in parallel. After the acquisition is completed, the data packets with timestamps aligned are uploaded to construct a full-dimensional dataset. The full-dimensional dataset includes photoelectric performance coefficients, spectral performance coefficients, beam performance coefficients, and stability evaluation coefficients. The logic for obtaining photoelectric performance coefficients; The first beam enters the photoelectric characteristic detection channel, is converted into an electrical signal by the photodetector, and the voltage signal is collected synchronously to calculate the real-time output optical power. The chip's operating voltage is obtained. Based on the output optical power and operating voltage, the photoelectric conversion efficiency and power stability are output and then combined with the target output power. After weighted fusion, the photoelectric performance coefficient is output. The logic for obtaining spectral performance coefficients; The second beam enters the spectral characteristic detection channel, triggering it to acquire the spectral curve of the current beam and extract the center wavelength, side-mode suppression ratio, and spectral width. After calculating the absolute difference between the center wavelength and spectral width and the set target wavelength and standard spectral width of the chip, respectively, the wavelength accuracy and width compliance are obtained; the spectral performance coefficient is output after weighted fusion of wavelength accuracy, width compliance and side-mode suppression ratio. The logic for obtaining beam performance coefficients; The third beam enters the beam quality detection channel, triggering it to capture a far-field spot image. Based on the image analysis, the beam divergence angle and spot ellipticity are calculated. After weighted fusion of the beam divergence angle and spot ellipticity, the beam performance coefficient is output. The logic for obtaining the stability evaluation coefficient; Real-time temperature data of the substrate of the chip under test is collected, and the temperature stability coefficient is obtained after calculating the standard deviation. The stability evaluation coefficient is obtained by dividing the preset maximum allowable temperature stability coefficient under the current driving current condition by the currently calculated temperature stability coefficient. S4: Execute steps S2 to S3 repeatedly according to the preset drive current gradient; In each cycle, the driving current is adjusted according to the driving current gradient, and the full-dimensional parameter set under different driving current conditions is obtained synchronously, so as to obtain the dynamic law line of the chip under test changing with the driving current under the same test environment conditions. S5: After obtaining the full set of parameters under different drive current conditions in the current test environment, change the chip ambient temperature to the next set of test environment conditions according to S1, and execute steps S2 to S4 until all test environment conditions are completed, and obtain the dynamic law line of the chip under test changing with drive current under different test environment conditions. S6: Based on the dynamic law line of the chip under test changing with the driving current under different test environment conditions, output the comprehensive performance coefficient of the chip under test under different test environment conditions, integrate the comprehensive performance coefficient, performance performance and dynamic law line of the chip under test under different test environment conditions as the test result of the chip under test.

2. The method for synchronous testing of multiple parameters of an optical communication laser chip according to claim 1, characterized in that: The logic for drawing dynamic pattern lines; The photoelectric performance coefficient, spectral performance coefficient, beam performance coefficient and stability evaluation coefficient under different driving current conditions are weighted and fused to output the single driving current performance coefficient of the chip under test under different driving current conditions in the same test environment. The passing performance coefficient is preset for the single drive current performance coefficient of the chip under test under different drive current conditions under the same test environment. The performance coefficient of the single drive current is calculated by the ratio of the passing performance coefficient to obtain the performance level value of the chip under test under different drive current conditions; a Cartesian coordinate system is plotted with the drive current condition on the horizontal axis and the performance level value on the vertical axis. Plot the numerical points in the coordinate system corresponding to the performance values ​​of the chip under test under different driving current conditions, and connect adjacent numerical points to obtain the dynamic law line of the chip under test changing with the driving current.

3. The method for synchronous testing of multiple parameters of an optical communication laser chip according to claim 2, characterized in that: The logic for outputting the overall performance coefficient; After determining the division interval based on the preset division logic, for the dynamic law line under a certain test environment condition, the dynamic law line is divided according to the driving current interval to obtain the low driving law line, medium driving law line and high driving law line. The performance reference value of the preset performance level is used as a baseline, and a line segment is extended horizontally to the right from the performance reference value. The three driving law lines (low, medium, and high) are quantized separately, and the interval independent coefficients of each interval are calculated and then weighted and fused to output the comprehensive performance coefficient.

4. The method for synchronous testing of multiple parameters of an optical communication laser chip according to claim 3, characterized in that: Logic for calculating interval independent coefficients; For the three drive law lines of low, medium and high, the number of data points with performance level values ​​higher than the baseline in each interval is counted, and the ratio of the data points in each interval is calculated to obtain the low drive compliance ratio, medium drive compliance ratio and high drive compliance ratio. The average value of each group of performance level values ​​within the intervals corresponding to the three driving law lines (low, medium, and high) is calculated. Taking the average value of each interval as the starting point, a line segment is extended horizontally to the right as the performance average line of each interval. The position of the performance average line of each interval is located, and the vertical distance between each performance average line and the x-axis is obtained and recorded as the average line distance. The vertical distance between the baseline line and the x-axis is obtained and recorded as the baseline distance. The ratio of the average line distance of each interval as the numerator and the baseline distance as the denominator is calculated, and the performance distance ratio of each interval is output. Based on the low-drive compliance ratio, medium-drive compliance ratio, and high-drive compliance ratio of each interval, and after weighted fusion with the corresponding performance distance ratio, the interval independence coefficients of each interval are obtained.

5. The method for synchronous testing of multiple parameters of an optical communication laser chip according to claim 4, characterized in that... The logic for determining performance; The overall performance coefficient of the chip under test under different test environments is compared with the preset expected performance coefficient under different test environments. If the overall performance coefficient of the chip under test under a certain test environment is lower than the expected performance coefficient, the performance is determined to be lower than expected, and vice versa.

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