An anti-radiation LDO with base current balancing and drive enhancement function

Abstract

The application provides an anti-radiation LDO with base current balance and drive enhancement function, comprising a band gap reference circuit, a base current balance circuit, an error amplifier circuit, a bias circuit, a starting circuit, a power drive circuit and a drive enhancement circuit. The base current balance circuit of the application balances the band gap reference current, ensures that the band gap to the tube current size always remains equal before and after the influence of radiation, and the drive enhancement circuit is used for dynamically enhancing the load capacity of the power tube, ensuring the load capacity after the power tube current gain is reduced by radiation, so as to ensure that the output current range is not affected by radiation; from the circuit design point of view, the application uses a simple and efficient circuit structure, so that the LDO can be anti-radiation reinforced at a low cost, the current gain degradation of the LDO circuit to the bipolar device after radiation is not sensitive, and the stable output voltage and output load capacity are maintained.

Description

Technical Field

[0001] This invention relates to the field of control and regulation technology, and specifically to a radiation-resistant LDO with base current balancing and drive enhancement functions. Background Technology

[0002] Low dropout linear regulator (LDO) circuits, as the final branch of a power management system, have advantages such as small size, low cost, fast response speed, convenient application, and strong anti-interference ability. They are widely used in the Internet of Things, portable devices and other fields, and play an irreplaceable role in power management systems.

[0003] With the development of aerospace technology, the reliability requirements for aerospace-grade integrated circuit chips are constantly increasing, necessitating consideration of the impact of various particle radiations in space on electronic systems. The irradiation damage effects on bipolar process devices mainly include total dose effect and low dose rate effect. The damage primarily manifests as a decrease in current gain β, i.e., an increase in base current, thus affecting the normal operation of the chip.

[0004] Specifically Figure 1 This is a typical bipolar LDO circuit structure. The power transistor is very large and requires a large current flow, which can provide a wide load current range for the LDO. When the chip is irradiated, the current gain β decreases, and the drive current required by the power transistor increases. If the front-end driver cannot provide the required current, the output voltage will decrease, and the LDO will not operate normally.

[0005] Existing radiation hardening methods for bipolar circuits typically involve reducing the surface recombination of space charge caused by irradiation from a process design perspective. This is achieved by thinning the base region bandwidth, optimizing collector region parameters, and employing surface passivation techniques. These methods reduce the impact of irradiation on the current gain of bipolar devices. However, this approach requires steps such as optimizing the fabrication process, changing parameters, and replacing materials, resulting in high costs and complex principles.

[0006] The bandgap reference circuit is the core of the LDO circuit, and the performance of the reference voltage is crucial to the performance of the LDO circuit. Figure 2 This is a schematic diagram of a typical bandgap reference circuit, and the reference voltage formula is shown below: (Equation 1); Among them, V T For thermal voltage, I SQ1 and I SQ2 Let Q1 and Q2 be the saturation currents, respectively. From the formula, the reference voltage (V) can be obtained. REF ) and the current I flowing through the bandgap pair of transistors Q1 I Q2 Size-dependent, when the bandgap affects the current I of the transistor Q1 I Q2Only when the values ​​are almost identical can a stable reference voltage with low temperature drift be output. When the chip is exposed to radiation, the current gain β decreases, and the base current required by the bandgap pair increases, due to I... Q1 Two base currents, I, are required to supply the bandgap pair transistors. Q1 and I Q2 The equality relationship is broken, and the reference voltage increases as a result.

[0007] Therefore, in order to avoid the above problems, it is necessary to redesign and optimize the overall circuit structure based on the traditional bipolar LDO circuit. There is an urgent need for an LDO that can maintain the required driving capability of the power drive stage after irradiation and that can stably output the bandgap reference, so as to achieve the radiation resistance performance of the bipolar LDO circuit. Summary of the Invention

[0008] This invention addresses the problem of insufficient radiation resistance of LDOs in bipolar processes. It addresses the issue that total dose and low dose rate effects reduce current gain β, thus affecting the output accuracy and load-driving capability of traditional LDO circuits. The invention proposes adding a base current balancing circuit and a drive enhancement circuit to the traditional bandgap reference and power stage design. This low-cost and effective solution addresses the problems of bandgap shift and insufficient drive capability caused by device degradation after irradiation.

[0009] This invention provides a radiation-resistant LDO with base current balancing and drive enhancement functions, including a connected startup circuit and a bias circuit, a bandgap reference circuit and an error amplifier circuit respectively connected to the output of the startup circuit, and a circuit connected to the bandgap reference circuit. The base current balancing circuit, the drive enhancement circuit connected to the error amplifier circuit, the power drive circuit, and the power transistor connected to the output terminal of the power drive circuit. The startup circuit provides a startup signal after VIN is powered on, enabling the bias circuit and bandgap reference circuit to start working normally. The bias circuit generates a bias current I. bias It also supplies power to the bandgap reference circuit and the error amplifier circuit; The bandgap reference circuit utilizes the bias current I bias Generate bandgap reference voltage V REF And output to the error amplifier circuit; The base current balancing circuit balances the bandgap reference current to ensure that the current I of the bandgap pair transistors Q1 and Q2 is equal. Q1 and I Q2 The base current I required by the bandgap pair transistor is unaffected before and after irradiation. B To offset the effects of radiation; Error amplifier circuit compares feedback signal V FB and bandgap reference voltage V REF It also regulates the output and provides gain; The drive enhancement circuit dynamically enhances the load-carrying capacity of the power transistor so that although the current gain of the power transistor decreases after irradiation, it still maintains its original load-carrying capacity. The collector output reference voltage VOUT of the power transistor.

[0010] The radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, in a preferred embodiment, includes a bandgap reference circuit comprising a current mirror I1 connected to the output terminal of a bias circuit, NPN transistors Q1 and Q2 whose collectors are respectively connected to the output terminal of the current mirror I1, a resistor R1 connected between the emitter of transistor Q1 and ground, a resistor R2 connected between the emitter of transistor Q2 and ground, a resistor R3 connected between the emitter of transistor Q1 and resistor R1, and an NPN transistor Q3 whose emitter is connected to resistor R3. The base and collector of transistor Q1 are connected to the base of transistor Q2, and the base of transistor Q3 outputs a reference voltage V. REF Collector output feedback signal V FB ; The base current balancing circuit includes a current mirror I2 connected to the output terminal of the bias circuit, an NPN transistor Q4 whose collector and base are both connected to the current mirror I2 and whose emitter is grounded, an NPN transistor Q5 whose base is connected to the base of transistor Q4 and whose emitter is grounded, and an NPN transistor Q6 whose emitter is connected to the collector of transistor Q5, whose base is connected to the collector of transistor Q2, and whose collector is connected to VIN. Current mirrors I1 and I2 are: ; Among them, S EQ4 and S EQ5 These are the emitter areas of tubes Q4 and Q5, respectively.

[0011] In the radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, preferably, transistors Q2 and Q6 are of the same type and are matched during layout design. Transistor Q6 draws 2 times I from the right-side branch of the bandgap. B The current drawn from the left branch by the bandgap transistors Q1 and Q2 is the same as the current drawn from the left branch, thus canceling out I. B The impact of achieving I Q1 and I Q2 Size balance: ; Among them, V BEQ3 V is the voltage difference between the base and emitter of transistor Q3. T For thermal voltage, I Q1 and I Q2 I represents the currents of transistors Q1 and Q2, respectively. SQ1 and I SQ2 These are the saturation currents of transistors Q1 and Q2, respectively.

[0012] The radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, in a preferred embodiment, includes the following startup and bias circuits: an N-junction field-effect transistor J0; an NPN transistor Q7 whose emitter is connected to the gate of transistor J0 and both are grounded; an NPN transistor Q8 whose base is connected to both the base and collector of transistor Q7; a resistor R4 connected to the emitter of transistor Q8 and then grounded; an NPN transistor Q9 whose emitter is grounded; and an NPN transistor Q10 whose base and collector are both connected to the base of transistor Q9. PNP transistor Q11, whose collector is connected to the collector of transistor Q9; NPN transistor Q12, whose base is connected to both the base and collector of transistor Q11; resistor R5, which is connected to the emitter of transistor Q10 and the emitter of transistor Q12 and then grounded; PNP transistor Q13, whose emitter is connected to VIN and whose base is connected to the collector and then connected to the collector of transistor Q12 through a resistor; and PNP transistors Q14, Q15, Q16, and Q17, whose emitters are connected to VIN through resistors respectively. The drain of transistor J0 is connected to VIN, and its source is connected to the base and collector of transistor Q7. The collector of transistor Q8 is connected between the emitter of transistor Q11 and the collector of transistor Q15. The collector of transistor Q12 is connected to the bases of transistors Q14, Q15, Q16, and Q17. The collector of transistor Q14 is connected to both the base and collector of transistor Q10. The collector of transistor Q15 is connected to the emitter of transistor Q11. The collector of transistor Q16 is connected between the emitter of transistor Q8 and resistor R4. The collector of transistor Q17 outputs a bias current I. bias .

[0013] In the preferred embodiment of the radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, after VIN is powered on, transistors J0, Q7, and Q8 are turned on, and the potential of Q8 is pulled down to turn on transistors Q14, Q15, Q16, and Q17, and the bias circuit begins to work normally; after transistor Q16 is turned on, the current in resistor R4 increases, causing the emitter potential of transistor Q8 to gradually increase and become higher than the base potential, and the Q8 startup process ends. Bias current I bias by I Q13 I Q14 I Q15 The ratio of Q9 and Q10, as well as R5, determines this.

[0014] The radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, as a preferred embodiment, is I Q13 =I Q14 =I Q15 I bias for: ; Among them, V BEQ9V is the voltage difference between the base and emitter of transistor Q9. BEQ10 This is the voltage difference between the base and emitter of transistor Q10.

[0015] The radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, in a preferred embodiment, includes an error amplifier circuit, a power drive circuit, and a drive enhancement circuit comprising: a bias current I... bias The output terminals are connected to current mirrors I3, I4, and I5 respectively; PNP transistors Q18 and Q19 have their emitters connected to the output terminal of current mirror I3 respectively; NPN transistor Q20 has its base and collector connected to the collector of transistor Q18; NPN transistor Q21 has its collector connected to the collector of transistor Q19; PNP transistor Q22 has its emitter connected to the output terminal of current mirror I4 and its base connected to the collector of transistor Q19; NPN transistor Q23 has its collector and base connected to the collector of transistor Q22; and NPN transistor Q23 has its base connected to both the base and collector of transistor Q23. Q24, PNP transistor Q25 with collector connected to the collector of transistor Q24 and emitter input VIN, PNP transistor Q26 with emitter connected to the base of transistor Q25 and base connected to the collector of transistor Q25, NPN transistor Q27 with both base and collector connected to the collector of transistor Q26, NPN transistor Q28 with base connected to both base and collector of transistor Q27, PNP transistor Q29 with emitter connected to VIN, NPN transistor Q30 with collector connected to the output terminal of current mirror I5 and base connected to the output terminal of current mirror I4, and resistor R6 connected to the emitter of transistor Q30; The base of transistor Q18 is connected to V. REF The base of transistor Q19 is connected to V. FB The base of transistor Q22 is connected to V. EA The output terminal of the current mirror I5 is connected to the base of the power transistor; The emitters of transistors Q20, Q21, Q23, Q24, Q27, and Q28 are all grounded. The base of transistor Q21 is connected to the base and collector of transistor Q20. The collector of transistor Q28 is connected between the collector of transistor Q21 and the base of transistor Q22. The base of transistor Q29 is connected to the base of the power transistor. The other end of resistor R6 is grounded.

[0016] In the radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, as a preferred embodiment, transistors Q23 to Q29 between the error amplifier circuit and the power transistor can provide a dynamic current that increases with the load, and make the current of the error amplifier circuit symmetrical. The current of the power transistor is mirrored by the transistor Q29. When the load of the power transistor increases after irradiation, the required driving capability increases. The transistor Q29 can provide a larger current to the driving side of the power transistor without increasing the static power consumption of the overall circuit. The current mirrors of transistors Q23 and Q24 are identical. Transistors Q25 and Q22 are of the same type and are matched during layout design. The base currents of transistors Q25 and Q22 are the same, i.e., I25. B25 =I B22 ;I B25 The current flows through transistors Q26 and Q27, and is mirrored by transistor Q28. Transistor Q28 draws input from the right branch of the error amplifier circuit and I... B25 An equal current is used to offset the current I flowing from the base of transistor Q22 to the right branch of the error amplifier circuit. B22 This ensures that the current in the error amplifier circuit remains constant before and after being exposed to radiation.

[0017] The radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, as a preferred embodiment, comprises I3, I4, I5, and I... bias The ratio is 6:4:4:1.

[0018] The radiation-resistant LDO with base current balancing and drive enhancement functions described in this invention, as a preferred embodiment, further includes a resistor Rf1, a resistor RL, a capacitor CL, and a resistor Rf2 connected in series with the resistor Rf1, all connected to the collector of the power transistor. V FB It is connected between resistor Rf1 and resistor Rf2, and the other end of resistor Rf2, resistor RL and capacitor CL are all grounded.

[0019] Based on the typical LDO circuit structure of bipolar process, this invention provides a radiation-resistant LDO circuit from the perspective of circuit design, which has a simple structure and significant effect.

[0020] The present invention has the following advantages: (1) The present invention includes a bandgap reference circuit, a base current balancing circuit, an error amplifier circuit, a bias circuit, a startup circuit, a power drive circuit, and a drive enhancement circuit. The base current balancing circuit balances the bandgap reference current, which can ensure that the magnitude of the bandgap current to the transistor remains equal before and after the irradiation effect. The drive enhancement circuit is used to dynamically enhance the load-carrying capacity of the power transistor, which can ensure the load-carrying capacity after the power transistor current gain is reduced due to irradiation, thereby ensuring that the output current range is not affected by irradiation.

[0021] (2) From the perspective of circuit design, the present invention utilizes a simple and efficient circuit structure to harden the LDO against radiation at a lower cost, so that the LDO circuit is not sensitive to the degradation of current gain of bipolar devices after irradiation, and maintains a stable output voltage and output load capacity. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the basic structure of a typical bipolar LDO circuit. Figure 2 This is a typical bandgap reference circuit diagram; Figure 3 A schematic diagram of the circuit structure of a radiation-resistant LDO with base current balancing and drive enhancement functions; Figure 4 This is a circuit diagram of a radiation-resistant base current balancing circuit in a bandgap reference module of a radiation-resistant LDO with base current balancing and drive enhancement functions. Figure 5 This is a schematic diagram of the startup and bias circuit structure of a radiation-resistant LDO with base current balancing and drive enhancement functions. Figure 6 This is a schematic diagram of a radiation-resistant LDO error amplifier and power transistor drive enhancement circuit for radiation protection. Figure 7 A comparison of the reference voltage waveforms (varying with temperature) under irradiation conditions between Example 1 of an irradiated LDO with base current balancing and drive enhancement functions and a conventional LDO. Figure 8 This is a waveform comparison of the load-carrying capacity of an irradiated LDO with base current balancing and drive enhancement functions (Example 1) and a conventional LDO under irradiation conditions. Detailed Implementation

[0023] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Example 1

[0024] like Figure 3 As shown, a radiation-resistant LDO with base current balancing and drive enhancement functions includes: a bandgap reference circuit, a base current balancing circuit, an error amplifier circuit, a bias circuit, a startup circuit, a power drive circuit, and a drive enhancement circuit. The bandgap reference circuit generates a bandgap reference power supply using a current modulus and outputs it to the next stage; the base current balancing circuit balances the bandgap reference current, ensuring that the bandgap current remains equal before and after irradiation; the error amplifier circuit compares the feedback signal and the reference voltage, regulates the output, and provides gain; the bias circuit generates a bias current to power other modules; the startup circuit provides a startup signal to enable the bias circuit and bandgap reference circuit to start normal operation; the power drive circuit drives high-power transistors, enabling the circuit to drive a wide range of loads; the drive enhancement circuit dynamically enhances the load-carrying capacity of the power transistors, ensuring the load-carrying capacity even after irradiation reduces the current gain of the power transistors, thus ensuring that the output current range is unaffected by irradiation.

[0025] For ease of description, the base, collector, and emitter of a bipolar device will be referred to as the B terminal, C terminal, and E terminal, respectively.

[0026] like Figure 4 As shown, the bandgap reference circuit and base current balancing circuit include: NPN transistors (Q1, Q2, Q3, Q4, Q5, Q6), current mirrors (I1, I2), and resistors (R1, R2); the base current balancing circuit is used to balance the current I of the bandgap pair transistors in the reference voltage formula. Q1 I Q2 The magnitude relationship ensures that the current I after irradiation Q1 I Q2 The magnitudes remain almost identical, thus ensuring that the reference voltage is unaffected by radiation.

[0027] The bandgap pair consists of tubes Q1 and Q2. Terminals B and C of Q1 are connected to terminal B of Q2. Terminal E of Q1 is connected to R1 to ground and R3 to terminal E of Q3. Terminal C of Q3 is connected to V. FB Q3's B terminal is connected to V. REF The current flowing through terminal C of Q1 is I. Q1 The emitter (E) of Q2 is connected to ground via R2, and the current flowing through the collector (C) of Q2 is I. Q2 The current mirror I1, mirrored to the bias current, provides the bandgap pair current. Neglecting the base current, I1 = I0. Q1 +I Q2 , and I Q1 =I Q2 The collector (C) of Q2 is connected to the base (B) of Q6, the collector (C) of Q6 is connected to VIN, the emitter (E) of Q6 is connected to the collector (C) of Q5, the emitter (E) of Q5 is grounded, the base (B) of Q5 is connected to the collector (C) and base (B) of Q4, and the emitter (E) of Q4 is grounded. A current mirror I2, which is a reflection of the bias current, provides current to Q4. The magnitudes of I1 and I2 satisfy the following relationship, where S... EQ3 and S EQ4 The E-end areas of Q4 and Q5 are respectively. In this embodiment, the ratio of the E-end areas of Q4 and Q5 is 1:2.

[0028] (Equation 2); When a transistor is exposed to radiation, the base current I required by the bandgap pair transistor is... B Increase, its size is equal to I Q1 I Q2 Compared to what can no longer be completely ignored, this has led to I Q1 I Q2 They cannot be approximately exactly equal, the reference voltage V REF The formula (derived from Equation 1) is modified as follows: (Equation 3); To balance I Q1 and IQ2 The magnitudes of I1 and I2 are strictly controlled by the ratio of the mirror bias current. In this example, I1, I2, and I... bias The size ratio is 6:3:1, and the transistors Q1, Q2, and Q6 are of the same type and are matched during the layout drawing process; thus, Q6 can draw 2 times I from the right branch of the bandgap. B This is consistent with the magnitude of the current drawn from the left branch by the bandgap transistor, i.e., I in Equation 3. Q2 It became I Q2 -2I B This offsets the I in the correction formula. B The impact of this, therefore, enabled I Q1 and I Q2 The size is balanced.

[0029] like Figure 5 As shown, the startup circuit and bias circuit include: NPN transistors (Q7, Q8, Q9, Q10, Q12), PNP transistors (Q11, Q13, Q14, Q15, Q16, Q17), a junction field-effect transistor (J0), and resistors (R4, R5). The startup circuit provides a startup signal to start the bias circuit; the bias circuit generates a bias current I. bias It supplies power to the other modules and circuits; The drain of J0 is connected to VIN, the gate of J0 is grounded, the source of J0 is connected to the B and C terminals of Q7 and the B terminal of Q8, the emitter of Q7 is grounded, the emitter of Q8 is connected to resistor R4 to ground and the C terminal of Q16, the C terminal of Q8 is connected to the emitter of Q11 and the C terminal of Q15, the B terminal of Q11 is connected to the C terminal, the B terminal of Q12 and the C terminal of Q9, the emitter of Q9 is grounded, the B terminal of Q9 is connected to the B and C terminals of Q10, the emitter of Q10 is connected to resistor R5 to ground and the emitter of Q12, the C terminal of Q12 is connected to the B terminals of Q14, Q15, Q16, and Q17, and a resistor is connected to the C and B terminals of Q13, the emitter of Q13 is connected to VIN, the emitters of Q14, Q15, Q16, and Q17 are each connected to a resistor to VIN, and the C terminal of Q17 can output a bias current I. bias It supplies power to other modules through a current mirror.

[0030] After VIN is powered on, junction field-effect transistors J0 and Q7 turn on. The base (B) terminals of Q7 and Q8 are connected, causing Q8 to turn on and pull its potential down. This pulls on Q14, Q15, Q16, and Q17, and the bias circuit begins to operate normally. After Q16 turns on, the increased current through R4 causes the emitter (E) potential of Q8 to gradually rise above its base (B) potential, ending the Q8 startup process. The bias current I... bias by I Q13 I Q14 I Q15The ratio of Q9 and Q10, as well as R5, are determined by setting I. Q13 =I Q14 =I Q15 I bias It is given by the following formula: (Equation 4); like Figure 6 As shown, the error amplifier circuit, power drive circuit, and drive enhancement circuit include: NPN transistors (Q20, Q21, Q23, Q24, Q27, Q28, Q30), PNP transistors (Q18, Q19, Q22, Q25, Q26, Q29), a current mirror, and resistor R6. The drive enhancement circuit is used to dynamically enhance the load-carrying capacity of the power transistors, ensuring the load-carrying capacity even after irradiation reduces the current gain of the power transistors, thereby ensuring that the output current range is not affected by irradiation.

[0031] Q18's B terminal is connected to the reference voltage V. REF The collector (C) of Q18 is connected to the collector (C) and base (B) of Q20, and the base (B) of Q19 is connected to the feedback voltage V. FB The collector (C) terminal of Q19 is connected to the collector (C) terminal of Q21. The emitter (E) terminals of both Q20 and Q21 are grounded. Q18 and Q19 are powered by the current mirror above. The collector (C) terminal of Q21 is connected to the base (B) terminal of Q22 and the collector (C) terminal of Q28. The base (B) terminal of Q22 outputs V. EA (Output voltage of error amplifier circuit) The C terminal of Q22 is connected to the C and B terminals of Q23 and the B terminal of Q24. The E terminals of Q23 and Q24 are both grounded. The C terminal of Q24 is connected to the C terminal of Q25 and the B terminal of Q26. The E terminal of Q25 is connected to VIN. The B terminal of Q25 is connected to the E terminal of Q26. The C terminal of Q26 is connected to the C and B terminals of Q27 and the B terminal of Q28. The E terminals of Q27 and Q28 are both grounded. The C terminal of Q28 is connected between the C terminal of Q21 and the B terminal of Q22. The C terminal of Q29 is connected to the E terminal of Q22 and the B terminal of Q30. The E terminal of Q29 is connected to VIN. The B terminal of Q29 is connected to the C terminal of Q30. The E terminal of Q30 is connected to ground via resistor R6. The C terminal of Q30 is connected to the B terminal of the power transistor.

[0032] In this example, I3, I4, I5, and I bias The size ratio is 6:4:4:1.

[0033] When a transistor is exposed to irradiation, the power transistor driver requires a larger current from the preceding stage. To improve the driving capability, Q23~Q29 between the error amplifier and the power transistor provide a dynamic current that increases with the load, while ensuring current symmetry within the error amplifier module, thus guaranteeing gain. Specifically, the base (B) of Q29 is connected to the base (B) of the power transistor, achieving a current mirroring effect. When the load on the power transistor increases after irradiation, the required driving capability increases, and Q29 can provide a larger current to the power transistor driver without increasing the overall circuit's static power consumption. Due to the current mirroring of Q23 and Q24, and because Q25 and Q22 are of the same transistor type and are matched during layout design, the base currents of Q25 and Q22 are essentially the same, i.e., I0. B25 =I B22 ;I B25 The current flows through Q26 and Q27, is mirrored by Q28, and Q28 draws input from the right branch of the error amplifier circuit and I. B25 An equal current cancels out the I flowing from the base of Q22 to the right branch of the error amplifier circuit. B22 This ensures that the current in the error amplifier is equal, thus guaranteeing the gain.

[0034] Figure 7 The simulation results show the waveforms of the reference voltage as a function of temperature under irradiation for the LDO using this invention and a conventional LDO. It can be seen that the LDO using this invention can maintain a reference voltage of 1.2V after irradiation, while the reference voltage of the conventional LDO is higher (the deviation is greater with increased irradiation). The simulation results demonstrate the feasibility of this solution and overcome the drawback of the reference voltage in bipolar processes being affected by irradiation.

[0035] Figure 8 The waveforms show the load range (load capacity) of the LDO using this invention and a conventional LDO under irradiation conditions. It can be seen that the LDO using this invention has a larger load current range, while the conventional LDO has a smaller load current range. Simulation results demonstrate the feasibility of this solution and overcome the drawback of the load capacity of bipolar process LDOs being affected by irradiation.

[0036] Table 1 summarizes the main performance indicators of the LDO of this invention under irradiation conditions compared to those without irradiation. As can be seen from the table, the simulation results for temperature drift, load regulation, line regulation, drop voltage, noise, and ripple rejection ratio show very little change before and after irradiation, all meeting the design requirements. The simulation results demonstrate the feasibility of this scheme and reduce the sensitivity of bipolar LDO circuit performance indicators to irradiation.

[0037] Table 1. Key performance indicators of the LDO of the present invention under irradiation conditions (compared to non-irradiation conditions)

[0038] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A radiation-resistant LDO with base current balancing and drive enhancement functions, characterized in that: It includes a connected startup circuit and a bias circuit, a bandgap reference circuit and an error amplifier circuit respectively connected to the output terminal of the startup circuit, and a bandgap reference circuit connected to the bias circuit. The base current balancing circuit, the drive enhancement circuit connected to the error amplifier circuit, the power drive circuit, and the power transistor connected to the output terminal of the power drive circuit; The startup circuit provides a startup signal after VIN is powered on, so that the bias circuit and the bandgap reference circuit can start working normally. The bias circuit generates a bias current I. bias And power is supplied to the bandgap reference circuit and the error amplifier circuit; The bandgap reference circuit utilizes a bias current I bias Generate bandgap reference voltage V REF And output to the error amplifier circuit; The base current balancing circuit balances the bandgap reference current to ensure that the current I of the bandgap transistors Q1 and Q2 is equal. Q1 and I Q2 The base current I required by the bandgap pair transistor is unaffected before and after irradiation. B To offset the effects of radiation; The error amplifier circuit compares the feedback signal V. FB and bandgap reference voltage V REF It also regulates the output and provides gain; The drive enhancement circuit dynamically enhances the load-carrying capacity of the power transistor so that although the current gain decreases after the power transistor is irradiated, it still maintains its original load-carrying capacity. The collector output reference voltage VOUT of the power transistor.

2. The radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 1, characterized in that: The bandgap reference circuit includes a current mirror I1 connected to the output terminal of the bias circuit, NPN transistors Q1 and Q2 whose collectors are respectively connected to the output terminal of the current mirror I1, a resistor R1 connected between the emitter of transistor Q1 and ground, a resistor R2 connected between the emitter of transistor Q2 and ground, a resistor R3 connected between the emitter of transistor Q1 and resistor R1, and an NPN transistor Q3 whose emitter is connected to resistor R3. The base and collector of transistor Q1 are connected to the base of transistor Q2, and the base of transistor Q3 outputs a reference voltage V. REF Collector output feedback signal V FB ; The base current balancing circuit includes a current mirror I2 connected to the output terminal of the bias circuit, an NPN transistor Q4 whose collector and base are both connected to the current mirror I2 and whose emitter is grounded, an NPN transistor Q5 whose base is connected to the base of transistor Q4 and whose emitter is grounded, and an NPN transistor Q6 whose emitter is connected to the collector of transistor Q5, whose base is connected to the collector of transistor Q2, and whose collector is connected to VIN. Current mirrors I1 and I2 are: ； Among them, S EQ4 and S EQ5 These are the emitter areas of tubes Q4 and Q5, respectively.

3. The radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 2, characterized in that: Tubes Q2 and Q6 are of the same type and are matched during layout drawing. Tube Q6 draws 2 times I from the right branch of the bandgap. B The current drawn from the left branch by the bandgap transistors Q1 and Q2 is the same as the current drawn from the left branch, thus canceling out I. B The impact of achieving I Q1 and I Q2 Size balance: ； Among them, V BEQ3 V is the voltage difference between the base and emitter of transistor Q3. T For thermal voltage, I Q1 and I Q2 I represents the currents of transistors Q1 and Q2, respectively. SQ1 and I SQ2 These are the saturation currents of transistors Q1 and Q2, respectively.

4. The radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 1, characterized in that: The startup circuit and the bias circuit include: an N-type junction field-effect transistor J0, an NPN transistor Q7 whose emitter is connected to the gate of transistor J0 and is grounded, an NPN transistor Q8 whose base is connected to both the base and collector of transistor Q7, a resistor R4 connected to the emitter of transistor Q8 and grounded, an NPN transistor Q9 whose emitter is grounded, an NPN transistor Q10 whose base and collector are both connected to the base of transistor Q9, a PNP transistor Q11 whose base and collector are both connected to the collector of transistor Q9, an NPN transistor Q12 whose base is connected to both the base and collector of transistor Q11, a resistor R5 connected to both the emitter of transistor Q10 and the emitter of transistor Q12 and grounded, a PNP transistor Q13 whose emitter is connected to VIN and whose base and collector are connected to the collector of transistor Q12 through a resistor, and PNP transistors Q14, Q15, Q16, and Q17 whose emitters are respectively connected to VIN through resistors. The drain of transistor J0 is connected to VIN, and its source is connected to the base and collector of transistor Q7. The collector of transistor Q8 is connected between the emitter of transistor Q11 and the collector of transistor Q15. The collector of transistor Q12 is connected to the bases of transistors Q14, Q15, Q16, and Q17. The collector of transistor Q14 is connected to both the base and collector of transistor Q10. The collector of transistor Q15 is connected to the emitter of transistor Q11. The collector of transistor Q16 is connected between the emitter of transistor Q8 and resistor R4. The collector of transistor Q17 outputs a bias current I. bias .

5. A radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 4, characterized in that: After VIN is powered on, transistors J0, Q7, and Q8 are turned on, and the potential of Q8 is pulled down to turn on transistors Q14, Q15, Q16, and Q17, and the bias circuit begins to work normally. After transistor Q16 is turned on, the current in resistor R4 increases, causing the emitter potential of transistor Q8 to gradually increase and become higher than the base potential, thus ending the start-up process of Q8. Bias current I bias by I Q13 I Q14 I Q15 The ratio of Q9 and Q10, as well as R5, determines this.

6. A radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 5, characterized in that: I Q13 =I Q14 =I Q15 , I bias Main: ； Among them, V BEQ9 V is the voltage difference between the base and emitter of transistor Q9. BEQ10 This is the voltage difference between the base and emitter of transistor Q10.

7. A radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 5, characterized in that: The error amplifier circuit, the power drive circuit, and the drive enhancement circuit include: a bias current I bias The output terminals are connected to current mirrors I3, I4, and I5 respectively; PNP transistors Q18 and Q19 have their emitters connected to the output terminal of current mirror I3 respectively; NPN transistor Q20 has its base and collector connected to the collector of transistor Q18; NPN transistor Q21 has its collector connected to the collector of transistor Q19; PNP transistor Q22 has its emitter connected to the output terminal of current mirror I4 and its base connected to the collector of transistor Q19; NPN transistor Q23 has its collector and base connected to the collector of transistor Q22; and NPN transistor Q23 has its base connected to both the base and collector of transistor Q23. Q24, PNP transistor Q25 with collector connected to the collector of transistor Q24 and emitter input VIN, PNP transistor Q26 with emitter connected to the base of transistor Q25 and base connected to the collector of transistor Q25, NPN transistor Q27 with both base and collector connected to the collector of transistor Q26, NPN transistor Q28 with base connected to both base and collector of transistor Q27, PNP transistor Q29 with emitter connected to VIN, NPN transistor Q30 with collector connected to the output terminal of current mirror I5 and base connected to the output terminal of current mirror I4, and resistor R6 connected to the emitter of transistor Q30; The base of transistor Q18 is connected to V. REF The base of transistor Q19 is connected to V. FB The base of transistor Q22 is connected to V. EA The output terminal of the current mirror I5 is connected to the base of the power transistor; The emitters of transistors Q20, Q21, Q23, Q24, Q27, and Q28 are all grounded. The base of transistor Q21 is connected to the base and collector of transistor Q20. The collector of transistor Q28 is connected between the collector of transistor Q21 and the base of transistor Q22. The base of transistor Q29 is connected to the base of the power transistor. The other end of resistor R6 is grounded.

8. A radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 7, characterized in that: The transistors Q23 to Q29 between the error amplifier circuit and the power transistor can provide a dynamic current that increases with the load, and make the current of the error amplifier circuit symmetrical. The current of the power transistor is mirrored by the transistor Q29. When the load of the power transistor increases after irradiation, the required driving capability increases. The transistor Q29 can provide a larger current to the driving side of the power transistor without increasing the static power consumption of the overall circuit. The current mirrors of transistors Q23 and Q24 are identical. Transistors Q25 and Q22 are of the same type and are matched during layout design. The base currents of transistors Q25 and Q22 are the same, i.e., I25. B25 =I B22 I B25 The current flows through transistors Q26 and Q27, and is mirrored by transistor Q28. Transistor Q28 draws input from the right branch of the error amplifier circuit and I... B25 An equal current is used to offset the current I flowing from the base of transistor Q22 to the right branch of the error amplifier circuit. B22 This ensures that the current in the error amplifier circuit remains constant before and after being subjected to radiation.

9. A radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 7, characterized in that: I3, I4, I5 and I bias The ratio is 6:4:4:

1.

10. A radiation-resistant LDO with base current balancing and drive enhancement functions according to claim 1, characterized in that: It also includes resistor Rf1, resistor RL, capacitor CL, and resistor Rf2 connected in series with resistor Rf1, which are respectively connected to the collector of the power transistor. V FB It is connected between resistor Rf1 and resistor Rf2, and the other end of resistor Rf2, resistor RL and capacitor CL are all grounded.

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