A method for running an application and a computing device

Abstract

This application discloses a method for running an application and a computing device. The method includes: acquiring the memory operation characteristics of a target application on a target library, where the target library is a dependency library loaded by the target application, and the target application is in a first instruction mode; configuring the target library based on a configuration mode, so that the target application runs on a platform in a second instruction mode based on the target library. This technical solution can shorten the time for troubleshooting memory order problems of the target application's target library and improve the running efficiency and performance of the target application on a second instruction mode platform.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method for running an application and a computing device. Background Technology

[0002] In related technologies, transcoding tools can be used to dynamically translate strongly ordered applications, enabling them to run in weakly ordered environments.

[0003] When running a strongly ordered application in a weakly ordered environment, a considerable amount of time is spent troubleshooting memory order issues in the dependent libraries of the strongly ordered application in order to adjust the running mode of the dependent libraries of the strongly ordered application. Summary of the Invention

[0004] The purpose of this application is to provide a method for running an application and a computing device to shorten the time for troubleshooting memory order problems in the target library of a target application in a first instruction mode, and to improve the running efficiency and performance of the target application on a second instruction mode platform.

[0005] In a first aspect, embodiments of this application provide a method for running an application, comprising: Obtain the memory operation characteristics of the target application on the target library, wherein the target library is a dependency library loaded by the target application, and the target application is a first instruction mode; Based on the behavioral characteristics of the memory operations, the configuration mode of the target library is determined, wherein the configuration mode is either strong order mode or weak order mode. Configure the target library based on the target library's configuration mode so that the target application runs on the platform in the second instruction mode based on the target library.

[0006] When using the method of this application embodiment, the configuration mode of the target library can be determined by referring to the memory operation characteristics of the target application on the target library. Then, the target library is configured based on the configuration mode, so that the target application runs on the platform of the target library in the second instruction mode. Therefore, the method of this application embodiment can automatically identify the configuration mode of sensitive target libraries by referring to the memory operation characteristics of the target application on the target library, so that the target library can decide whether to adopt a strong order mode or a weak order mode according to the actual scenario, thereby reducing unnecessary strong order operations and improving overall running performance and efficiency. Moreover, the method of this application embodiment, by referring to the memory operation characteristics of the target application on the target library, automatically configures the mode of the target library, which can shorten the time for target library memory ordering issues of target applications in the first instruction mode.

[0007] In one possible implementation, obtaining the behavioral characteristics of the target application's memory operations on the target library includes: obtaining the target application's memory operation data on the target library through a dynamic instrumentation tool; and determining the behavioral characteristics of the memory operations based on the target application's memory operation data on the target library.

[0008] The method in this application embodiment can obtain the memory operation data of the target library through a dynamic instrumentation tool without requiring the source code of the target strongly ordered application. Based on this data, the behavioral characteristics of the memory operation can be determined. In this way, the mode of the target library can be automatically configured with reference to the behavioral characteristics of the memory operation, thus solving the problem of closed-source applications in the first instruction mode running on the platform in the second instruction mode.

[0009] In one possible implementation, the configuration pattern of the target library is determined based on the behavioral characteristics of memory operations, including: The behavioral characteristics of memory operations are compared with a predefined rule base, which includes a mapping relationship between the behavioral characteristics of memory operations and the configuration mode of the target library. If the comparison is successful, the configuration mode of the target library is determined to be strong-order mode. At this time, the predefined rule base can be regarded as a rule base for strong-order configuration. As long as the behavioral characteristics of memory operations match the predefined rule base, the configuration mode of the target library can be considered to be strong-order mode.

[0010] In one possible implementation, the behavioral characteristics of memory operations include the proportion of cmpxchg instructions and the frequency of lock contention. Determining the configuration mode of the target library based on these memory operation behavioral characteristics also includes: If the proportion of cmpxchg instructions exceeds the first threshold and the proportion of lock contention instructions exceeds the second threshold, the comparison is confirmed as successful. The higher the proportion of cmpxchg instructions, the more intense the multi-core synchronization, lock-free operations, lock cmpxchg retries, and lock spinning; the higher the lock contention frequency, the more sluggish the target application will run on the platform with the second instruction. Therefore, by configuring the first and second thresholds, the proportion of atomic instructions and lock contention instructions can be measured to determine whether they are sufficient to trigger the target library's forced configuration mode.

[0011] In one possible implementation, determining the configuration mode of the target library based on the behavioral characteristics of the memory operations further includes: If the comparison fails, it means that the behavior of the memory operation does not conform to the strong-order configuration. Therefore, it can be determined that the configuration mode of the target library is weak-order mode.

[0012] In one possible implementation, the method of this application embodiment further includes: If the comparison fails, the memory order of the target library is in weak order mode. Lock blocking may still occur in weak order mode. Therefore, the lock blocking duration of the target application process in the target library can be obtained. The longer the lock blocking duration, the more likely the target application will lag when running on the second instruction mode platform. Therefore, the configuration mode of the target library can be determined based on the lock blocking duration.

[0013] In one possible implementation, the configuration mode of the target library is determined based on the lock blocking duration, including: If the lock blocking time in the target library during process execution exceeds the third threshold, it indicates that the target application has a particularly high risk of lag when running on the second instruction mode platform. Therefore, the configuration mode of the target library can be set to strong order mode to reduce the risk of lag.

[0014] In one possible implementation, the configuration mode of the target library is determined based on the behavioral characteristics of memory operations, including: From the behavioral characteristics of the memory operations, at least one of the following is obtained: lock contention frequency, atomic instruction ratio, and cmpxchg instruction ratio; The configuration mode of the target library is determined based on at least one of the following: lock contention frequency, atomic instruction ratio, and cmpxchg instruction ratio.

[0015] In one possible implementation, the target library is configured based on a configuration mode so that the target application runs on a platform in a second instruction mode based on the target library, including: The target library's configuration file is generated based on the target library's configuration mode. The configuration file is then injected into the transcoding tool, which in turn transcodes the target program's instructions into a second instruction mode.

[0016] Secondly, embodiments of this application provide an apparatus for running an application, comprising: The acquisition module is used to acquire the memory operation characteristics of the target application on the target library, wherein the target library is a dependency library loaded by the target application, and the target application is a first instruction mode; The determination module is used to determine the configuration mode of the target library based on the behavioral characteristics of the memory operation, wherein the configuration mode is either strong order mode or weak order mode; A configuration module is used to configure the target library based on the target library's configuration mode, so that the target application runs on the platform in the second instruction mode based on the target library.

[0017] Thirdly, embodiments of this application also provide a computer storage medium storing computer instructions that, when executed on a processor, cause the processor to perform the method described according to the first aspect or any possible implementation thereof according to the embodiments of this application.

[0018] Fourthly, embodiments of this application also provide a computer program product, including a computer program, wherein the computer program, when executed by a processor, implements the method described in the first aspect or any possible implementation thereof.

[0019] Fifthly, embodiments of this application also provide a computing device, including: Processor; and, Memory for stored programs; The program includes instructions that, when executed by a processor, cause the processor to perform the method according to the first aspect of the embodiments of this application or any possible implementation thereof. Attached Figure Description

[0020] Further details, features, and advantages of this application are claimed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which: Figure 1 A schematic diagram of a system framework for an example ARM platform in which various methods described herein can be implemented according to embodiments of this application is shown. Figure 2 A flowchart illustrating the method for running an application according to an embodiment of this application is shown; Figure 3 The illustrated flowchart shows a method for running an application on an ARM platform according to an embodiment of this application. Figure 4 A schematic block diagram of a functional module of an application running apparatus according to an exemplary embodiment of this application is shown; Figure 5 A structural block diagram of an exemplary computing device that can be used to implement embodiments of this application is shown. Detailed Implementation

[0021] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. While some embodiments of this application are shown in the drawings, it should be understood that this application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this application. It should be understood that the drawings and embodiments of this application are for illustrative purposes only and are not intended to limit the scope of protection of this application.

[0022] It should be understood that the steps described in the method embodiments of this application may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of this application is not limited in this respect.

[0023] The term "comprising" and its variations as used herein are open-ended, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Definitions of other terms will be given in the following description. It should be noted that the concepts of "first", "second", etc., mentioned in this application are used only to distinguish different devices, modules, or units, and are not intended to limit the order of functions performed by these devices, modules, or units or their interdependencies.

[0024] It should be noted that the terms "a" and "a plurality of" used in this application are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0025] Before introducing the embodiments of this application, the relevant terms involved in the embodiments of this application are first explained as follows: A strongly-ordered application is an application that relies on "strong memory order" semantics during development and runtime. In contrast, strong order refers to the order in which all Central Processing Unit (CPU) cores execute instructions exactly as described in the code, ensuring global consistency and guaranteeing the correctness of concurrent logic without the need for additional synchronization instructions (such as memory barriers).

[0026] A weakly-ordered environment refers to processor hardware and operating environments that employ a weak memory model. Weak ordering means that the CPU, in order to run faster, arbitrarily disrupts the order of instruction execution and does not guarantee that data will be immediately synchronized with other cores. It requires synchronization mechanisms such as locks, atomic instructions, and memory barriers to ensure the correctness of concurrent execution.

[0027] Memory ordering refers to the order in which the processor reads and writes memory during program execution, the order in which these operations are executed, the order in which they are completed, and the order in which they are visible between multiple threads. It determines whether instructions within a single thread will be executed out of order, and whether modifications to shared memory by multiple threads can be observed as expected, thus forming the basis for the correctness of concurrent programs.

[0028] Instruction sequence hashing refers to the unique hash value calculated using a hash algorithm for a continuous sequence of machine instructions (assembly instructions / binary instructions). This hash value serves as a "digital fingerprint" for this instruction sequence, enabling rapid identification, comparison, and retrieval of instruction sequences. Its core function is to solve the problems of uniqueness verification and efficient matching of instruction sequences.

[0029] Dynamic instrumentation (DBI) refers to inserting code in real-time during program execution without permanently altering the executable file. Its advantage is that analysis can be performed without affecting the program's execution outcome.

[0030] Transcoding tools are specialized tools that perform instruction parsing, semantic mapping, and equivalent conversion for machine instruction / assembly instruction sequences from different processor architectures. These tools can convert instruction sequences from strongly ordered architectures into instruction sequences from weakly ordered architectures (including synchronization instructions / memory barrier supplementation), or output standardized intermediate representations. They are core foundational tools for cross-architecture instruction sequence analysis and hash calculation.

[0031] Dependency libraries are low-level code libraries that are directly called by strongly ordered applications when running in a weakly ordered environment. They encapsulate concurrency synchronization logic (locks, atomic instructions, cmpxchg / lock instructions). The execution behavior of these libraries is directly affected by the memory ordering model, and their performance metrics, such as lock contention frequency and the proportion of atomic instructions, are the core observation objects for evaluating the running efficiency of strongly ordered applications in a weakly ordered environment.

[0032] Dynamic libraries are low-level dependency libraries that are dynamically loaded by strongly ordered applications when running in a weakly ordered environment. The concurrent synchronization logic they encapsulate, such as locks, atomic instructions, `cmpxchglock`, and `lock` instructions, is invoked in real-time during runtime, and the instruction execution behavior is directly affected by the memory order model. Performance metrics of such dynamic libraries, such as lock contention frequency and the proportion of atomic instructions, need to be extracted through runtime monitoring (e.g., Berkeley Packet Filter (eBPF) instrumentation, Performance Monitoring Unit (PMU) counting), and are the core observation vehicle for evaluating the performance of strongly ordered applications running in a weakly ordered environment.

[0033] This application provides a method for running an application to shorten the time required to troubleshoot memory ordering issues in the target library of a target application in a first instruction mode, and to improve the running efficiency and performance of the target application on a second instruction mode platform.

[0034] In one embodiment, the first instruction mode can be a strong order mode and the second instruction mode can be a weak order mode; in another embodiment, the first instruction mode can be a weak order mode and the second instruction mode can be a strong order mode.

[0035] The strong-order mode can include ARM mode or RISC-V mode, and the weak-order mode can include x86 mode, C86 mode, or SC mode. For example, when the target application is in strong-order mode, the target application is a strong-order application; when the second instruction mode is in weak-order mode, the second instruction mode platform is a weak-order platform. The following uses an ARM environment and an x86 application as examples to explain the system architecture of various methods for implementing the ARM platform computing device according to the embodiments of this application.

[0036] Figure 1 A schematic diagram of an example ARM platform system framework, according to embodiments of this application, in which various methods described herein can be implemented. (e.g.) Figure 1 As shown, the system framework 100 of this application embodiment includes an ARM operating system 101, a transcoding tool 102, one or more x86 applications 103, and a memory order dynamic configuration module 104.

[0037] like Figure 1 As shown, the ARM operating system 101 can provide a weakly ordered environment for the entire system framework, and it can run various compliant operating systems, such as the commonly used ARM Linux operating system. For example, when the ARM operating system 101 is an ARM Linux operating system, the x86 application 103 can be an x86 Linux application.

[0038] like Figure 1 As shown, x86 application 103 can refer to various application software that needs to run on the x86 environment. This application software can be closed-source or open-source.

[0039] like Figure 1 As shown, the transcoding tool (such as the general transcoding tool QEMU) 102 translates the instructions in the dependent library of the x86 application 103 into ARM instructions at runtime, and delivers them to the CPU of the ARM operating system 101 for execution, so that the x86 application 103 can run on the ARM architecture computing device without recompiling.

[0040] like Figure 1 As shown, when the CPU of the ARM operating system 101 executes ARM instructions, it can load the memory order dynamic configuration module 104. Through dynamic instrumentation and behavior pattern matching technology, it can automatically identify the sensitive dependency libraries of the x86 application 103 without source code and configure the memory order mode of the dependency library.

[0041] Optional, such as Figure 1As shown, the memory order dynamic configuration module 104 can monitor the memory operation data of x86 applications on dependent libraries and use this memory operation data to determine the configuration file of the dependent libraries. The memory order dynamic configuration module 104 can use this configuration file as a memory order configuration instruction and inject it into the transcoding tool 102 in the form of binary instructions by calling the application programming interface (API) of the transcoding tool 102.

[0042] like Figure 1 As shown, the transcoding tool 102 can obtain the memory order mode of the dependent library corresponding to the ARM instruction by parsing the configuration file. After intercepting the x86 instruction of the dependent library, it can transcode the x86 instruction into the ARM instruction and modify the memory order mode of the ARM instruction during the transcoding process.

[0043] If the memory order mode obtained from this configuration file is strong order mode, such as Figure 1 As shown, during the process of transcoding x86 instructions to ARM instructions, the transcoding tool 102 can modify the memory order mode of the ARM instructions to the strong order mode.

[0044] If the memory ordering mode obtained from this configuration file is weak ordering mode, such as Figure 1 As shown, during the process of transcoding x86 instructions to ARM instructions, the transcoding tool 102 can modify the memory order mode of the ARM instructions to a weak order mode.

[0045] In one implementation, such as Figure 1 As shown, the memory order dynamic configuration module 104 can also dynamically monitor the lock blocking data in the target library when the x86 application process is running, and then determine the lock blocking duration in the target library when the process is running based on the lock blocking data, and determine whether lock blocking or abnormal blocking time has occurred based on the lock blocking duration.

[0046] When lock blocking occurs, it indicates that the memory ordering of the dependent library is inappropriate due to its weak ordering mode. Therefore, if... Figure 1 As shown, the memory order dynamic configuration module 104 can inject the strong order configuration file of the dependent library into the transcoding tool 102 in the form of binary instructions by calling the application programming interface (API) of the transcoding tool 102.

[0047] This application provides a memory ordering configuration method, which can be executed by a computing device or a chip within the computing device. The computing device can be a server or a terminal device.

[0048] Figure 2A flowchart illustrating the operation method of the application according to an embodiment of this application is shown. Figure 2 As shown, the memory order configuration method 200 of this application embodiment includes steps 201 to 203.

[0049] In step 201, the memory operation characteristics of the target application on the target library are obtained, where the target application is in the first instruction mode. Here, the target application can have one or more target libraries, which can be dependency libraries of the target application or dynamic libraries of the target application.

[0050] In this embodiment of the application, it is not necessary to know the source code of the target application to obtain the behavioral characteristics of the target application's memory operations on the target library. Therefore, whether the target application is closed source or not will not affect the acquisition of the behavioral characteristics of the target application's memory operations on the target library.

[0051] Optionally, a dynamic memory ordering configuration module can be loaded. This module, acting as a dynamic instrumentation module, can obtain memory operation data of the target application on the target library using dynamic instrumentation tools. Based on this data, the behavioral characteristics of memory operations can be determined. When using dynamic instrumentation tools to obtain memory operation data, it is not necessary to obtain the source code of the target application to acquire the operation behavior monitoring data, thereby reducing labor costs.

[0052] Taking x86 applications as an example, when x86 calls x86 instructions from dependent libraries, the transcoding tool first parses the x86 instructions, then translates them into functionally equivalent ARM instructions, and finally hands the translated ARM instructions over to the CPU of the ARM operating system for execution.

[0053] Optionally, memory operation data can also be obtained based on the instruction type of the x86 instruction. If the instruction type of the x86 instruction is a memory operation instruction, the memory order dynamic configuration module can obtain the memory operation data of the x86 instruction. For example, the memory operation data may include the memory operation type of the x86 instruction, the memory address to be operated on by the x86 instruction, and the operands, etc., and use it as the memory operation behavior data of the x86 instruction in the dependency library.

[0054] In step 202, the configuration mode of the target library is determined based on the behavioral characteristics of memory operations. This configuration mode is either strong order mode or weak order mode.

[0055] In this embodiment of the application, since the memory operation behavior of the target application on the target library can reflect the memory consistency problem, concurrent synchronization failure, performance loss, etc. of the target application in the first instruction mode under the second instruction mode platform, it is the key basis for locating cross-architecture memory order compatibility problems. Therefore, the configuration mode of the target library can be determined as strong order mode or weak order mode based on the memory operation behavior characteristics.

[0056] Optionally, dynamic instrumentation tools can be used to obtain memory operation behavior data of the target application on the target library within a preset time period. Based on this, the behavioral characteristics of memory operations corresponding to the preset time period can be obtained. Various strong-order configuration conditions can be stored in a predefined rule base. The behavioral characteristics of memory operations are compared with the predefined rule base, which includes the mapping relationship between the behavioral characteristics of memory operations and the configuration mode of the target library. If the comparison fails, it indicates that the behavioral characteristics of the memory operation do not conform to the strong-order configuration; therefore, the configuration mode of the target library can be considered as a weak-order mode. If the comparison succeeds, the configuration mode of the target library is determined to be a strong-order mode. In this case, the predefined rule base can be used as a rule base for strong-order configuration. As long as the behavioral characteristics of memory operations conform to the predefined rule base, the configuration mode of the target library can be considered as a strong-order mode.

[0057] In step 203, the target library is configured based on the target library's configuration mode so that the target application runs on the platform in the second instruction mode based on the target library.

[0058] When the first instruction mode is strong-order mode and the second instruction mode is weak-order mode, and the target application is a strong-order application, the platform can be a weak-order platform; when the first instruction mode is weak-order mode and the second instruction mode is strong-order mode, and the target application is a weak-order application, the platform can be a strong-order platform.

[0059] Optionally, a configuration file for the target library can be generated based on its configuration mode. This configuration file can then be injected into the transcoding tool, enabling the tool to transcode the target program's instructions into a second instruction mode. Once the transcoding tool identifies the target library's instruction type as a memory operation instruction, it determines whether the memory order mode of the memory operation instruction matches the target library's configuration mode. If they do not match, the tool can change the memory order mode of the memory operation instruction to match the target library's configuration mode; otherwise, there is no need to change the memory order mode of the memory operation instruction.

[0060] When the target library's configuration mode is strong-order, if the memory operation instruction's memory order mode is weak-order, it means the memory operation instruction's memory order mode needs to be changed. This can be done by directly changing the memory operation instruction's memory order mode to strong-order. Conversely, when the target library's configuration mode is weak-order, if the memory operation instruction's memory order mode is strong-order, it means the memory operation instruction's memory order mode needs to be changed. This can be done by directly changing the memory operation instruction's memory order mode to weak-order.

[0061] When the behavior of memory operations reflects poor compatibility between the target library's performance metrics and the target strongly ordered application in a weakly ordered environment, the target library can be configured in strongly ordered mode. Furthermore, transcoding tools can be used to change the weakly ordered memory operation instructions within the target library to strongly ordered mode. For example, when the first instruction mode is strongly ordered and the second instruction mode is weakly ordered, the performance of the strongly ordered application on the weakly ordered platform is actually sacrificed to balance the performance loss of strongly ordered mode with the compatibility risks of weakly ordered mode.

[0062] When the behavior of memory operations indicates good compatibility between the target strongly-ordered application and the weakly-ordered environment, the target library can be configured in weak-order mode. Furthermore, transcoding tools can be used to change the strongly-ordered memory operation instructions within the target library to weak-ordered execution. For example, when the first instruction mode is strongly-ordered and the second instruction mode is weak-ordered, this actually sacrifices some compatibility between the target application and the weakly-ordered platform to improve the performance and efficiency of the strongly-ordered application on the weakly-ordered platform, thus balancing the performance loss of strongly-ordered execution and the compatibility risks of weakly-ordered execution.

[0063] As can be seen, in the method of this application embodiment, the configuration mode of the target library can be determined by referring to the memory operation characteristics of the target application on the target library, and then the target library is configured based on the configuration mode of the target library, so that the target application runs on the platform of the target library in the second instruction mode. Therefore, the method of this application embodiment can automatically identify the configuration mode of sensitive target libraries by referring to the memory operation characteristics of the target application on the target library, so that the target library can decide whether to adopt a strong order mode or a weak order mode according to the actual scenario, thereby reducing unnecessary strong order operations and improving overall running performance and efficiency. Moreover, the method of this application embodiment, by referring to the memory operation characteristics of the target application on the target library and automatically configuring the mode of the target library, can shorten the time of target library memory order problem of the target application in the first instruction mode.

[0064] Furthermore, regardless of whether the target strongly ordered application is closed-source, there is no need for manual analysis of the target application's source code or target libraries. Instead, by obtaining the memory operation characteristics of the target application on the target libraries, the target libraries with poor performance (error-prone target libraries or sensitive target libraries) can be located with a high degree of automation and low debugging cost. This shortens the time for troubleshooting target library memory ordering issues in the first instruction mode target application, reduces manual troubleshooting time, and improves the memory ordering configuration efficiency of the target application's target libraries. Furthermore, by using the target application's memory operation characteristics on the target libraries as a reference, the number of unnecessarily strongly ordered target libraries can be controlled, improving the running efficiency and performance of the first instruction mode target application under the second instruction mode platform. The overall performance is estimated to be more than 10% higher than that of the fully strongly ordered mode.

[0065] In one possible implementation, when determining the configuration mode of the target library based on the behavioral characteristics of memory operations, at least one of the following can be obtained from the behavioral characteristics of memory operations: lock contention frequency, atomic instruction ratio, and cmpxchg instruction ratio. Then, the configuration mode of the target library is determined based on at least one of the following: lock contention frequency, atomic instruction ratio, and cmpxchg instruction ratio.

[0066] Lock contention frequency = number of failed lock attempts (waiting) ÷ total number of lock attempts. The higher the lock contention frequency, the slower the target application will run on the platform with the second instruction.

[0067] Atomic instruction percentage = the proportion of atomic instructions with lock (lock cmpxchg / lock add, etc.) among all CPU instructions during program execution. The higher the atomic instruction percentage, the greater the multi-core synchronization pressure of the ARM system.

[0068] The percentage of cmpxchg instructions = number of cmpxchg instructions ÷ total number of instructions. The higher the percentage of cmpxchg instructions, the more intense the multi-core synchronization, lock-free operation, lock cmpxchg retries, and lock spin.

[0069] As can be seen, the memory operation behavior characteristics of this application embodiment can measure the performance compatibility of the target application in the first instruction mode with the second instruction mode platform. By comparing these memory operation behavior characteristics with the strong order configuration conditions in the predefined rule base, it is possible to accurately identify whether the target library is a sensitive target library that requires mode adjustment.

[0070] Taking the memory operation behavior characteristics, including the proportion of cmpxchg instructions and the lock contention frequency, as an example, if the predefined rule base includes more than the first threshold for cmpxchg instructions and more than the second threshold for lock contention frequency, the target library is in strong order mode. Therefore, if the proportion of cmpxchg instructions is greater than the first threshold and the lock contention frequency is greater than the second threshold, the comparison can be confirmed as successful, that is, the configuration mode of the target library is strong order mode.

[0071] In one example, the first threshold can be 13%~18%, and the second threshold can be 950~1100 times / second. As long as the proportion of cmpxchg instructions in the target library is greater than 13%~18%, and the lock contention frequency is greater than 950~1100 times / second, the configuration mode of the target library can be considered as strong-order mode. For example, when the first threshold is 10% and the second threshold is 1000 times / second, if the proportion of cmpxchg instructions in the target library is greater than 10%, and the lock contention frequency is greater than 1000 times / second, the comparison can be considered successful; otherwise, the comparison fails.

[0072] Optionally, when there are multiple target libraries in the target application, the memory operation data of different target libraries may be the same on the second instruction mode platform. Therefore, after obtaining the memory operation data of the target application on the target library through the dynamic instrumentation tool, the identity information of the target library can be determined based on the memory operation data, and then the configuration file of the target library can be generated based on the identity information and configuration mode of the target library.

[0073] In one example, when the memory operation data includes the memory operation data of a certain instruction in the target library on the second instruction mode platform, a hash calculation can be performed on the memory operation data of that instruction in the target library on the second instruction mode platform to extract features from the memory operation data of the instruction in the target library in a weak order environment, thereby obtaining the instruction sequence hash fingerprint. This instruction sequence hash fingerprint can serve as the identity information of the target library and is unique. Therefore, when at least two of the multiple target libraries have the same memory operation data on the second instruction mode platform, the instruction sequence hash fingerprint and the configuration mode of the target library can be injected into the transcoding tool as the configuration file of the target library, so that the transcoding tool configures the memory order mode of the target library that matches the instruction sequence hash fingerprint.

[0074] In one possible implementation, the method of this application embodiment may further include: if the comparison fails, since the memory order of the target library is set to weak order mode, and lock blocking may still occur in weak order mode, the lock blocking duration during the execution of the target application process can be obtained; the longer the lock blocking duration, the more likely the target application will lag when running on the second instruction mode platform, so the configuration mode of the target library can be determined based on the lock blocking duration.

[0075] Optionally, if the memory order mode of the target library is weak order mode, the lock blocking data of the target application process in the target library can be obtained. This data can reflect the running performance of the target library. Therefore, the lock blocking duration of the target application process in the target library can be determined based on the lock blocking data in the target library.

[0076] In one example, if the lock blocking duration in the target library during process runtime exceeds the third threshold, it indicates that from the perspective of a single target library, the thread of the target library is blocked, the target application is severely blocked, and the compatibility between the target strong-order application and the weak-order environment is relatively poor. Therefore, the configuration mode of the target library can be determined to be strong-order mode, and then step 203 can be executed.

[0077] In another example, if the memory ordering mode of multiple target libraries is weak ordering mode, and the lock blocking time of a certain target library is the maximum lock blocking time of the target application process in multiple target libraries, it means that from the perspective of the target application's global target libraries, the process corresponding to the target library with the longest lock blocking time is stuck. Therefore, the configuration mode of the target library can be determined to be strong ordering mode, and then step 203 can be executed.

[0078] For example, from the perspective of a target library, a third threshold can be set to 500ms. The duration of lock blocking in the target library during the execution of the target application process can be the duration of thread blocking caused by lock contention. If the duration of thread blocking caused by lock contention is greater than 500ms, it can be considered that the target application is prone to stuttering due to intense lock contention in the target library. Therefore, the configuration mode of the target library is determined to be strong order mode.

[0079] Optionally, considering that the lock blocking time of the process in multiple target libraries exceeds the third threshold during runtime, the identity information of the target library can be determined by the lock blocking time of the process in the target library. Then, based on the identity information and configuration mode of the target library, the configuration file of the target library can be determined and injected into the transcoding tool, so that the transcoding tool can change the memory order mode of the target library that matches the identity information from weak order mode to strong order mode.

[0080] In one example, the lock blocking data of the target application process in the target library can be hashed to obtain the sequence hash fingerprint of the lock blocking data. The sequence hash fingerprint of the lock blocking data can be used as the identity information of the target library and is unique. Therefore, when the lock blocking time of the process in multiple target libraries exceeds the third threshold, the sequence hash fingerprint of the lock blocking data and the configuration mode of the target library can be combined to form the configuration file of the target library.

[0081] As can be seen, in the method of this application embodiment, when the transcoding tool configures the memory order mode of the target library to weak order mode, the memory library operation mode of the target library can be dynamically adjusted by monitoring the lock blocking data in the target library during the process of the target application, so as to balance the performance loss of strong order and the compatibility risk of weak order as much as possible, and improve the running efficiency of the target strong order application in the weak order environment.

[0082] The strong order configuration conditions in this application embodiment can be stored in a predefined rule base. The following example uses a dynamic library of a closed-source x86 application running on an ARM server. Figure 3 The illustrated flowchart shows a method for configuring memory order on an ARM platform according to an embodiment of this application, describing the memory order configuration method. For example... Figure 3 As shown, the memory configuration method 300 in the ARM environment of this application embodiment includes steps 301 to 308.

[0083] In step 301, the memory operation data of the cmpxchg instruction and the lock instruction of the x86 application's dynamic library under the ARM platform are obtained through the dynamic instrumentation tool.

[0084] In step 302, the memory operation data of the cmpxchg instruction and the memory operation data of the lock instruction under the ARM platform are hashed to generate the instruction sequence hash fingerprint of the dynamic library.

[0085] In step 303, the proportion of cmpxchg instructions in the dynamic library is determined based on the memory operation data of cmpxchg instructions under the ARM platform, and the contention frequency of lock instructions in the dynamic library is determined based on the memory operation data of lock instructions under the ARM platform.

[0086] In step 304, the proportion of cmpxchg commands and the contention frequency of lock commands are matched with the strong order judgment conditions in the predefined rule base to obtain the configuration mode of the dynamic library.

[0087] In step 305, the configuration file of the dynamic library is determined based on the instruction sequence hash fingerprint of the dynamic library and the configuration mode of the dynamic library.

[0088] In step 306, the configuration file of the dynamic library is injected into the transcoding tool, the configuration file of the dynamic library is parsed, and the configuration mode of the dynamic library is written into the transcoding rule base based on the instruction sequence hash fingerprint of the dynamic library, so that the transcoding rules of the target library in the transcoding rule base are the configuration mode of the dynamic library.

[0089] When the configuration mode of a dynamic library includes strong order mode, it means that after the configuration information of the dynamic library is written into the transcoding rule library, the transcoding tool can set the memory operation instructions of the target library to strong order mode. Although this running mode can guarantee the running performance of x86 applications, it is easy to cause compatibility problems between x86 applications and ARM platforms. Therefore, when the configuration mode of a dynamic library includes strong order mode, you can return to step 301 and re-execute steps 301 to 306.

[0090] When the configuration mode of a dynamic library includes a weak-order mode, it means that after the configuration mode of the dynamic library is written into the transcoding rule library, the transcoding tool can set the memory operation instructions of the target library to run in a weak order. Although this running mode can ensure the compatibility between x86 applications and ARM platforms, x86 applications are prone to performance problems such as errors. Therefore, when the configuration mode of a dynamic library includes a weak-order configuration, step 307 can be executed.

[0091] In step 307, data on thread blocking caused by lock contention within the dynamic library during the runtime of the x86 application is obtained. Based on this data, the duration of thread blocking caused by lock contention is determined.

[0092] In step 308, if lock contention causes thread blocking time to meet the time-consuming exception condition, the strong order mode of the target library is written into the transcoding rule library, and then the process returns to step 301 to re-execute steps 301 to 306.

[0093] In Scenario 1, an ARM server running a closed-source x86 application experiences a process freeze. The conditions for determining strong-order execution include a cmpxchg instruction ratio greater than 10% and a lock instruction contention frequency greater than 1000 times / second.

[0094] For the dynamic library libdemo.so, the cmpxchg instruction accounts for 18% of its total instruction count, which is greater than 10%, and the lock instruction contention frequency is 1200 times / second, which is greater than 1000 times / second. Therefore, the dynamic library libdemo.so hits the strong order determination condition, triggering its strong order mode. At this point, based on the strong order mode and instruction sequence hash fingerprint of libdemo.so, a configuration file libdemo.so:strong can be generated. This configuration file is then injected into a transcoding tool. The transcoding tool can parse the libdemo.so:strong configuration file and, based on the instruction sequence hash fingerprint, write the strong order mode of libdemo.so into the transcoding rule base, marking the memory order mode of libdemo.so as strong order mode to reduce the occurrence of x86 application freezes.

[0095] For the dynamic library libexample.so, the cmpxchg instruction accounts for 9% of the total, which is less than 10%, and the lock instruction contention frequency is 1200 times / second, which is greater than 1000 times / second. Therefore, the dynamic library libexample.so did not meet the strong order condition, thus triggering its weak order mode. At this point, based on the weak order mode and instruction sequence hash fingerprint of libexample.so, a configuration file libexample.so:weak can be generated. This configuration file is then injected into a transcoding tool. The transcoding tool parses the libexample.so:weak configuration file and, based on the instruction sequence hash fingerprint, writes the weak order mode of libexample.so into the transcoding rule base, marking the memory order mode of libexample.so as a weak order mode to improve x86 application performance.

[0096] For the weak-order dynamic library libexample.so, it is also possible to monitor the lock contention blocking data within libexample.so during the runtime of x86 application threads. Based on the lock contention blocking data within libexample.so, the duration of thread blocking caused by lock contention within libexample.so can be determined. If, from the perspective of global dynamic libraries of the x86 application, there are multiple weak-order dynamic libraries among all dynamic libraries during the runtime of the x86 application threads, and the duration of thread blocking caused by lock contention within libexample.so is the longest among the durations of thread blocking for those multiple dynamic libraries, the strong-order mode of libexample.so can be written into the transcoding rule library to mark the memory order mode of libexample.so as strong-order mode.

[0097] During the operation of the x86 application, monitoring showed that no process freezing occurred in the running threads of the x86 application within the dynamic library libdemo.so. This verifies the effectiveness of the memory order configuration method in this embodiment, ensuring the performance of the x86 application and compatibility with the ARM platform. It is highly automated, requiring no manual analysis of source code or dependent libraries such as dynamic libraries, thus improving configuration efficiency. Furthermore, it automatically locates error-prone or sensitive dynamic libraries such as libdemo.so at runtime, reducing manual troubleshooting time and lowering debugging costs.

[0098] In Scenario 2, if the ARM server is running a closed-source x86 application, the performance of the x86 application on the ARM platform is far lower than that of the x86 application on the x86 platform. The strong order determination conditions include the proportion of cmpxchg instructions being greater than 10% and the lock instruction contention frequency being greater than 1000 times / second.

[0099] The obtained `cmpxchg` instruction percentage in the dynamic library `libtest.so` is 5%, which is greater than 10%, and the `lock` instruction contention frequency is 1200 times / second, which is greater than 1000 times / second. Therefore, the dynamic library `libtest.so` failed the strong order condition check, triggering the weak order mode of the dynamic library `libdemo.so`. At this point, based on the weak order mode and instruction sequence hash fingerprint of the dynamic library `libdemo.so`, a configuration file `libtest.so:weak` for the dynamic library `libtest.so` can be generated. This configuration file `libtest.so:weak` is then injected into a transcoding tool. The transcoding tool can parse the configuration file `libtest.so:weak` and, based on the instruction sequence hash fingerprint of the dynamic library `libtest.so`, write the weak order execution requirements of the dynamic library `libtest.so` into the transcoding rule library, thus marking the memory order mode of the dynamic library `libtest.so` as weak order mode. This can improve the runtime performance of the dynamic library `libtest.so`.

[0100] For the weak-order dynamic library libtest.so, it is also possible to monitor the lock contention blocking data within libtest.so during the execution of x86 application threads. Based on the lock contention blocking data within libtest.so, the duration of thread blocking caused by lock contention in libtest.so can be determined. From the perspective of lock blocking in libtest.so, if the monitored duration of thread blocking caused by lock contention in libtest.so is greater than 500ms, it indicates that the blocking rate can be reduced by improving the memory order of libtest.so. Therefore, the strong-order mode of libtest.so is written into the transcoding rule library to mark the memory order mode of libtest.so as strong-order mode.

[0101] Monitoring the performance improvement of x86 applications during runtime verifies the effectiveness of the memory ordering configuration method in this embodiment. This method balances x86 application performance with ARM platform compatibility, accurately identifying sensitive dependency libraries (such as the dynamic library libtest.so) and reducing unnecessary strong-order operations. The overall performance of x86 references is estimated to be more than 10% higher than the fully strong-order mode. Furthermore, this approach is localized-friendly for closed-source x86 applications, reducing customer concerns about localization migration of closed-source x86 applications.

[0102] By dividing the functional modules according to their respective functions, an exemplary embodiment of this application provides an apparatus for running an application. The apparatus for running this application can be a computing device or a chip applied to a computing device. Figure 4 A schematic block diagram of a functional module of an application running apparatus according to an exemplary embodiment of this application is shown. Figure 4 As shown, the application's operating device 400 includes: The acquisition module 401 is used to acquire the memory operation characteristics of the target application on the target library, where the target library is the dependency library loaded by the target application and the target application is the first instruction mode. The determination module 402 is used to determine the configuration mode of the target library based on the behavioral characteristics of memory operations, wherein the configuration mode is either strong order mode or weak order mode; Configuration module 403 is used to configure the target library based on the configuration mode of the target library, so that the target application runs on the platform in the second instruction mode based on the target library.

[0103] In one possible implementation, the acquisition module 401 is used to acquire memory operation data of the target application on the target library through a dynamic instrumentation tool; and to determine the behavioral characteristics of memory operations based on the memory operation data of the target application on the target library.

[0104] In one possible implementation, the determining module 402 is used to compare the behavioral characteristics of memory operations with a predefined rule base, which includes the mapping relationship between the behavioral characteristics of memory operations and the configuration mode of the target library; if the comparison is successful, the configuration mode of the target library is determined to be the strong order mode.

[0105] In one possible implementation, the behavioral characteristics of memory operations include the cmpxchg instruction and the lock contention frequency. The determining module 402 is further configured to confirm a successful comparison if the proportion of cmpxchg instructions is greater than a first threshold and the lock contention frequency is greater than a second threshold.

[0106] In one possible implementation, the determining module 402 is further configured to determine the configuration mode of the target library as the weak order mode if the comparison fails.

[0107] In one possible implementation, the acquisition module 401 is further configured to acquire the lock blocking duration of the target application's process in the target library if the comparison fails; the determination module 402 is further configured to determine the configuration mode of the target library based on the lock blocking duration.

[0108] In one possible implementation, the determining module 402 is further configured to determine the configuration mode of the target library as strong order mode if the lock blocking duration in the target library during process execution is greater than a third threshold.

[0109] In one possible implementation, the determining module 402 is used to obtain at least one of lock contention frequency, atomic instruction ratio, and cmpxchg instruction ratio from the behavioral characteristics of memory operations; and to determine the configuration mode of the target library based on at least one of lock contention frequency, atomic instruction ratio, and cmpxchg instruction ratio.

[0110] In one possible implementation, the configuration module 403 is used to generate a configuration file for the target library based on the configuration mode of the target library, and inject the configuration file into the transcoding tool so that the transcoding tool transcodes the instructions of the target program into a second instruction mode.

[0111] This application also provides a computing device, including: at least one processor; and a memory communicatively connected to the at least one processor. The memory stores a computer program executable by the at least one processor, which, when executed by the at least one processor, causes the computing device to perform a running method of an application according to an embodiment of this application.

[0112] An exemplary embodiment of this application also provides a non-transitory computer-readable storage space storing a computer program, wherein the computer program, when executed by a computer's processor, is used to cause the computer to execute a method for running an application according to an embodiment of this application.

[0113] An exemplary embodiment of this application also provides a computer program product, including a computer program, wherein, when executed by a computer's processor, the computer program is used to cause the computer to perform a method for running an application according to an embodiment of this application.

[0114] refer to Figure 5 The following is a structural block diagram of a computing device 500 that can be used as an embodiment of this application, which is an example of a hardware device that can be applied to various aspects of the embodiments of this application. The term "computing device" is intended to represent various forms of digital electronic computing devices, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. A computing device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the embodiments of this application described and / or claimed herein.

[0115] like Figure 5As shown, the computing device 500 includes a computing unit 501, which can perform various appropriate actions and processes based on a computer program stored in a read-only memory (ROM) 502 or a computer program loaded from a storage unit 508 into a random access memory (RAM) 503. The RAM 503 may also store various programs and data required for the operation of the device 500. The computing unit 501, ROM 502, and RAM 503 are interconnected via a bus 504. An input / output (I / O) interface 505 is also connected to the bus 504.

[0116] like Figure 5 As shown, multiple components in the computing device 500 are connected to the I / O interface 505, including: an input unit 506, an output unit 507, a storage unit 508, and a communication unit 509. The input unit 506 can be any type of device capable of inputting information to the computing device 500. The input unit 506 can receive input numerical or character information and generate key signal inputs related to user settings and / or function control of the computing device. The output unit 507 can be any type of device capable of presenting information and may include, but is not limited to, a display, speaker, video / audio output terminal, vibrator, and / or printer. The storage unit 508 may include, but is not limited to, a hard disk and an optical disk. The communication unit 509 allows the computing device 500 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks, and may include, but is not limited to, modems, network interface cards, infrared communication devices, wireless communication transceivers, and / or chipsets, such as Bluetooth™ devices, WiFi devices, WiMax devices, cellular communication devices, and / or the like.

[0117] like Figure 5 As shown, computing unit 501 can be various general-purpose and / or dedicated processing components with processing and computing capabilities. Some examples of computing unit 501 include, but are not limited to, central processing unit (CPU), graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Computing unit 501 performs the various methods and processes described above. For example, in some embodiments, the methods of the embodiments of this application can be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as storage unit 508. In some embodiments, part or all of the computer program can be loaded and / or installed on computing device 500 via ROM 502 and / or communication unit 509. In some embodiments, computing unit 501 can be configured to perform the methods of the embodiments of this application by any other suitable means (e.g., by means of firmware).

[0118] Program code used to implement the methods of the embodiments of this application may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0119] In the context of embodiments of this application, machine-readable space can be a tangible space that may contain or store programs for use by or in conjunction with an instruction execution system, apparatus, or device. Machine-readable space can be machine-readable signal space or machine-readable storage space. Machine-readable space can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage space include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0120] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0121] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or space (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0122] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other.

[0123] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal, a user equipment, or other programmable device. The computer program or instructions can be stored in computer-readable storage space or transmitted from one computer-readable storage space to another. For example, the computer program or instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage space can be any available space that a computer can access or a data storage device such as a server or data center that integrates one or more available spaces. The available space can be magnetic space, such as a floppy disk, hard disk, or magnetic tape; it can also be optical space, such as a digital video disc (DVD); or it can be semiconductor space, such as a solid-state drive (SSD).

[0124] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A method for running an application, characterized in that, include: Obtain the memory operation characteristics of the target application on the target library, wherein the target library is a dependency library loaded by the target application, and the target application is a first instruction mode; Based on the behavioral characteristics of the memory operations, the configuration mode of the target library is determined, wherein the configuration mode is either strong order mode or weak order mode. Configure the target library based on the configuration mode of the target library so that the target application runs on the platform in the second instruction mode based on the target library.

2. The method according to claim 1, characterized in that, The acquisition of the target application's memory operation behavior characteristics on the target library includes: The memory operation data of the target application on the target library is obtained through dynamic instrumentation tools; Based on the memory operation data of the target application on the target library, the behavioral characteristics of the memory operation are determined.

3. The method according to claim 1, characterized in that, Determining the configuration mode of the target library based on the behavioral characteristics of the memory operations includes: The behavioral characteristics of the memory operation are compared with a predefined rule base, which includes the mapping relationship between the behavioral characteristics of the memory operation and the configuration mode of the target library. If the comparison is successful, the configuration mode of the target library is determined to be the strong order mode.

4. The method according to claim 3, characterized in that, The behavioral characteristics of the memory operations include the cmpxchg instruction and lock contention frequency. Determining the configuration mode of the target library based on these behavioral characteristics further includes: If the proportion of the cmpxchg instruction is greater than the first threshold and the lock contention frequency is greater than the second threshold, the comparison is confirmed to be successful.

5. The method according to claim 3, characterized in that, determining the configuration mode of the target library based on the behavioral characteristics of the memory operation further includes: If the comparison fails, the configuration mode of the target library is determined to be the weak order mode.

6. The method according to claim 3, characterized in that, The method further includes: If the comparison fails, obtain the duration of lock blocking in the target library during the runtime of the target application's process; The configuration mode of the target library is determined based on the lock blocking duration.

7. The method according to claim 6, characterized in that, The step of determining the configuration mode of the target library based on the lock blocking duration includes: If the duration of the lock blocking in the target library during the execution of the process exceeds the third threshold, the configuration mode of the target library will be determined as strong order mode.

8. The method according to claim 1, characterized in that, Determining the configuration mode of the target library based on the behavioral characteristics of the memory operations includes: From the behavioral characteristics of the memory operations, at least one of the following is obtained: lock contention frequency, atomic instruction ratio, and cmpxchg instruction ratio; The configuration mode of the target library is determined based on at least one of the lock contention frequency, the proportion of atomic instructions, and the proportion of cmpxchg instructions.

9. The method according to any one of claims 1 to 8, characterized in that, The configuration of the target library based on the configuration mode of the target library, so that the target application runs on the platform in the second instruction mode based on the target library, includes: Based on the configuration mode of the target library, a configuration file for the target library is generated, and the configuration file is injected into the transcoding tool so that the transcoding tool transcodes the instructions of the target program into a second instruction mode.

10. A computing device, characterized in that, include: processor; as well as, Memory for stored programs; The program includes instructions that, when executed by a processor, cause the processor to perform the method according to any one of claims 1 to 8.

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