Method for manufacturing package board, package board, and electronic device

CN122094517BActive Publication Date: 2026-10-09SUZHOU GUOXIAN INNOVATION TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202610545461.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-04-23
Publication Date
2026-10-09
Estimated Expiration
2046-04-23

AI Technical Summary

Technical Problem

[0003]玻璃基板最核心的部分是玻璃通孔(Through-Glass Via,简称TGV)的制备,TGV中玻璃与金属铜的热膨胀系数(CTE)差异较大,需要采用低模量有机聚合物作为缓冲层来缓解应力,然而在高纵横比的TGV中,缓冲层的制备存在厚度不均,缺膜,设备负荷大的问题

Benefits of technology

[0020] According to the method for preparing the encapsulation carrier provided in this application, a first buffer layer is prepared on at least two glass substrates respectively, and then the at least two glass substrates are stacked and connected to form a substrate with a high aspect ratio. This reduces the process difficulty of preparing a single glass substrate, for example, by reducing the equipment preparation pressure or shortening the hot pressing time. Furthermore, since the aspect ratio of the through-holes in a single glass substrate is smaller, it is beneficial to improve the thickness uniformity of the first buffer layer prepared on the inner wall of the through-hole, ensuring the quality of the encapsulation carrier.

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Abstract

The application relates to the chip packaging technical field, and provides a preparation method of a packaging board, the packaging board and electronic equipment.The preparation method comprises the following steps: providing at least two glass substrates; preparing a through hole penetrating through the glass substrate on each glass substrate; preparing a first buffer layer on the inner wall of the through hole; and sequentially stacking and connecting the at least two glass substrates, the first buffer layers on the inner walls of the through holes of adjacent glass substrates are connected, and a substrate substrate is formed.The application prepares the first buffer layer on the at least two glass substrates respectively, then stacks and connects the at least two glass substrates to form a substrate substrate with a high depth-diameter ratio, thereby reducing the process preparation difficulty of a single glass substrate, for example, reducing the equipment preparation pressure or shortening the hot-pressing time, and the depth-diameter ratio of the glass through hole of the single glass substrate is smaller, which is favorable for improving the thickness uniformity of the first buffer layer prepared on the inner wall of the through hole and ensuring the quality of the packaging board.
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Description

Technical Field

[0001] This application relates to the field of chip packaging technology, specifically to a method for preparing a packaging substrate, the packaging substrate, and electronic equipment. Background Technology

[0002] With the development of high-performance chips, chip integration is increasing, and interconnect density is becoming increasingly dense. Traditional organic substrates can no longer meet the requirements in terms of flatness, fine circuitry, and signal transmission speed. During the packaging process, glass can withstand higher temperatures better than organic substrates, and its coefficient of thermal expansion is similar to silicon, thus reducing stress warping problems caused by thermal mismatch. Furthermore, the higher flatness and lower roughness of the glass surface allow for denser wiring. Its extremely low dielectric constant and dielectric loss can improve signal transmission speed and signal integrity. Simultaneously, its excellent chemical stability effectively resists environmental corrosion from moisture, acids, and alkalis. With its superior physical, chemical, and electrical properties, glass can replace organic substrates.

[0003] The most critical part of glass substrates is the fabrication of through-glass vias (TGVs). The coefficients of thermal expansion (CTE) of glass and copper in TGVs differ significantly, requiring the use of low-modulus organic polymers as a buffer layer to alleviate stress. However, in high aspect ratio TGVs, the fabrication of the buffer layer suffers from problems such as uneven thickness, missing films, and high equipment load. Summary of the Invention

[0004] In view of this, the present application provides a method for preparing a packaging substrate, as well as the packaging substrate and electronic device, which solves the problems in the prior art.

[0005] In a first aspect, this application provides a method for preparing a packaging substrate, comprising: providing at least two glass substrates; preparing through holes in each glass substrate; preparing a first buffer layer on the inner wall of the through hole; stacking and connecting the at least two glass substrates sequentially, wherein the first buffer layers on the inner walls of the through holes of adjacent glass substrates are connected to form a substrate.

[0006] In some embodiments, before stacking and connecting at least two glass substrates in sequence, the method includes: preparing a second buffer layer on opposite surfaces in the thickness direction of the glass substrates, and connecting the second buffer layer and the first buffer layer.

[0007] In some embodiments, stacking and connecting at least two glass substrates sequentially includes: stacking at least two glass substrates in a preset order, wherein two adjacent glass substrates include a first glass substrate and a second glass substrate, a second buffer layer of the first glass substrate facing the surface of the second glass substrate, and a second buffer layer of the second glass substrate facing the surface of the first glass substrate; and connecting at least two glass substrates using the stacked second buffer layer.

[0008] In some embodiments, after forming a second buffer layer on opposite surfaces in the thickness direction of the glass substrate, the process further includes polishing the second buffer layer.

[0009] In some embodiments, before stacking and connecting at least two glass substrates sequentially, the process includes: using a dry film lamination process to prepare a first buffer layer on the inner wall of a through-hole and a second buffer layer on opposite surfaces in the thickness direction of the glass substrates; the temperature of the dry film lamination process is greater than or equal to 120 degrees Celsius and less than or equal to 220 degrees Celsius; and / or, the pressure of the dry film lamination process is greater than or equal to 0.2 MPa and less than or equal to 0.6 MPa; and / or, the time of the dry film lamination process is less than or equal to 60 seconds.

[0010] In some embodiments, after stacking and connecting at least two glass substrates in sequence, the method further includes: forming a conductive portion within a through-hole of a substrate, with a first buffer layer surrounding the conductive portion; forming a thickened dielectric layer on a second buffer layer on opposite surfaces of the substrate in the thickness direction, with the thickened dielectric layer surrounding the through-hole; forming a redistribution layer on the surface of the thickened dielectric layer, with the redistribution layer and the conductive portion electrically connected.

[0011] In some embodiments, stacking and connecting at least two glass substrates sequentially includes: stacking at least two glass substrates in a preset order; applying a curing adhesive between adjacent glass substrates; and connecting at least two glass substrates using the curing adhesive.

[0012] In some embodiments, in the step of sequentially stacking and connecting at least two glass substrates, a hot pressing process is used to connect the at least two glass substrates; the temperature of the hot pressing process is greater than or equal to 150 degrees Celsius and less than or equal to 200 degrees Celsius; and / or, the pressure of the hot pressing process is greater than or equal to 0.2 MPa and less than or equal to 0.8 MPa; and / or, the time of the hot pressing process is greater than or equal to 30 minutes and less than or equal to 120 minutes.

[0013] Secondly, this application provides a packaging carrier, comprising: a substrate, including at least two stacked and connected glass substrates, wherein the glass substrates are provided with through holes penetrating the glass substrates, and the inner wall of the through holes is provided with a first buffer layer, wherein the first buffer layers of the inner walls of the through holes of adjacent glass substrates are connected.

[0014] In some embodiments, a second buffer layer is provided on the opposite surfaces of the glass substrate in the thickness direction, the second buffer layer surrounding the through hole and connected to the first buffer layer.

[0015] In some embodiments, the second buffer layer and the first buffer layer are integrally formed; and / or, the ratio of the thickness of the glass substrate to the aperture of the through hole is greater than or equal to 1 and less than or equal to 3.

[0016] In some embodiments, when the second buffer layer and the first buffer layer are integrally formed, at least two glass substrates are connected by the second buffer layer located between the glass substrates, and the sum of the thicknesses of the second buffer layers between adjacent glass substrates is greater than or equal to half the thickness of the first buffer layer and less than the thickness of the first buffer layer.

[0017] In some embodiments, a curing adhesive is provided between the second buffer layers of adjacent glass substrates, and at least two glass substrates are connected by the curing adhesive, wherein the thickness of the curing adhesive is greater than or equal to 20 micrometers and less than or equal to 25 micrometers.

[0018] In some embodiments, the package carrier further includes a thickened dielectric layer located on a second buffer layer on opposite surfaces of the substrate in the thickness direction, the thickened dielectric layer surrounding the via; and / or, the package carrier further includes a conductive portion located within the via of the substrate, the conductive portion surrounding the conductive portion; and / or, when the package carrier includes a conductive portion, the package carrier further includes a redistribution layer located on the second buffer layer on opposite surfaces of the substrate in the thickness direction, the redistribution layer being electrically connected to the conductive portion; and / or, the package carrier further includes a seed layer located within the via, the seed layer surrounding the seed layer.

[0019] Thirdly, this application provides an electronic device, including a chip and a packaging substrate according to the second aspect of this application, wherein the chip and the packaging substrate are electrically connected.

[0020] According to the method for preparing the encapsulation carrier provided in this application, a first buffer layer is prepared on at least two glass substrates respectively, and then the at least two glass substrates are stacked and connected to form a substrate with a high aspect ratio. This reduces the process difficulty of preparing a single glass substrate, for example, by reducing the equipment preparation pressure or shortening the hot pressing time. Furthermore, since the aspect ratio of the through-holes in a single glass substrate is smaller, it is beneficial to improve the thickness uniformity of the first buffer layer prepared on the inner wall of the through-hole, ensuring the quality of the encapsulation carrier. Attached Figure Description

[0021] Figure 1 This is a flowchart illustrating the main steps of a method for preparing a packaging carrier plate according to one embodiment of this application.

[0022] Figure 2This is a partial flowchart of the method for preparing a packaging carrier board according to one embodiment of this application. Figure 1 .

[0023] Figure 3 This is a partial flowchart of the method for preparing a packaging carrier board according to one embodiment of this application. Figure 2 .

[0024] Figure 4 This is a partial flowchart of the method for preparing a packaging carrier board according to one embodiment of this application. Figure 3 .

[0025] Figure 5 This is a detailed flowchart of the preparation method of the packaging carrier board according to one embodiment of the present application.

[0026] Figure 6 This is a schematic diagram of the structure of a substrate according to one embodiment of this application.

[0027] Figure 7 This is a schematic diagram of a substrate having a first buffer layer and a second buffer layer according to one embodiment of this application.

[0028] Figure 8 This is a schematic diagram of the structure of a substrate according to one embodiment of this application.

[0029] Figure 9 This is a schematic diagram of a substrate having a seed layer prepared according to one embodiment of this application.

[0030] Figure 10 This is a schematic diagram of a substrate having conductive portions fabricated according to one embodiment of this application.

[0031] Figure 11 This is a schematic diagram of a substrate having a thickened dielectric layer fabricated according to one embodiment of this application.

[0032] Figure 12 This is a schematic diagram of a substrate having a redistribution layer according to one embodiment of this application.

[0033] Figure 13 This is a schematic diagram of the packaging carrier board according to one embodiment of this application.

[0034] Explanation of reference numerals in the attached figures 1. Glass substrate; 11. Through-hole; 2. First buffer layer; 3. Second buffer layer; 100. Substrate; 4. Seed layer; 5. Conductive part; 6. Rewiring layer; 7. Chip; 8. Thickened dielectric layer. Detailed Implementation

[0035] In the field of advanced packaging, to alleviate the thermal stress caused by the mismatch in the coefficients of thermal expansion between glass and metallic copper (filling the glass via) in a glass substrate via (TGV), a low-modulus organic polymer is typically formed on the inner wall of the glass via as a stress buffer layer. Related technologies mainly employ a dip-coating method, utilizing an organic polymer solution to wet and cure the inner wall of the glass via, thereby forming a stress buffer layer between the inner wall of the glass via and the subsequently filled metallic copper.

[0036] However, when the aspect ratio (AR) of the glass via is greater than or equal to 10:1, especially when processing glass substrates with dimensions of 510mm×515mm and above, during the preparation of the stress buffer layer using the dip-coating method, the solvent at the opening of the glass via tends to evaporate preferentially, causing the liquid film to bridge and seal prematurely, preventing the liquid from continuing to flow into the glass via. This results in incomplete or complete coverage of the stress buffer layer on the inner wall of the glass via.

[0037] In-depth analysis revealed that the causes of the aforementioned problems are multifaceted: From a physical mechanism perspective, the effectiveness of surface tension, capillary effect, and viscous flow of the melt all decreases sharply with increasing channel length (i.e., the depth of the glass via), exhibiting an inherent filling limit. From a process control perspective, the forced introduction of ultra-high pressure and ultra-long hot-pressing time to overcome flow resistance and extend solution flow distance directly causes glass substrate warping, increases equipment load, and reduces mass production efficiency. Furthermore, from a structural conformability perspective, single-step molding processes struggle to effectively control film thickness at different depths within deep glass vias, resulting in uneven film thickness.

[0038] In view of this, this application provides a method for fabricating a packaging carrier, comprising: providing at least two substrates; fabricating through-holes in each substrate; fabricating a first buffer layer on the inner wall of the through-hole; and stacking and connecting the at least two substrates sequentially, with the first buffer layers on the inner walls of the through-holes of adjacent substrates connected to form a substrate substrate. Because the method for fabricating the packaging carrier of this application involves fabricating first buffer layers on at least two substrates separately, and then stacking and connecting the at least two substrates to form a substrate substrate with a high aspect ratio, the fabrication difficulty of a single substrate can be reduced, for example, by reducing the fabrication pressure or shortening the hot-pressing time. Furthermore, the smaller aspect ratio of the glass through-holes in a single substrate is beneficial for improving the thickness uniformity of the first buffer layer fabricated within the glass through-hole, ensuring the quality of the packaging carrier.

[0039] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0040] In the accompanying drawings, the dimensions of layers and regions may be exaggerated for clarity. It is understood that when a structure is referred to as being "on" or "below" another structure, the structure may be directly on or below the other structure, or there may be intermediate structures. The same reference numerals always indicate the same structure. Structures referred to herein include any of the following: membrane, element, device, component, assembly.

[0041] When a structure is referred to as being “connected” to another structure, the structure may be directly connected to the other structure or indirectly connected to it by means of one or more intermediate structures placed between them. Furthermore, the terms “first,” “second,” “third,” etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0042] Figure 1 This is a flowchart illustrating the main steps of a method for preparing a packaging carrier plate according to one embodiment of this application. Figure 6 This is a schematic diagram of the structure of a substrate according to one embodiment of this application. Figure 7 This is a schematic diagram of a substrate having a first buffer layer and a second buffer layer according to one embodiment of this application. Figure 8 This is a schematic diagram of the structure of a substrate according to one embodiment of this application.

[0043] like Figure 1 , Figures 6 to 8 As shown, in one aspect, this application discloses a method for preparing a packaging carrier, including the following steps: Step S110: Provide at least two glass substrates 1.

[0044] Step S120: Prepare a through hole 11 through the glass substrate 1 on each glass substrate 1.

[0045] Step S130: Prepare a first buffer layer 2 on the inner wall of the through hole 11.

[0046] Step S140: At least two glass substrates 1 are stacked and connected in sequence, and the first buffer layer 2 of the inner wall of the through hole 11 of adjacent glass substrates 1 is connected to form a substrate 100.

[0047] The method for fabricating the encapsulation substrate according to this application embodiment involves fabricating a first buffer layer 2 on at least two glass substrates 1 respectively, and then stacking and connecting the at least two glass substrates 1 to form a substrate 100 with a high aspect ratio. This reduces the fabrication difficulty of a single glass substrate 1, for example, by reducing the equipment fabrication pressure or shortening the hot pressing time. Furthermore, the aspect ratio of the glass vias 11 on a single glass substrate 1 is smaller, which helps to improve the thickness uniformity of the first buffer layer 2 on the inner wall of the glass via 11, ensuring the quality of the encapsulation substrate.

[0048] like Figure 7 As shown, in some embodiments, before stacking and connecting at least two glass substrates 1 sequentially, the following steps are included: A second buffer layer 3 is prepared on opposite surfaces in the thickness direction of the glass substrate 1, and the second buffer layer 3 is connected to the first buffer layer 2.

[0049] A second buffer layer 3 is further prepared on the opposite surface in the thickness direction of the glass substrate 1. The second buffer layer 3 can further enhance the buffering performance and stability of the substrate 100. At the same time, after the second buffer layer 3 is connected with the first buffer layer 2, a continuous buffer layer can be formed, thereby reducing the stress concentration on the surface of the glass substrate 1 and the inner wall of the through hole 11, improving the mechanical properties of the substrate 100, and enabling it to withstand greater external impacts and vibrations.

[0050] The material of the second buffer layer 3 can be the same as that of the first buffer layer 2. Using the same material for both simplifies the manufacturing process, allowing both layers to be fabricated simultaneously using the same technology, thus improving efficiency. Furthermore, the identical material of the first and second buffer layers (e.g., coefficient of thermal expansion) ensures that during use, when exposed to environmental factors such as temperature changes, the two layers expand or contract synchronously, preventing stress concentration and delamination caused by differences in thermal expansion coefficients. This further enhances the stability and reliability of the substrate 100. The chemical properties of the identical material also contribute to better compatibility with the glass substrate 1 and other packaging materials, reducing chemical reactions and ensuring the long-term performance and lifespan of the packaging substrate.

[0051] Of course, in other embodiments, the materials of the second buffer layer 3 and the first buffer layer 2 may also be different, depending on the specific needs.

[0052] For example, the material of the first buffer layer 2 includes at least one of polyimide, polyolefin, thermoplastic polyurethane elastomer, laminated film and silicone.

[0053] Each of the aforementioned materials has its unique advantages. Polyimide possesses excellent high-temperature resistance, mechanical properties, and chemical stability, maintaining good physical properties even at high temperatures and effectively protecting the internal structure of the encapsulation substrate. Polyolefin materials exhibit good flexibility and chemical corrosion resistance, adapting to various operating environments and reducing the erosion of the encapsulation substrate by external chemicals. Thermoplastic polyurethane elastomers possess excellent elasticity and abrasion resistance, buffering external impacts to a certain extent and protecting the encapsulation substrate from damage. Laminated films offer high insulation performance and wiring density, contributing to improved electrical performance and integration of the encapsulation substrate. Silicone materials offer good water and moisture resistance, preventing moisture from entering the encapsulation substrate and affecting its performance. In practical applications, the appropriate material can be selected to prepare the first buffer layer 2 based on the specific application scenario and performance requirements of the encapsulation substrate. For example, polyimide may be a more ideal choice for encapsulation substrates that need to operate in high-temperature environments; while polyolefins or thermoplastic polyurethane elastomers are more suitable for encapsulation substrates requiring a certain degree of flexibility. At the same time, the above-mentioned materials can be combined as needed to give full play to the advantages of different materials and further improve the performance and reliability of the packaging substrate.

[0054] Specifically, the elastic modulus of the first buffer layer 2 is greater than or equal to 0.01 gigapascals and less than or equal to 3 gigapascals.

[0055] By setting the elastic modulus of the first buffer layer 2 within a specific range, the first buffer layer 2 can effectively buffer external impact forces while maintaining a certain degree of structural stability. Specifically, if the elastic modulus is less than 0.01 gigapascals, the first buffer layer 2 will exhibit low structural stability and be prone to excessive deformation under stress. Conversely, if the elastic modulus is greater than 3 gigapascals, the first buffer layer 2 will exhibit low elastic deformation, resulting in insufficient stress dispersion performance and a risk of damage to the glass substrate 1 due to stress concentration.

[0056] For example, the elastic modulus of the first buffer layer 2 can be 0.01 GPa, 0.1 GPa, 0.5 GPa, 1.0 GPa, 1.5 GPa, 2.0 GPa, 2.5 GPa, 3 GPa, etc., and can be set according to needs. This application embodiment does not limit the specific value.

[0057] Furthermore, the thickness of the first buffer layer 2 is greater than or equal to 1 micrometer and less than or equal to 5 micrometers.

[0058] By setting the thickness of the first buffer layer 2 within a specific range, the buffering performance of the first buffer layer 2 can be guaranteed while ensuring the conductivity of the conductive part 5. Specifically, when the thickness of the first buffer layer 2 is less than 1 micrometer, it indicates that the thickness of the first buffer layer 2 is too small, resulting in insufficient stress dispersion effect. Conversely, when the thickness of the first buffer layer 2 is greater than 5 micrometers, the first buffer layer 2 will occupy too much space on the inner wall of the through hole 11, resulting in a reduction in the space for the conductive part 5 and reducing the electrical connection performance of the packaging substrate.

[0059] For example, the thickness of the first buffer layer 2 can be 1 micrometer, 2 micrometers, 3 micrometers, 4 micrometers, 5 micrometers, etc., and can be set according to specific needs. This application embodiment does not limit the specific thickness.

[0060] The thickness deviation of the first buffer layer 2 at any position on the inner wall of the through-hole 11 is ±5% of the average thickness of the first buffer layer 2. Controlling the thickness deviation of the first buffer layer 2 on the inner wall of the through-hole 11 to ±5% of the average thickness ensures the uniform distribution of the buffer layer throughout the entire inner wall of the through-hole 11. This helps to evenly disperse and absorb energy in various parts when the encapsulation carrier is subjected to external impact, avoiding stress concentration caused by excessively thick or thin local buffer layers, thereby effectively improving the overall impact resistance of the encapsulation carrier.

[0061] Figure 2 This is a partial flowchart of the method for preparing a packaging carrier board according to one embodiment of this application. Figure 1 .like Figure 2 , Figure 8 As shown, in some embodiments, at least two glass substrates 1 are stacked and connected sequentially, including the following steps: Step S210: Stack at least two glass substrates 1 in a preset order. Two adjacent glass substrates 1 include a first glass substrate and a second glass substrate. The first glass substrate is stacked with a second buffer layer 3 facing the surface of the second glass substrate, and the second glass substrate is stacked with a second buffer layer 3 facing the surface of the first glass substrate.

[0062] Step S220: Connect at least two glass substrates 1 using the stacked second buffer layer 3.

[0063] The second buffer layer 3 possesses good flexibility and adhesion, enabling connection between adjacent glass substrates 1 without the need for additional adhesive layers, thus helping to reduce the thickness of the encapsulation carrier. Simultaneously, the second buffer layer 3 also buffers and disperses stress within the substrate 100, thereby enhancing the bonding stability between the glass substrates 1 and ensuring the overall structural integrity of the encapsulation carrier.

[0064] It should be noted that the preset order can be set according to actual needs, and this application embodiment does not limit it.

[0065] For example, the second buffer layer 3 surrounds the through hole 11 and is connected to the first buffer layer 2 on the inner wall of the through hole 11.

[0066] Figure 5 This is a detailed flowchart illustrating the steps of a method for preparing a packaging carrier plate according to one embodiment of this application. Figure 5 As shown, in some embodiments, after the second buffer layer 3 is prepared on the opposing surfaces in the thickness direction of the glass substrate 1, the following steps are further included: Step S540: Polish the second buffer layer 3.

[0067] Polishing can remove burrs, protrusions, etc. on the surface of the second buffer layer 3, making the surface of the second buffer layer 3 smoother and reducing surface roughness. This helps to improve the fit between the stacked glass substrates 1, making the connection between adjacent glass substrates 1 tighter. It can also reduce stress concentration caused by uneven surface, thereby ensuring the stability and reliability of the encapsulation carrier during long-term use.

[0068] In practice, polishing can be performed using various methods, such as mechanical polishing and chemical polishing. Mechanical polishing involves rubbing the surface of the second buffer layer 3 with abrasive materials to remove surface roughness. Chemical polishing, on the other hand, uses chemical reagents to corrode and dissolve the surface of the second buffer layer 3, thereby achieving surface smoothing, such as lightweight plasma polishing. The specific polishing method chosen depends on a comprehensive consideration of factors such as the material properties of the second buffer layer 3, the specific requirements of the encapsulation substrate, and the feasibility of the manufacturing process. After polishing, the second buffer layer 3 can better collaborate with other components during the subsequent encapsulation substrate fabrication process, further improving the overall performance and quality of the encapsulation substrate and meeting the needs of different application scenarios.

[0069] Specifically, the thickness of the second buffer layer 3 after polishing is 90% greater than the thickness of the second buffer layer 3 before polishing.

[0070] This design ensures that while removing surface irregularities and impurities from the second buffer layer 3, its thickness is not excessively reduced, thus maintaining its intended performance. Specifically, if the thickness of the second buffer layer 3 is reduced too much (the thickness of the second buffer layer 3 after polishing is less than or equal to 90% of the thickness of the second buffer layer 3 before polishing), resulting in an excessively thin second buffer layer 3, it will affect the connection stability between the glass substrates 1 and the buffering and stress relief effects, thereby reducing the stability and reliability of the encapsulation carrier.

[0071] To control the thickness of the second buffer layer 3 after polishing within the aforementioned range, it is necessary to monitor the thickness change of the second buffer layer 3 in real time during the polishing process. For example, a high-precision thickness measuring instrument, such as a laser thickness gauge, can be used to measure the thickness of the second buffer layer 3 multiple times at different stages of the polishing process to ensure that the final thickness meets the requirement of being greater than 90% of the thickness of the second buffer layer 3 before polishing.

[0072] For example, the thickness of the second buffer layer 3 after polishing can be 91%, 92%, 93%, 94%, 95%, 96%, 97%, 98%, 99%, etc. of the thickness of the second buffer layer 3 before polishing, and can be set according to needs. This application embodiment does not limit the specific thickness.

[0073] In some embodiments, before stacking and connecting at least two glass substrates 1 sequentially, the process includes: A first buffer layer 2 is prepared on the inner wall of the through hole 11 and a second buffer layer 3 is prepared on the opposite surface in the thickness direction of the glass substrate 1 using a dry film lamination process.

[0074] Thus, the dry film lamination process can simultaneously prepare the first buffer layer 2 and the second buffer layer 3, improving preparation efficiency. Compared to dip coating, the dry film lamination process makes it easier to control the thickness of the first buffer layer 2 and the second buffer layer 3, meaning the thickness of the first buffer layer 2 and the second buffer layer 3 is equal to the initial thickness of the dry film, which helps improve the uniformity of the thickness of the prepared first buffer layer 2 and the second buffer layer 3.

[0075] For example, the temperature of the dry film lamination process is greater than or equal to 120 degrees Celsius and less than or equal to 220 degrees Celsius.

[0076] By controlling the temperature of the dry film lamination process within a specific range, the flowability and stability of the dry film can be better balanced. If the temperature of the dry film lamination process is below 120 degrees Celsius, it will result in an excessively low temperature, making it difficult for the dry film to soften and resulting in poor flowability. Conversely, if the temperature of the dry film lamination process is above 220 degrees Celsius, it will result in an excessively high temperature, causing the dry film to melt excessively and overflow or deform, affecting the preparation quality of the first buffer layer 2 and the second buffer layer 3.

[0077] For example, the temperature of the dry film lamination process can be 120 degrees Celsius, 130 degrees Celsius, 140 degrees Celsius, 150 degrees Celsius, 160 degrees Celsius, 170 degrees Celsius, 180 degrees Celsius, 190 degrees Celsius, 200 degrees Celsius, 210 degrees Celsius, or 220 degrees Celsius, etc., and can be set according to specific needs. This application embodiment does not impose any restrictions.

[0078] In some embodiments, the pressure of the dry film lamination process is greater than or equal to 0.2 MPa and less than or equal to 0.6 MPa.

[0079] By controlling the pressure of the dry film lamination process within a specific range, it is possible to better control the tight bonding between the dry film and the glass substrate 1 without damaging the glass substrate 1. Specifically, if the pressure of the dry film lamination process is less than 0.2 MPa, it will result in insufficient pressure, limiting the tightness of the bonding between the dry film and the inner wall of the through-hole 11 and the surface of the glass substrate 1, potentially creating tiny bonding gaps and affecting the performance of the prepared first buffer layer 2 and second buffer layer 3. Conversely, if the pressure of the dry film lamination process is greater than 0.6 MPa, it will result in excessive pressure, which may damage the glass substrate 1, such as causing microcracks.

[0080] For example, the pressure of the dry film lamination process can be 0.2 MPa, 0.3 MPa, 0.4 MPa, 0.5 MPa, 0.6 MPa, etc., and can be set according to specific needs. This application embodiment does not impose any restrictions.

[0081] Furthermore, the dry film lamination process time can be less than or equal to 60 seconds. By controlling the dry film lamination process time within a specific range, both the quality of the dry film formation and the formation time can be reduced. If the dry film lamination process time exceeds 60 seconds, it will increase the preparation time and affect processing efficiency.

[0082] For example, the dry film lamination process can take 10 seconds, 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, etc., and can be set according to specific needs. This application embodiment does not limit the time.

[0083] The lamination time for dry film needs to be adjusted flexibly based on the specific characteristics of the dry film and process requirements. Generally, for dry films with good flowability, the lamination time can be controlled between 15 and 30 seconds under suitable temperature and pressure conditions. For dry films with slightly poorer flowability, the lamination time may need to be extended to 30 to 60 seconds.

[0084] Figure 4 This is a partial flowchart of the method for preparing a packaging carrier board according to one embodiment of this application. Figure 3 .like Figure 4 As shown, in some embodiments, at least two glass substrates 1 are stacked and connected sequentially, including the following steps: Step S410: Stack at least two glass substrates 1 in a preset order.

[0085] Step S420: Apply curing adhesive between adjacent glass substrates 1.

[0086] Step S430: Connect at least two glass substrates 1 using curing adhesive.

[0087] By applying the curing adhesive between adjacent glass substrates 1, at least two glass substrates 1 can be connected, ensuring the stability of the connection between the glass substrates 1.

[0088] Specifically, the thickness of the cured adhesive is greater than or equal to 10 micrometers and less than or equal to 25 micrometers.

[0089] By setting the thickness of the curing adhesive within a specific range, the stability of the connection between adjacent glass substrates 1 can be ensured while avoiding an increase in the overall thickness of the encapsulation carrier due to excessive curing adhesive thickness. Specifically, if the thickness of the curing adhesive is less than 10 micrometers, it indicates that the thickness is too small, and the curing adhesive may not be able to fully fill the gaps between adjacent glass substrates 1, resulting in a weak connection. During subsequent processing or use, the glass substrates 1 are prone to loosening and separation, affecting the performance and lifespan of the encapsulation carrier. Conversely, if the thickness of the curing adhesive is greater than 25 micrometers, it will not only increase the overall thickness of the encapsulation carrier, which is inconsistent with the development trend of thinner and lighter electronic devices, but may also generate internal stress during the curing process, causing deformation of the glass substrates 1, which will also have an adverse effect on the quality of the encapsulation carrier.

[0090] For example, the thickness of the cured adhesive can be 10 micrometers, 11 micrometers, 12 micrometers, 13 micrometers, 14 micrometers, 15 micrometers, 16 micrometers, 17 micrometers, 18 micrometers, 19 micrometers, 20 micrometers, 21 micrometers, 22 micrometers, 23 micrometers, 24 micrometers, 25 micrometers, etc., and can be designed according to specific needs. This application embodiment does not limit the specific thickness.

[0091] It should be noted that in this embodiment, the connection between the glass substrates 1 can be achieved either by using a second buffer layer 3 prepared between the glass substrates 1 or by using a curing adhesive, depending on the specific requirements. When using a curing adhesive to connect the glass substrates 1, the adhesive can be placed between the second buffer layers 3 of adjacent glass substrates 1, thereby bonding the adjacent second buffer layers 3 together and achieving a connection of at least two glass substrates 1. Alternatively, in a solution without a second buffer layer 3, the adhesive can be directly placed between adjacent glass substrates 1, thereby bonding the adjacent glass substrates 1 together.

[0092] In some embodiments, in the step of stacking and connecting at least two glass substrates 1 sequentially, a hot pressing process is used to connect at least two glass substrates 1.

[0093] During the hot pressing process, by precisely controlling parameters such as temperature, pressure and time, it can be ensured that the cured adhesive or the second buffer layer 3 fully exerts its adhesive effect, enabling a firm and stable connection between the glass substrates 1.

[0094] Specifically, when a second buffer layer 3 is used to connect the glass substrates 1, a hot-pressing process is employed to melt the second buffer layer 3 between the glass substrates 1, and pressure is applied to bond the two together, thereby connecting at least two glass substrates 1. When a curing adhesive is used to connect the glass substrates 1, a hot-pressing process is employed to melt the curing adhesive between the glass substrates 1, and pressure is applied to bond the curing adhesive to the glass substrates 1 (excluding the second buffer layer 3) or the second buffer layer 3, thereby connecting at least two glass substrates 1.

[0095] Specifically, the temperature of the hot pressing process is greater than or equal to 150 degrees Celsius and less than or equal to 200 degrees Celsius.

[0096] By controlling the temperature of the hot-pressing process within a specific range, the flowability and adhesion of the cured adhesive or the second buffer layer 3 can be better balanced. If the temperature of the hot-pressing process is below 150 degrees Celsius, it will result in an excessively low temperature, making it difficult for the cured adhesive or the second buffer layer 3 to soften and resulting in poor adhesion. Conversely, if the temperature of the hot-pressing process is above 200 degrees Celsius, it will result in an excessively high temperature, causing the cured adhesive or the second buffer layer 3 to melt excessively and overflow or deform, affecting the connection stability between the glass substrates 1.

[0097] For example, the temperature of the hot pressing process can be 150 degrees Celsius, 160 degrees Celsius, 170 degrees Celsius, 180 degrees Celsius, 190 degrees Celsius, 200 degrees Celsius, etc., and can be set according to specific needs. This application embodiment does not limit the specific temperature.

[0098] Furthermore, the pressure of the hot pressing process is greater than or equal to 0.2 MPa and less than or equal to 0.8 MPa.

[0099] By controlling the pressure of the hot-pressing process within this specific range, it helps to ensure that the cured adhesive or the second buffer layer 3 is evenly distributed between the glass substrates 1 under pressure, thereby achieving a good bonding effect on the glass substrates 1. If the pressure of the hot-pressing process is lower than 0.2 MPa, the pressure is too low and the cured adhesive or the second buffer layer 3 cannot fully fill the gaps between the glass substrates 1, resulting in weak bonding between the glass substrates 1 and possible separation of the glass substrates 1. On the other hand, if the pressure of the hot-pressing process is higher than 0.8 MPa, the excessive pressure may cause the cured adhesive or the second buffer layer 3 to be over-compressed, which may also cause overflow or deformation, affecting not only the appearance but also the connection stability between the glass substrates 1.

[0100] For example, the pressure of the hot pressing process can be 0.2 MPa, 0.3 MPa, 0.4 MPa, 0.5 MPa, 0.6 MPa, 0.7 MPa, 0.8 MPa, etc. In actual operation, the pressure value can be specifically set according to the specific glass substrate 1 material, curing adhesive or the characteristics of the second buffer layer 3, etc. This application embodiment does not strictly limit this.

[0101] The hot pressing process takes 30 minutes or more and 120 minutes or less.

[0102] If the hot-pressing time is less than 30 minutes, the curing adhesive or the second buffer layer 3 may not cure sufficiently, resulting in insufficient connection strength between the glass substrates 1 and affecting the overall performance of the encapsulation carrier. Conversely, when the hot-pressing time exceeds 120 minutes, it increases energy consumption and production costs, and may also damage the glass substrate 1 material or curing adhesive due to overheating, affecting the quality of the encapsulation carrier. Therefore, this application controls the hot-pressing process time within a specific range to ensure the reliability of the connection between the glass substrates 1 while avoiding damage to the substrate 100.

[0103] For example, for thinner glass substrates 1 and faster-curing adhesives, the hot-pressing time can be relatively shorter, such as 30 to 60 minutes. However, for thicker glass substrates 1 or slower-curing adhesives, the hot-pressing time may need to be extended to 90 to 120 minutes. In practice, the specific hot-pressing time needs to be determined by considering factors such as the thermal stability of the glass substrate 1 material and the curing characteristics of the adhesive. Furthermore, the hot-pressing time is interrelated with pressure and temperature. When the hot-pressing temperature is high or the pressure is high, the hot-pressing time can be appropriately shortened; conversely, if the hot-pressing temperature is low or the pressure is low, the hot-pressing time needs to be appropriately extended to ensure a good encapsulation effect.

[0104] For example, the hot pressing process can be 30 minutes, 40 minutes, 50 minutes, 60 minutes, 70 minutes, 80 minutes, 90 minutes, 100 minutes, 110 minutes, 120 minutes, etc., and can be set according to specific needs. This application embodiment does not limit the time.

[0105] Figure 3 This is a partial flowchart of the method for preparing a packaging carrier board according to one embodiment of this application. Figure 2 Figure 10 is a schematic diagram of a substrate having conductive portions fabricated according to one embodiment of this application. Figure 11 This is a schematic diagram of a substrate with a thickened dielectric layer according to one embodiment of this application. Figure 12 This is a schematic diagram of a substrate having a redistribution layer according to one embodiment of this application. Figure 3 , Figures 10 to 12As shown, in some embodiments, after at least two glass substrates 1 are stacked and connected in sequence, the following steps are further included: Step S310: A conductive portion 5 is formed in the through hole 11 of the substrate 100, and a first buffer layer 2 surrounds the conductive portion 5.

[0106] Step S320: A thickened dielectric layer 8 is prepared on the second buffer layer 3 on the opposite surface of the substrate 100 in the thickness direction, and the thickened dielectric layer 8 surrounds the through hole 11.

[0107] Step S330: A redistribution layer 6 is prepared on the surface of the thickened dielectric layer 8, and the redistribution layer 6 is electrically connected to the conductive part 5.

[0108] The conductive part 5 facilitates the electrical connection between the encapsulation substrate and other components. The thickened dielectric layer 8 is directly prepared on the second buffer layer 3, eliminating the need to separately prepare a laminated film (ABF) or polyimide (PI) on the surface of the substrate 100, reducing process steps and saving material costs and manufacturing processes.

[0109] The material of the thickened dielectric layer 8 can be the same as the dielectric material in the redistribution layer 6, so that the thickened dielectric layer 8 on the surface can serve as the dielectric material of the redistribution layer 6.

[0110] For example, the thickness of the thickened dielectric layer 8 is greater than or equal to 25 micrometers and less than or equal to 30 micrometers. For example, the thickness of the thickened dielectric layer 8 can be 25 micrometers, 26 micrometers, 27 micrometers, 28 micrometers, 29 micrometers, 30 micrometers, etc., and can be set according to specific needs. This application embodiment does not limit the specific thickness.

[0111] For example, rerouting layer 6 includes at least two sub-routing layers to meet multi-layer routing requirements. For instance... Figure 12 As shown, the rerouting layer 6 has two subrouting layers.

[0112] In some embodiments, the coefficient of thermal expansion of the first buffer layer 2 is greater than that of the glass substrate 1 and less than that of the conductive portion 5. That is, the coefficient of thermal expansion of the first buffer layer 2 is between that of the glass substrate 1 and the conductive portion 5, providing good stress buffering during temperature changes. When the temperature rises, the conductive portion 5 expands significantly, and the first buffer layer 2 can expand appropriately to reduce stress between it and the conductive portion 5. Simultaneously, because the expansion of the first buffer layer 2 is less than that of the conductive portion 5, it can restrain excessive expansion of the conductive portion 5. For the glass substrate 1, when the temperature decreases and the glass substrate 1 contracts, the first buffer layer 2 can also adapt well to its contraction, avoiding excessive stress between it and the glass substrate 1. This reasonable setting of the coefficient of thermal expansion effectively improves the stability and reliability of the packaging substrate under different temperature environments, extends its service life, reduces the failure rate caused by temperature changes, and provides strong support for the stable operation of electronic devices.

[0113] The material of the conductive part 5 can be a metal such as copper, aluminum, or silver, depending on the specific needs; this application does not limit the choice. In practical applications, pure copper has excellent conductivity, effectively reducing resistance and power loss. Aluminum has a lower density, is lighter, and has a lower cost, making it a suitable choice for some packaging substrates where weight is a concern. Although aluminum's conductivity is slightly inferior to copper, it can still meet most conductivity requirements through optimized design and processing. Silver has the best conductivity of all metals, but due to its high price, it is usually only used in special packaging substrates with extremely high conductivity requirements. Alternatively, alloy materials, such as copper-aluminum alloys, can be used as the conductive part 5. These combine the advantages of copper and aluminum, offering good conductivity while reducing costs to some extent. Furthermore, the alloy composition ratio can be adjusted according to specific needs to obtain performance more suitable for particular application scenarios.

[0114] Figure 9 This is a schematic diagram of a substrate with a seed layer prepared according to one embodiment of this application. Figure 5 and Figure 9 As shown, in some embodiments, before fabricating the conductive portion 5 within the through-hole 11 of the substrate 100, the following steps are included: Step S550: A seed layer 4 is prepared in the through hole 11 of the substrate 100, and a first buffer layer 2 surrounds the seed layer 4.

[0115] The seed layer 4 enhances the bonding force between the conductive portion 5 and the inner wall of the via 11, preventing the conductive portion 5 from separating from the inner wall of the via 11 during subsequent use, thereby ensuring the stability of the electrical performance of the packaging substrate. Simultaneously, the seed layer 4 provides a good foundation for the growth of the conductive portion 5, enabling it to form uniformly and stably on the inner wall of the via 11, contributing to improved quality and performance. Furthermore, the seed layer 4 can improve the interface characteristics between the conductive portion 5 and the inner wall of the via 11, reducing contact resistance and increasing current transmission efficiency, thereby enhancing the overall electrical performance of the packaging substrate.

[0116] Seed layer 4 can be prepared by chemical plating. When preparing seed layer 4, process parameters such as the composition of the plating solution, temperature, pH value and deposition time must be strictly controlled to ensure that seed layer 4 has uniform thickness, strong adhesion and good conductivity.

[0117] The material for seed layer 4 can be selected based on the specific requirements and application scenarios of the packaging substrate. Common seed layer 4 materials include at least one metal such as copper, nickel, and titanium. When selecting a seed layer 4 material, factors such as material cost, ease of fabrication, and compatibility with other process steps also need to be considered.

[0118] For example, to improve the adhesion between the first buffer layer 2 and the seed layer 4, the first buffer layer 2 can be treated with plasma or surface activation processes, thereby enhancing the adhesion between the first buffer layer 2 and the seed layer 4 and reducing the risk of seed layer 4 peeling off. The thickness of the seed layer 4 remains the same as when the first buffer layer 2 is not provided.

[0119] In some embodiments, step S120 includes: A laser-induced wet etching process is used to prepare through-holes 11 on each glass substrate 1.

[0120] Laser-induced wet etching has many advantages. It can precisely control the size and shape of the via 11, ensuring the accuracy and consistency of the via 11, and meeting the requirements of the packaging substrate for small size and high precision.

[0121] Before performing laser-induced wet etching, the glass substrate 1 needs to be surface treated to remove impurities and oxide layers on the surface in order to improve the etching effect and the adhesion between the seed layer 4 and the glass substrate 1.

[0122] During the etching process, the laser parameters, such as power, frequency, and pulse width, must be precisely adjusted according to the material of the glass substrate 1 and the specifications of the required vias 11. Appropriate laser parameters ensure efficient and stable etching, avoiding over-etching or under-etching. Simultaneously, the composition and concentration of the chemical solution used in wet etching must be strictly controlled. Different glass substrate materials may require different chemical solution formulations to achieve the best etching results.

[0123] Specifically, each glass substrate 1 has multiple through holes 11, which can be arranged in a matrix. The specific number can be set as needed, and this application embodiment does not limit it.

[0124] The thickness of the glass substrate 1 is greater than or equal to 50 micrometers and less than or equal to 200 micrometers.

[0125] By setting the thickness of the glass substrate 1 within a specific range, the glass substrate 1 can possess sufficient strength and rigidity while also reducing the manufacturing difficulty of the first buffer layer 2 on the inner wall of the through-hole 11. Specifically, if the thickness of the glass substrate 1 is less than 50 micrometers, it indicates that the thickness of the glass substrate 1 is too small, resulting in insufficient strength and rigidity, and making it prone to bending and deformation during subsequent processing. Conversely, if the thickness of the glass substrate 1 is greater than 200 micrometers, it indicates that the thickness of the glass substrate 1 is too large, leading to an excessively large aspect ratio of the through-hole 11, increasing the manufacturing difficulty of the first buffer layer 2.

[0126] For example, the thickness of the glass substrate 1 can be 50 micrometers, 60 micrometers, 70 micrometers, 80 micrometers, 90 micrometers, 100 micrometers, 110 micrometers, 120 micrometers, 130 micrometers, 140 micrometers, 150 micrometers, 160 micrometers, 170 micrometers, 180 micrometers, 190 micrometers, 200 micrometers, etc., and can be set according to specific needs. This application embodiment does not limit the specific thickness.

[0127] To ensure that the thickness of glass substrate 1 meets specific requirements, high-precision processing techniques and rigorous quality inspection methods are necessary during its fabrication. During the glass substrate 1 forming process, parameters such as raw material usage, pressing pressure, and temperature must be precisely controlled to guarantee the uniformity and accuracy of the glass substrate 1's thickness. After the glass substrate 1 is fabricated, its thickness must be inspected piece by piece using specialized measuring equipment. Glass substrates that do not meet the thickness requirements must be adjusted or discarded promptly to prevent them from entering the subsequent encapsulation carrier fabrication process.

[0128] Specifically, the aperture of through hole 11 is greater than or equal to 20 micrometers and less than or equal to 80 micrometers.

[0129] Setting the aperture of the through-hole 11 within a specific range facilitates the fabrication of the first buffer layer 2, seed layer 4, and conductive portion 5 inside the through-hole 11, while also ensuring that the fabrication of the through-hole 11 does not affect the strength and rigidity of the glass substrate 1. Specifically, if the aperture of the through-hole 11 is less than 20 micrometers, it indicates that the aperture of the through-hole 11 is too small, which increases the difficulty of fabricating the first buffer layer 2, seed layer 4, and conductive portion 5 inside the through-hole 11, and the space for setting the conductive portion 5 is limited, affecting the electrical connection performance of the glass substrate 1. Conversely, if the aperture of the through-hole 11 is greater than 80 micrometers, it indicates that the aperture of the through-hole 11 is too large, resulting in the through-hole 11 occupying too large a proportion of the glass substrate 1, affecting the strength and rigidity of the glass substrate 1.

[0130] For example, the aperture of the through hole 11 can be 20 micrometers, 30 micrometers, 40 micrometers, 50 micrometers, 60 micrometers, 70 micrometers, 80 micrometers, etc., and can be set according to specific needs. This application embodiment does not limit the aperture.

[0131] It should be noted here that the aperture of the through hole 11 refers to the maximum size of the opening of the through hole 11 on the surface of the glass substrate 1. For example, if the through hole 11 is a circular hole, then the aperture of the through hole 11 is the diameter of the circular hole. If the through hole 11 is a square hole, then the aperture of the through hole 11 is the length of one side of the opening of the through hole 11 on the surface of the glass substrate 1. If the through hole 11 is an irregularly shaped hole, then the aperture of the through hole 11 is the maximum size of the opening of the irregularly shaped hole on the surface of the glass substrate 1.

[0132] Specifically, the ratio of the thickness of the glass substrate 1 to the aperture of the through hole 11 is greater than or equal to 1 and less than or equal to 3.

[0133] By controlling the ratio of the thickness of the glass substrate 1 to the aperture of the through-hole 11 within a specific range, the aspect ratio (the ratio of the depth to the diameter of the through-hole 11) is kept within a reasonable range. This allows the dry film to adhere well to the inner wall of the through-hole 11, preventing premature sealing of the through-hole 11 opening and ensuring the uniformity of the thickness of the first buffer layer 2. Specifically, if the ratio of the thickness of the glass substrate 1 to the aperture of the through-hole 11 is less than 1, the glass substrate 1 will suffer from insufficient strength and rigidity due to the presence of the through-hole 11. Conversely, if the ratio of the thickness of the glass substrate 1 to the aperture of the through-hole 11 is greater than 3, the aspect ratio of the through-hole 11 will be too large, making it prone to premature sealing of the through-hole 11 opening. Furthermore, an excessively large aspect ratio will increase the difficulty of fabricating the first buffer layer 2, the seed layer 4, and the conductive portion 5 on the inner wall of the through-hole 11.

[0134] For example, the ratio of the thickness of the glass substrate 1 to the aperture of the through hole 11 can be 1, 1.5, 2, 2.5, 3, etc., and can be set according to specific needs. This application embodiment does not limit the specific ratio.

[0135] It should be noted that the ratio of the thickness of the formed substrate 100 to the aperture of the via 11 is specifically related to the number of glass substrates 1. For example, the total thickness of the formed substrate 100 is approximately equal to the number of glass substrates 1 multiplied by the thickness of the glass substrates 1, plus (the number of glass substrates 1 - 1) multiplied by the thickness of the second buffer layer of a single glass substrate. For example, the ratio of the thickness of the formed substrate 100 to the aperture of the via 11 can be equal to the ratio of the thickness of the glass substrate 1 to the aperture of the via 11 multiplied by the number of glass substrates. For example, when there are 3 glass substrates, the ratio of the thickness of the formed substrate 100 to the aperture of the via 11 is greater than or equal to 3 and less than or equal to 9, for example, it can be 3, 4, 5, 6, 7, 8, 9, etc.

[0136] In some embodiments, after forming a through-hole 11 through the glass substrate 1 on each glass substrate 1, the process includes cleaning the glass substrate 1.

[0137] After completing the laser-induced wet etching, the glass substrate 1 needs to be cleaned to remove the residue and chemical solution residue generated during the etching process, so as to ensure the cleanliness of the inside of the through hole 11.

[0138] Specifically, such as Figure 5 As shown, cleaning the glass substrate 1 includes the following steps: Step S510, cleaning the glass substrate 1 with deionized water.

[0139] Deionized water can effectively remove impurities and residual chemicals from the surface of the glass substrate 1 and the inside of the through-hole 11, ensuring the quality of subsequent processes.

[0140] Meanwhile, to improve the cleaning effect, ultrasonic cleaning technology can be combined to further remove contaminants from tiny pores by utilizing the high-frequency vibrations generated by ultrasonic waves.

[0141] Of course, in other embodiments, the glass substrate 1 can also be cleaned by blowing, and is not limited to the cleaning method described above.

[0142] Furthermore, after step S510, the process includes drying the glass substrate 1. Drying the glass substrate 1 prevents moisture residue on its surface, thereby ensuring the smooth progress of subsequent processes.

[0143] In the embodiments of this application, such as Figure 5 As shown, drying the glass substrate 1 includes the following steps: Step S520, using a drying process to dry the glass substrate 1.

[0144] The drying process effectively removes residual moisture from the surface of the glass substrate 1 and the inside of the through-holes 11, ensuring the glass substrate 1 remains dry in subsequent processes. By controlling the drying temperature and time, the drying effect can be further improved while avoiding thermal damage to the glass substrate 1 material.

[0145] Specifically, the drying process temperature is greater than or equal to 100 degrees Celsius and less than or equal to 120 degrees Celsius. Setting the drying process temperature within this specific range allows for rapid drying of the glass substrate 1 while preventing damage from excessively high drying temperatures. Specifically, if the drying process temperature is less than 100 degrees Celsius, the drying temperature is too low, resulting in excessively long drying times and affecting production efficiency. Conversely, if the drying process temperature is greater than 120 degrees Celsius, the drying temperature is too high, which can easily damage the glass substrate 1 and affect the quality of the encapsulation carrier fabrication.

[0146] For example, the drying process temperature can be 100 degrees Celsius, 105 degrees Celsius, 110 degrees Celsius, 115 degrees Celsius, 120 degrees Celsius, etc., and can be set according to specific needs. This application embodiment does not limit the specific temperature.

[0147] The number of glass substrates 1 can be 3 to 5. For example, the number of glass substrates 1 can be 3, depending on the specific needs. This application does not limit the number of glass substrates 1.

[0148] To facilitate understanding of the preparation methods in the embodiments of this application, the appendix to the specification is now provided. Figure 1 To be continued Figure 11 The preparation process is described below: Step S110: Provide at least two glass substrates 1. Step S110: Prepare through-holes 11 in each glass substrate 1. Specifically, laser-induced wet etching can be used to create the through-holes 11 in the glass substrate 1. Step S510: Clean the glass substrate 1 with deionized water. Step S520: Dry the glass substrate 1 using a drying process. The drying temperature is greater than or equal to 100 degrees Celsius and less than or equal to 120 degrees Celsius. Step S530: Use a dry film lamination process to prepare a first buffer layer 2 on the inner wall of the through-hole 11 and a second buffer layer 3 on the opposite surface of the glass substrate 1, with the second buffer layer 3 connected to the first buffer layer 2. The dry film lamination process temperature is greater than or equal to 120 degrees Celsius and less than or equal to 220 degrees Celsius, the dry film lamination process pressure is greater than or equal to 0.2 MPa and less than or equal to 0.6 MPa, and the dry film lamination process time can be less than or equal to 60 seconds. Step S540: Polish the second buffer layer 3. Step S140: Stack and connect at least two glass substrates 1 in a preset order, connecting the first buffer layers 2 on the inner walls of the through holes 11 of adjacent glass substrates 1 to form a substrate 100. Specifically, stack at least two glass substrates 1 in a preset order, with one glass substrate 1 facing the second buffer layer 3 on the surface of the other glass substrate 1, and the other glass substrate 1 facing the second buffer layer 3 on the surface of one glass substrate 1. Use a hot-pressing process to melt the stacked second buffer layers 3, connecting at least two glass substrates 1 and connecting the first buffer layers 2 of adjacent glass substrates 1 to form the substrate 100. The temperature of the hot-pressing process is greater than or equal to 150 degrees Celsius and less than or equal to 200 degrees Celsius, the pressure of the hot-pressing process is greater than or equal to 0.2 MPa and less than or equal to 0.8 MPa, and the time of the hot-pressing process is greater than or equal to 30 minutes and less than or equal to 120 minutes. Step S550: A seed layer 4 is formed within the via 11 of the substrate 100, and a first buffer layer 2 surrounds the seed layer 4. Step S310: A conductive portion 5 is formed within the via 11 of the substrate 100, and the first buffer layer 2 surrounds the conductive portion 5. Step S320: A redistribution layer 6 is formed on the second buffer layer 3 on the opposite surface of the substrate 100 in the thickness direction, and the redistribution layer 6 is electrically connected to the conductive portion 5.

[0149] Of course, in the above steps, a curing adhesive can also be placed between the stacked glass substrates 1 (the curing adhesive is located between the stacked second buffer layers 3), and the curing adhesive can be melted and cured using a hot pressing process to connect at least two glass substrates 1.

[0150] On the other hand, this application also provides a packaging carrier, including a substrate 100. The substrate 100 includes at least two stacked and connected glass substrates 1. The glass substrates 1 are provided with through holes 11 penetrating the glass substrates 1. The inner wall of the through holes 11 is provided with a first buffer layer 2. The first buffer layers 2 of the inner walls of the through holes 11 of adjacent glass substrates 1 are connected.

[0151] The packaging substrate provided in this application has the same technical features as the preparation method provided in this application. Therefore, the packaging substrate in this application has the same technical effects as the preparation method in this application. For details, please refer to the above description, which will not be repeated here.

[0152] Specifically, the packaging substrate of the embodiments of this application can be prepared using the preparation method of the embodiments of this application.

[0153] For example, a second buffer layer 3 is provided on the opposite surface of the glass substrate 1 in the thickness direction. The second buffer layer 3 surrounds the through hole 11 and is connected to the first buffer layer 2.

[0154] For example, the second buffer layer 3 and the first buffer layer 2 are integrally formed, and the two can be made of the same or different materials.

[0155] For example, the ratio of the thickness of the glass substrate 1 to the aperture of the through hole 11 is greater than or equal to 1 and less than or equal to 3. For example, the ratio of the thickness of the glass substrate 1 to the aperture of the through hole 11 can be 1, 2, 3, etc.

[0156] For example, when the second buffer layer 3 and the first buffer layer 2 are integrally formed, at least two glass substrates 1 are connected by the second buffer layer 3 located between the glass substrates 1. The sum of the thicknesses of the second buffer layers 3 between adjacent glass substrates 1 is greater than or equal to half the thickness of the first buffer layer 2, and less than the thickness of the first buffer layer 2. For example, the sum of the thicknesses of the second buffer layers 3 between adjacent glass substrates 1 can be equal to half the thickness of the first buffer layer 2 or the thickness of the first buffer layer 2.

[0157] For example, a curing adhesive is provided between the second buffer layers 3 of adjacent glass substrates 1, and at least two glass substrates 1 are connected by the curing adhesive. The thickness of the curing adhesive is greater than or equal to 20 micrometers and less than or equal to 25 micrometers. For example, the thickness of the curing adhesive can be 20 micrometers, 21 micrometers, 22 micrometers, 23 micrometers, 24 micrometers, 25 micrometers, etc.

[0158] For example, the packaging substrate further includes a thickened dielectric layer 8, which is located on the second buffer layer 3 on the opposite surface of the substrate 100 in the thickness direction, and surrounds the through hole 11.

[0159] For example, the packaging carrier also includes a conductive portion 5, which is located within a through hole 11 of the substrate 100, and a first buffer layer 2 surrounds the conductive portion 5.

[0160] For example, when the packaging carrier includes the conductive portion 5, the packaging carrier also includes a redistribution layer 6, which is located on the second buffer layer 3 on the opposite surface of the substrate 100 in the thickness direction, and the redistribution layer 6 is electrically connected to the conductive portion 5.

[0161] For example, the packaging substrate further includes a seed layer 4 located within the through-hole 11, and a first buffer layer 2 surrounding the seed layer 4. Specifically, the seed layer 4 surrounds the conductive portion 5.

[0162] In another aspect, embodiments of this application also provide an electronic device, including a chip 7 and a packaging substrate provided in embodiments of this application, wherein the chip 7 and the packaging substrate are electrically connected.

[0163] Since the electronic device provided in this application includes the packaging substrate provided in this application, the electronic device in this application has the same technical effect as the packaging substrate in this application. For details, please refer to the above description, which will not be repeated here.

[0164] Figure 13 This is a schematic diagram of the structure of an electronic device according to one embodiment of this application. Figure 13 As shown, chip 7 can be encapsulated on the surface of the encapsulation carrier. Alternatively, it can be encapsulated inside the encapsulation carrier, i.e., by creating a slot inside the substrate 100 and encapsulating chip 7 within the slot. Of course, when multiple chips 7 exist, some chips 7 can be encapsulated on the surface of the encapsulation carrier, and some chips 7 can be encapsulated inside the encapsulation carrier. The specific configuration depends on the needs and is not limited in this embodiment.

[0165] The following explanation uses the example of chip 7 being packaged on the surface of the packaging substrate. Figure 13 As shown, a chip 7 can be disposed on the surface of the redistribution layer 6 away from the substrate 100 on at least one side of the opposite sides of the substrate 100, and the chip 7 and the redistribution layer 6 can be connected by a plurality of solder balls.

[0166] For example, the electronic device may specifically include a display panel, a smartwatch, a mobile phone, etc., and the specific configuration is as needed. The implementation method of this application is not limited to these.

[0167] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0168] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A method for preparing a packaging carrier, characterized in that, include: Provide at least two glass substrates; A through-hole is formed in each of the glass substrates; A first buffer layer is prepared on the inner wall of the through hole; At least two glass substrates are stacked and connected in sequence, and the first buffer layer of the inner wall of the through hole of adjacent glass substrates is connected to form a substrate. Before stacking and connecting at least two of the glass substrates in sequence, the process includes: A second buffer layer is prepared on the opposite surface in the thickness direction of the glass substrate. The end of the second buffer layer away from the first buffer layer extends to the edge of the glass substrate. The second buffer layer surrounds the through hole and is connected to the first buffer layer on the inner wall of the through hole to form a continuous buffer layer. After stacking and connecting at least two of the glass substrates in sequence, the method further includes: A conductive portion is formed within the through-hole of the substrate, and the first buffer layer surrounds the conductive portion.

2. The method for preparing the encapsulation carrier according to claim 1, characterized in that, The step of stacking and connecting at least two glass substrates sequentially includes: At least two glass substrates are stacked in a preset order, and two adjacent glass substrates include a first glass substrate and a second glass substrate, wherein the first glass substrate is stacked with the second buffer layer facing the surface of the second glass substrate and the second glass substrate is stacked with the second buffer layer facing the surface of the first glass substrate. At least two glass substrates are connected using the stacked second buffer layer.

3. The method for preparing the encapsulation carrier according to claim 1, characterized in that, After the second buffer layer is prepared on the opposing surfaces in the thickness direction of the glass substrate, the method further includes: The second buffer layer is polished.

4. The method for preparing the encapsulation carrier according to claim 1, characterized in that, Before stacking and connecting at least two of the glass substrates in sequence, the process includes: A dry film lamination process is used to prepare the first buffer layer on the inner wall of the through hole and the second buffer layer on the opposite surface in the thickness direction of the glass substrate. The temperature of the dry film lamination process is greater than or equal to 120 degrees Celsius and less than or equal to 220 degrees Celsius; and / or the pressure of the dry film lamination process is greater than or equal to 0.2 MPa and less than or equal to 0.6 MPa; and / or the time of the dry film lamination process is less than or equal to 60 seconds.

5. The method for preparing the encapsulation carrier according to claim 4, characterized in that, After stacking and connecting at least two of the glass substrates in sequence, the method further includes: A thickened dielectric layer is formed on the second buffer layer on opposite surfaces in the thickness direction of the substrate, the thickened dielectric layer surrounding the via; A redistribution layer is prepared on the surface of the thickened dielectric layer, and the redistribution layer is electrically connected to the conductive portion.

6. The method for preparing the encapsulation carrier according to claim 1, characterized in that, Before fabricating the conductive portion within the through-hole in the substrate, the method includes the following steps: A seed layer is prepared within the via of the substrate, and a first buffer layer surrounds the seed layer.

7. The method for preparing the encapsulation carrier according to claim 1, characterized in that, The step of stacking and connecting at least two glass substrates sequentially includes: At least two of the glass substrates are stacked in a predetermined order; A curing adhesive is disposed between adjacent glass substrates; At least two glass substrates are connected using the cured adhesive.

8. The method for preparing the encapsulation carrier according to claim 2 or 7, characterized in that, In the step of stacking and connecting at least two glass substrates in sequence, a hot pressing process is used to connect at least two glass substrates. The temperature of the hot pressing process is greater than or equal to 150 degrees Celsius and less than or equal to 200 degrees Celsius. And / or, the pressure of the hot pressing process is greater than or equal to 0.2 MPa and less than or equal to 0.8 MPa; and / or, the time of the hot pressing process is greater than or equal to 30 minutes and less than or equal to 120 minutes.

9. The method for preparing the encapsulation carrier according to any one of claims 1 to 7, characterized in that, The second buffer layer and the first buffer layer are made of the same material and are integrally formed.

10. A packaging carrier board, characterized in that, include: The substrate includes at least two stacked and connected glass substrates, wherein the glass substrates are provided with through holes penetrating the glass substrates, and the inner wall of the through holes is provided with a first buffer layer, and the first buffer layers of the inner walls of the through holes of adjacent glass substrates are connected. A second buffer layer is provided on the opposite surface in the thickness direction of the glass substrate. The end of the second buffer layer away from the first buffer layer extends to the edge of the glass substrate. The second buffer layer surrounds the through hole and is connected to the first buffer layer on the inner wall of the through hole to form a continuous buffer layer. The packaging carrier also includes a conductive portion located within a through-hole in the substrate, and the first buffer layer surrounds the conductive portion.

11. The packaging carrier board according to claim 10, characterized in that, The second buffer layer and the first buffer layer are integrally formed; And / or, The ratio of the thickness of the glass substrate to the diameter of the through hole is greater than or equal to 1 and less than or equal to 3.

12. The packaging carrier board according to claim 11, characterized in that, When the second buffer layer and the first buffer layer are integrally formed, at least two glass substrates are connected by the second buffer layer located between the glass substrates. The sum of the thicknesses of the second buffer layers between adjacent glass substrates is greater than or equal to half the thickness of the first buffer layer and less than the thickness of the first buffer layer.

13. The packaging carrier board according to claim 10, characterized in that, A curing adhesive is provided between the second buffer layers of adjacent glass substrates, and at least two glass substrates are connected by the curing adhesive, wherein the thickness of the curing adhesive is greater than or equal to 20 micrometers and less than or equal to 25 micrometers.

14. The packaging carrier board according to claim 10, characterized in that, It also includes a thickened dielectric layer, which is located on the second buffer layer on the opposite surface of the substrate in the thickness direction, and the thickened dielectric layer surrounds the via. And / or, When the packaging carrier includes the conductive portion, the packaging carrier further includes a redistribution layer, which is located on the second buffer layer on the opposite surface of the substrate in the thickness direction, and the redistribution layer is electrically connected to the conductive portion. And / or, The packaging carrier also includes a seed layer located within the through-hole, and the first buffer layer surrounds the seed layer.

15. An electronic device, characterized in that, include: chip; The packaging substrate according to any one of claims 10 to 14, wherein the chip and the packaging substrate are electrically connected.

Citation Information

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