Rotation factor storage method, reading method and hardware accelerator for fft operation

By storing the sine or cosine components of the twitch factor in a semi-table and introducing step size parameters and sign correction, the problems of large storage overhead and complexity of multi-point support in FFT twitch factor storage schemes are solved, realizing low-cost, accurate twitch factor reading and hardware accelerator design.

CN122111347BActive Publication Date: 2026-08-04JINGYIN ELECTRONIC TECH (SHANGHAI) CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
JINGYIN ELECTRONIC TECH (SHANGHAI) CO LTD
Filing Date
2026-04-29
Publication Date
2026-08-04

AI Technical Summary

Technical Problem

Existing FFT twiddle factor storage solutions suffer from high storage overhead, require multiple tables to support multiple points, and lack a unified access mechanism, resulting in complex hardware control.

Method used

A semi-table storage method is adopted, which uses the symmetry of trigonometric functions to store the sine or cosine components of the rotation factor. By mapping the index through the step size parameter and introducing folding judgment and sign correction, a single rotation factor storage table is constructed, which supports multi-point FFT operations.

Benefits of technology

It significantly reduces storage resource consumption, simplifies system design, lowers storage costs, and ensures the accuracy of rotation factor reading and calculation precision, making it suitable for resource-constrained SoC designs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122111347B_ABST
    Figure CN122111347B_ABST
Patent Text Reader

Abstract

This invention relates to a method for storing and retrieving rotation factors for FFT operations, as well as a hardware accelerator. The hardware accelerator includes: a rotation factor memory for storing the sine or cosine components of the original rotation factor data; an index calculation unit for mapping the original rotation factor index to a lookup index in the rotation factor storage table and calculating the sine and cosine component indices; a folding judgment unit for determining whether the sine and cosine component indices exceed the index range of the rotation factor storage table; a data reading unit for retrieving the imaginary and real part values ​​from the rotation factor storage table; and a sign correction unit for correcting the sign bits of the imaginary and real part values ​​to obtain the real and imaginary parts of the rotation factor. This invention reduces the storage resource consumption of the rotation factor, achieves compatibility of a single rotation factor table for FFTs with different point counts, provides high data retrieval accuracy, and has low hardware overhead.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention belongs to the field of digital signal processing hardware acceleration technology, specifically relating to a method for storing and reading rotation factors for FFT operations, as well as a hardware accelerator. Background Technology

[0002] The Fast Fourier Transform (FFT) is a core algorithm in digital signal processing, widely used in communications, image processing, radar, and other fields. The twiddle factor is a key parameter in the FFT algorithm, defined as W_N^k = cos(2πk / N) - j·sin(2πk / N), where k is the twiddle factor index and N is the number of FFT points. For an N-point FFT, traditional twiddle factor storage schemes require storing N real values, with storage requirements increasing linearly with the number of points. For example, a 1024-point FFT requires storing 1024 single-precision floating-point numbers, approximately 4KB of storage space.

[0003] However, as the number of FFT points increases, storage requirements become a limiting factor. Existing rotation factor storage schemes have the following shortcomings: First, excessive storage overhead. Traditional schemes store complete cosine and sinine values, resulting in high on-chip storage resource consumption, which is detrimental to low-cost SoC design. Second, multiple tables are needed to support multiple points. When the system needs to support multiple point counts, a separate rotation factor table needs to be stored for each type of point, multiplying the total storage requirements. Third, a lack of a unified access mechanism. Different operation modes use different methods for calculating the rotation factor index; existing designs lack a unified abstraction, leading to complex hardware control.

[0004] Therefore, how to achieve a rotation factor storage system with low storage overhead, support for multiple points, and simple hardware implementation has become an urgent problem to be solved. Summary of the Invention

[0005] To address the aforementioned problems in the prior art, this invention provides a method for storing and retrieving rotation factors for FFT operations, as well as a hardware accelerator. The technical problem to be solved by this invention is achieved through the following technical solution: The first embodiment of the present invention provides a method for storing rotation factors for FFT operations, comprising: The original data of the rotation factor corresponding to the preset number of points is obtained by using the Fast Fourier Transform of multiple point values; The sine or cosine components in the original data of the rotation factor are stored to construct a rotation factor storage table.

[0006] In one embodiment of the present invention, the preset number of points is the maximum number of points; The sine component includes imaginary negative values, and the cosine component includes real positive values.

[0007] A second embodiment of the present invention provides a method for reading twiddle factors for FFT operations. The method is executed by a twiddle factor storage table constructed using the storage method described in the above embodiments, and includes the following steps: Based on the step size parameter, the original index of the rotation factor of the current fast Fourier transform is mapped to the lookup index of the rotation factor storage table, and the sine component index and cosine component index are calculated using the lookup index. Determine whether the sine component index and the cosine component index exceed the index range of the rotation factor storage table, and obtain the sine component folded index, the sine component overflow flag, the cosine component folded index, and the cosine component overflow flag. The imaginary part and real part readout values ​​are obtained from the rotation factor storage table according to the sine component folding index and the cosine component folding index, respectively. The sign of the imaginary part readout is corrected according to the sine component overflow flag, and the sign of the real part readout is corrected according to the cosine component overflow flag, thus obtaining the real and imaginary parts of the twitch factor.

[0008] In one embodiment of the present invention, mapping the original index of the rotation factor of the current Fast Fourier Transform to the lookup index of the rotation factor storage table according to the step size parameter includes: The step size is determined by the ratio of the preset number of points in the rotation factor storage table to the current number of operation points of the fast Fourier transform. The step size parameter is the logarithmic value of the step size to the base 2. The original index of the rotation factor is shifted left by the step size parameter bit to achieve step size scaling, thus obtaining the lookup table index.

[0009] In one embodiment of the present invention, when the rotation factor storage table stores sine components, the sine component index is the lookup table index; the cosine component index is the lookup table index offset by one-quarter of the maximum number of points in the rotation factor storage table. When the rotation factor storage table stores cosine components, the cosine component index is the lookup table index; the sine component index is the lookup table index offset by one-quarter of the maximum number of points in the rotation factor storage table.

[0010] In one embodiment of the present invention, when it is determined that the sine component index is less than half of the maximum number of points in the rotation factor storage table, the sine component folding index is the sine component index, and the sine component overflow flag is a first value. When it is determined that the sine component index is greater than or equal to half of the maximum number of points in the rotation factor storage table, the sine component folding index is the sine component index minus 1 / 2 of the maximum number of points, and the sine component overflow flag is the second value. When it is determined that the cosine component index is less than half of the maximum number of points in the rotation factor storage table, the cosine component folding index is the cosine component index, and the cosine component overflow flag is the first value. When it is determined that the cosine component index is greater than or equal to half of the maximum number of points in the rotation factor storage table, the cosine component folding index is the cosine component index minus 1 / 2 of the maximum number of points, and the cosine component overflow flag is the second value.

[0011] In one embodiment of the present invention, for a rotation factor storage table storing sine components, when the sine component overflow flag is a first value, the imaginary part readout value is used as the imaginary part of the rotation factor; when the sine component overflow flag is a second value, the sign bit of the imaginary part readout value is inverted and used as the imaginary part of the rotation factor; when the cosine component overflow flag is a first value, the sign bit of the real part readout value is inverted and used as the real part of the rotation factor; when the cosine component overflow flag is a second value, the real part readout value is used as the real part of the rotation factor. For the rotation factor storage table storing the cosine component, when the sine component overflow flag is a first value, the imaginary part read value is used as the imaginary part of the rotation factor; when the sine component overflow flag is a second value, the sign bit of the imaginary part read value is inverted and used as the imaginary part of the rotation factor; when the cosine component overflow flag is a first value, the real part read value is used as the real part of the rotation factor; when the cosine component overflow flag is a second value, the sign bit of the real part read value is inverted and used as the real part of the rotation factor.

[0012] In one embodiment of the present invention, the step further includes: In inverse transform mode, the imaginary part of the twitch factor is inverted by taking the sign bit and used as the conjugate imaginary part of the twitch factor, while the real part of the twitch factor remains unchanged.

[0013] A third embodiment of the present invention provides a hardware accelerator for FFT operations, comprising: Rotation factor memory is used to store the sine or cosine components in the original data of rotation factor corresponding to a preset number of points to form a rotation factor storage table. The index calculation unit is used to map the original index of the rotation factor of the current fast Fourier transform to the lookup index of the rotation factor storage table according to the step size parameter, and to calculate the sine component index and cosine component index using the lookup index. The folding judgment unit is used to determine whether the sine component index and the cosine component index exceed the index range of the rotation factor storage table, and to obtain the sine component folding index, the sine component overflow flag, the cosine component folding index, and the cosine component overflow flag. The data reading unit is used to obtain the imaginary part readout value and the real part readout value from the rotation factor storage table according to the sine component folding index and the cosine component folding index, respectively. The sign correction unit is used to correct the sign of the imaginary part readout value according to the sine component overflow flag and to correct the sign of the real part readout value according to the cosine component overflow flag, so as to obtain the real and imaginary parts of the rotation factor.

[0014] In one embodiment of the present invention, the sign correction unit is further configured to, in inverse transformation mode, invert the sign bit of the imaginary part of the rotation factor and use it as the conjugate imaginary part of the rotation factor, while the real part of the rotation factor remains unchanged.

[0015] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. In the rotation factor storage method of the present invention, the symmetry of trigonometric functions is utilized to construct a rotation factor storage table by storing the sine or cosine components in the original rotation factor data, which significantly reduces the storage resource occupation of the rotation factor, thereby reducing the chip area and power consumption, and is suitable for resource-constrained SoC design. 2. In the rotation factor reading method of the present invention, by introducing a step size parameter to map the original index of the current fast Fourier transform to a lookup table index, the compatibility of a single rotation factor table with different number of points for FFT is realized, avoiding the need to store multiple sets of tables for each number of points, simplifying system design and reducing storage costs. 3. In the rotation factor reading method of the present invention, by generating sine component folding index and overflow flag, cosine component folding index and overflow flag, and combining sign bit correction logic, the accuracy of rotation factor reading under any index is guaranteed, so that half table reading and full table reading have equivalent calculation accuracy, which meets the needs of high-performance digital signal processing. 4. In the hardware accelerator of the present invention, the folding judgment unit can be implemented by a comparator and a subtractor, and the sign correction unit can be implemented by an XOR gate. The index folding and sign correction are implemented by simple logic units, the hardware implementation overhead is minimal, and it is easy to integrate into the hardware accelerator, which further improves the practicality and scalability of the hardware accelerator. Attached Figure Description

[0016] Figure 1 A flowchart illustrating the rotation factor reading method for FFT operations provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a hardware accelerator for FFT operations provided in an embodiment of the present invention. Detailed Implementation

[0017] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto. Example 1

[0018] This embodiment provides a method for storing rotation factors in FFT operations, including: Step 101: Obtain the original data of the rotation factor corresponding to the preset number of points based on the Fast Fourier Transform of multiple point values.

[0019] Specifically, multi-point Fast Fourier Transform (FFT) refers to the hardware accelerator's need to simultaneously support FFT operations with multiple different point counts. The preset point count refers to the maximum number of points the hardware accelerator needs to implement for the FFT operation, corresponding to the maximum FFT point count in the twiddle factor storage table, denoted as N_max. The preset point count is a power of 2 and a common multiple of all the point counts to be supported. For example, if the hardware accelerator needs to simultaneously support FFTs of different scales such as 64 points, 128 points, 256 points, 512 points, and 1024 points, then the preset point count is 1024 points.

[0020] Based on a preset number of points, obtain the corresponding original data of the rotation factor, including the sin value of the sine component and the cos value of the cosine component.

[0021] Step 102: Store the sine or cosine components in the original data of the rotation factor to construct the rotation factor storage table.

[0022] Specifically, the rotation factor storage table uses a half-table storage method. Leveraging the symmetry of trigonometric functions, it can choose to store either the sine or cosine components from the original rotation factor data. The sine component can be a negative imaginary part, i.e., -sin(2πk / N_max) value; the cosine component can be a positive real part, i.e., cos(2πk / N_max) value. Therefore, the rotation factor storage table only stores N / 2 -sin(2πk / N_max) values ​​or N / 2 cos(2πk / N_max) values.

[0023] Taking the storage of sine components as an example, the rotation factor storage table Table[k] = -sin(2πk / N_max), where k = 0, 1, ..., N_max / 2-1, with a total of N_max / 2 real values. It can be understood that the sine components of the original rotation factor data are stored in address order, with addresses 0 to N_max / 2-1 corresponding to -sin(0) to -sin(2π×(N_max / 2-1) / N_max). When N_max = 1024, only 512 -sin values ​​are stored, with a storage capacity of 2KB, which is 50% lower than the traditional full-table storage (1024 values, 4KB), as shown in Table 1. Table 1 is a comparison table between the half-table storage provided in this embodiment and the traditional full-table storage.

[0024] Table 1

[0025] Similarly, when storing the cosine components, the rotation factor storage table Table[k] = cos(2πk / N_max).

[0026] This embodiment preferably stores the sine component because it has a direct correspondence with the imaginary part of the twitch factor, and the inverse transform conjugate processing is simpler. At the same time, the data path is more direct in RFFT post-processing and RIFFT pre-processing. Example 2

[0027] This embodiment provides a method for reading twitch factors for FFT operations, which is executed based on the twitch factor storage table constructed by the storage method in Embodiment 1.

[0028] Please see Figure 1 , Figure 1 This is a flowchart illustrating a method for reading rotation factors in FFT operations according to an embodiment of the present invention. It includes the following steps: Step 201: Map the original index of the rotation factor of the current fast Fourier transform to the lookup index of the rotation factor storage table according to the step size parameter, and use the lookup index to calculate the sine component index and cosine component index.

[0029] Specifically, the original index is the rotation factor index that is naturally generated in the small-point FFT butterfly operation, ranging from 0 to N_cur / 2–1; the lookup index is the lookup address in the large-point rotation factor table, ranging from 0 to N_max / 2-1.

[0030] The process of mapping from the original index to a lookup index is as follows: First, the step size `step` is determined based on the ratio of the preset number of points `N_max` in the rotation factor storage table to the current number of operation points `N_cur` in the Fast Fourier Transform, i.e., `step = N_max / N_cur`. Then, the step size parameter `tw_step` is determined based on the operational relationship between `step` and `tw_step`. The operational relationship is: the step size equals the result of the operation with base 2 and the step size parameter as the exponent, i.e., `step = 2^{tw_step}`. Therefore, the step size parameter is the base-2 logarithmic value of the step size, `tw_step = log2(step)`. For example, when `N_max = 1024` and `N_cur = 256`, `step = 4` and `tw_step = 2`.

[0031] Then, shift the original index k of the rotation factor to the left by the step parameter tw_step, which is equivalent to multiplying the original index k by the step step to achieve step scaling, and obtain the lookup table index k_scaled = k << tw_step. Since the step step is a power of 2, the left shift operation is implemented by a barrel shifter in hardware without a multiplier. Please refer to Table 2, which is a schematic table for implementing multi-point compatibility with configurable step lengths based on the 1024-point rotation factor storage table provided by the embodiment of the present invention.

[0032] Table 2

[0033] In this embodiment, the access interval is controlled by the step parameter tw_step to achieve multi-point compatibility with configurable step lengths. The principle is as follows: The large-point rotation factor storage table is a superset of the small-point one, W_N^k = W_{2N}^{2k}, that is, the k-th item of the N-point table is equal to the 2k-th item of the 2N-point table. Therefore, the rotation factor table with the maximum number of points can be used to support all small-point FFTs. When the system needs to perform a small-point FFT, the equivalent small-point rotation factor is obtained by sampling at intervals from the large table through the step parameter tw_step, and the index of the small-point FFT is mapped to the correct position in the large-point rotation factor table, so as to achieve a single rotation factor storage table supporting multiple-point FFTs.

[0034] The single rotation factor storage table of this embodiment supports multiple numbers of points. The 1024-point table can support five numbers of points, namely 64, 128, 256, 512, and 1024, and the total storage is reduced from 20KB (independent storage) to 2KB.

[0035] Next, the lookup table index k_scaled is processed in two paths to calculate the sine component index and the cosine component index.

[0036] Specifically, when the rotation factor storage table stores the sine component, the sine component index is the lookup table index, that is, sin_idx_raw = k_scaled; according to the trigonometric identity cos(θ) = -sin(θ + π / 2), that is, the expected value of Table[k + N / 2] is equal to -Table[k], and the cosine component index can be obtained by offsetting the lookup table index by one-fourth of the maximum number of points in the rotation factor storage table: cos_idx_raw = k_scaled + N_max / 4.

[0037] When the rotation factor storage table stores the cosine component, the cosine component index is the table lookup index, i.e., cos_idx_raw = k_scaled; according to the trigonometric identity -sin(θ) = cos(θ + π / 2), the sine component index is obtained by offsetting the table lookup index by one-fourth of the maximum number of points in the rotation factor storage table: sin_idx_raw = k_scaled + N_max / 4.

[0038] Furthermore, the addition operation of offsetting the table lookup index by one-fourth of the maximum number of points is implemented by an adder in hardware.

[0039] Step 202, determine whether the sine component index and the cosine component index exceed the index range of the rotation factor storage table, to obtain the sine component folding index, the sine component overflow flag, the cosine component folding index, and the cosine component overflow flag.

[0040] The index range of the rotation factor storage table is from 0 to N_max / 2 - 1 (i.e., the half-table range). In this step, the range judgments are respectively made on the sine component index sin_idx_raw and the cosine component index cos_idx_raw.

[0041] For the sine component: When it is judged that the sine component index sin_idx_raw is less than half of the maximum number of points N_max / 2 in the rotation factor storage table, at this time the sine component index is within the range of the rotation factor storage table, the sine component folding index sin_idx is the sine component index sin_idx_raw, and the sine component overflow flag sin_overflow is the first value; when it is judged that the sine component index sin_idx_raw is greater than or equal to half of the maximum number of points N_max / 2 in the rotation factor storage table, at this time the sine component index exceeds the range of the rotation factor storage table, the sine component folding index sin_idx is the sine component index sin_idx_raw minus 1 / 2 of the maximum number of points, and the sine component overflow flag sin_overflow is the second value. The expression is: if sin_idx_raw < N_max / 2, then sin_idx = sin_idx_raw, sin_overflow = 0; if sin_idx_raw ≥ N_max / 2, then sin_idx = sin_idx_raw - N_max / 2, sin_overflow = 1.

[0042] For the cosine component: When it is determined that the cosine component index cos_idx_raw is less than half of the maximum number of points N_max / 2 in the rotation factor storage table, at this time the cosine component index is within the range of the rotation factor storage table, the cosine component folding index cos_idx is the cosine component index cos_idx_raw, and the cosine component overflow flag cos_overflow is the first value; when it is determined that the cosine component index cos_idx_raw is greater than or equal to half of the maximum number of points N_max / 2 in the rotation factor storage table, at this time the cosine component index exceeds the range of the rotation factor storage table, the cosine component folding index cos_idx is the cosine component index cos_idx_raw minus half of the maximum number of points, and the cosine component overflow flag cos_overflow is the second value. The expression is: if cos_idx_raw < N_max / 2, then cos_idx = cos_idx_raw, cos_overflow = 0; if cos_idx_raw ≥ N_max / 2, then cos_idx = cos_idx_raw - N_max / 2, cos_overflow = 1.

[0043] In this embodiment, the overflow flag (overflow) is a 1-bit binary signal, where 0 indicates no overflow and 1 indicates overflow. In hardware, a comparator is used to determine whether there is an overflow. In essence, it is an unsigned integer comparator with a comparison bit width of log2(N_max) bits; since N / 2 is a power of 2, the comparison operation can be simplified to checking whether a specific high bit is 1. A subtractor is used to calculate the folded index, and its bit width is also log2(N_max) bits; since N / 2 is a power of 2, the subtraction operation can be simplified to clearing the corresponding high bit.

[0044] Step 203, respectively obtain the imaginary part readout value and the real part readout value from the rotation factor storage table according to the sine component folding index and the cosine component folding index.

[0045] Specifically, taking the rotation factor storage table for storing the sine component as an example, the sine component folding index sin_idx and the cosine component folding index cos_idx are used as addresses. Table[sin_idx] = -sin(2π·sin_idx / N) is read from the rotation factor storage table as the imaginary part read value raw_sin, and Table[cos_idx] = -sin(2π·cos_idx / N) = -sin(2π(k+N / 4) / N) = -cos(2πk / N) as the real part read value raw_cos. Both the imaginary and real part read values ​​are 32-bit IEEE-754 single-precision floating-point values. The physical capacity of the rotation factor storage table is N_max / 2 32-bit words. In the RTL implementation, the reading of the imaginary and real part read values ​​is completed serially over two clock cycles via the AHB bus (reading the imaginary part first, then the real part).

[0046] When the rotation factor storage table stores the cosine component, the real part read value raw_cos is: Table[cos_idx]=cos(2π·cos_idx / N); according to the trigonometric identity -sin(θ)=cos(θ+π / 2), the imaginary part read value raw_sin is: Table[sin_idx]=cos(2π·sin_idx / N)=cos(2π(k+N / 4) / N)=-sin(2πk / N).

[0047] Step 204: Correct the sign of the imaginary part reading based on the sine component overflow flag, and correct the sign of the real part reading based on the cosine component overflow flag, to obtain the real and imaginary parts of the rotation factor.

[0048] Specifically, the sign of the read value is corrected according to the overflow flag to generate the final twitch factor component.

[0049] When the twitch factor storage table stores the sine component: When the sinusoidal overflow flag sin_overflow is at its first value, the imaginary part readout value is used as the imaginary part W_im of the twitch factor, meaning the imaginary part readout value is directly used as W_im. When the sinusoidal overflow flag sin_overflow is at its second value, the sign bit of the imaginary part readout value is inverted and used as the imaginary part W_im of the twitch factor, meaning the inverse of the imaginary part readout value is used as W_im. The expressions are: sin_overflow=0: W_im=raw_sin=Table[sin_idx]=-sin(2π·sin_idx / N); sin_overflow=1: W_im= raw_sin_inverted=-Table[sin_idx]=sin(2π·sin_idx / N).

[0050] When the cosine overflow flag cos_overflow is at its first value, since cos(θ) = -sin(θ + π / 2), the sign bit of the real part readout value raw_cos is inverted and used as the real part W_re of the rotation factor. When the cosine overflow flag cos_overflow is at its second value, the folding inversion and cos inversion cancel each other out, and the real part readout value raw_cos is used as the imaginary part W_re of the rotation factor. The expressions are: cos_overflow = 0: W_re = raw_cos inverted = -Table[cos_idx] = sin(2π·cos_idx / N) = cos(2πk / N); cos_overflow = 1: W_re = raw_cos inverted and then inverted again = Table[cos_idx] = -sin(2π·cos_idx / N).

[0051] Similarly, when the twitch factor storage table stores the cosine components: For the sinusoidal component, sin_overflow=0: W_im=raw_sin=Table[sin_idx]= cos(2π·sin_idx / N); sin_overflow=1: W_im=raw_sin with sign bit inverted=-Table[sin_idx]=-cos(2π·sin_idx / N).

[0052] For the cosine component, cos_overflow=0: W_re=raw_cos=Table[cos_idx]= cos(2π·cos_idx / N); cos_overflow=1: W_re=raw_cos sign bit inverted=-Table[cos_idx]=-cos(2π·cos_idx / N).

[0053] The hardware implementation of sign correction is an XOR gate, which performs an XOR operation on the highest bit (sign bit, bit

[31] ) of the 32-bit representation of the floating-point number with the overflow flag. The XOR gate only processes the sign bit and requires only 1 bit width. For the sine path, the sign bit of W_im = the imaginary part read value XORsin_overflow; for the cosine path, the sign bit of W_re = the real part read value XOR(NOTcos_overflow). When the XOR result is 1, the sign bit is flipped to achieve the opposite number.

[0054] In this embodiment, the total hardware overhead of half-table folding and sign correction is approximately: 2 comparators (one each for sin and cos), 2 subtractors, and 2 XOR gates, which is extremely low.

[0055] Based on the above method for reading the rotation factor, this implementation is further illustrated by the following numerical example. The rotation factor storage table stores the sine components. Taking a large table of N_max=1024 supporting an N_cur=256-point FFT as an example, tw_step=2, step=4.

[0056] Example 1: Original index k=0.

[0057] Step 201, step scaling: k_scaled=0<<2=0, sin_idx_raw=0, cos_idx_raw=0+256=256; Step 202, folding judgment: sin_idx_raw=0 (<512), no folding is needed, then sin_overflow=0, sin_idx=0; cos_idx_raw=256 (<512), no folding is needed, then cos_overflow=0, cos_idx=256.

[0058] Step 203, data read out: raw_sin=Table[0], raw_cos=Table

[256] .

[0059] Step 204, symbol correction: W_im=Table[0], W_re=-Table

[256] .

[0060] Example 2: Original index k=10.

[0061] Step 201, step scaling: k_scaled=10<<2=40, sin_idx_raw=40, cos_idx_raw=40+256=296; Step 202, folding judgment: sin_idx_raw=40 (<512), no folding is needed, then sin_overflow=0, sin_idx=40; cos_idx_raw=40+256=296 (<512), no folding is needed, then cos_overflow=0, cos_idx=296.

[0062] Step 203, data read out: raw_sin=Table

[40] , raw_cos=Table

[296] .

[0063] Step 204, symbol correction: W_im=Table

[40] , W_re=-Table

[296] .

[0064] Example 3: Original index k=100.

[0065] Step 201, step scaling: k_scaled=100<<2=400, sin_idx_raw=400, cos_idx_raw=400+256=656; Step 202, Folding judgment: sin_idx_raw = 400 (< 512), no folding is needed, so sin_overflow = 0, sin_idx = 400; cos_idx_raw = 400 + 256 = 656 (≥ 512), folding is needed, so cos_overflow = 1, cos_idx = 656 - 512 = 144; Step 203, data reading: raw_sin=Table

[400] , raw_cos=Table

[144] ; Step 204, sign correction: W_im=raw_sin, W_re=raw_cos (because cos_overflow=1, the inversion of the fold and the inherent inversion of the cos recovery cancel each other out).

[0066] Example 4: Original index k=256.

[0067] Step 201, step scaling: k_scaled=256<<2=1024, sin_idx_raw=1024, cos_idx_raw=1024+256=1280; Step 202, Folding judgment: sin_idx_raw = 1024 (≥512), folding is required, so sin_overflow = 1, sin_idx = 1024 - 512 = 512; cos_idx_raw = 1024 + 256 = 1280 (≥512), folding is required, so cos_overflow = 1, cos_idx = 1280 - 512 = 768; Step 203, data reading: raw_sin=Table

[512] , raw_cos=Table

[768] ; Step 204, sign correction: W_im = -raw_sin, W_re = raw_cos (because cos_overflow = 1, the inversion of the fold and the inherent inversion of the cos recovery cancel each other out).

[0068] This embodiment obtains the exact same rotation factor value as the full table storage through precise index calculation and sign correction. Actual measurements show that the loop closure error of the 1024-point FFT forward and inverse transformations is less than 0.0001, demonstrating high computational accuracy.

[0069] In one specific embodiment, after obtaining the real and imaginary parts of the rotation factor through sign correction, the method further includes the step of: in the inverse transform mode, performing sign bit inversion on the imaginary part of the rotation factor to obtain the conjugate imaginary part of the rotation factor, while keeping the real part of the rotation factor unchanged.

[0070] Specifically, for CIFFT (Inverse Complex FFT) and RIFFT (Inverse Real FFT) modes, the conjugate of the twiddle factor, conj(W), is required: conj(W) = cos(θ) + j·sin(θ). Therefore, based on step 204, this step inverts W_im again: W_im_iff = -W_im, while W_re remains unchanged, thus outputting W_re and W_im_iff for use by the computation unit. The hardware implementation involves flipping the imaginary sign bit again using an XOR gate. Example 3

[0071] Based on Embodiment 1 and Embodiment 2, this embodiment also provides a hardware accelerator for FFT operations.

[0072] Please see Figure 2 , Figure 2 This is a schematic diagram of a hardware accelerator for FFT operations provided in an embodiment of the present invention. The hardware accelerator includes: The rotation factor memory stores the sine or cosine components of the original rotation factor data corresponding to a preset number of points to form a rotation factor storage table. This memory is a single-port or dual-port RAM with a capacity of N_max / 2 32-bit floating-point values, stored sequentially by address.

[0073] The index calculation unit, connected to the rotation factor memory, is used to map the original index k of the rotation factor of the current Fast Fourier Transform to a lookup index of the rotation factor memory table based on the step size parameter tw_step, and to calculate the sine component index sin_idx_raw and the cosine component index cos_idx_raw using the lookup index. This unit includes a barrel shifter (for left shifting tw_step bits) and an adder (for adding N_max / 4).

[0074] The folding judgment unit, connected to the index calculation unit, is used to determine whether the sine component index sin_idx_raw and the cosine component index cos_idx_raw exceed the index range of the rotation factor storage table, and obtains the folded index sin_idx of the sine component, the sine component overflow flag sin_overflow, the folded index cos_idx of the cosine component, and the cosine component overflow flag cos_overflow. This unit includes a comparator and a subtractor. The comparator determines whether it is ≥ N_max / 2, and the subtractor calculates the folded index when overflow occurs.

[0075] The data reading unit, connected to the folding judgment unit and the rotation factor memory, is used to obtain the imaginary part readout value raw_sin and the real part readout value raw_cos from the rotation factor storage table according to the sine component folding index sin_idx and the cosine component folding index cos_idx, respectively.

[0076] The sign correction unit, connected to the data reading unit and the folding judgment unit, is used to correct the sign bit of the imaginary part readout value raw_sin according to the sine component overflow flag sin_overflow, and to correct the sign bit of the real part readout value raw_cos according to the cosine component overflow flag cos_overflow, to obtain the real part W_re and the imaginary part W_im of the twitch factor. This unit includes an XOR gate for selectively flipping the sign bit.

[0077] Optionally, the sign correction unit is also used to, in the inverse transform mode, invert the sign bit of the imaginary part of the twitch factor and use it as the conjugate imaginary part of the twitch factor, while the real part of the twitch factor remains unchanged.

[0078] In this embodiment, the entire hardware accelerator adopts a pipelined design. Steps such as index calculation, folding judgment, memory reading, and sign correction can be executed in parallel or pipelined. Each clock cycle can output a twitch factor pair, meeting the requirements of high-speed FFT operations. For the specific execution steps of each unit and the beneficial effects achieved, please refer to Embodiments 1 and 2, which will not be repeated in this embodiment.

[0079] In the hardware accelerator of this embodiment, the folding judgment unit can be implemented by a comparator and a subtractor, and the sign correction unit can be implemented by an XOR gate. The index folding and sign correction are implemented by simple logic units, with minimal hardware implementation overhead, making it easy to integrate into the hardware accelerator and further improving the practicality and scalability of the hardware accelerator.

[0080] This invention achieves a rotation factor storage and access scheme with low storage overhead, multi-point compatibility, and simple hardware implementation through mechanisms such as half-table storage, index folding and sign correction, and configurable step size. It is particularly suitable for FFT hardware accelerator design in SoC.

[0081] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for reading rotation factors in FFT operations, characterized in that, The reading method is executed based on a rotation factor storage table constructed using a rotation factor storage method for FFT operations; The storage method includes: obtaining the original data of the rotation factor corresponding to a preset number of points based on the Fast Fourier Transform of multiple point numbers; storing the sine component or cosine component in the original data of the rotation factor to construct a rotation factor storage table; wherein, the preset number of points is the maximum number of points; the sine component includes imaginary negative data, and the cosine component includes real positive data. The reading method includes the following steps: Based on the step size parameter, the original index of the rotation factor of the current fast Fourier transform is mapped to the lookup index of the rotation factor storage table, and the sine component index and cosine component index are calculated using the lookup index. Determine whether the sine component index and the cosine component index exceed the index range of the rotation factor storage table to obtain the sine component folded index, the sine component overflow flag, the cosine component folded index, and the cosine component overflow flag; the sine component folded index is the sine component index or the sine component index minus 1 / 2 of the maximum number of points in the rotation factor storage table, and the sine component overflow flag is a first value or a second value; the cosine component folded index is the cosine component index or the cosine component index minus 1 / 2 of the maximum number of points, and the cosine component overflow flag is a first value or a second value; The imaginary part and real part readout values ​​are obtained from the rotation factor storage table according to the sine component folding index and the cosine component folding index, respectively. The sign of the imaginary part readout is corrected according to the sine component overflow flag, and the sign of the real part readout is corrected according to the cosine component overflow flag, thus obtaining the real and imaginary parts of the twitch factor.

2. The method for reading rotation factors for FFT operations according to claim 1, characterized in that, Mapping the original index of the current Fast Fourier Transform twitch factor to the lookup index of the twitch factor storage table based on the step size parameter includes: The step size is determined by the ratio of the preset number of points in the rotation factor storage table to the current number of operation points of the fast Fourier transform. The step size parameter is the logarithmic value of the step size to the base 2. The original index of the rotation factor is shifted left by the step size parameter bit to achieve step size scaling, thus obtaining the lookup table index.

3. The method for reading rotation factors for FFT operations according to claim 1, characterized in that, When the rotation factor storage table stores the sine component, the sine component index is the lookup table index; the cosine component index is the lookup table index offset by one-quarter of the maximum number of points in the rotation factor storage table. When the rotation factor storage table stores cosine components, the cosine component index is the lookup table index; The sine component index is one-quarter of the maximum number of points in the rotation factor storage table, which is offset from the lookup table index.

4. The method for reading rotation factors for FFT operations according to claim 1, characterized in that, When it is determined that the sine component index is less than half of the maximum number of points in the rotation factor storage table, the sine component folding index is the sine component index, and the sine component overflow flag is the first value; When it is determined that the sine component index is greater than or equal to half of the maximum number of points in the rotation factor storage table, the sine component folding index is the sine component index minus 1 / 2 of the maximum number of points, and the sine component overflow flag is the second value. When it is determined that the cosine component index is less than half of the maximum number of points in the rotation factor storage table, the cosine component folding index is the cosine component index, and the cosine component overflow flag is the first value. When it is determined that the cosine component index is greater than or equal to half of the maximum number of points in the rotation factor storage table, the cosine component folding index is the cosine component index minus 1 / 2 of the maximum number of points, and the cosine component overflow flag is the second value.

5. The method for reading rotation factors for FFT operations according to claim 1, characterized in that, For a rotation factor storage table storing sine components, when the overflow flag of the sine component is a first value, the imaginary part read value is used as the imaginary part of the rotation factor; When the sine component overflow flag is the second value, the sign bit of the read value of the imaginary part is inverted and used as the imaginary part of the rotation factor; When the cosine component overflow flag is the first value, the sign bit of the real part read value is inverted and used as the real part of the rotation factor; When the cosine component overflow flag is the second value, the real part readout value is used as the real part of the rotation factor; For the rotation factor storage table storing the cosine component, when the overflow flag of the sine component is a first value, the imaginary part read value is used as the imaginary part of the rotation factor; When the sine component overflow flag is the second value, the sign bit of the read value of the imaginary part is inverted and used as the imaginary part of the rotation factor; When the cosine component overflow flag is a first value, the real part readout value is used as the real part of the rotation factor; When the cosine component overflow flag is the second value, the sign bit of the real part readout value is inverted and used as the real part of the rotation factor.

6. The method for reading rotation factors for FFT operations according to claim 1, characterized in that, It also includes the following steps: In inverse transform mode, the imaginary part of the twitch factor is inverted by taking the sign bit and used as the conjugate imaginary part of the twitch factor, while the real part of the twitch factor remains unchanged.

7. A hardware accelerator for FFT operations, characterized in that, include: A rotation factor memory is used to store the sine or cosine components of the original rotation factor data corresponding to a preset number of points to form a rotation factor storage table; wherein, the preset number of points is the maximum number of points; the sine component includes imaginary negative data, and the cosine component includes real positive data. The index calculation unit is used to map the original index of the rotation factor of the current fast Fourier transform to the lookup index of the rotation factor storage table according to the step size parameter, and to calculate the sine component index and cosine component index using the lookup index. The folding judgment unit is used to determine whether the sine component index and the cosine component index exceed the index range of the rotation factor storage table, and to obtain the sine component folding index, the sine component overflow flag, the cosine component folding index, and the cosine component overflow flag; the sine component folding index is the sine component index or the sine component index minus 1 / 2 of the maximum number of points in the rotation factor storage table, and the sine component overflow flag is a first value or a second value; the cosine component folding index is the cosine component index or the cosine component index minus 1 / 2 of the maximum number of points, and the cosine component overflow flag is a first value or a second value; The data reading unit is used to obtain the imaginary part readout value and the real part readout value from the rotation factor storage table according to the sine component folding index and the cosine component folding index, respectively. The sign correction unit is used to correct the sign of the imaginary part readout value according to the sine component overflow flag and to correct the sign of the real part readout value according to the cosine component overflow flag, so as to obtain the real and imaginary parts of the rotation factor.

8. The hardware accelerator for FFT operations according to claim 7, characterized in that, The sign correction unit is further configured to, in inverse transform mode, invert the sign bit of the imaginary part of the rotation factor and use it as the conjugate imaginary part of the rotation factor, while the real part of the rotation factor remains unchanged.