An adaptive microphone signal processing circuit and a microphone

Abstract

The application discloses a kind of adaptive microphone signal processing circuit and microphone, wherein, circuit includes signal input and primary conditioning unit, signal synthesis and conversion unit, power monitoring unit and signal output unit;In input stage, weak differential signal of microphone enters signal input and primary conditioning unit, after high common-mode rejection amplification and direct current bias stabilization, output high-quality differential signal;In conversion stage: signal synthesis and conversion unit converts differential signal into single-ended signal and amplifies, generates main audio output;In protection stage: power monitoring unit real-time monitoring power state, enable signal is exported through hysteresis comparator, ensure that system only works when power is stable;In expansion stage, signal output unit provides main / auxiliary output interface and partition power supply, signal output demand and system reliability are considered. The technical scheme provided by the application can realize high-performance, high-flexibility and robust microphone signal processing in single-chip or compact module.

Description

Technical Field

[0001] This invention relates to the field of wired and wireless microphone technology, and in particular to an adaptive microphone signal processing circuit and microphone. Background Technology

[0002] With the widespread adoption of voice interaction, remote conferencing, high-definition recording, and smart IoT devices, microphones, as crucial acoustic sensors, directly determine the clarity, fidelity, and user experience of the final audio through their signal processing quality. However, in converting the raw electrical signal output from the microphone into a high-quality analog signal suitable for subsequent digital system processing, traditional or existing amplifier circuits face a series of interconnected and difficult-to-completely-solve technical challenges and performance bottlenecks:

[0003] 1) The contradiction between weak signal acquisition and signal-to-noise ratio in high-noise environments:

[0004] Microphones, especially ECMs, output signals with extremely small amplitudes (typically in the millivolt or even microvolt range). Existing amplifier solutions, while amplifying these weak signals, often amplify common-mode noise from the environment (such as power supply ripple, RF interference, and line hum). Many simple amplifiers use single-ended input structures, which are inherently inadequate in suppressing this type of common-mode interference. This leads to a sharp deterioration in the output signal-to-noise ratio in complex electromagnetic environments or long-distance cabling applications, causing speech to be drowned out by background noise.

[0005] 2) The conflict between signal dynamic range and gain flexibility:

[0006] In real-world applications, sound pressure levels vary widely, from whispers to shouts, requiring preamplifiers to have a wide dynamic range. Fixed-gain amplifiers struggle to achieve this balance: high gain leads to saturation and clipping distortion of strong signals; low gain results in insufficient amplification and loss of detail for weak signals. While adjustable-gain amplifiers exist, their adjustment is often achieved by modifying a single feedback network. This can introduce impedance mismatch, affect circuit stability or bandwidth, and offers limited adjustment precision and linearity, making it difficult to achieve stepless fine control or multi-scenario adaptation.

[0007] 3) The complexity of the environmental noise spectrum and the limitations of fixed filter bandwidth:

[0008] The noise components captured by microphones are complex, including low-frequency wind noise and equipment vibration, as well as high-frequency switching power supply noise and digital circuit radiation. Existing circuits often use fixed-parameter filter networks (such as fixed RC low-pass filters) to limit bandwidth. However, this "one-size-fits-all" approach cannot adapt to diverse application requirements: it may cause high-frequency loss when wideband music recording is needed, while it cannot adequately filter out out-of-band noise when only voice calls are required. The lack of a flexible and adjustable bandwidth control mechanism limits the circuit's versatility and optimization potential across different products.

[0009] 4) Insufficient integration in multi-microphone applications:

[0010] In advanced applications such as noise-canceling headphones and beamforming arrays, it is often necessary to process multiple microphone signals simultaneously. Existing solutions mostly use multiple independent amplifier chips, which increases system power consumption, cost, and PCB area, and makes it difficult to guarantee performance consistency between channels. Solutions that integrate multiple amplifiers often have shortcomings in terms of channel isolation and independent configuration flexibility, making it difficult to meet the stringent requirements of synchronization and consistency for high-performance array processing.

[0011] 5) Challenges in power supply rejection and bias stability:

[0012] Portable devices typically use switching power supplies or batteries, which are prone to voltage fluctuations and noise. When the amplifier's power supply rejection ratio is insufficient, these fluctuations can directly couple into the audio signal, producing an audible buzzing sound. Furthermore, directly coupled amplifier circuits require precise management of the DC bias. Even a small drift in the bias voltage, after being amplified through multiple stages, can cause the output level to deviate significantly from the ideal operating point, or even trigger saturation in subsequent circuits, rendering the system malfunction.

[0013] In summary, existing microphone preamplifier technologies often struggle to simultaneously achieve key performance indicators such as high common-mode rejection, wide dynamic range gain adjustment, flexible bandwidth control, high integration, and high power supply rejection, resulting in significant performance trade-offs or application limitations. Therefore, a new technical solution is urgently needed to systematically address these issues. Summary of the Invention

[0014] To overcome the shortcomings of existing technologies, this invention provides an adaptive microphone signal processing circuit and microphone. Through an innovative circuit architecture, it can achieve high-performance, highly flexible and robust microphone signal processing within a single chip or compact module.

[0015] An adaptive microphone signal processing circuit includes:

[0016] Signal input and primary conditioning unit: used to acquire the differential audio signal from the reference voltage and the microphone; to perform common-mode rejection amplification on the differential audio signal to obtain the primary differential signal; wherein, the reference voltage is used to provide a stable DC bias reference point;

[0017] Signal synthesis and conversion unit: used to perform subtraction on the primary differential signal according to the reference voltage, amplify the primary differential signal and convert it into a single-ended signal;

[0018] Power monitoring unit: used to compare the reference voltage with the power supply voltage to be monitored; when the power supply voltage to be monitored is higher than the reference voltage plus the upper limit of hysteresis, outputs a normal voltage signal; when the power supply voltage to be monitored is lower than the reference voltage minus the lower limit of hysteresis, outputs an abnormal voltage signal; wherein, the power supply to be monitored includes an analog power rail;

[0019] Signal output unit: used to output the differential audio signal and the single-ended signal to a preset downstream receiving terminal respectively;

[0020] Meanwhile, the signal input and primary conditioning unit, the signal synthesis and conversion unit, and the power monitoring unit each adopt independent power supply paths.

[0021] Optionally, the signal input and primary conditioning unit includes a first operational amplifier and a second operational amplifier;

[0022] The non-inverting inputs of the first operational amplifier and the second operational amplifier respectively acquire the positive and negative components of the differential audio signal; the positive and negative components together constitute a high-impedance differential input pair;

[0023] A first local feedback resistor is provided between the output terminal and the inverting terminal of the first operational amplifier; a second local feedback resistor is provided between the output terminal and the inverting terminal of the second operational amplifier; and the inverting terminals of the first and second operational amplifiers are respectively connected to a first gain control terminal and a second gain control terminal; the first gain control terminal and the second gain control terminal are respectively used to control the amplification factor of the common-mode rejection amplifier from the outside.

[0024] A seventh bias resistor is provided between the reference voltage and the non-inverting input of the first operational amplifier; an eighth bias resistor is provided between the reference voltage and the non-inverting input of the second operational amplifier.

[0025] Wherein, the first local feedback resistor is equal to the seventh bias resistor, and the second local feedback resistor is equal to the eighth bias resistor.

[0026] Optionally, the signal input and primary conditioning unit further includes a bandwidth control terminal connected to the internal bias circuits of the first operational amplifier and the second operational amplifier; the bandwidth control terminal receives a control signal from the outside to adjust the gain-bandwidth product and slew rate of the first operational amplifier and the second operational amplifier.

[0027] Optionally, the signal synthesis and conversion unit includes a third operational amplifier;

[0028] The output terminal of the first operational amplifier is connected to the inverting terminal of the third operational amplifier through a third resistor;

[0029] The output terminal of the second operational amplifier is connected to the non-inverting input of the third operational amplifier through a fourth resistor;

[0030] A fifth resistor is provided between the inverting input and the output terminal of the third operational amplifier; a sixth resistor is provided between the non-inverting input of the third operational amplifier and the reference voltage.

[0031] The power monitoring unit includes a fourth operational amplifier;

[0032] A ninth resistor is provided between the non-inverting input of the fourth operational amplifier and ground; an eleventh resistor is provided between the inverting input of the fourth operational amplifier and the output terminal.

[0033] The non-inverting input of the fourth operational amplifier is connected to the power supply to be monitored; the inverting input of the fourth operational amplifier is connected to the reference voltage; a tenth resistor is also provided between the non-inverting input of the fourth operational amplifier and the power supply to be monitored, and the tenth resistor, together with the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, and the eleventh resistor, form a feedback and impedance matching network.

[0034] Optionally, the signal output unit includes a main audio signal output terminal, which is connected to the output terminal of the third operational amplifier.

[0035] Optionally, the signal output unit further includes a first auxiliary signal output terminal and / or a second auxiliary signal output terminal; the first auxiliary signal output terminal is connected to the output terminal of the first operational amplifier, and the second auxiliary signal output terminal is connected to the output terminal of the second operational amplifier.

[0036] Optionally, the first operational amplifier, the second operational amplifier, the third operational amplifier, and the fourth operational amplifier each adopt a partitioned independent power supply structure.

[0037] Optionally, the adaptive microphone signal processing circuit is integrated into a single chip.

[0038] Optionally, the power supply to be monitored is connected to an analog power supply terminal or a preset voltage node in the chip.

[0039] A microphone, including the adaptive microphone signal processing circuitry described above.

[0040] The adaptive microphone signal processing circuit and microphone provided by this invention have the following beneficial technical effects:

[0041] 1) Achieve ultimate signal purity and input fidelity

[0042] Ultra-stable DC operating point: Using a single high-precision reference voltage as the voltage reference, the DC potential is kept absolutely stable throughout the signal amplification and processing process, completely eliminating the risk of signal distortion or output saturation caused by potential drift.

[0043] Breakthrough common-mode noise suppression: By setting the first local feedback resistor to be equal to the seventh bias resistor and the second local feedback resistor to be equal to the eighth bias resistor through a precise impedance matching design, the offset error introduced by the input bias current is eliminated at the system level. This makes the actual common-mode rejection ratio of the differential input stage composed of the first and second op-amps approach the theoretical limit of the op-amp devices. It can effectively suppress more than 80dB of common-mode interference in complex electromagnetic environments, ensuring that the microvolt-level microphone signal is picked up cleanly and the background noise is significantly reduced.

[0044] 2) Provides unprecedented flexibility and adaptability in signal processing.

[0045] Independent gain and bandwidth control at the source stage: The gain control (first gain control terminal, second gain control terminal) and bandwidth control pins are innovatively integrated directly into the differential input stage (first op-amp, second op-amp). This allows for independent and precise programming of the signal amplitude and bandwidth at the very beginning of the signal chain. The system can be dynamically optimized according to application scenarios (such as high-fidelity music, narrowband voice, low-power monitoring), while simultaneously resolving the traditional contradiction between dynamic range, noise suppression, and power consumption.

[0046] High-quality intermediate signal access: High-quality differential signals after primary conditioning can be directly accessed through the first and second auxiliary signal output terminals. This provides a direct hardware interface for system-level debugging and secondary development of advanced audio algorithms (such as adaptive beamforming), greatly expanding the chip's application potential and design freedom.

[0047] 3) Build intelligent and reliable system-level management capabilities

[0048] Impulse-free power management: An independent power monitoring comparator (fourth op-amp) outputs a clean enable signal. Combined with internal modular bias control, it enables precise management of power-on and power-off timing, completely eliminating transient "popping" noises during power-on and power-off processes and improving the user experience.

[0049] Exceptional power supply noise immunity and system reliability: The internal partitioned power supply architecture provides independent and optimized power domains for high-sensitivity input stages and main amplification stages, effectively isolating digital noise from analog signals. Combined with power monitoring capabilities, the system features undervoltage protection and low-power mode management, significantly improving reliability and battery life under battery power or power fluctuation environments.

[0050] 4) Achieve a high degree of integration and ease of use

[0051] This design highly integrates functions such as high-performance differential amplification, programmable conditioning, power monitoring, and auxiliary output—which traditionally require multiple discrete chips and complex peripheral circuits—into a single chip. This not only significantly reduces the number of external components, lowers system cost and PCB area, but also simplifies design complexity and accelerates product development cycles through standardized digital pin configurations (corresponding to the first gain control terminal, the second gain control terminal, and the bandwidth control terminal).

[0052] In summary, the technical solution provided by this invention is not merely an improvement in a single performance indicator, but rather a complete audio front-end solution that achieves high performance, high reliability, and high adaptability through the synergy of "deep front-end conditioning," "intelligent system management," and "flexible and open interfaces." This fundamentally solves the comprehensive challenges faced by high-performance audio devices in terms of noise suppression, dynamic adaptation, system integration, and user experience. Attached Figure Description

[0053] Figure 1 This is a schematic diagram of the adaptive microphone signal processing circuit in an embodiment of the present invention. Detailed Implementation

[0054] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0055] An adaptive microphone signal processing circuit is provided for use in microphone devices. It is designed to include several main modules: a signal input and primary conditioning unit, a signal synthesis and conversion unit, a power monitoring unit, and a signal output unit.

[0056] The signal input and primary conditioning unit is used to acquire the differential audio signal from the reference voltage and the microphone; the differential audio signal is amplified by common-mode rejection to obtain the primary differential signal.

[0057] The reference voltage provides a stable DC bias reference point, serving as the DC "horizon" for the entire analog signal processing circuit, ensuring the signal is processed within a defined linear region. The microphone's differential audio signal is the input signal to be processed. Common-mode rejection amplification refers to the two actions of amplifying and suppressing the differential audio signal: amplifying the differential signal (the useful signal in the differential audio signal) and suppressing the common-mode signal (noise or interference signals in the differential audio signal). After processing by the signal input and primary conditioning unit, the received weak microphone differential input signal is passed through a differential amplification structure with a high common-mode rejection ratio. This process performs initial amplification, DC bias stabilization, and source-level bandwidth / gain adjustment to obtain the primary differential signal.

[0058] The signal synthesis and conversion unit performs subtraction on the primary differential signal based on a reference voltage, amplifies the primary differential signal, and converts it into a single-ended signal. That is, by designing a precision differential amplifier circuit, stable voltage gain and driving capability are achieved, while ensuring the linearity and stability of the signal during amplification, synthesis, and conversion. The resulting single-ended signal is output as the main audio signal.

[0059] The power supply monitoring unit compares a reference voltage with the voltage of the power supply to be monitored. When the voltage of the power supply to be monitored is higher than the reference voltage plus the upper hysteresis limit, it outputs a normal voltage signal; when the voltage of the power supply to be monitored is lower than the reference voltage minus the lower hysteresis limit, it outputs an abnormal voltage signal. The power supply to be monitored includes analog power rails. The upper and lower hysteresis limits are preset threshold windows.

[0060] By designing power monitoring and management circuits, critical supply voltages (such as analog power rails) are monitored in real time and compared with reference voltages. A normal voltage signal, such as a high level, is output to allow the entire circuit to operate normally, or an abnormal voltage signal, such as a low level, is output to trigger protection mechanisms or shut down non-critical circuits.

[0061] The signal output unit is used to output differential audio signals and single-ended signals to preset post-stage receivers, respectively. The differential audio signal can be used for external special applications such as level monitoring; the single-ended signal is the final single-ended audio signal after complete amplification and filtering. Therefore, the preset post-stage receiver can directly and flexibly acquire the processed signal, providing a direct signal interface for secondary development.

[0062] Meanwhile, the signal input and primary conditioning unit, the signal synthesis and conversion unit, and the power monitoring unit each employ independent power supply paths. These independent power supply paths ensure power isolation between the units during signal processing, preventing noise coupling.

[0063] In a typical implementation, such as Figure 1As shown, an adaptive microphone signal processing circuit integrated into a single chip is provided.

[0064] The signal input and primary conditioning unit includes a first operational amplifier OP1 and a second operational amplifier OP2.

[0065] The non-inverting input (+) of the first operational amplifier OP1 and the second operational amplifier OP2 respectively acquires the positive and negative components of the differential audio signal; the positive and negative components are connected to pins IN1 and IN2 respectively, and together they form a high-impedance differential input pair.

[0066] A first local feedback resistor R1 is provided between the output terminal and the inverting input (-) of the first operational amplifier OP1; a second local feedback resistor R2 is provided between the output terminal and the inverting input (-) of the second operational amplifier OP2; and the inverting inputs of the first and second operational amplifiers are respectively connected to the first and second gain control terminals; the first and second gain control terminals correspond to pins GAIN1 and GAIN2, respectively, and are used to externally control the amplification factor of the common-mode rejection amplifier. That is, by changing the equivalent resistance value of the network, GAIN1 and GAIN2 can directly program and set the amplification factor of OP1 and OP2, thereby realizing the differential gain adjustment of the signal chain front end.

[0067] A seventh bias resistor R7 is placed between the reference voltage and the non-inverting (+) input of the first op-amp OP1; an eighth bias resistor R8 is placed between the reference voltage and the non-inverting (+) input of the second op-amp OP2. The reference voltage corresponds to pin VREF0, which is a precision voltage reference source for the entire chip, providing a clean and stable DC bias reference point for all op-amps. The first local feedback resistor R1 is equal to the seventh bias resistor R7, and the second local feedback resistor R2 is equal to the eighth bias resistor R8.

[0068] OP1 and OP2 are each configured as non-inverting amplifiers.

[0069] R1 and R2 are local feedback resistors. R1 is used to set the local gain of OP1, and R2 is used to set the local gain of OP2. R1 and R2 work together to achieve input stage DC impedance balance.

[0070] R7 and R8 are precision bias resistors for OP1 and OP2, respectively, providing low-noise quiescent operating points for OP1 and OP2. Their main function is to provide a DC path to the reference voltage for the non-inverting input terminals of OP1 and OP2, establishing an accurate quiescent operating point (approximately VREF0).

[0071] The resistance values ​​of R1 and R2 are strictly the same as those of R7 and R8, ensuring that the DC impedance "seen" by the two input terminals of the op-amp is equal. This eliminates the DC offset voltage that may be introduced by the input bias current, which is the basis for achieving ultra-high common-mode rejection ratio (CMRR).

[0072] Furthermore, the signal input and primary conditioning unit also includes a bandwidth control terminal connected to the internal bias circuits of the first op-amp OP1 and the second op-amp OP2. The bandwidth control terminal corresponds to a pin (BW), which is used to input a control signal from an external source to adjust the gain-bandwidth product and slew rate of the first op-amp OP1 and the second op-amp OP2. Specifically, by adjusting the voltage or current of this pin, the bias current of OP1 and OP2 can be dynamically changed, thereby adjusting their gain-bandwidth product (GBW) and slew rate. This enables optimization of circuit bandwidth and noise performance at the very beginning of the signal chain, such as reducing bandwidth in voice mode to suppress high-frequency noise.

[0073] Furthermore, the signal synthesis and conversion unit includes a third operational amplifier OP3. The output terminal of the first operational amplifier OP1 is connected to the inverting input (-) of the third operational amplifier OP3 through a third resistor R3; the output terminal of the second operational amplifier OP2 is connected to the non-inverting input (+) of the third operational amplifier OP3 through a fourth resistor R4; a fifth resistor R5 is provided between the inverting input (-) of the third operational amplifier OP3 and its output terminal; a sixth resistor R6 is provided between the non-inverting input (+) of the third operational amplifier OP3 and the reference voltage (VREF0).

[0074] Meanwhile, the power monitoring unit includes the fourth operational amplifier OP4;

[0075] A ninth resistor R9 is placed between the non-inverting input (+) of the fourth operational amplifier OP4 and ground (GND); an eleventh resistor R11 is placed between the inverting input (-) of the fourth operational amplifier OP4 and the output terminal.

[0076] The non-inverting input (+) of the fourth operational amplifier OP4 is connected to the power supply to be monitored (VREF1); the inverting input (-) of the fourth operational amplifier OP4 is connected to the reference voltage (VREF0); a tenth resistor R10 is also set between the non-inverting input (+) of the fourth operational amplifier OP4 and the power supply to be monitored (VREF1). The tenth resistor R10, together with the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the eleventh resistor R11, form a feedback and impedance matching network.

[0077] OP3 is the core differential amplifier / synthesizer, responsible for subtracting the pre-conditioned differential signals from OP1 and OP2 to convert them into single-ended signals and providing stable and accurate main voltage gain. OP4 is a power supply monitoring voltage comparator configured as a Schmitt trigger, independent of the audio signal path, which continuously monitors the status of the power supply voltage VREFI and outputs a clean digital enable or status flag signal.

[0078] VREFI is the input pin for the monitored power supply voltage. It is connected to the analog power supply terminal or a preset voltage node in the chip and serves as the monitored object of the OP4 power supply monitoring comparator.

[0079] R3 and R4 are interstage coupling and current limiting resistors, connected between the output of OP1 and the input network of the subsequent OP3, and between the output of OP2 and the input network of the subsequent OP3, respectively, serving to transmit signals, match impedance, and isolate the preceding and following stages.

[0080] R5 is one of the core feedback resistors of OP3. It is connected between the inverting input and the output of OP3 and is a key component that determines the voltage gain of the OP3 differential amplifier stage.

[0081] R6 is the reference bias resistor for OP3, which is connected between the non-inverting input of OP3 and the precision reference voltage VREF0 to ensure that the non-inverting input of OP3 is stable at the VREF0 potential, thus ensuring the stability of the amplifier's DC operating point.

[0082] R9 is the input bias resistor of the power monitoring comparator OP4. It is connected between the non-inverting input of OP4 and ground, providing a suitable input path for the monitored voltage VREFI.

[0083] R10 is one of the balancing resistors in the OP3 differential amplifier network. Together with R3, R4, R5, R11, etc., it forms a precision resistor network to accurately set the gain of OP3 and ensure its common-mode rejection capability.

[0084] R11 has a dual function: in the main signal path, it serves as one of the balancing resistors in the OP3 differential amplifier network; in the power monitoring path, it acts as the positive feedback resistor for OP4, connected between its output and inverting input to generate a hysteresis voltage and prevent output jitter.

[0085] The feedback and impedance matching network composed of R3, R4, R5, R6, R10, and R11 ensures the linearity and stability of the signal amplification process.

[0086] Furthermore, the signal output unit includes a main audio signal output terminal, which is connected to the output terminal of the third operational amplifier. The main audio signal output terminal corresponds to the OUT pin, which is directly connected to the output terminal of OP3, and the subsequent receiving terminal can be connected to OUT.

[0087] Furthermore, the signal output unit also includes a first auxiliary signal output terminal and / or a second auxiliary signal output terminal. The first auxiliary signal output terminal and the second auxiliary signal output terminal correspond to pins OUT1 and OUT2, respectively. OUT1 is connected to the output terminal of OP1, and OUT2 is connected to the output terminal of OP2. OUT1 and OUT2 are auxiliary output pins, which can be flexibly selected to provide one of the intermediate differential signals without subsequent processing, which can be used for external monitoring, debugging, or special purposes.

[0088] Furthermore, the first operational amplifier OP1, the second operational amplifier OP2, the third operational amplifier OP3, and the fourth operational amplifier OP4 each adopt a zoned independent power supply structure; for example... Figure 1 As shown, each op-amp includes VDD and VSS inputs, representing independently partitioned power supply networks within the chip. Although they all ultimately connect to external power supply pins, they internally provide optimized, isolated power supply paths for different modules. For example, an ultra-low noise power domain is provided for the high-sensitivity OP1 and OP2; a high-current-capable power domain is provided for the driver stage OP3; and the digital-characteristic OP4 is isolated from other analog sections on the power supply to prevent noise coupling.

[0089] In summary, this adaptive microphone signal processing circuit employs a multi-module collaborative operation, and its process includes:

[0090] Input stage: The weak differential signal (IN1 / IN2) from the microphone enters the signal input and primary conditioning unit. After being amplified by high common-mode rejection and stabilized by DC bias, a high-quality differential signal is output.

[0091] Conversion stage: The signal synthesis and conversion unit converts the differential signal into a single-ended signal and amplifies it to generate the main audio output (OUT).

[0092] Protection phase: The power monitoring unit monitors the power status in real time and outputs an enable signal through a hysteresis comparator to ensure that the system only operates when the power supply is stable.

[0093] Expansion phase: The signal output unit provides main / auxiliary output interfaces and zoned power supply, taking into account both signal output requirements and system reliability.

[0094] The technical solution of this invention systematically solves the technical bottlenecks of traditional microphone amplification circuits in terms of signal-to-noise ratio, dynamic range, power management, and integration through the close collaboration of four major modules, and achieves high-performance and highly flexible audio front-end processing.

[0095] Based on the aforementioned adaptive microphone signal processing circuit, a microphone device is proposed, which includes a wired or wireless microphone and integrates the aforementioned adaptive microphone signal processing circuit.

[0096] The above is a description of the present invention to help understand it; however, the implementation of the present invention is not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the principle of the present invention should be considered equivalent substitutions and are included within the protection scope of the present invention.

Claims

1. An adaptive microphone signal processing circuit, characterized in that, include: Signal input and primary conditioning unit: used to acquire the reference voltage and differential audio signal from the microphone; The differential audio signal is amplified by common-mode rejection to obtain a primary differential signal; wherein, the reference voltage is used to provide a stable DC bias reference point; Signal synthesis and conversion unit: used to perform subtraction on the primary differential signal according to the reference voltage, amplify the primary differential signal and convert it into a single-ended signal; Power monitoring unit: used to compare the reference voltage with the power supply voltage to be monitored; when the power supply voltage to be monitored is higher than the reference voltage plus the upper limit of hysteresis, outputs a normal voltage signal; when the power supply voltage to be monitored is lower than the reference voltage minus the lower limit of hysteresis, outputs an abnormal voltage signal; wherein, the power supply to be monitored includes an analog power rail; Signal output unit: used to output the differential audio signal and the single-ended signal to a preset downstream receiving terminal respectively; Meanwhile, the signal input and primary conditioning unit, the signal synthesis and conversion unit, and the power monitoring unit each adopt independent power supply paths.

2. The adaptive microphone signal processing circuit as described in claim 1, characterized in that, The signal input and primary conditioning unit includes a first operational amplifier and a second operational amplifier; The non-inverting inputs of the first operational amplifier and the second operational amplifier respectively acquire the positive and negative components of the differential audio signal; the positive and negative components together constitute a high-impedance differential input pair; A first local feedback resistor is provided between the output terminal and the inverting terminal of the first operational amplifier; a second local feedback resistor is provided between the output terminal and the inverting terminal of the second operational amplifier; and the inverting terminals of the first and second operational amplifiers are respectively connected to a first gain control terminal and a second gain control terminal; the first gain control terminal and the second gain control terminal are respectively used to control the amplification factor of the common-mode rejection amplifier from the outside. A seventh bias resistor is provided between the reference voltage and the non-inverting input of the first operational amplifier; an eighth bias resistor is provided between the reference voltage and the non-inverting input of the second operational amplifier. Wherein, the first local feedback resistor is equal to the seventh bias resistor, and the second local feedback resistor is equal to the eighth bias resistor.

3. The adaptive microphone signal processing circuit as described in claim 2, characterized in that, The signal input and primary conditioning unit further includes a bandwidth control terminal connected to the internal bias circuits of the first operational amplifier and the second operational amplifier; the bandwidth control terminal receives a control signal from the outside to adjust the gain-bandwidth product and slew rate of the first operational amplifier and the second operational amplifier.

4. The adaptive microphone signal processing circuit as described in claim 3, characterized in that, The signal synthesis and conversion unit includes a third operational amplifier; The output terminal of the first operational amplifier is connected to the inverting terminal of the third operational amplifier through a third resistor; The output terminal of the second operational amplifier is connected to the non-inverting input of the third operational amplifier through a fourth resistor; A fifth resistor is provided between the inverting input and the output input of the third operational amplifier; A sixth resistor is provided between the non-inverting input of the third operational amplifier and the reference voltage; The power monitoring unit includes a fourth operational amplifier; A ninth resistor is provided between the non-inverting input of the fourth operational amplifier and ground; an eleventh resistor is provided between the inverting input of the fourth operational amplifier and the output terminal. The non-inverting input of the fourth operational amplifier is connected to the power supply to be monitored; the inverting input of the fourth operational amplifier is connected to the reference voltage; a tenth resistor is also provided between the non-inverting input of the fourth operational amplifier and the power supply to be monitored, and the tenth resistor, together with the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, and the eleventh resistor, form a feedback and impedance matching network.

5. The adaptive microphone signal processing circuit as described in claim 4, characterized in that, The signal output unit includes a main audio signal output terminal, which is connected to the output terminal of the third operational amplifier.

6. The adaptive microphone signal processing circuit as described in claim 5, characterized in that, The signal output unit further includes a first auxiliary signal output terminal and / or a second auxiliary signal output terminal; the first auxiliary signal output terminal is connected to the output terminal of the first operational amplifier, and the second auxiliary signal output terminal is connected to the output terminal of the second operational amplifier.

7. The adaptive microphone signal processing circuit as described in claim 5, characterized in that, The first operational amplifier, the second operational amplifier, the third operational amplifier, and the fourth operational amplifier each adopt a partitioned independent power supply structure.

8. The adaptive microphone signal processing circuit as described in any one of claims 2 to 7, characterized in that, The adaptive microphone signal processing circuit is integrated into a single chip.

9. The adaptive microphone signal processing circuit as described in claim 8, characterized in that, The power supply to be monitored is connected to the analog power supply terminal or a preset voltage node in the chip.

10. A microphone, characterized in that, Includes the adaptive microphone signal processing circuit as described in any one of claims 1 to 9.

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