An image sensor forming method and an image sensor

Abstract

The application provides a method for forming an image sensor, comprising: etching a semiconductor substrate to form a semiconductor island structure and a deep trench before forming a gate electrode, so as to realize optical isolation between pixel units of the image sensor; forming a first epitaxial layer by an epitaxial process, so as to close an upper part of at least part of the deep trench, and form a transistor and / or a floating diffusion region and / or a substrate contact of the pixel unit of the image sensor in a closed region of the upper part of the deep trench, so as to improve performance of the pixel unit.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an image sensor forming method and an image sensor. Background Technology

[0002] As image sensor pixel sizes continue to shrink, pixel isolation has become an increasingly critical bottleneck. Traditional injection isolation methods struggle to improve full-well capacity while maintaining pixel isolation performance. To address this issue, one existing approach is to achieve physical pixel isolation via FDTI (Fixed-Fit Interconnection and Transmission), a technique that solves the isolation problem between small pixels without sacrificing full-well capacity. However, traditional FDTI isolation spans the entire semiconductor layer, significantly limiting the size of transistors within the pixel and degrading device noise performance. Summary of the Invention

[0003] The purpose of this invention is to provide an image sensor forming method, comprising: Before the gate is formed, the semiconductor substrate is etched to form a semiconductor island structure and deep trenches to achieve optical isolation between the pixel units of the image sensor. A first epitaxial layer is formed by an epitaxial process, which closes at least part of the upper part of the deep trench, and a transistor and / or floating diffusion region and / or substrate contact of the image sensor pixel unit are formed in the closed region at the upper part of the deep trench, so as to improve the performance of the pixel unit.

[0004] Furthermore, when the etched semiconductor substrate forms semiconductor island structures and deep trenches, interconnection structures are formed between at least a portion of the semiconductor island structures to reduce epitaxial defects.

[0005] Furthermore, at least part of the connection structure is a first cantilever connection structure with an upper connection and a lower suspension, and the semiconductor island structures are interconnected through the first cantilever connection structure.

[0006] Furthermore, prior to closing at least part of the upper portion of the deep trench via the epitaxial process, the method further includes: A second epitaxial layer is formed within the deep trench using an epitaxial process to reduce the width of the deep trench and increase the photosensitive area of ​​the pixel unit.

[0007] Furthermore, after forming the second epitaxial layer, the process further includes: Perform a back etching process to optimize the subsequent filling process of the deep trench.

[0008] Furthermore, after the second epitaxial layer is formed, the top of the deep trench is closed. Through a patterning process, part of the first cantilever connection structure is cut off, part of the top of the deep trench is opened, and a new second cantilever connection structure is formed to optimize the subsequent filling process of the deep trench.

[0009] Furthermore, after forming the first epitaxial layer through the epitaxial process, the method further includes: High-temperature annealing is performed to reduce defects.

[0010] Furthermore, after forming the first epitaxial layer through the epitaxial process, the method further includes: Etching forms the active region of the transistor and / or the floating diffusion region and / or the substrate contact; High-temperature annealing is performed to reduce defects.

[0011] Furthermore, when the etching forms the active region, the association of the first epitaxial layer between the device structures of the pixel unit is severed.

[0012] Furthermore, when at least part of the upper part of the deep trench is closed, the four corners of the deep trench opening are not completely closed, so as to reduce the performance degradation caused by lattice mismatch.

[0013] Furthermore, through photolithography and etching processes, the depth of the preset connection structure is made greater than that of the remaining first cantilever connection structures, forming a charge overflow channel between pixels in the preset connection structure, thereby improving the performance of the image sensor.

[0014] The present invention also provides an image sensor formed using the image sensor forming method described above.

[0015] The present invention proposes an image sensor forming method through the above-described scheme, which can solve the isolation problem of traditional FDTI. It can not only improve the isolation performance between pixel units and between pixel units and transistors, but also improve the full-well capacity of small-sized pixel units, reduce the noise impact of transistors, and thus improve the performance of image sensors. Attached Figure Description

[0016] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments, taken in conjunction with the accompanying drawings.

[0017] Figures 1-12 This is a schematic diagram of the structure of the image sensor formation method in different embodiments of the present invention.

[0018] Throughout the figures, the same or similar reference numerals denote the same or similar devices (modules) or steps. Detailed Implementation

[0019] This invention provides a method for forming an image sensor. Specifically, in a preferred embodiment, before the gate is formed, a semiconductor substrate 100 is etched to form a semiconductor island structure 110 and a deep trench 120 to achieve optical isolation between the pixel units of the image sensor, such as... Figure 1 As shown, 300 is a mask layer formed according to a preset photolithography pattern, preferably one or more of silicon oxide, silicon nitride, and silicon oxynitride. The semiconductor island structure 110 can be used to form the photosensitive area of ​​an image sensor; Subsequently, a first epitaxial layer 200 is formed through an epitaxial process, closing at least a portion of the upper part of the deep trench 120. A transistor and / or floating diffusion region (FD) and / or substrate contact of the image sensor pixel unit are formed in the closed region at the upper part of the deep trench 120 to improve the performance of the pixel unit. (See reference...) Figure 8 As shown. Optionally, the transistor can be a transfer transistor (TX), a source follower transistor (SF), a select transistor (SEL), a reset transistor (RST), etc., and the present invention does not impose functional limitations on it.

[0020] Preferably, after the first epitaxial layer 200 is formed, a high-temperature annealing process can be performed to reduce possible defects in the epitaxial layer.

[0021] Alternatively, after the first epitaxial layer 200 is formed, an etching process can be performed to etch the transistor and / or the floating diffusion region (FD) and / or the active region at the substrate contact. Afterwards, a high-temperature annealing process is performed to reduce defects.

[0022] In this embodiment, furthermore, when etching to form the active region, the association of the first epitaxial layer 200 between some of the device structures of the pixel unit can be simultaneously severed.

[0023] Furthermore, preferably, when forming the first epitaxial layer 200 through an epitaxial process, to close at least part of the upper portion of the deep trench 120, the four corners of the opening of the deep trench 120 can be incompletely closed by controlling the parameters of the epitaxial process, particularly in the cross-shaped region where the trenches intersect, such as... Figure 9 The portion shown in 210 is designed to reduce the performance degradation caused by lattice mismatch.

[0024] In an alternative embodiment, before closing at least part of the upper portion of the deep trench 120 via an epitaxial process, an isolation structure between the photosensitive areas of the pixel units can be formed within the deep trench 120. Preferably, a second epitaxial layer 121 can be formed within the deep trench 120 via an epitaxial process. This second epitaxial layer 121 helps reduce the width of the deep trench 120 and can increase the photosensitive area of ​​the pixel units, such as... Figure 2 As shown. The doping type of the second epitaxial layer 121 is generally opposite to that of the semiconductor island structure 110. For example, when the doping type of the semiconductor island structure 110 is N-type, the second epitaxial layer 121 can be formed by P-type doping epitaxy.

[0025] Based on this, preferably, after forming the second epitaxial layer 121, a reverse etching can be performed to remove part of the structure of the second epitaxial layer 121, so as to optimize the subsequent filling process of the deep trench, such as... Figure 3 As shown. During the back etching, a new trench structure 140 can be further formed at the bottom of the deep trench 120.

[0026] In one optional embodiment, after forming the second epitaxial layer 121, a first dielectric layer 122 may also be formed on the surface of the second epitaxial layer, and then filled with a core-filling material such as one or more materials selected from polycrystalline semiconductor materials, metal materials, and silicon oxide containing doped elements to form a core-filling material layer 123, such as... Figure 4 As shown. Preferably, a low-refractive-index dielectric material can be used to form the first dielectric layer 122. If a trench 140 structure is formed by back etching during the implementation, the bottom of the trench 140 can be filled by a filling medium, or a space gap structure can be left at the bottom. In subsequent process steps, a color filter isolation grid on the opposite side of the image sensor device structure can be formed on this basis.

[0027] Preferably, after the core filler layer 123 is formed, it can be etched back to make the core filler layer 123 lower than the surface of the semiconductor substrate 100, such as... Figure 4 As shown.

[0028] Based on this, when forming the first epitaxial layer 200 using an epitaxial process, a portion of the first dielectric layer 122 can be removed to expose a portion of the sidewalls of the second epitaxial layer 121, and the mask layer 300 can be removed, such as... Figure 5 As shown. Based on this, a second dielectric layer 201 and an organic layer 202 are formed on the semiconductor substrate 100 and the filler material layer 123, as follows: Figure 6As shown. Preferably, the second dielectric layer 201 may include an oxide layer and / or a nitride layer, and the organic layer 202 may be a photoresist, an anti-reflection layer, or other materials. Subsequently, wet etching can be used to remove part of the second dielectric layer 201, retaining the portion above the filler material layer 123, and removing the organic layer 202, such as... Figure 7 As shown. Based on this, a first epitaxial layer 200 is formed by further epitaxy.

[0029] In one alternative embodiment, when etching the semiconductor substrate 100 to form the semiconductor island structure 110 and the deep trench 120, an interconnecting structure can be formed between at least some of the semiconductor island structures 110. The interconnecting structure can provide some support between the island structures 110 and reduce epitaxial defects.

[0030] Based on this, preferably, at least part of the connection structure is a first cantilever beam connection structure 130 with an upper connection and a lower suspension, such as... Figure 12 As shown.

[0031] In an alternative embodiment, the following steps may be taken when forming the first cantilever connection structure 130: Step S11: Etch the semiconductor substrate 100 according to the preset photolithography pattern to form the second trench 131; Step S12: Form a protective medium layer 132 on the surface of the second trench 131, such as Figure 10 As shown; Step S13: Continue etching the bottom of the protective dielectric layer 132 and the semiconductor substrate 100 to form a third trench 133, as shown below. Figure 11 As shown; Step S14: Laterally etch the semiconductor substrate 100 on the sidewall of the third trench 133, protecting the top sidewall of the third trench 133 with the remaining protective dielectric layer 132, etching to form the required deep trench 120 and the first cantilever connection structure 130, as shown. Figure 12 As shown.

[0032] Preferably, a three-dimensional sidewall transistor can also be formed on the first cantilever connection structure 130. The function of the transistor can be designed as needed; for example, preferably, a three-dimensional source follower transistor can be formed on the cantilever.

[0033] In the aforementioned embodiment where the second epitaxial layer 121 is formed, after the top of the deep trench 120 is closed, a portion of the first cantilever connection structure 130 can be etched off using a patterning process, while simultaneously opening a portion of the top of the deep trench 120 to form a new second cantilever connection structure. In this embodiment, opening the closed second epitaxial layer 121 through patterning and etching processes to form a deep trench structure that is wider at the top and narrower at the bottom optimizes the subsequent filling process of the deep trench 120.

[0034] In a preferred embodiment, at least a portion of the connection structure can be processed by photolithography and etching processes to make the depth of the preset connection structure greater than that of the remaining first cantilever connection structure 130, thereby forming charge overflow channels between pixels at these preset connection structures to improve the performance of the image sensor.

[0035] The present invention also provides an image sensor formed using the image sensor forming method described above.

[0036] The above process is one embodiment of a portion of the process used to form the image sensor in this invention.

[0037] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered exemplary and not restrictive in any way. Furthermore, it is clear that the word "comprising" does not exclude other elements and steps, and the word "a" does not exclude a plural. Multiple elements recited in the apparatus claims may also be implemented by a single element. The terms "first," "second," etc., are used to denote names and do not indicate any particular order.

Claims

1. A method for forming an image sensor, characterized in that, include: Before the gate is formed, the semiconductor substrate is etched to form a semiconductor island structure and deep trenches to achieve optical isolation between the pixel units of the image sensor. A first epitaxial layer is formed by an epitaxial process, which closes at least part of the upper part of the deep trench, and forms the transistor and / or floating diffusion region and / or substrate contact of the image sensor pixel unit in the closed region at the upper part of the deep trench, so as to improve the performance of the pixel unit.

2. The image sensor forming method as described in claim 1, characterized in that, When the etched semiconductor substrate forms semiconductor island structures and deep trenches, interconnection structures are formed between at least a portion of the semiconductor island structures to reduce epitaxial defects.

3. The image sensor forming method as described in claim 2, characterized in that, At least part of the connection structure is a first cantilever connection structure with an upper connection and a lower suspension, and the semiconductor island structures are interconnected through the first cantilever connection structure.

4. The image sensor forming method as described in claim 3, characterized in that, Before closing at least a portion of the upper part of the deep trench by the epitaxial process, the method further includes: A second epitaxial layer is formed within the deep trench using an epitaxial process to reduce the width of the deep trench and increase the photosensitive area of ​​the pixel unit.

5. The image sensor forming method as described in claim 4, characterized in that, After forming the second epitaxial layer, the process further includes: Perform a back etching process to optimize the subsequent filling process of the deep trench.

6. The image sensor forming method as described in claim 4, characterized in that, After the second epitaxial layer is formed, the top of the deep trench is closed. Through a patterning process, part of the first cantilever connection structure is cut off, part of the top of the deep trench is opened, and a new second cantilever connection structure is formed to optimize the subsequent filling process of the deep trench.

7. The image sensor forming method as described in claim 1, characterized in that, After forming the first epitaxial layer through an epitaxial process, the method further includes: High-temperature annealing is performed to reduce defects.

8. The image sensor forming method as described in claim 1, characterized in that, After forming the first epitaxial layer through an epitaxial process, the method further includes: Etching forms the active region of the transistor and / or the floating diffusion region and / or the substrate contact; High-temperature annealing is performed to reduce defects.

9. The image sensor forming method as described in claim 8, characterized in that, When the etching forms the active region, the connection between the first epitaxial layer between the device structures of the pixel unit is severed.

10. The image sensor forming method as claimed in claim 1, characterized in that, When at least part of the upper part of the deep trench is closed, the four corners of the deep trench opening are not completely closed in order to reduce the performance degradation caused by lattice mismatch.

11. The image sensor forming method as described in claim 3, characterized in that, By using photolithography and etching processes, the depth of the preset connection structure is made greater than that of the remaining first cantilever connection structures, forming a charge overflow channel between pixels in the preset connection structure, thereby improving the performance of the image sensor.

12. An image sensor, characterized in that, It is formed using the image sensor forming method as described in claims 1 to 11.

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