Semiconductor device

Abstract

The application discloses a semiconductor device, which comprises a plastic sealing body, a substrate, a driving side pin frame, a high-side driving chip and a low-side driving chip, wherein the substrate comprises a power pad, the driving side pin frame is provided with a driving pad, the driving pad is provided with the driving chip, the high-side driving chip and the low-side driving chip are electrically connected, a longitudinal projection of the high-side driving pad is at least partially overlapped with at least part of a side of a longitudinal projection of a high-side power pad which is transversely adjacent to a side of a low-side power pad, and the longitudinal projection of the high-side driving pad is at least partially protruding towards the side of the low-side power pad relative to the longitudinal projection of the high-side power pad. Thus, the distance between the high-side driving chip and the low-side driving chip can be small, the electrical connection between the high-side driving chip and the low-side driving chip can be facilitated, and the electrical connection between the high-side driving chip and the low-side driving chip can be prevented from interfering with the electrical connection wire between the high-side power chip and the high-side driving chip.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor device. Background Technology

[0002] Electronic control boards for devices such as air conditioners and washing machines can incorporate semiconductor devices like smart power blocks. In existing smart power modules, the signal connection between the IC driver chip and the IGBT power chip requires bonding via electrical connection wires. When there is a significant height difference between the solder joints on the IC driver chip and the IGBT power chip, the arc length of the electrical connection wire between them will be large. This not only causes wire breakage during the molding process due to the flow of molding compound, leading to internal short circuits in the smart power block, but also causes arc deformation and solder joint breakage due to vibrations during subsequent transportation.

[0003] In some semiconductor devices, jumper pins are used to connect the IC driver chip and the IGBT power chip, thereby shortening the length of the electrical connection line. However, since the high-side IC driver chip and the low-side IC driver chip are far apart, the interconnection between the high-side IC driver chip and the low-side IC driver chip will affect the bonding of the jumper electrical connection, and the interconnection stability between the high-side IC driver chip and the low-side IC driver chip is also poor. Summary of the Invention

[0004] The present invention aims to at least solve one of the technical problems existing in the prior art. Therefore, one object of the present invention is to provide a semiconductor device that is more stable and reliable.

[0005] According to the semiconductor device of the present invention, the semiconductor device has a lateral direction, a longitudinal direction, and a vertical direction, the lateral direction, the longitudinal direction, and the vertical direction being perpendicular to each other, the semiconductor device comprising: a molding compound; A substrate, at least partially disposed within the molding compound, the substrate including laterally spaced high-side power pads and low-side power pads, a low-side power chip disposed on the low-side power pads, and a first high-side power chip, a second high-side power chip, and a third high-side power chip disposed laterally spaced on the high-side power pads, wherein the first high-side power chip is laterally closer to the low-side power pads than the second high-side power chip; A driver-side pin frame is at least partially disposed within the molding compound and at least partially spaced apart on one side of the substrate along its longitudinal direction. The driver-side pin frame extends at least partially from the molding compound. The driver-side pin frame is provided with horizontally spaced high-side driver pads and low-side driver pads. The high-side driver pads and high-side power pads are at least partially vertically aligned, and the low-side driver pads and low-side power pads are at least partially vertically aligned. High-side driver chips and low-side driver chips are respectively disposed on the high-side driver pads and low-side driver pads. The low-side driver chip and the low-side power chip are electrically connected. The first high-side power chip, the second high-side power chip, and the third high-side power chip are all electrically connected to the high-side driver chip. The high-side driver chip and the low-side driver chip are electrically connected. The orthographic projection of the high-side drive pad in the vertical direction is defined as the vertical projection of the high-side drive pad, and the orthographic projection of the high-side power pad in the vertical direction is defined as the vertical projection of the high-side power pad. The vertical projection of the high-side drive pad is defined as the orthogonal projection in the longitudinal direction, and the orthogonal projection of the high-side power pad in the longitudinal direction is defined as the longitudinal projection of the high-side power pad. The longitudinal projection of the high-side drive pad coincides at least partially with the longitudinal projection of the high-side power pad on the side laterally adjacent to the low-side power pad, and the longitudinal projection of the high-side drive pad protrudes at least partially relative to the longitudinal projection of the high-side power pad toward the side laterally adjacent to the low-side power pad.

[0006] The specific advantages or beneficial effects of the above scheme are as follows: it not only makes the distance between the high-side driver chip and the low-side driver chip smaller, which facilitates the electrical connection between the two, but also prevents the electrical connection wire between the high-side driver chip and the low-side driver chip from interfering with the electrical connection wire between the high-side power chip and the high-side driver chip.

[0007] In some examples of the present invention, the portion of the longitudinal projection of the high-side drive pad and the longitudinal projection of the high-side power pad that overlaps with each other has a horizontal dimension of A, and the horizontal dimension of the longitudinal projection of the high-side power pad is B, with 11.16% < A / B < 13.64%.

[0008] In some examples of the present invention, the orthographic projection of the first high-side power chip in the vertical direction is the vertical projection of the first high-side power chip, the orthographic projection of the second high-side power chip in the vertical direction is the vertical projection of the second high-side power chip, and the orthographic projection of the third high-side power chip in the vertical direction is the vertical projection of the third high-side power chip; the orthographic projection of the vertical projection of the first high-side power chip in the longitudinal direction is the longitudinal projection of the first high-side power chip, the orthographic projection of the vertical projection of the second high-side power chip in the longitudinal direction is the longitudinal projection of the second high-side power chip, and the orthographic projection of the vertical projection of the third high-side power chip in the longitudinal direction is the longitudinal projection of the third high-side power chip; the longitudinal projection of the high-side drive pad at least partially coincides with the longitudinal projection of the first high-side power chip, and the longitudinal projection of the high-side drive pad is spaced apart from the longitudinal projections of the second and third high-side power chips in the lateral direction.

[0009] In some examples of the present invention, there are three low-side power pads, which are arranged sequentially at intervals in the horizontal direction. The low-side power chips are respectively disposed on the three low-side power pads. The three low-side power chips are defined as a first low-side power chip, a second low-side power chip, and a third low-side power chip. Compared with the second low-side power chip and the third low-side power chip, the first low-side power chip is more adjacent to the high-side power pad in the horizontal direction. The orthographic projection of the first low-side power chip in the vertical direction is defined as the vertical projection of the first low-side power chip, and the orthographic projection of the vertical projection of the first low-side power chip in the longitudinal direction is defined as the longitudinal projection of the first low-side power chip. The longitudinal projection of the high-side driving pad covers the longitudinal projection of the first low-side power chip.

[0010] In some examples of the present invention, the side of the high-side driving chip that is laterally adjacent to the low-side driving chip is defined as the boundary of the high-side driving chip, and the side of the low-side driving chip that is laterally adjacent to the high-side driving chip is defined as the boundary of the low-side driving chip. The lateral distance between the boundary of the high-side driving chip and the boundary of the low-side driving chip is defined as C, and C satisfies the relationship: 3mm < C < 5.2mm.

[0011] In some examples of the present invention, the driving-side pin frame further includes three high-side input signal pins. The high-side driving pad is at least partially protruding longitudinally toward the substrate relative to the low-side driving pad. The high-side driving pad and the low-side driving pad are formed with grooves. The three high-side input signal pins are located laterally in the grooves and are spaced apart on the side of the high-side driving pad that is longitudinally away from the substrate. All three high-side input signal pins are electrically connected to the high-side driving chip.

[0012] In some examples of the present invention, the driver-side pin frame further includes a first high-side driver floating power supply ground pin, a second high-side driver floating power supply ground pin, and a third high-side driver floating power supply ground pin that are horizontally spaced apart. Compared to the second high-side driver floating power supply ground pin and the third high-side driver floating power supply ground pin, the first high-side driver floating power supply ground pin is more horizontally adjacent to the low-side driver pad. The three high-side input signal pins are all horizontally spaced between the first high-side driver floating power supply ground pin and the low-side driver pad.

[0013] In some examples of the present invention, all three high-side input signal pins are electrically connected to the low-side driver chip and the high-side driver chip.

[0014] In some examples of the present invention, the high-side input signal pin further includes a first pin segment, a second pin segment, and a third pin segment. The first pin segment and the third pin segment both extend vertically. The third pin segment is spaced apart on the side of the first pin segment that is laterally away from the low-side drive pad. The second pin segment is connected between the first pin segment and the third pin segment. The second pin segment is electrically connected to the low-side drive chip, and the third pin segment is electrically connected to the high-side drive chip.

[0015] In some examples of the present invention, a high-side electrical connection pad is provided on the side of the high-side driver chip adjacent to the boundary of the high-side driver chip, and a low-side electrical connection pad is provided on the side of the low-side driver chip adjacent to the boundary of the low-side driver chip, and an electrical connection line is connected between the high-side electrical connection pad and the low-side electrical connection pad.

[0016] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0017] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a schematic diagram of a semiconductor device according to an embodiment of the present invention; Figure 2 This is a partial schematic diagram of a semiconductor device according to a first embodiment of the present invention; Figure 3 This is a partial schematic diagram of a semiconductor device according to a second embodiment of the present invention; Figure 4 This is a partial schematic diagram of a semiconductor device according to an embodiment of the present invention; Figure 5 This is a partial cross-sectional view of a semiconductor device according to an embodiment of the present invention.

[0018] Figure label: 100. Semiconductor devices; 10. Plastic sealant; 20. Substrate; 21. High-side power pad; 211. First high-side power chip; 212. Second high-side power chip; 213. Third high-side power chip; 22. Low-side power pad; 221. Low-side power chip; 222. First low-side power chip; 223. Second low-side power chip; 224. Third low-side power chip; 30. Driver-side pin frame; 31. High-side driver pad; 311. High-side driver chip; 3111. High-side driver chip boundary; 3112. High-side electrical connection pad; 32. Low-side driver pad; 321. Low-side driver chip; 3211. Low-side driver chip boundary; 3212. Low-side electrical connection pad; 33. High-side input signal pin; 331. First pin segment; 332. Second pin segment; 333. Third pin segment; 34. First high-side driver floating power supply ground pin; 35. Second high-side driver floating power supply ground pin; 36. Third high-side driver floating power supply ground pin. Detailed Implementation

[0019] The following is for reference. Figures 1-5 A semiconductor device 100 according to an embodiment of the present invention is described. The semiconductor device 100 can be applied to a circuit board assembly, the circuit board assembly can be applied to an electrical control box, and the electrical control box can be applied to an electrical device.

[0020] Combination Figures 1-5 As shown, the semiconductor device 100 according to the present invention mainly includes: a molding compound 10, a substrate 20, and a drive-side pin frame 30. The substrate 20 is at least partially disposed within the molding compound 10. The substrate 20 may be completely encapsulated by the molding compound 10, or it may be partially encapsulated and partially exposed on the surface of the molding compound 10. The drive-side pin frame 30 is at least partially disposed within the molding compound 10, and partially extends out of the molding compound 10 for electrical connection with external components. The molding compound 10 protects the substrate 20 and the drive-side pin frame 30 within the semiconductor device 100, ensuring their stable placement and providing electrical insulation from external sources, thus guaranteeing the structural reliability of the semiconductor device 100. It should be noted that the pins of the drive-side pin frame 30 are spaced apart to ensure electrical isolation between them, and the longitudinal dimensions of the portions of the pins extending out of the molding compound 10 are inconsistent; this will not be elaborated further here.

[0021] It should be noted that, in one embodiment of the present invention, a small portion of the drive-side pin frame 30 extends longitudinally and is connected to the substrate 20, while the majority of the drive-side pin frame 30 is longitudinally spaced apart from the substrate 20.

[0022] In another embodiment of the present invention, a small portion of the substrate 20 extends longitudinally into the drive-side pin frame 30, while the majority of the substrate 20 is longitudinally spaced apart from the drive-side pin frame 30.

[0023] In another embodiment of the present invention, the substrate 20 and the drive-side pin frame 30 are completely separated from each other in the longitudinal direction.

[0024] It should be noted that the encapsulated body 10 has a horizontal, vertical and a longitudinal direction, and the horizontal, vertical and a longitudinal direction are perpendicular to each other.

[0025] Furthermore, the substrate 20 includes power pads on which power chips are disposed, and the drive-side pin frame 30 has drive pads on which drive chips are disposed. The signal connection between the power chip and the drive chip needs to be fixed by soldering to the corresponding pads on the power chip and the drive chip respectively through electrical connection lines. Due to the structural design of the semiconductor device 100, the drive-side pin frame 30 needs to be set vertically higher than the substrate 20 so that the drive chip is away from the high-temperature area of ​​the power chip, thereby improving the heat dissipation effect. At the same time, it increases the electrical clearance and creepage distance, reduces the risk of high voltage interference and crosstalk, and improves the stability of drive control and system safety.

[0026] In some embodiments of the present invention, a first high-side power chip 211, a second high-side power chip 212, and a third high-side power chip 213 are arranged horizontally and sequentially. Compared with the second high-side power chip 212, the first high-side power chip 211 is more horizontally adjacent to the low-side power chip 22. A high-side drive pad 31 and a low-side drive pad 32 are arranged horizontally and spaced apart on the drive-side pin frame 30. The high-side drive pad 31 and the high-side power pad 21 are at least partially corresponding vertically, and the low-side drive pad 32 and the low-side power pad 22 are at least partially corresponding vertically. A high-side drive chip 311 and a low-side drive chip 321 are respectively arranged on the high-side drive pad 31 and the low-side drive pad 32. The low-side drive chip 321 and the low-side power chip 221 are electrically connected. The first high-side power chip 211, the second high-side power chip 212, and the third high-side power chip 213 are all electrically connected to the high-side drive chip 311.

[0027] Combination Figures 1-4As shown, the high-side driver chip 311 and the low-side driver chip 321 are electrically connected; the vertical orthographic projection of the high-side driver pad 31 is set as the vertical projection of the high-side driver pad 31, and the vertical orthographic projection of the high-side power pad 21 is set as the vertical projection of the high-side power pad 21; the longitudinal orthographic projection of the vertical projection of the high-side driver pad 31 is set as the longitudinal projection of the high-side driver pad 31, and the longitudinal orthographic projection of the high-side power pad 21 is set as the longitudinal projection of the high-side power pad 21; the longitudinal projection of the high-side driver pad 31 and the longitudinal projection of the high-side power pad 21 are at least partially coincident on the side of the high-side power pad 22 that is laterally adjacent to the low-side power pad 22, and the longitudinal projection of the high-side driver pad 31 is at least partially protruding relative to the longitudinal projection of the high-side power pad 21 toward the side of the high-side power pad 22 that is laterally adjacent to the low-side power pad 22.

[0028] Specifically, by aligning at least a portion of the longitudinal projection of the high-side drive pad 31 with the longitudinal projection of the high-side power pad 21 on the side laterally adjacent to the low-side power pad 22, and by setting the longitudinal projection of the high-side drive pad 31 to at least a portion protrude relative to the longitudinal projection of the high-side power pad 21 toward the side laterally adjacent to the low-side power pad 22, the high-side drive pad 31 can be made to be closer to the low-side drive pad 32 in the lateral direction, thereby reducing the lateral distance between the high-side drive chip 311 on the high-side drive pad 31 and the low-side drive chip 321 on the low-side drive pad 32.

[0029] By electrically connecting the high-side driving chip 311 and the low-side driving chip 321, when the high-side driving chip 311 receives an input signal to turn on, it can control the low-side driving chip 321 to turn off, and when the low-side driving chip 321 receives an input signal to turn on, it can control the high-side driving chip 311 to turn off. This achieves interlocking between the high-side driving chip 311 and the low-side driving chip 321, preventing them from turning on simultaneously, avoiding damage to the semiconductor device 100, and improving the stability of the semiconductor device 100.

[0030] Therefore, by reducing the lateral distance between the high-side driving chip 311 and the low-side driving chip 321, the electrical connection between the high-side driving chip 311 and the low-side driving chip 321 can be made more stable, thereby making the interlock between the high-side driving chip 311 and the low-side driving chip 321 more reliable.

[0031] Furthermore, the side of the driver chip facing away from the driver pad in the vertical direction is defined as the upper side of the driver chip, and the side of the power chip facing away from the power pad in the vertical direction is defined as the upper side of the power chip. If the two ends of the electrical connection wire are directly soldered to the upper side of the driver chip and the upper side of the power chip respectively, the electrical connection wire will form a curved arc shape. The height difference between the upper side of the driver chip and the upper side of the power chip in the vertical direction is defined as d. When d > 2.3mm, the arc length of the electrical connection wire will be large. Not only will the vibration during transportation after the electrical connection is completed cause the electrical connection wire to deform and the solder joint of the electrical connection wire to break, but the flow of the molding compound during the molding process will also cause the electrical connection wire to break, thereby causing a short circuit inside the semiconductor device 100.

[0032] Therefore, the electrical connection between the power chip and the driver chip needs to be made through jumper pins. This can reduce the arc length of the electrical connection wire between the power chip and the jumper pin, as well as between the driver chip and the jumper pin, thereby improving the stability and reliability of the electrical connection between the power chip and the driver chip.

[0033] By placing the high-side driver pad 31 closer to the low-side driver chip 321 laterally, interference can be prevented between the electrical connection wires between the high-side driver chip 311 and the low-side driver chip 321, and between the electrical connection wires between the high-side power chip and the jumper pin. This can improve the stability of the electrical connection between the high-side driver chip 311 and the low-side driver chip 321, as well as the stability of the electrical connection between the high-side power chip and the jumper pin.

[0034] In some embodiments of the present invention, functional pins in the drive-side pin frame 30 extend from the longitudinal side of the molded body 10 adjacent to the drive-side pin frame 30 and are connected to external devices to perform functions. The pins in the drive-side pin frame 30 that are connected to at least one side of the molded body 10 in the lateral direction, such as jumper pins, are high-voltage pins. The high-voltage pins need to be insulated at the ends that are connected to the molded body 10 in the lateral direction to prevent the jumper pins from extending out of the molded body 10.

[0035] Combination Figures 1-4 As shown, the horizontal dimension of the part where the longitudinal projection of the high-side drive pad 31 and the longitudinal projection of the high-side power pad 21 overlap is A, and the horizontal dimension of the longitudinal projection of the high-side power pad 21 is B. 11.16% < A / B < 13.64%.

[0036] Specifically, by setting the lateral dimension A of the portion where the longitudinal projection of the high-side drive pad 31 and the longitudinal projection of the high-side power pad 21 overlap is within a reasonable range, it can prevent A from being too large, which would result in a large lateral distance between the high-side drive pad 31 and the low-side drive pad 32, leading to unstable electrical connection between the high-side drive chip 311 and the low-side drive chip 321, and causing the electrical connection lines between the high-side drive chip 311 and the low-side drive chip 321 to interfere with the electrical connection lines between the high-side power chip and the jumper pin.

[0037] On the other hand, this also prevents A from being too small, which would result in an excessively small distance between the high-side drive pad 31 and the low-side drive pad 32. This would cause the high-side drive pad 31 to interfere with the low-side drive pad 32, and the low-side drive pad 32 and high-side drive pad 31 to encroach on each other's space, affecting the normal setup of the low-side drive chip 321 and the high-side drive chip 311. Furthermore, this also prevents the high-side drive chip 311 and the low-side drive chip 321 from being too close together, leading to poor heat dissipation.

[0038] Therefore, limiting the range of A / B to between 11.16% and 13.64% can improve the structural reliability of the semiconductor device 100.

[0039] Combination Figures 1-4 As shown, the orthographic projection of the first high-side power chip 211 in the vertical direction is the vertical projection of the first high-side power chip 211, the orthographic projection of the second high-side power chip 212 in the vertical direction is the vertical projection of the second high-side power chip 212, and the orthographic projection of the third high-side power chip 213 in the vertical direction is the vertical projection of the third high-side power chip 213; the orthographic projection of the vertical projection of the first high-side power chip 211 in the longitudinal direction is the longitudinal projection of the first high-side power chip 211, the orthographic projection of the vertical projection of the second high-side power chip 212 in the longitudinal direction is the longitudinal projection of the second high-side power chip 212, and the orthographic projection of the vertical projection of the third high-side power chip 213 in the longitudinal direction is the longitudinal projection of the third high-side power chip 213; the longitudinal projection of the high-side drive pad 31 at least partially overlaps with the longitudinal projection of the first high-side power chip 211, and the longitudinal projection of the high-side drive pad 31 is spaced apart from the longitudinal projections of the second high-side power chip 212 and the third high-side power chip 213 in the horizontal direction.

[0040] This configuration ensures that the wire bonding connections between the first high-side power chip 211, the second high-side power chip 212, and the third high-side power chip 213 and the jumper pins will not interfere with the wire bonding connections between the high-side drive chip 311 and the low-side drive chip 321, thereby further improving the structural stability of the semiconductor device 100.

[0041] Combination Figures 1-4As shown, there are three low-side power pads 22, which are arranged sequentially and spaced apart in the horizontal direction. Low-side power chips 221 are respectively arranged on the three low-side power pads 22. The three low-side power chips 221 are designated as the first low-side power chip 222, the second low-side power chip 223, and the third low-side power chip 224. Compared with the second low-side power chip 223 and the third low-side power chip 224, the first low-side power chip 222 is closer to the high-side power pad 21 in the horizontal direction. The orthographic projection of the first low-side power chip 222 in the vertical direction is defined as the vertical projection of the first low-side power chip 222, and the orthographic projection of the vertical projection of the first low-side power chip 222 in the longitudinal direction is defined as the longitudinal projection of the first low-side power chip 222. The longitudinal projection of the high-side drive pad 31 covers the longitudinal projection of the first low-side power chip 222.

[0042] Specifically, since the wire bonding connection between the low-side power chip 221 and the low-side driver chip 321 does not affect the wire bonding connection between the low-side driver chip 321 and the high-side driver chip 311, even if the longitudinal projection of the high-side driver pad 31 covers the longitudinal projection of the first low-side power chip 222, it will not affect the electrical connection between the high-side driver chip 311 and the low-side driver chip 321. Under the premise that the high-side driver pad 31 does not affect the electrical connection between the high-side power chip and the high-side driver chip 311, the lateral dimension of the high-side driver pad 31 can remain unchanged, thus ensuring the heat dissipation performance of the high-side driver chip 311.

[0043] Combination Figure 4 As shown, the side of the high-side driving chip 311 that is laterally adjacent to the low-side driving chip 321 is defined as the high-side driving chip boundary 3111, and the side of the low-side driving chip 321 that is laterally adjacent to the high-side driving chip 311 is defined as the low-side driving chip boundary 3211. The distance between the high-side driving chip boundary 3111 and the low-side driving chip boundary 3211 in the lateral direction is defined as C, and C satisfies the relationship: 3mm < C < 5.2mm.

[0044] Specifically, by setting the lateral distance C between the high-side driving chip boundary 3111 and the low-side driving chip boundary 3211 within a reasonable range, it can prevent the lateral distance C between the high-side driving chip boundary 3111 and the low-side driving chip boundary 3211 from being too large, which would cause the electrical connection wire between the high-side driving chip 311 and the low-side driving chip 321 to be too long and the electrical connection between the high-side driving chip 311 and the low-side driving chip 321 to be unstable.

[0045] On the other hand, it can also prevent the lateral distance C between the high-side driving chip boundary 3111 and the low-side driving chip boundary 3211 from being too small, which would cause the high-side driving pad 31 and the low-side driving pad 32 to encroach on each other's space, prevent the high-side driving chip 311 and the low-side driving chip 321 from being properly placed on the high-side driving pad 31 and the low-side driving pad 32, and result in poor heat dissipation performance of the high-side driving chip 311 and the low-side driving chip 321.

[0046] Combination Figures 1-4 As shown, the driving side pin frame 30 also includes three high-side input signal pins 33. The high-side driving pad 31 is at least partially protruding from the low-side driving pad 32 in the longitudinal direction toward the substrate 20. The high-side driving pad 31 and the low-side driving pad 32 are formed with grooves. The three high-side input signal pins 33 are located in the grooves in the transverse direction and are spaced apart on the side of the high-side driving pad 31 that is longitudinally away from the substrate 20. All three high-side input signal pins 33 are electrically connected to the high-side driving chip 311.

[0047] Specifically, by making the high-side drive pad 31 at least partially protrude from the low-side drive pad 32 in the longitudinal direction toward the substrate 20, a groove can be formed on the side of the high-side drive pad 31 that is longitudinally away from the substrate 20. Three high-side input signal pins 33 extend in the longitudinal direction and are disposed in the groove formed by the high-side drive pad 31 and the low-side drive pad 32. The high-side input signal pins 33 can provide input signals to the high-side drive chip 311. This not only makes the structure between the high-side input signal pins 33 and the low-side drive pad 32 and the high-side drive pad 31 more compact, but also makes the space occupied by the high-side input pins in the lateral direction of the drive-side pin frame 30 smaller, thereby reducing the lateral size of the drive-side pin frame 30.

[0048] Combination Figures 1-4 As shown, the driver-side pin frame 30 also includes a first high-side driver floating power supply ground pin 34, a second high-side driver floating power supply ground pin 35, and a third high-side driver floating power supply ground pin 36 that are horizontally spaced apart. Compared to the second high-side driver floating power supply ground pin 35 and the third high-side driver floating power supply ground pin 36, the first high-side driver floating power supply ground pin 34 is horizontally closer to the low-side driver pad 32. The three high-side input signal pins 33 are all horizontally spaced between the first high-side driver floating power supply ground pin 34 and the low-side driver pad 32.

[0049] Specifically, the first high-side drive floating power supply ground pin 34, the second high-side drive floating power supply ground pin 35, and the third high-side drive floating power supply ground pin 36 are arranged sequentially and spaced apart in the horizontal direction. Each of the first high-side drive floating power supply ground pin 34, the second high-side drive floating power supply ground pin 35, and the third high-side drive floating power supply ground pin 36 is provided with a bootstrap chip. The bootstrap chip is electrically connected to the high-side drive chip 311. By arranging the three high-side input signal pins 33 horizontally and spaced between the first high-side drive floating power supply ground pin 34 and the low-side drive pad 32, the structure of the drive pin frame can be made more compact.

[0050] Combination Figure 3 As shown, in the first embodiment of the present invention, all three high-side input signal pins 33 are electrically connected to the low-side driver chip 321 and the high-side driver chip 311. With this configuration, the high-side driver chip 311 and the low-side driver chip 321 can be interconnected and interlocked through the jumpers of the high-side input signal pins 33. Compared with the technical solution where the high-side driver chip 311 and the low-side driver chip 321 are not interconnected, this embodiment does not add connection pads on the high-side driver chip 311 and the low-side driver chip 321, that is, it does not change the structure of the high-side driver chip 311 and the low-side driver chip 321, but uses the original high-side driver chip 311 and the low-side driver chip 321, which simplifies the structural design of the semiconductor device 100.

[0051] Combination Figure 3 As shown, the high-side input signal pin 33 also includes a first pin segment 331, a second pin segment 332, and a third pin segment 333. The first pin segment 331 and the third pin segment 333 both extend vertically. The third pin segment 333 is spaced apart on the side of the first pin segment 331 that is laterally away from the low-side drive pad 32. The second pin segment 332 is connected between the first pin segment 331 and the third pin segment 333. The second pin segment 332 is electrically connected to the low-side drive chip 321, and the third pin segment 333 is electrically connected to the high-side drive chip 311.

[0052] Specifically, in the first embodiment of the present invention, since the high-side drive pad 31 is at least partially protruding relative to the low-side drive pad 32 in the longitudinal direction toward the substrate 20, the distance between the second pin segment 332 and the low-side drive chip 321 is shorter, and the distance between the third pin segment 333 and the high-side drive chip 311 is shorter. By electrically connecting the second pin segment 332 to the low-side drive chip 321 and the third pin segment 333 to the high-side drive chip 311, the electrical connection between the low-side drive chip 321 and the high-side drive chip 311 can be made more stable.

[0053] Combination Figure 2As shown, in the second embodiment of the present invention, a high-side electrical connection pad 3112 is provided on the side of the high-side driving chip 3111 adjacent to the high-side driving chip boundary 3111, and a low-side electrical connection pad 3212 is provided on the side of the low-side driving chip 3211 adjacent to the low-side driving chip boundary 3211. An electrical connection line is connected between the high-side electrical connection pad 3112 and the low-side electrical connection pad 3212.

[0054] Specifically, since the lateral distance between the high-side drive pad 31 and the low-side drive pad 32 is small, low-side electrical connection pads 3212 and high-side electrical connection pads 3112 can be respectively provided on the low-side drive chip 321 and the high-side drive chip 311. This allows the high-side drive chip 311 and the low-side drive chip 321 to be electrically connected through their respective electrical connection pads. This makes the interconnection between the high-side drive chip 311 and the low-side drive chip 321 more direct and improves the efficiency of their interlocking.

[0055] It should be noted that the power chip can be composed of an insulated gate bipolar transistor (IGBT) and a freewheeling diode (FRD), or it can be a metal-oxide-semiconductor field-effect transistor (MOS), or it can be a reverse-conducting IGBT that integrates the IGBT and the freewheeling diode into a single chip, etc.

[0056] Let L be the horizontal dimension of the encapsulated body 10, where L satisfies the relationship: L < 2.3 mm.

[0057] In some embodiments of the present invention, the electrical connection between the high-side driving chip 311 and the high-side driving floating power supply ground pin is a gold-copper wire, the electrical connection between the high-side driving chip 311 and the high-side jumper pin is a gold-copper wire, the electrical connection between the gate pad of the high-side power chip and the high-side jumper pin is an aluminum wire, and the electrical connection between the emitter pad of the high-side power chip and the high-side driving floating power supply ground pin is an aluminum wire.

[0058] In some embodiments of the present invention, the diameter of the aluminum wire is 5 mil, which is larger than that of the gold-copper wire. This can further reduce the risk of wire arc deformation and molding failure caused by vibration.

[0059] In some embodiments of the present invention, the substrate 20 may include pads and an insulating heat dissipation layer disposed below the pads. The insulating heat dissipation layer is mainly formed by sequentially stacking an insulating resin sheet and a copper layer, or by sequentially stacking an insulating resin sheet and an aluminum layer. The main material of the pads is copper or aluminum. In this case, most of the substrate 20 is encapsulated by the molding compound 10, and the outer surface of the copper layer or the outer surface of the aluminum layer in the insulating heat dissipation layer of the substrate 20 is exposed from the outer surface of the molding compound 10. Alternatively, the substrate 20 may include pads, an insulating layer, and a heat dissipation layer formed by sequentially stacking. The main material of the pads is a copper layer or an aluminum layer, the main material of the insulating layer is an AlN, or Al, or SiN, or a ceramic insulating layer composed of several materials, and the main material of the heat dissipation layer is a copper layer or an aluminum layer. In this case, most of the substrate 20 is encapsulated by the molding compound 10, and the outer surface of the heat dissipation layer of the substrate 20 is exposed from the outer surface of the molding compound 10. Alternatively, the substrate 20 may include pads and an insulating layer disposed below the pads. The main material of the insulating layer is an AlN ceramic insulating layer, or Al... The substrate 20 may be constructed with a ceramic insulating layer or a SiN ceramic insulating layer, in which case most of the substrate 20 is encapsulated by the molding compound 10, and the outer surface of the insulating layer of the substrate 20 is exposed from the outer surface of the molding compound 10; alternatively, the substrate 20 may be formed solely of solder pads, in which case the substrate 20 is disposed within the molding compound 10, and the molding compound 10 completely encapsulates the substrate 20. The specific structural form of the substrate 20 can be adjusted according to the specific requirements and application environment of the semiconductor device 100.

[0060] The circuit board assembly according to the present invention may mainly include the semiconductor device 100 described above. Specifically, since the semiconductor device 100 has a more reliable structure and higher reliability and stability, applying the semiconductor device 100 to the circuit board assembly can prevent short circuits in the circuit board assembly and improve the working performance of the circuit board assembly.

[0061] The electrical control box according to the present invention may mainly include the aforementioned circuit board assembly. Specifically, since the circuit board assembly has a more reliable structure and good working performance, applying the circuit board assembly to the electrical control box can improve the working performance of the electrical control box and extend its service life.

[0062] The electrical device according to the present invention may mainly include: the aforementioned electrical control box. Specifically, since the electrical control box has a more reliable structure and good working performance, applying the electrical control box to the electrical device can improve the working performance and quality of the electrical device.

[0063] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0064] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example.

[0065] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A semiconductor device, characterized by comprising: The semiconductor device (100) includes: A molding compound (10) having a horizontal, a vertical and a longitudinal dimension, wherein the horizontal, the longitudinal and the vertical dimensions are perpendicular to each other; A substrate (20) is at least partially disposed within the molding compound (10). The substrate (20) includes a high-side power pad (21) and a low-side power pad (22) spaced laterally. A low-side power chip (221) is disposed on the low-side power pad (22). A first high-side power chip (211), a second high-side power chip (212), and a third high-side power chip (213) are disposed on the high-side power pad (21) spaced laterally. The first high-side power chip (211) is more laterally adjacent to the low-side power pad (22) than the second high-side power chip (212). A drive-side pin frame (30) is at least partially disposed within the molding compound (10) and spaced apart on one side of the substrate (20) in the longitudinal direction. The drive-side pin frame (30) extends at least partially from the molding compound (10). The drive-side pin frame (30) is provided with a high-side drive pad (31) and a low-side drive pad (32) spaced apart laterally. The high-side drive pad (31) and the high-side power pad (21) are at least partially corresponding in the longitudinal direction. The low-side drive pad (32) and the low-side power pad (21) are... The disks (22) are at least partially corresponding in the longitudinal direction. The high-side drive pad (31) and the low-side drive pad (32) are respectively provided with a high-side drive chip (311) and a low-side drive chip (321). The low-side drive chip (321) and the low-side power chip (221) are electrically connected. The first high-side power chip (211), the second high-side power chip (212) and the third high-side power chip (213) are all electrically connected to the high-side drive chip (311). The high-side drive chip (311) and the low-side drive chip (321) are electrically connected. The vertical projection of the high-side drive pad (31) is defined as the vertical projection of the high-side drive pad (31), and the vertical projection of the high-side power pad (21) is defined as the vertical projection of the high-side power pad (21). The vertical projection of the high-side drive pad (31) is defined as the longitudinal projection of the high-side drive pad (31), and the longitudinal projection of the high-side power pad (21) is defined as the longitudinal projection of the high-side power pad (21). The longitudinal projection of the high-side drive pad (31) coincides at least partially with the longitudinal projection of the high-side power pad (21) on the side laterally adjacent to the low-side power pad (22), and the longitudinal projection of the high-side drive pad (31) protrudes at least partially relative to the longitudinal projection of the high-side power pad (21) toward the side laterally adjacent to the low-side power pad (22).

2. The semiconductor device according to claim 1, wherein The horizontal dimension of the portion where the longitudinal projection of the high-side drive pad (31) and the longitudinal projection of the high-side power pad (21) overlap is A, and the horizontal dimension of the longitudinal projection of the high-side power pad (21) is B. 11.16% < A / B < 13.64%.

3. The semiconductor device according to claim 2, wherein The orthographic projection of the first high-side power chip (211) in the vertical direction is the vertical projection of the first high-side power chip (211); the orthographic projection of the second high-side power chip (212) in the vertical direction is the vertical projection of the second high-side power chip (212); and the orthographic projection of the third high-side power chip (213) in the vertical direction is the vertical projection of the third high-side power chip (213). The vertical projection of the first high-side power chip (211) is projected orthogonally in the longitudinal direction as the longitudinal projection of the first high-side power chip (211); the vertical projection of the second high-side power chip (212) is projected orthogonally in the longitudinal direction as the longitudinal projection of the second high-side power chip (212); and the vertical projection of the third high-side power chip (213) is projected orthogonally in the longitudinal direction as the longitudinal projection of the third high-side power chip (213). The longitudinal projection of the high-side drive pad (31) at least partially overlaps with the longitudinal projection of the first high-side power chip (211), and the longitudinal projection of the high-side drive pad (31) is spaced apart from the longitudinal projection of the second high-side power chip (212) and the longitudinal projection of the third high-side power chip (213) in the lateral direction.

4. The semiconductor device according to claim 2, wherein There are three low-side power pads (22), which are arranged sequentially and spaced apart in the horizontal direction. The low-side power chips (221) are respectively arranged on the three low-side power pads (22). The three low-side power chips (221) are designated as the first low-side power chip (222), the second low-side power chip (223), and the third low-side power chip (224). Compared with the second low-side power chip (223) and the third low-side power chip (224), the first low-side power chip (222) is closer to the high-side power pad (21) in the horizontal direction. The orthographic projection of the first low-side power chip (222) in the vertical direction is designated as the vertical projection of the first low-side power chip (222). The orthographic projection of the vertical projection of the first low-side power chip (222) in the vertical direction is designated as the longitudinal projection of the first low-side power chip (222). The longitudinal projection of the high-side drive pad (31) covers the longitudinal projection of the first low-side power chip (222).

5. The semiconductor device according to claim 2, wherein The side of the high-side driving chip (311) that is laterally adjacent to the low-side driving chip (321) is defined as the high-side driving chip boundary (3111), and the side of the low-side driving chip (321) that is laterally adjacent to the high-side driving chip (311) is defined as the low-side driving chip boundary (3211). The lateral distance between the high-side driving chip boundary (3111) and the low-side driving chip boundary (3211) is defined as C, where C satisfies the relationship: 3mm < C < 5.2mm.

6. The semiconductor device according to claim 2, characterized in that, The driving-side pin frame (30) also includes three high-side input signal pins (33). The high-side driving pad (31) is at least partially protruding from the low-side driving pad (32) in the longitudinal direction toward the substrate (20). The high-side driving pad (31) and the low-side driving pad (32) form a groove. The three high-side input signal pins (33) are located in the groove in the transverse direction and are spaced apart on the side of the high-side driving pad (31) that is longitudinally away from the substrate (20). All three high-side input signal pins (33) are electrically connected to the high-side driving chip (311).

7. The semiconductor device according to claim 6, characterized in that, The driving-side pin frame (30) also includes a first high-side driving floating power supply ground pin (34), a second high-side driving floating power supply ground pin (35), and a third high-side driving floating power supply ground pin (36) that are horizontally spaced apart. Compared with the second high-side driving floating power supply ground pin (35) and the third high-side driving floating power supply ground pin (36), the first high-side driving floating power supply ground pin (34) is more horizontally adjacent to the low-side driving pad (32). The three high-side input signal pins (33) are all horizontally spaced between the first high-side driving floating power supply ground pin (34) and the low-side driving pad (32).

8. The semiconductor device according to claim 1, characterized in that, The three high-side input signal pins (33) are all electrically connected to the low-side driver chip (321) and the high-side driver chip (311).

9. The semiconductor device according to claim 8, characterized in that, The high-side input signal pin (33) further includes a first pin segment (331), a second pin segment (332), and a third pin segment (333). The first pin segment (331) and the third pin segment (333) both extend vertically. The third pin segment (333) is spaced apart on the side of the first pin segment (331) that is laterally away from the low-side drive pad (32). The second pin segment (332) is connected between the first pin segment (331) and the third pin segment (333). The second pin segment (332) is electrically connected to the low-side drive chip (321). The third pin segment (333) is electrically connected to the high-side drive chip (311).

10. The semiconductor device according to claim 1, characterized in that, The high-side driver chip (311) has a high-side electrical connection pad (3112) on the side adjacent to the boundary (3111) of the high-side driver chip, and the low-side driver chip (321) has a low-side electrical connection pad (3212) on the side adjacent to the boundary (3211) of the low-side driver chip. An electrical connection line is connected between the high-side electrical connection pad (3112) and the low-side electrical connection pad (3212).

Images