An emulation debugging system, an emulation debugging method, an emulation debugging device, and a medium

Abstract

This invention provides a simulation debugging system, simulation debugging method, simulation debugging equipment, and medium, belonging to the field of chip simulation and debugging. The system receives control commands through a central processing unit and generates control signals based on these commands. A simulation channel encoding unit encodes the control signals to obtain a target encoded signal. A source emulator interface unit determines the interface application and accesses the simulation interface signal of the application. A simulation channel decoding unit receives the simulation interface signal and the target encoded signal, decodes them to determine the target signal channel, and sends the target signal channel to a simulation channel signal allocation unit. The simulation channel signal allocation unit receives the target signal channel sent by the simulation channel decoding unit, determines the target emulator based on the target signal channel, and then performs simulation debugging based on the target emulator to obtain the simulation debugging result.

Description

Technical Field

[0001] This invention relates to the field of chip simulation and debugging, and in particular to a simulation and debugging system, simulation and debugging method, simulation and debugging equipment and medium. Background Technology

[0002] As the scale of industrial field data acquisition and control equipment continues to expand and the number of tasks to be processed increases, the core processing unit has gradually shifted from a single processor to a multi-processor collaborative concurrent architecture. Against this backdrop, traditional methods for field debugging and laboratory simulation of multi-processors typically face numerous limitations: using multiple simulators to interface with each processor not only occupies physical space but also significantly increases costs; chaining the JTAG (Joint Test Action Group) interfaces of multiple target boards to the same simulator often suffers from differences in signal scanning speed—the system can only operate at the lowest speed to ensure stable communication for all target simulation boards, thus limiting the simulation efficiency of high-speed boards. Furthermore, this method causes all other target boards in the link to reset simultaneously when performing an external reset on a single board, thus requiring the use of a kernel reset method, limiting operational flexibility. Simultaneously, the chained connection interconnects the signal grounds of multiple target boards, potentially causing current flow between different target simulation boards due to ground potential differences, thereby posing a risk to system stability. Therefore, a simulation debugging method is urgently needed to solve one or more of the above technical challenges. Summary of the Invention

[0003] The main objective of this invention is to provide a simulation debugging system, simulation debugging method, simulation debugging equipment, and medium, aiming to solve the problems mentioned in the background art, such as high cost, low debugging efficiency, mutual interference of reset operations, and signal ground potential conflicts, in traditional simulation debugging schemes in multi-processor collaborative working scenarios.

[0004] In a first aspect, embodiments of the present invention provide a simulation debugging system, the simulation debugging system comprising a source simulator interface unit, a simulation channel decoding unit, a simulation channel signal distribution unit, and a central processing unit, wherein the central processing unit includes a simulation channel encoding unit, wherein... The central processing unit is used to receive control commands and generate corresponding control signals according to the control commands; encode the control signals through the simulation channel encoding unit to obtain a target encoded signal, and send the target encoded signal to the simulation channel decoding unit; The source emulator interface unit is used to determine the interface application corresponding to the simulation debugging system, and to access the simulation interface signal corresponding to the interface application through the source emulator interface unit. The simulation channel decoding unit is used to receive the simulation interface signal and the target encoded signal, and decode the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and send the target signal channel to the simulation channel signal allocation unit; The simulation channel signal allocation unit is used to receive the target signal channel sent by the simulation channel decoding unit, determine the target path simulator based on the target signal channel, and then perform simulation debugging based on the target path simulator to obtain simulation debugging results.

[0005] Secondly, embodiments of the present invention provide a simulation debugging method applied to a simulation debugging system. The simulation debugging system includes a source simulator interface unit, a simulation channel decoding unit, a simulation channel signal allocation unit, and a central processing unit. The central processing unit includes a simulation channel encoding unit, comprising: The central processing unit receives control commands and generates corresponding control signals based on the control commands. The control signal is encoded by the simulation channel encoding unit to obtain the target encoded signal, and the target encoded signal is sent to the simulation channel decoding unit. The source emulator interface unit determines the interface application corresponding to the simulation debugging system, and the source emulator interface unit accesses the simulation interface signal corresponding to the interface application. The simulation channel decoding unit receives the simulation interface signal and the target encoded signal, decodes the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and sends the target signal channel to the simulation channel signal allocation unit. The simulation channel signal allocation unit receives the target signal channel sent by the simulation channel decoding unit, determines the target path simulator based on the target signal channel, and then performs simulation debugging based on the target path simulator to obtain simulation debugging results.

[0006] Thirdly, embodiments of the present invention also provide a simulation debugging device, the simulation debugging device including a processor, a memory, a computer program stored in the memory and executable by the processor, and a data bus for implementing communication between the processor and the memory, wherein when the computer program is executed by the processor, it implements the steps of any simulation debugging system provided in this specification.

[0007] Fourthly, embodiments of the present invention also provide a storage medium for computer-readable storage, characterized in that the storage medium stores one or more programs, which can be executed by one or more processors to implement the steps of any simulation debugging system provided in this specification.

[0008] This invention provides a simulation debugging system, a simulation debugging method, a simulation debugging device, and a medium. The method is applied to a simulation debugging system, which includes a source emulator interface unit, a simulation channel decoding unit, a simulation channel signal allocation unit, and a central processing unit (CPU). The CPU includes a simulation channel encoding unit. The method includes: receiving control commands through the CPU and generating corresponding control signals based on the control commands; encoding the control signals through the simulation channel encoding unit to obtain a target encoded signal and sending the target encoded signal to the simulation channel decoder unit; determining the interface application corresponding to the simulation debugging system through the source emulator interface unit and accessing the simulation interface signal corresponding to the interface application through the source emulator interface unit; receiving the simulation interface signal and the target encoded signal through the simulation channel decoding unit, and decoding the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application; by encoding the control signal and combining the decoded channel selection signal with the simulation interface signal, a specific target signal channel can be accurately identified and controlled; and the target signal channel is sent to the simulation channel signal allocation unit; the simulation channel signal allocation unit can accurately route the signal to the specified target emulator based on the decoding result. The simulation channel signal distribution unit receives the target signal channel sent by the simulation channel decoding unit, determines the target emulator based on the target signal channel, and then performs simulation debugging based on the target emulator to obtain the simulation debugging results. The central processing unit (CPU), acting as the unified instruction hub, receives and processes all control instructions and manages multiple target simulation channels, replacing the traditional approach of configuring an independent emulator for each processor or a complex chain connection. This significantly saves hardware costs, reduces equipment space, and simplifies system wiring and physical connection complexity. In this scheme, clear signal channels are used for logical differentiation and management. Each target emulator only connects to the source emulator interface unit with a signal ground when it is decoded and selected. At any given time, only one target simulation channel is connected to the source emulator interface unit, ensuring that there is no electrical signal interconnection between different target emulators. This architectural approach avoids the problem of direct physical connection of all target board signals caused by traditional chain connections. This effectively prevents loop currents and common-mode interference caused by ground potential differences, improves the electrical isolation between subsystems, enhances the stability and reliability of the entire simulation debugging system, and eliminates potential safety risks. This solves the problems mentioned in the background technology, such as high cost, low efficiency, reset interference, and ground potential conflict. Attached Figure Description

[0009] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 This is a schematic diagram of the module structure of a simulation debugging system provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of a first simulation signal interface provided in an embodiment of the present invention; Figure 3 A schematic diagram of a key signal acquisition circuit provided in an embodiment of the present invention; Figure 4 A schematic diagram of a liquid crystal display screen is provided for implementing this embodiment; Figure 5 This is a schematic diagram of a 20-pin connector structure provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of a 14-pin connector structure provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of a 10-pin connector structure provided in an embodiment of the present invention; Figure 8 A schematic block diagram of another simulation debugging system provided in an embodiment of the present invention; Figure 9 A flowchart illustrating a simulation debugging method provided in an embodiment of the present invention; Figure 10 This is a schematic block diagram of a simulation debugging device provided in an embodiment of the present invention. Detailed Implementation

[0011] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0012] The flowchart shown in the attached diagram is for illustrative purposes only and does not necessarily include all content and operations / steps, nor does it necessarily have to be performed in the order described. For example, some operations / steps can be broken down, combined, or partially merged, so the actual execution order may change depending on the actual situation.

[0013] It should be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0014] This invention provides a simulation debugging system, a simulation debugging method, a simulation debugging device, and a medium. The simulation debugging system can be applied to a simulation debugging device, which can be an electronic device such as a tablet computer, laptop computer, desktop computer, personal digital assistant, or wearable device. The simulation debugging device can be a simulator.

[0015] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0016] Please see Figure 1 , Figure 1 A simulation debugging system 200 provided in this application embodiment includes a source emulator interface unit 201, a simulation channel decoding unit 202, a simulation channel signal allocation unit 203, and a central processing unit 204. The central processing unit includes a simulation channel encoding unit. The central processing unit 204 is used to receive control commands and generate corresponding control signals according to the control commands; encode the control signals through the simulation channel encoding unit to obtain a target encoded signal, and send the target encoded signal to the simulation channel decoding unit. The source emulator interface unit 201 is used to determine the corresponding source emulator interface unit. The interface application is accessed through the source emulator interface unit to receive the simulation interface signal corresponding to the interface application; the simulation channel decoding unit 202 is used to receive the simulation interface signal and the target encoded signal, and decode them according to the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and send the target signal channel to the simulation channel signal allocation unit; the simulation channel signal allocation unit 203 is used to receive the target signal channel sent by the simulation channel decoding unit, and determine the target path emulator according to the target signal channel, and then perform simulation debugging according to the target path emulator to obtain the simulation debugging result.

[0017] For example, control commands are input via buttons or a touchscreen connected to the central processing unit (CPU), which then sends the commands to the CPU. The CPU receives the control commands and generates corresponding control signals based on them.

[0018] For example, the central processing unit 204 is provided with a simulation channel encoding unit, which encodes the control signal to obtain the target encoded signal, and then sends the target encoded signal to the simulation channel decoding unit 202.

[0019] For example, the source emulator interface unit 201 can receive different interface applications, such as JTAG interface applications or SWD interface applications. After determining the interface application, the source emulator interface unit 201 can access the simulation interface signal corresponding to the interface application.

[0020] For example, in a JTAG interface application, the six pin signals TDI / TMS / TCK / TDO / nSRST / GND are assigned to the emulation channel decoder, and then distributed to one of the eight target emulation channels via the emulation channel signal distributor. In an SWD interface application, the four pin signals TMS / TCK / nTRST / GND are assigned to the emulation channel decoder, and then distributed to one of the eight target emulation channels via the emulation channel signal distributor.

[0021] For example, the simulation channel decoding unit includes multiple decoding chips. Each decoding chip has two 8-to-1 high-speed analog electronic switches. These switches are responsible for decoding the simulation interface signal and the target encoded signal from the emulator, selecting one of the eight channels for high-speed bidirectional signal transmission. This determines the target signal channel corresponding to the interface application and sends the target signal channel to the simulation channel signal distribution unit 203.

[0022] For example, the simulation channel signal allocation unit 203 receives the target signal channel sent by the simulation channel decoding unit, thereby determining the target path simulator based on the target signal channel, and then performing simulation debugging based on the target path simulator to obtain the simulation debugging result.

[0023] For example, the simulation channel signal distribution unit 203 uses eight 10-pin connectors to connect to eight simulation targets respectively. The simulation channel signal distribution unit 203 includes a first simulation signal interface, a second simulation signal interface, ..., an eighth simulation signal interface. The first simulation interface receives TDI1 / TMS1 / TCK1 / TDO1 / RST1 / GND1 signals decoded by the aforementioned decoding unit, used for simulation and debugging of the first emulator. The second simulation interface receives TDI2 / TMS2 / TCK2 / TDO2 / RST2 / GND2 signals decoded by the aforementioned decoding unit, used for simulation and debugging of the second emulator. Similarly, the eighth simulation interface receives TDI8 / TMS8 / TCK8 / TDO8 / RST8 / GND8 signals decoded by the aforementioned decoding unit, used for simulation and debugging of the eighth emulator. The first simulation signal interface is as follows... Figure 2 As shown. TDI1 has the same meaning as TDI. The suffix 1 is used to indicate the pin in the first simulation signal interface. TMS1, TCK1, TDO1, RST1, and GND1 also have the same meaning as when there is no suffix 1, so they will not be repeated here.

[0024] In some embodiments, the simulation debugging system further includes a key input unit. The central processing unit includes: a status acquisition subunit, used to receive key signals corresponding to the key input unit and process the key signals according to a software filtering algorithm to obtain anti-bounce and stable key status values; a first instruction generation subunit, used to generate corresponding control instructions based on the key status values ​​and send the control instructions to the key processing subunit of the central processing unit; the key processing subunit is used to process the control instructions to obtain the control signal.

[0025] For example, the simulation debugging system 200 also includes a button input unit 205, which uses two buttons connected to the power supply via pull-up resistors. Figure 3 As shown, this is the button signal acquisition circuit. The central processing unit acquires the button signal through the acquisition circuit in the button input unit 205, and then inputs the button signal to the status acquisition subunit. The status acquisition subunit then reads the button status value using a software filtering algorithm and executes the switching increase and switching decrease of the simulation channel respectively. Figure 3 In the diagram, R10 and R11 are pull-up resistors, both with a resistance of 10kΩ. K1 and K2 represent touch buttons. GND represents the negative terminal of the power supply, and VCC represents the positive terminal of the power supply.

[0026] For example, the first instruction generation subunit generates a corresponding control instruction based on the key state value and sends the control instruction to the key processing subunit in the central processing unit, so that the key processing subunit processes the control instruction to obtain the corresponding control signal.

[0027] In some embodiments, the simulation debugging system includes a display interface unit, and the central processing unit is connected to the display interface unit through a display simulation channel. The display interface unit is used to display the control commands so that the control commands are presented to the target user in a visual form.

[0028] For example, the simulation debugging system 200 includes a display interface unit 208. The central processing unit 204 is connected to the display interface unit 208 through a display simulation channel, so that control commands are displayed through the display interface unit, so that the target signal channel is presented to the target user in a visual form.

[0029] For example, if the display interface unit 208 is a liquid crystal display screen, then... Figure 4 As shown, an LCD screen is used to display the simulation channel or control commands. The central processing unit (CPU) programs an interface circuit through the LCD screen to display the simulation channel's settings or control commands on the LCD screen. Users can then select the simulation channel by pressing buttons.

[0030] In some embodiments, the simulation debugging system further includes a touch screen operation unit. The central processing unit (CPU) and the touch screen operation unit are connected via a communication interface. The CPU includes: a second instruction generation subunit, configured to receive the control instruction corresponding to the touch screen operation unit and send the control instruction to the instruction processing subunit of the CPU via the communication interface; the instruction processing subunit is configured to process the control instruction to obtain the control signal.

[0031] For example, the simulation debugging system 200 also includes a touch screen operation unit 206, and the central processing unit 204 communicates with the touch screen operation unit 206 via an RS-485 communication interface. An RS-485 communication interface is used, and the Modbus / RTU protocol is programmed into the software of the central processing unit. By connecting to the touch screen operation unit 206, the simulation channel can be queried and set.

[0032] For example, the target user sets instructions on the touchscreen operation unit 206 to obtain control instructions. The touchscreen operation unit 206 then sends the control instructions to the second instruction generation subunit of the central processing unit via an RS-485 communication interface. The second instruction generation subunit then sends the control instructions to the instruction processing subunit of the central processing unit, which in turn processes the control instructions to obtain control signals.

[0033] In some embodiments, the simulation debugging system further includes a host computer unit, and the central processing unit (CPU) communicates with the host computer unit via an Ethernet interface. The CPU includes: a second instruction generation subunit, used to receive the control instruction corresponding to the host computer unit and send the control instruction to the instruction processing subunit of the CPU via the Ethernet interface; the instruction processing subunit is used to process the control instruction to obtain the control signal.

[0034] For example, the simulation debugging system 200 also includes a host computer unit 207. The central processing unit 204 and the host computer unit 207 use an Ethernet communication interface. The software of the central processing unit 204 is programmed with the Modbus / TCP protocol for connecting to the computer system. The simulation channel is queried and set through the programmed host computer software.

[0035] For example, the target user obtains control commands by setting instructions through the host computer unit 207. The host computer unit 207 then sends the control commands to the central processing unit's instruction processing subunit via an Ethernet communication interface. The instruction processing subunit then processes the control commands to obtain control signals.

[0036] In some embodiments, the source emulator interface unit includes a multi-pin connector; the source emulator interface unit includes: an application determination subunit for determining the interface application corresponding to the simulation debugging system; a connector determination subunit for determining a target connector from the multi-pin connectors according to the interface application; and a signal access subunit for accessing the simulation interface signal corresponding to the interface application according to the target connector.

[0037] For example, the source emulator interface unit 201 includes a multi-pin connector; the emulator interface is used for different emulator connection signals. The multi-pin connector includes, but is not limited to, 20-pin connectors, 14-pin connectors, and 10-pin connectors, wherein the 20-pin connector, such as... Figure 5 As shown, the 14-pin connector is as follows Figure 6 As shown, the 10-pin connector is as follows Figure 7As shown, VTREF (VoltageReference) represents the reference voltage pin; nTRST (Test Reset) represents the JTAG TAP (Test Access Port) controller reset signal; TDI (Test Data In) represents test data input; TMS (Test Mode Select) represents test mode selection; TCK (Test Clock) represents the test clock; RTXK, or Return TCK, is used to synchronize the clock speeds of the host and target boards; TDO (Test Data Out) represents test data output; nSRST (System Reset) represents the system reset signal; DBGRQ (Debug Request) represents the debug request signal; DBGACK (Debug Acknowledge) represents the debug acknowledgement signal; GND represents the negative power supply, and VCC represents the positive power supply.

[0038] For example, after the target user inserts an interface into the source emulator interface unit 201, the application determination subunit in the source emulator interface unit 201 identifies the interface and thus determines the interface application corresponding to the simulation debugging system.

[0039] For example, the connector determination subunit determines the target connector from the multi-pin connectors according to the interface application; thereby the signal access subunit accesses the corresponding simulated interface signal of the interface application according to the target connector.

[0040] In some embodiments, the simulation channel decoding unit includes a first decoding subunit, a second decoding subunit, and a third decoding subunit. The simulation channel decoding unit further includes: a first decoding subunit configured to determine a first signal in the simulation interface signal and determine a first channel corresponding to the first signal from the target encoded signal; a second decoding subunit configured to determine a second signal in the simulation interface signal and determine a second channel corresponding to the second signal from the target encoded signal; a third decoding subunit configured to determine a third signal in the simulation interface signal and determine a third channel corresponding to the third signal from the target encoded signal; and a channel determination subunit configured to determine the target signal channel corresponding to the interface application based on the first channel, the second channel, and the third channel.

[0041] For example, the simulation channel decoding unit consists of three decoding chips, including a first decoding subunit, a second decoding subunit, and a third decoding subunit.

[0042] For example, the first decoding subunit is responsible for transmitting the TMS signal of the source emulator, i.e. the first signal, from the target encoded signal to one of the channels of the TMS1~TMS8 interface, and transmitting the TCK signal of the source emulator through the channel selected by the decoder to the first channel of the TCK1~TCK8 interface, i.e. determining the first channel corresponding to the first signal.

[0043] For example, the second decoding subunit is responsible for transmitting the TDI signal of the source emulator, i.e. the second signal, to one of the channels of the TDI1~TDI8 interface through the channel selected by the decoder, and transmitting the TDO signal of the source emulator to the second channel of the TDO1~TDO8 interface through the channel selected by the decoder, i.e., determining the second channel corresponding to the second signal.

[0044] For example, the third decoding subunit is responsible for transmitting the source emulator's nSRST signal, i.e., the third signal, through the channel selected by the decoder to one of the channels in the RST1~RST8 interface, and transmitting the source emulator's GND signal through the channel selected by the decoder to the third channel in the GND1~GND8 interface, thus determining the third channel corresponding to the third signal. All of the above signal channels use low-impedance, high-speed analog electronic switches, which can transmit not only analog signals but also digital signals, enabling high-speed, lossless transmission of emulated signals. Therefore, the channel determination subunit combines the first, second, and third channels to determine the target signal channel corresponding to the interface application.

[0045] Please refer to Figure 8 , Figure 8 A schematic diagram of the simulation debugging system 200 provided in this embodiment is shown below. Figure 8As shown, the simulation debugging system 200 includes a source simulator interface unit 201, a simulation channel decoding unit 202, a simulation channel signal distribution unit 203, a central processing unit 204, a key input unit 205, a display interface unit 208, a touch screen operation unit 206, and a host computer unit 207. The system then uses the key input unit 205 to input corresponding key signals, processes the key signals according to a software filtering algorithm to obtain key status values, generates corresponding control commands based on the key status values, and sends the control commands to the key processing unit. The key processing unit then processes the control commands to obtain control signals. The control commands are displayed through the display interface unit 208, so that the control commands are presented to the target user in a visual form; or the control commands are input through the touch screen operation unit 206, and the corresponding control signals are obtained through the central processing unit 204; then the control signals are encoded by the simulation channel encoding unit in the central processing unit 204 to obtain the target encoded signal, and the target encoded signal is sent to the simulation channel decoding unit 202; the source emulator interface unit 202 determines the interface application corresponding to the simulation debugging system 200, and accesses the simulation interface signal corresponding to the interface application through the source emulator interface unit 201; the simulation channel decoding unit 202 receives the simulation interface signal and the target encoded signal, and decodes the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and sends the target signal channel to the simulation channel signal allocation unit 203; the simulation channel signal allocation unit 203 receives the target signal channel sent by the simulation channel decoding unit 202, and determines the target path emulator according to the target signal channel, and then performs simulation debugging according to the target path emulator to obtain the simulation debugging result.

[0046] like Figure 9 As shown, Figure 9 The present application provides a simulation debugging method applied to a simulation debugging system. The simulation debugging system includes a source simulator interface unit, a simulation channel decoding unit, a simulation channel signal allocation unit, and a central processing unit. The central processing unit includes a simulation channel encoding unit. The simulation debugging method includes steps S101 to S105.

[0047] Step S101: Receive control instructions through the central processing unit and generate corresponding control signals according to the control instructions.

[0048] Step S102: The control signal is encoded by the simulation channel encoding unit to obtain the target encoded signal, and the target encoded signal is sent to the simulation channel decoding unit.

[0049] Step S103: Determine the interface application corresponding to the simulation debugging system through the source emulator interface unit, and access the simulation interface signal corresponding to the interface application through the source emulator interface unit.

[0050] Step S104: Using the simulation channel decoding unit, receive the simulation interface signal and the target encoded signal, decode the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and send the target signal channel to the simulation channel signal allocation unit.

[0051] Step S105: Receive the target signal channel sent by the simulation channel decoding unit using the simulation channel signal allocation unit, determine the target path simulator based on the target signal channel, and then perform simulation debugging based on the target path simulator to obtain simulation debugging results.

[0052] In some implementations, the simulation debugging method can be applied to simulation debugging equipment.

[0053] It should be noted that those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the simulation debugging method described above can be referred to the corresponding process in the aforementioned simulation debugging system embodiments, and will not be repeated here.

[0054] Please see Figure 10 , Figure 10 This is a schematic block diagram of a simulation debugging device provided in an embodiment of the present invention.

[0055] like Figure 10 As shown, the simulation debugging device 300 includes a processor 301 and a memory 302, which are connected by a bus 303, such as an I2C (Inter-integrated Circuit) bus.

[0056] Specifically, processor 301 provides computing and control capabilities to support the operation of the entire simulation and debugging equipment. Processor 301 can be a Central Processing Unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0057] Specifically, the memory 302 can be a Flash chip, a read-only memory (ROM) disk, an optical disk, a USB flash drive, or a portable hard drive, etc.

[0058] Those skilled in the art will understand that Figure 10 The structure shown is merely a block diagram of a portion of the structure related to the embodiments of the present invention, and does not constitute a limitation on the simulation and debugging equipment to which the embodiments of the present invention are applied. A specific server may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0059] The processor is used to run a computer program stored in a memory, and to implement any of the simulation debugging systems provided in the embodiments of the present invention when executing the computer program.

[0060] In one embodiment, the processor is configured to run a computer program stored in a memory, and when executing the computer program, implement the following steps: the simulation debugging system includes a source simulator interface unit, a simulation channel decoding unit, a simulation channel signal allocation unit, and a central processing unit, wherein the central processing unit includes a simulation channel encoding unit, wherein... The central processing unit is used to receive control commands and generate corresponding control signals according to the control commands; encode the control signals through the simulation channel encoding unit to obtain a target encoded signal, and send the target encoded signal to the simulation channel decoding unit; The source emulator interface unit is used to determine the interface application corresponding to the simulation debugging system, and to access the simulation interface signal corresponding to the interface application through the source emulator interface unit. The simulation channel decoding unit is used to receive the simulation interface signal and the target encoded signal, and decode the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and send the target signal channel to the simulation channel signal allocation unit; The simulation channel signal allocation unit is used to receive the target signal channel sent by the simulation channel decoding unit, determine the target path simulator based on the target signal channel, and then perform simulation debugging based on the target path simulator to obtain simulation debugging results.

[0061] It should be noted that those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the simulation debugging equipment described above can be referred to the corresponding process in the aforementioned simulation debugging system embodiments, and will not be repeated here.

[0062] This invention also provides a storage medium for computer-readable storage, wherein the storage medium stores one or more programs that can be executed by one or more processors to implement the steps of any simulation debugging system provided in the specification of this invention.

[0063] The storage medium can be an internal storage unit of the simulation debugging device described in the foregoing embodiments, such as the hard drive or memory of the simulation debugging device. Alternatively, the storage medium can be an external storage device of the simulation debugging device, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the simulation debugging device.

[0064] Those skilled in the art will understand that all or some of the steps, systems, or apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware embodiments, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0065] It should be understood that the term "and / or" as used in this specification and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations. It should be noted that, herein, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0066] The sequence numbers of the above embodiments of the present invention are merely for descriptive purposes and do not represent the superiority or inferiority of the embodiments. The above descriptions are only specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A simulation debugging system, characterized in that, The simulation debugging system includes a source simulator interface unit, a simulation channel decoding unit, a simulation channel signal distribution unit, and a central processing unit. The central processing unit includes a simulation channel encoding unit. The central processing unit is used to receive control commands and generate corresponding control signals according to the control commands; encode the control signals through the simulation channel encoding unit to obtain a target encoded signal, and send the target encoded signal to the simulation channel decoding unit; The source emulator interface unit is used to determine the interface application corresponding to the simulation debugging system, and to access the simulation interface signal corresponding to the interface application through the source emulator interface unit. The simulation channel decoding unit is used to receive the simulation interface signal and the target encoded signal, and decode the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and send the target signal channel to the simulation channel signal allocation unit; The simulation channel signal allocation unit is used to receive the target signal channel sent by the simulation channel decoding unit, determine the target path simulator based on the target signal channel, and then perform simulation debugging based on the target path simulator to obtain simulation debugging results.

2. The method according to claim 1, characterized in that, The simulation debugging system also includes a key input unit, and the central processing unit includes: The status acquisition subunit is used to receive the key signal corresponding to the key input unit, and process the key signal according to the software filtering algorithm to obtain a debounced and stable key status value. The first instruction generation subunit is used to generate the corresponding control instruction based on the key state value, and send the control instruction to the key processing subunit of the central processing unit; The key processing subunit is used to process the control command to obtain the control signal.

3. The method according to claim 2, characterized in that, The simulation and debugging system includes a display interface unit. The central processing unit is connected to the display interface unit through a display simulation channel. The display interface unit is used to display the control commands so that the control commands are presented to the target user in a visual form.

4. The method according to claim 1, characterized in that, The simulation debugging system further includes a touchscreen operation unit. The central processing unit (CPU) is connected to the touchscreen operation unit via a communication interface. The CPU includes: The second instruction generation subunit is used to receive the control instruction corresponding to the touch screen operation unit and send the control instruction to the instruction processing subunit of the central processing unit through the communication interface. The instruction processing subunit is used to process the control instruction to obtain the control signal.

5. The method according to claim 1, characterized in that, The simulation and debugging system further includes a host computer unit, and the central processing unit (CPU) is connected to the host computer unit via an Ethernet interface. The CPU includes: The second instruction generation subunit is used to receive the control instruction corresponding to the host computer unit and send the control instruction to the instruction processing subunit of the central processing unit through the Ethernet interface. The instruction processing subunit is used to process the control instruction to obtain the control signal.

6. The method according to claim 1, characterized in that, The source emulator interface unit includes a multi-pin connector; the source emulator interface unit includes: An application determination subunit is used to determine the interface application corresponding to the simulation debugging system; A connector determination subunit is used to determine a target connector from the multi-pin connectors based on the interface application; The signal access subunit is used to access the simulation interface signal corresponding to the interface application according to the target connector.

7. The method according to claim 1, characterized in that, The simulation channel decoding unit includes a first decoding subunit, a second decoding subunit, and a third decoding subunit. The simulation channel decoding unit includes: The first decoding subunit is used to determine a first signal in the simulation interface signal and to determine the first channel corresponding to the first signal from the target encoded signal; The second decoding subunit is used to determine the second signal in the simulation interface signal and to determine the second channel corresponding to the second signal from the target encoded signal; The third decoding subunit is used to determine the third signal in the simulation interface signal and to determine the third channel corresponding to the third signal from the target encoded signal; The channel determination subunit is used to determine the target signal channel corresponding to the interface application based on the first channel, the second channel, and the third channel.

8. A simulation debugging method, characterized in that, The method is applied to a simulation debugging system, which includes a source simulator interface unit, a simulation channel decoding unit, a simulation channel signal distribution unit, and a central processing unit, wherein the central processing unit includes a simulation channel encoding unit. The central processing unit receives control commands and generates corresponding control signals based on the control commands. The control signal is encoded by the simulation channel encoding unit to obtain the target encoded signal, and the target encoded signal is sent to the simulation channel decoding unit. The source emulator interface unit determines the interface application corresponding to the simulation debugging system, and the source emulator interface unit accesses the simulation interface signal corresponding to the interface application. The simulation channel decoding unit receives the simulation interface signal and the target encoded signal, decodes the target encoded signal and the simulation interface signal to determine the target signal channel corresponding to the interface application, and sends the target signal channel to the simulation channel signal allocation unit. The simulation channel signal allocation unit receives the target signal channel sent by the simulation channel decoding unit, determines the target path simulator based on the target signal channel, and then performs simulation debugging based on the target path simulator to obtain simulation debugging results.

9. A simulation debugging device, characterized in that, The simulation debugging equipment includes a processor and a memory; The memory is used to store computer programs; The processor is used to execute the computer program and, in executing the computer program, implement a simulation debugging system as described in any one of claims 1 to 7.

10. A computer storage medium for computer storage, characterized in that, The computer storage medium stores one or more programs, which can be executed by one or more processors to implement the steps of the simulation debugging system according to any one of claims 1 to 7.

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