A variable amplitude oscillation mechanical switch arcless breaking DC circuit breaker and modular application method

Abstract

This invention discloses a DC circuit breaker with variable amplitude oscillation-type mechanical switch arc-free breaking and its modular application method. The topology includes a main branch and a current control branch. The current control branch includes a converter module and a main power electronic module. The current control branch is configured to rapidly reduce the current flowing through the mechanical switch MS to below zero when the mechanical switch MS fails to break; subsequently, it causes the current in MS to generate high-frequency variable amplitude oscillations until the MS contacts separate without arcing. The main power electronic module bears the fault current until the MS contacts are completely separated, at which point it interrupts the fault current. By employing a dual-inductor design (L1 and L2) combined with a variable amplitude oscillation control strategy, the DC circuit breaker of this invention experiences significantly lower peak currents during the conduction and turn-off of the power electronic devices in the converter module compared to traditional single-inductor schemes. Its average operating frequency is also reduced accordingly, greatly alleviating the electrical stress on the devices and significantly reducing the mechanical switch current oscillation frequency and the pressure on the power electronic devices.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of DC circuit breaker breaking, in particular to a variable-amplitude oscillation mechanical switch arcless breaking DC circuit breaker and modular application method. BACKGROUND

[0002] DC circuit breakers can be divided into mechanical DC circuit breakers, solid-state DC circuit breakers, and hybrid DC circuit breakers. Mechanical DC circuit breakers have low on-state loss, but their breaking current speed is slow. Solid-state DC circuit breakers have fast breaking current speed, but have high on-state loss. Hybrid DC circuit breakers have both the characteristics of the above two, and thus become the focus of DC circuit breaker research.

[0003] However, the currently widely used hybrid DC circuit breaker still has the following problems: first, the main branch has high on-state loss due to the provision of power electronic switches, such as the classic hybrid DC circuit breaker topology proposed by ABB Company; second, although the main branch is only provided with a mechanical switch, the mechanical switch needs to break a large current and withstand a large transient recovery voltage generated when the arc is extinguished, which is extremely unfavorable for the mechanical switch.

[0004] Therefore, a new topology structure is considered to be used in the circuit breaker of the medium-voltage DC distribution network. The main branch of the topology structure is only provided with a mechanical switch, which realizes breaking under the condition of high frequency and low amplitude when a fault occurs, and realizes arcless breaking of the mechanical switch while achieving low on-state loss.

[0005] Currently, there are technologies and topologies that can enable the mechanical switch to realize arcless breaking under the condition of high frequency and low amplitude, but such topologies have two defects that restrict their application. First, when a fault occurs, the current frequency in the mechanical switch will be too high, causing electromagnetic interference. Second, the on-off current and frequency of the power electronic device (IGBT) are too high, which puts a lot of pressure on the power electronic device.

[0006] For example, the circuit breaker structure proposed in the IEEE Conference Proceedings Literature (DOI: 978-1-7281-4829-8 / 20 ©2020 IEEE) An Ultra-Efficient DC Hybrid Circuit Breaker Architecture Based on Transient Commutation Current Injection performs well in terms of low loss and fast breaking, but there are still problems such as high switching frequency of power electronic devices, strict current tracking accuracy requirements, and complex electromagnetic interference suppression in its design. In addition, the scalability and applicability of a single module in medium-voltage and above systems still need to be further improved.

[0007] In this case, a new DC circuit breaker topology of high-frequency variable-amplitude oscillation type mechanical switch arcless breaking applied to medium-voltage DC distribution network is needed. The topology can reduce the frequency of current oscillation of the mechanical switch while meeting high commutation speed, improve the utilization rate of capacitor voltage, and greatly reduce the current and frequency of the turn-on and turn-off of power electronic devices. For different fault current size and fault current rising speed conditions in the medium-voltage DC distribution network, the new topology can be modularized and handled by parallel connection. SUMMARY

[0008] In view of the above problems, the purpose of the present application is to provide a variable-amplitude oscillation type mechanical switch arcless breaking DC circuit breaker and a modular application method, which reduces the current and frequency of the turn-on and turn-off of power electronic devices.

[0009] The purpose of the present application can be achieved by the following technical solution: a variable-amplitude oscillation type mechanical switch arcless breaking DC circuit breaker, comprising:

[0010] a main branch in series with a mechanical switch MS;

[0011] a current control branch comprising a commutation module and a main power electronic module, the commutation module being in series with the main power electronic module and being in parallel with the mechanical switch MS;

[0012] wherein the commutation module comprises a first capacitor C1, a second capacitor C2, a first inductor L1 and a second inductor L2;

[0013] The current control branch is configured to: when the mechanical switch MS fails to break, first control the first capacitor C1 and the second capacitor C2 to discharge together through the first inductor L1, so as to quickly pull down the current flowing through the mechanical switch MS to below zero; then control the second capacitor C2 to intermittently discharge through the second inductor L2, so as to make the current of the mechanical switch MS produce high-frequency variable-amplitude oscillation, until the mechanical switch MS contacts are arcless separated; the main power electronic module bears the fault current, until the mechanical switch MS contacts are completely separated, the fault current is cut off.

[0014] As a further scheme of the present application, the inductance value of the first inductor L1 is smaller than the inductance value of the second inductor L2.

[0015] As a further scheme of the present application, the DC circuit breaker topology structure adopts a bidirectional topology for different current direction conditions.

[0016] As a further scheme of the present application, the commutation module comprises IGBT Q1 and Q2.

[0017] The Q1 is configured to control whether the first capacitor C1 and the second capacitor C2 discharge together through the first inductor L1.

[0018] Q2 is configured to control whether the second capacitor C2 discharges through the second inductor L2.

[0019] As a further embodiment of the present invention, the converter module includes a direction control switch group composed of IGBTs Q5, Q6, Q7 and Q8;

[0020] The directional control switch group is configured to control the direction of capacitor discharge current injection into the main branch according to the polarity of the DC system voltage, so that the circuit breaker has bidirectional breaking capability.

[0021] As a further embodiment of the present invention, the main power electronic module includes IGBTs Q3 and Q4 connected back to back, and a metal oxide varistor MOV connected in parallel with IGBTs Q3 and Q4.

[0022] As a further aspect of the present invention, during the fault disconnection process of the mechanical switch MS, a variable amplitude strategy is adopted for the current oscillation amplitude. As the number of oscillations increases, the set point of the current oscillation amplitude is gradually reduced.

[0023] As a further embodiment of the present invention, the DC circuit breaker topology adopts a modular application, and combines the rise rate of the fault current of the DC system and the trigger current threshold of the fault current, using dual DC circuit breaker modules connected in parallel to the main branch.

[0024] As a further embodiment of the present invention, the dual DC circuit breaker module adopts alternating conduction control when the fault current oscillates at a low amplitude, thereby reducing the conduction frequency of a single module Q2.

[0025] A method for applying a high-frequency variable amplitude oscillating mechanical switch to a DC circuit breaker with arc-free breaking capability, the method comprising:

[0026] The fault current is detected. When the fault current reaches the set threshold, a disconnection signal is sent to the mechanical switch MS, and the current control branch is activated.

[0027] The first capacitor C1 and the second capacitor C2 are controlled to discharge together through the first inductor L1, thereby pulling the current of the mechanical switch MS down to the first negative threshold.

[0028] Stop the combined discharge of the first capacitor C1 and the second capacitor C2, causing the current of the mechanical switch MS to rise;

[0029] When the current of the mechanical switch MS rises to the first positive threshold, the second capacitor C2 is controlled to discharge through the second inductor L2, pulling the current of the mechanical switch MS down to the second negative threshold.

[0030] The current oscillation process is repeated, and the positive and negative current thresholds are gradually reduced during the oscillation process to reduce the amplitude oscillation of the mechanical switch MS current;

[0031] After detecting the separation of the mechanical switch MS contacts and the resulting gap, the oscillation control stops; the main power electronic module bears the fault current, and after detecting that the mechanical switch MS contacts are completely separated and the gap is large enough, it completes the interruption of the fault current.

[0032] The beneficial effects of this invention are:

[0033] 1. The topology of this invention, by employing a dual-inductor design (L1 and L2) combined with a variable-amplitude oscillation control strategy, effectively solves the problem of excessively high MS current oscillation frequency in traditional solutions. In the initial stage of fault disconnection, capacitors C1 and C2 discharge rapidly through the small inductor L1, quickly reducing the MS current from the fault value to below 0. Subsequently, only capacitor C2 discharges through the large inductor L2 with variable amplitude, and the MS current oscillation amplitude gradually decreases. Simultaneously, the peak current borne by Q2 during conduction and turn-off is far lower than that of the traditional single-inductor scheme, and its average operating frequency also decreases accordingly, greatly alleviating the electrical stress on the device and significantly reducing the mechanical switch current oscillation frequency and the pressure on power electronic devices.

[0034] 2. The topology of this invention possesses bidirectional conduction capability and modularity, enabling flexible adaptation to changing demands in medium-voltage DC distribution networks by connecting multiple identical modules in parallel. Under severe conditions such as accelerated fault current rise rates or increased trigger currents, the use of parallel dual-modules supplemented by an alternating conduction control strategy can effectively distribute the current. This design not only ensures breaking capacity but also keeps the operating frequency and current stress of the switching device Q2 in a single module at a low level, demonstrating excellent scalability and adaptability. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the topology of the present invention;

[0036] Figure 2 This is a schematic diagram of the main power electronics module structure of the present invention;

[0037] Figure 3 This is a schematic diagram showing the fault current and discharge current from left to right according to the present invention.

[0038] Figure 4 This is a schematic diagram showing the flow direction of the fault current and discharge current from right to left in this invention.

[0039] Figure 5 This is a schematic diagram showing the normal current flow direction from left to right in this invention;

[0040] Figure 6This is a schematic diagram showing the flow direction of the fault current and the common discharge current of C1C2 in this invention;

[0041] Figure 7 This is a schematic diagram of the flow direction of D1 when Q1 is turned off according to the present invention;

[0042] Figure 8 This is a schematic diagram showing the flow direction of the fault current and the independent discharge current of C2 in this invention;

[0043] Figure 9 This is a schematic diagram showing the flow direction of D2 when Q2 is turned off according to the present invention;

[0044] Figure 10 This is a schematic diagram showing the fault current flow direction when there is a gap when the MS contact is separated according to the present invention;

[0045] Figure 11 This is a schematic diagram showing the flow direction of fault current absorbed by MOV when the MS contact is completely separated in this invention;

[0046] Figure 12 The following are the voltage and current waveforms of MS, main branch, Q1, Q2 and Q3 in simulation application 1 of this invention;

[0047] Figure 13 For the present invention Figure 12 A magnified view of a portion of the image;

[0048] Figure 14 The following are the current and voltage waveforms of L1, L2, C1, and C2 in simulation application 1 of this invention;

[0049] Figure 15 For the present invention Figure 14 A magnified view of a portion of the image;

[0050] Figure 16 This is a waveform diagram of the MS current amplitude oscillation in the simulation application of the present invention;

[0051] Figure 17 This is a schematic diagram of the dual DC circuit breaker module structure for simulation application 2 of the present invention;

[0052] Figure 18 The following are the IGBT voltage and current waveforms of MS, main branch, module 1 and module 2 in the simulation application 2 of this invention.

[0053] Figure 19 The following are the current waveforms of MS and Q1, Q2 in module 1 and Q1, Q2 in module 2 in simulation application 2 of this invention;

[0054] Figure 20 For the present invention Figure 19 A magnified view of a portion of the image;

[0055] Figure 21This is a simulation current and voltage waveform diagram of module 1 in simulation application 2 of the present invention;

[0056] Figure 22 This is a simulation current and voltage waveform diagram of module 2 in simulation application 2 of the present invention;

[0057] Figure 23 This is a waveform diagram of the MS current amplitude oscillation in simulation application 2 of this invention;

[0058] Figure 24 This is a diagram of the Q1 and Q2 control signals of the two modules in simulation application 3 of this invention;

[0059] Figure 25 The following are the current and voltage waveforms of MS, main branch, Q3, and main electronic power module in simulation application 3 of this invention;

[0060] Figure 26 The following is a simulation application 3 of the present invention, showing the current waveforms of MS and the Q1 and Q2 currents of the two modules;

[0061] Figure 27 For the present invention Figure 26 A magnified view of a portion of the image;

[0062] Figure 28 This is a simulation current and voltage waveform diagram of module 1 in simulation application 3 of the present invention;

[0063] Figure 29 This is a simulation current and voltage waveform diagram of module 2 in simulation application 3 of the present invention;

[0064] Figure 30 The waveform diagram of MS current amplitude oscillation in simulation application 3 of this invention is shown. Detailed Implementation

[0065] Embodiments of the present invention are described in detail below. Examples of these embodiments are illustrated in the accompanying drawings, wherein the same or similar symbols denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0066] Example 1:

[0067] This embodiment discloses a variable amplitude oscillation type mechanical switch arc-free interrupting DC circuit breaker, such as... Figure 1 As shown, it includes:

[0068] DC system rated power supply voltage U N During a short-circuit fault, the equivalent short-circuit resistance R and short-circuit inductance L of the DC system, and the mechanical switch MS.

[0069] The pre-charge capacitors C1 and C2 inside the circuit breaker have the following polarities:Figure 1 As shown. Two inductors L1 and L2 with different inductance values ​​inside the circuit breaker. Power electronic devices (IGBTs) Q1~Q8, diodes D1~D5, resistor R1 in the freewheeling branch, and metal oxide varistor MOV.

[0070] Specifically, one end of L is connected to the power supply, and the other end is connected to MS. The other end of MS is connected to R, together forming the equivalent main branch of the DC system.

[0071] The current control branch includes a converter module and a main power electronic module. The converter module and the main power electronic module are connected in series and then connected in parallel with the mechanical switch MS.

[0072] The converter module includes a first capacitor C1, a second capacitor C2, a first inductor L1, a second inductor L2; IGBTs Q1, Q2, Q5, Q6, Q7 and Q8, diodes D1 to D5, and a resistor R1 for the freewheeling branch.

[0073] The C terminal of Q5 is connected to the E terminal of Q6 and one MS terminal. The E terminal of Q8 is connected to the C terminal of Q7 and the main power electronic module. The E terminal of Q7 is connected to the E terminal of Q5, one D2 terminal, one D1 terminal, and one C1 terminal. The C terminal of Q6 is connected to the C terminal of Q8, one L2 terminal, one L1 terminal, and one D5 terminal.

[0074] The other end of D5 is connected to one end of R1. The other end of R1 is connected to the other end of L2, the other end of D2, and one end of D4. The other end of D4 is connected to the E end of Q2. The C end of Q2 is connected to the other end of C2 and one end of C1. The other end of C1 is connected to the C end of Q1. The E end of Q1 is connected to one end of D3. The other end of D3 is connected to the other end of D1 and the other end of L1.

[0075] In the above topology, R1 is a current-limiting resistor, C1 and C2 are energy storage capacitors, Q1 controls capacitors C1 and C2 to discharge together, pulling the mechanical switch current down to near 0; Q2 controls capacitor C2 to discharge at high frequency, limiting the mechanical switch current to oscillation at a high-frequency amplitude; Q5 to Q8 control the direction of the discharge current of capacitors C1 and C2 injected into the mechanical switch; diodes D1, D2, and D5 act as freewheeling diodes, while diodes D3 and D4 prevent current from flowing through capacitors C1 and C2 via the anti-parallel diodes of Q1 or Q2; L1 is the current-limiting inductor when C1 and C2 discharge together, and L2 is the current-limiting inductor when C2 discharges, with L2 having a larger inductance value than L1.

[0076] Using the above topology, the current control branch is configured such that when the mechanical switch MS fails to trip, the first capacitor C1 and the second capacitor C2 are first controlled to discharge together through the first inductor L1, which quickly pulls the current flowing through the mechanical switch MS down to below zero; then the second capacitor C2 is controlled to discharge intermittently through the second inductor L2, so that the current of the mechanical switch MS generates high-frequency amplitude oscillation until the contacts of the mechanical switch MS separate without arcing.

[0077] The main power electronic module bears the fault current. When the mechanical switch MS contacts are completely separated, the fault current is cut off and transferred to the MOV to be absorbed.

[0078] This topology combines capacitor discharge with high-frequency oscillation control, enabling precise regulation of the current waveform during mechanical switch breaking, effectively avoiding the arcing problem caused by sudden current changes in traditional breaking methods. In the first stage, C1 and C2 discharge together, utilizing the current-limiting effect of L1, achieving a rapid current decrease in a short time, creating favorable conditions for subsequent high-frequency oscillation. In the second stage, C2 discharges intermittently through L2, taking advantage of L2's large inductance to slow down the discharge rate of C2, thereby reducing the frequency corresponding to the gradual amplitude oscillation of the MS current near zero. The mechanical switch contacts separate smoothly under low voltage and low current, greatly reducing the risk of contact burn-out and significantly improving the breaking reliability and service life of the mechanical switch.

[0079] Furthermore, Q1 is configured to control whether the first capacitor C1 and the second capacitor C2 discharge together through the first inductor L1; Q2 is configured to control whether the second capacitor C2 discharges through the second inductor L2. When the system detects a fault signal, Q1 is first triggered to turn on. At this time, the energy stored in the first capacitor C1 and the second capacitor C2 forms a discharge loop through Q1, the first inductor L1, and the main circuit containing the mechanical switch MS, quickly pulling down the main circuit current. When the current drops below zero, Q1 turns off, and Q2 intermittently turns on and off according to a preset control strategy.

[0080] Through the coordinated control of Q1 and Q2, the energy and current changes injected into the main circuit by the converter module can be precisely adjusted to ensure that the mechanical switch MS can complete arc-free interruption under low voltage and low current conditions.

[0081] Main power electronic module: composed of back-to-back IGBTs and parallel MOVs. Q3 or Q4 cuts off the fault current, and the current is transferred to the MOV and absorbed.

[0082] The main power electronics module consists of back-to-back IGBTs connected in parallel to MOVs, such as... Figure 2 As shown, it includes IGBTs Q3 and Q4 and a metal oxide varistor MOV. Q3 or Q4 cuts off the fault current, and the current is transferred to the MOV and absorbed.

[0083] The C terminal of Q3 is connected to one end of the MOV and the converter module, the E terminal of Q3 is connected to the E terminal of Q4, and the C terminal of Q4 is connected to the other end of the MOV and the other end of the MS.

[0084] By employing a main power electronic module, fault current can be rapidly transferred and reliably absorbed during the mechanical switch MS disconnection process. The transferred fault current can be efficiently absorbed by the MOV, utilizing the volt-ampere characteristics of the metal oxide varistor (MOV) to limit overvoltage within a safe range, preventing excessive voltage from damaging other equipment in the circuit, thereby effectively protecting the safe and stable operation of the entire DC circuit breaker and system.

[0085] Preferably, the inductance value of the first inductor L1 is smaller than the inductance value of the second inductor L2; the smaller inductance value of L1 is responsible for short-term high-speed commutation, using low inductive reactance to quickly pull down the current; the larger inductance value of L2 is responsible for maintaining relatively low-frequency oscillation over long periods, reducing frequency and device stress through high inductive reactance. This combination balances speed, efficiency, and reliability while ensuring arc-free interruption.

[0086] Example 2:

[0087] Based on the DC circuit breaker of Embodiment 1, the DC circuit breaker topology adopts a bidirectional topology, which can be used for operating conditions with different current directions.

[0088] Specifically, when U N When the voltage direction is positive at the top and negative at the bottom, the fault current flows from left to right, such as... Figure 3 As shown by the red arrow, the common discharge current of C1 and C2 is as follows: Figure 3 As shown by the blue arrow in the middle, C2 discharges alone as follows: Figure 3 As indicated by the purple arrow.

[0089] When U N When the voltage direction is negative at the top and positive at the bottom, the fault current flows from right to left, such as... Figure 4 As shown by the red arrow, the common discharge current of C1 and C2 is as follows: Figure 4 As shown by the blue arrow in the middle, C2 discharges alone as follows: Figure 4 As indicated by the purple arrow.

[0090] The directional control switch group, composed of IGBTs Q5, Q6, Q7, and Q8, is configured to control the direction of capacitor discharge current injection into the main branch according to the polarity of the DC system voltage. In conjunction with other IGBTs, this enables the circuit breaker to have bidirectional breaking capability.

[0091] Select U N The voltage direction is positive and the direction is negative, and the fault current flows from left to right. The working process is analyzed as follows: Under normal circumstances, the current only passes through the mechanical switch of the main branch, and the conduction loss is low. Figure 5 As shown.

[0092] When a short-circuit fault occurs, a disconnect signal is sent to MS, and turn-on signals are sent to Q1, Q3, Q5, and Q8. Due to mechanical inertia, there is a certain delay between the mechanical switch receiving the disconnect command and the contacts beginning to separate. At this time, the mechanical switch MS is still in the closed state. Capacitors C1 and C2 discharge rapidly through the small inductor L1. The discharge current cancels out the fault current on the mechanical switch, pulling the current of the mechanical switch MS below 0. Figure 6 As shown.

[0093] Keep Q1, Q3, Q5, and Q8 on. When the MS current drops to the set value, give Q1 a turn-off signal. C1 and C2 will stop discharging, and the L1 current will freewheel through D1. The MS current will then rise. Figure 7 As shown.

[0094] Set the oscillation amplitude of the MS current to When the MS current rises from below 0 to I M When a signal is given to Q2 to turn on, C2 will discharge through L2, which has a larger inductance. The discharge current is superimposed on the current of L1 and then cancels out the fault current on the mechanical switch, pulling down the current of the mechanical switch MS. Figure 8 As shown.

[0095] Wait until the current of MS drops to -I M When a turn-off signal is given to Q2, C2 will stop discharging, the current in L2 will freewheel through D2, and the MS current will flow from -I... M Rise again, as Figure 9 As shown.

[0096] By setting the oscillation amplitude of the MS current The MS current gradually decreases during oscillation, achieving MS current amplitude oscillation. Once the delay caused by the mechanical inertia of the MS ends, the MS contact will break without arcing. If the MS current flows from left to right when the contact separates, this current is transferred to the anti-parallel diodes of Q6 and Q7; if the MS current flows from right to left (L2 current is larger than the main branch current), the excess current in L2 will freewheel through D5 and R1. When mechanical switch contact separation is detected, Q3, Q5, and Q8 remain conducting, giving Q2 a turn-off signal. The increase in fault current will flow to the main power electronic switch through the anti-parallel diodes of Q6 and Q8, and the anti-parallel diodes of Q7 and Q5. Figure 10 As shown.

[0097] Once the mechanical switch contacts are completely separated, Q3 is turned off, and the fault current is absorbed by the MOV. Figure 11 As shown. Once the fault current drops to 0, Q5 and Q8 are turned off, and the circuit breaker operation is complete.

[0098] Example 3:

[0099] Based on the DC circuit breaker topology of Embodiment 1 or 2, this embodiment discloses the modular application of DC circuit breakers.

[0100] The DC circuit breaker topology combines the rise rate of the fault current in the DC system with the trigger current threshold of the fault current, and adopts dual DC circuit breaker modules connected in parallel to the main branch.

[0101] like Figure 17 As shown, when the rate of increase of the fault current and the trigger current increase, this topology can be connected in parallel. Module 1 and Module 2 are both DC circuit breaker modules, symmetrically connected in parallel across the main branch mechanical switch MS. The operating sequence of the two modules is the same as that of a single module.

[0102] Employing a dual-module structure, the MS current oscillation amplitude gradually decreases. Due to the increased fault current rise rate and the increased equivalent discharge rate resulting from the joint discharge of both modules, the MS current frequency can reach a maximum of 55kHz. Because two discharge inductors are used in a single module, the turn-on and turn-off current of Q2 is significantly reduced, thus greatly minimizing the stress on Q2.

[0103] Furthermore, in the case where the fault trigger current increases while the fault current rise rate remains unchanged, the control can be changed to allow the two modules to alternately conduct during low-amplitude oscillations, thereby further reducing the conduction frequency of each module Q2 and preventing the MS current oscillation frequency from being too high due to the joint discharge of the two modules.

[0104] At this time, modules 1 and 2 alternately enter the conduction state according to a preset control sequence. When the fault current reaches the trigger threshold, Q2 in control module 1 is turned on, causing its discharge inductor to participate in the oscillation, prompting the MS current to oscillate once at a certain amplitude and frequency. After the conduction cycle of module 1 ends, Q2 in module 1 is immediately turned off, and Q2 in control module 2 is turned on, with the discharge inductor of module 2 participating in the oscillation, prompting the MS current to oscillate once at a certain amplitude and frequency. Through this alternating conduction method, Q2 of each module only needs to be turned on and off once when the MS current oscillates twice, effectively reducing the conduction frequency of a single Q2 and avoiding the device overheating or performance degradation problems that may be caused by long-term high-frequency conduction.

[0105] The two modules work alternately, so that the oscillation of the MS current is completed by two independent discharge processes in succession. Compared with the superposition effect when the two modules discharge together, the oscillation frequency will not be excessively increased due to the concentrated release of discharge energy. This keeps the oscillation frequency of the MS current within a reasonable range, ensuring that the mechanical switch MS can smoothly achieve arc-free breaking under low voltage and low current conditions, taking into account both the large fault current breaking capacity and the reliability of device operation.

[0106] Example 4:

[0107] This embodiment, combining the topologies of embodiments 1 and 2, discloses a method for applying a DC circuit breaker with variable amplitude oscillation mechanical switch arc-free breaking. The method mainly includes:

[0108] First, the DC system detects the fault current. When the fault current reaches the set threshold, it sends a disconnect signal to the mechanical switch MS and starts the current control branch.

[0109] The process by which a DC system detects a fault current and triggers a circuit breaker is a precise timing operation involving multi-stage coordinated control.

[0110] When a short-circuit fault occurs in the DC system, the fault current rises rapidly. The system continuously monitors the current value, and when the fault current reaches a preset threshold (e.g., 500A or 1000A), it immediately sends a disconnect command to the mechanical switch MS. Due to the mechanical inertia of the mechanical switch, the contact separation time is delayed, and the contacts will not separate immediately after the command is issued.

[0111] Simultaneously, a command is sent to activate the current control branch, turning on a specific IGBT. At this time, the main circuit state is as follows: Figure 3 or Figure 4 As shown, the fault current still flows through the closed mechanical switch.

[0112] Then, the first capacitor C1 and the second capacitor C2 are controlled to discharge together through the first inductor L1, thereby pulling the current of the mechanical switch MS down to the first negative threshold.

[0113] Take U N Taking the voltage direction as positive and the fault current as negative and the working process as left to right as an example, in the current control branch, IGBTs Q1, Q3, Q5 and Q8 are turned on.

[0114] Due to the inherent mechanical inertia of the mechanical switch MS, its contacts remain closed, and the huge fault current continues to flow through the main branch of MS. The system's normal conduction state is as follows: Figure 3 As shown.

[0115] When Q1, Q5, and Q8 are turned on, a series discharge circuit consisting of capacitors C1 and C2 and inductor L1 is established. Since capacitors C1 and C2 are pre-charged, their stored energy is rapidly released through the smaller inductance of L1. The direction of this discharge current is opposite to the direction of the fault current flowing through the MS. These two opposite currents superimpose at the mechanical switch MS, producing a strong canceling effect. Due to the very small inductance of L1, the rate of increase of the capacitor discharge current is extremely fast, thus forcibly and rapidly reducing the total current on the MS from the positive fault peak to a preset first negative threshold (e.g., -100A).

[0116] Then, stop the combined discharge of the first capacitor C1 and the second capacitor C2, causing the current of the mechanical switch MS to rise.

[0117] Turning off Q1 disconnects the common discharge circuit of C1 and C2, stopping the capacitor from injecting reverse current into the main circuit. At this time, the current in inductor L1 does not disappear instantly but continues to flow through diode D1. The fault current on the DC system side begins to cause the current in MS to rise from its negative peak of -100A.

[0118] Then, when the current of the mechanical switch MS rises to the first positive threshold, the second capacitor C2 is controlled to discharge through the second inductor L2, thereby pulling the current of the mechanical switch MS down to the second negative threshold.

[0119] When the MS current rises from a negative value to the first positive threshold (e.g., +100A), the system turns on Q2, initiating the discharge process of C2 through L2. The pre-charged capacitor C2 forms a discharge circuit through Q2 and L2, with the discharge current direction opposite to the fault current. The discharge current of C2 and the fault current are superimposed in the MS branch. Because the discharge current direction is opposite to the fault current, the MS current is pulled low. When the MS current drops to -50A, Q2 is immediately turned off, and C2 stops discharging. The residual current in L2 freewheels through diode D2, and the MS current begins to rise again, completing one oscillation cycle.

[0120] Then, the above current oscillation process is repeated, and the positive and negative current thresholds are gradually reduced during the oscillation process to reduce the amplitude oscillation of the mechanical switch MS current.

[0121] The amplitude reduction process is an active control strategy. By monitoring the MS current and dynamically adjusting the trigger threshold of Q2, it cleverly utilizes the natural decay characteristic of capacitor discharge voltage to achieve a smooth decrease in oscillation amplitude. This ensures arc-free breaking of the mechanical switch and optimizes the circuit breaker's breaking performance.

[0122] In the initial stage of oscillation, the voltage is high and the discharge is fast, but because the amplitude is large, the frequency will not be too high; in the final stage of oscillation, the voltage is low and the discharge is slow, but the amplitude is small, and the frequency will not be too low. This achieves optimization of the frequency throughout the entire oscillation process.

[0123] Finally, after detecting the separation of the mechanical switch MS contacts and the resulting gap, the oscillation control stops. The main power electronics module handles the fault current, and after detecting that the mechanical switch MS contacts have completely separated and the gap is large enough, it completes the interruption of the fault current.

[0124] Simulation Application 1:

[0125] Simulations were performed on the operating condition triggered when the DC system voltage was 20KV and the fault current reached 500A.

[0126] To ensure the fault current rise rate of the system is approximately 3.5 A / μs, the short-circuit equivalent inductance L is set as follows: The specific parameter settings are shown in Table 1:

[0127] Table 1 Simulation Parameter Settings

[0128]

[0129] The action timing is set as follows:

[0130] When the fault current reaches 500A, Q1, Q3, Q5 and Q8 are turned on, C1 and C2 are discharged, and the MS current is pulled down.

[0131] When the MS current drops to -100A, Q1 is turned off, and the MS current rises.

[0132] When the MS current rises from -100A to 100A, Q2 is turned on, C2 discharges, and the MS current is pulled down.

[0133] When the MS current drops to -50A, Q2 is turned off, and the MS current rises.

[0134] When the MS current rises from -50A to 50A, Q2 is turned on, C2 discharges, and the MS current is pulled down.

[0135] When the MS current drops to -30A, Q2 is turned off, and the MS current rises.

[0136] When the MS current rises from -30A to 30A, Q2 is turned on, C2 discharges, and the MS current is pulled down.

[0137] Limit the MS current oscillation amplitude thereafter. When MS contact separation is detected, Q2 is turned off;

[0138] Turn off Q3 when the MS contact is completely separated;

[0139] After the MOV absorbs the fault current, it disconnects Q5 and Q8.

[0140] Simulation results are as follows Figures 12-16 As shown.

[0141] Simulation results analysis: When the fault current reaches 500A, compared to the existing scheme that relies solely on C1 discharge, the combined discharge of C1 and C2 reduces the MS current from 500A to -100A, improving the utilization rate of C1 voltage. The MS current oscillation amplitude is set to gradually decrease, achieving an MS current oscillation amplitude from... The amplitude of the oscillation varies. The voltage of C2 decreases with the increase of the number of discharges. At the beginning of the oscillation, when the voltage of C2 is high, the oscillation amplitude is large; when the voltage of C2 decreases, the corresponding MS current oscillation amplitude also decreases, which can reduce the difference between the oscillation time of each oscillation during the MS current oscillation process. At the beginning of the oscillation, the voltage of C2 is high and the discharge is fast, but the MS current oscillation amplitude is high, and the MS current oscillation frequency will not be too high; at the end of the oscillation, the MS current oscillation amplitude is small, but the voltage of C2 is low and the discharge is slow, and the MS current oscillation frequency will not be too high, thus realizing that the mechanical switch MS can interrupt the low amplitude current while reducing the average frequency of MS current oscillation. Compared with the existing scheme that uses a single discharge inductor, this topology innovatively uses two discharge inductors L1 and L2. Capacitors C1 and C2 discharge through the smaller inductance of L1, pulling the MS current down from 500A to -100A to achieve a high commutation speed; then C2 discharges through the larger inductance of L2, limiting its discharge speed, which greatly reduces the MS current oscillation frequency and the conduction and turn-off frequency of Q2. Simultaneously employing variable amplitude oscillation of the MS current further reduces the oscillation frequency of the MS current and the turn-on / turn-off frequency of the power electronic device Q2. The average frequency of the MS current oscillation is approximately 19 kHz, and the average turn-on / turn-off frequency of Q2 is also approximately 19 kHz. In existing schemes, because only one discharge inductor is used, the discharge current of C2 is further increased on top of the current generated by C1 discharging through the inductor, resulting in a larger turn-on / turn-off current for Q2. This topology uses two discharge inductors. When C1 and C2 discharge through inductor L1, pulling the MS current down from 500A to -100A, since inductor L2 does not participate in this process, the initial current is 0. Therefore, when C2 discharges through L2, the discharge current rises from 0. Because the current generated by C2 discharging through inductor L2 is superimposed on the current in inductor L1 before being injected into the mechanical switch MS, although this topology generates the same current to offset the current in the mechanical switch MS as the existing scheme, the current flowing through C2 is greatly reduced, thus significantly reducing the turn-on / turn-off current of Q2 and lowering the stress on Q2.

[0142] Simulation Application 2:

[0143] When the rate of rise of the fault current increases, and when the trigger current increases, this topology can be connected in parallel, such as... Figure 17 As shown.

[0144] The short-circuit equivalent inductance L is set to 3mH, approximately 6.7A / μs. The simulation is performed on the operating condition triggered when the system voltage is 20KV and the fault current reaches 1000A.

[0145] The specific parameter settings are shown in Table 2:

[0146] Table 2 Simulation Parameter Settings

[0147]

[0148] The action sequence of the two modules is the same, and is the same as the action sequence of a single module.

[0149] Simulation results are as follows Figures 18-23 As shown.

[0150] Simulation Result Analysis: In this simulation application, the simulation results for Module 1 and Module 2 are the same. The MS current oscillation amplitude gradually decreases. Due to the increased fault current rise rate and the increased equivalent discharge rate caused by the joint discharge of the two modules, the MS current frequency can reach a maximum of 55kHz. Because two discharge inductors are used in a single module, the current for Q2 to turn on and off is greatly reduced. Therefore, the stress on Q2 is still significantly reduced.

[0151] Simulation Application 3:

[0152] When the fault trigger current increases while the fault current rise rate remains constant, the control can be changed to allow the two modules to alternately conduct during low-amplitude oscillations, further reducing the conduction frequency of each module Q2 and preventing the MS current oscillation frequency from being too high due to the joint discharge of the two modules.

[0153] Simulations were performed on the operating condition where the system voltage was 20 kV, the fault current rise rate was 3.5 A / μs, and the fault current reached 1000 A.

[0154] The specific parameter settings are shown in Table 3:

[0155] Table 3 Simulation Parameter Settings

[0156]

[0157] The action sequence is as follows:

[0158] When the fault current reaches 1000A, Q1, Q3, Q5 and Q8 of the two modules are turned on, and C1 and C2 of the two modules are discharged, pulling the MS current down;

[0159] When the MS current drops to -100A, Q1 of both modules is turned off, and the MS current rises.

[0160] When the MS current rises from -100A to 100A, Q2 of both modules is turned on, C2 of both modules discharges, and the MS current is pulled down.

[0161] When the MS current drops to -100A, Q2 of both modules is turned off, and the MS current rises.

[0162] When the MS current rises from -100A to 50A, Q2 of both modules is turned on, C2 of both modules discharges, and the MS current is pulled down.

[0163] When the MS current drops to -50A, Q2 of both modules is turned off, and the MS current rises.

[0164] When the MS current rises from -50A to 30A, Q2 of module 1 is turned on, C2 of module 1 discharges, and the MS current is pulled down.

[0165] When the MS current drops to -30A, Q2 of module 1 is turned off, and the MS current rises.

[0166] When the MS current rises from -30A to 30A, Q2 of module 2 is turned on, C2 of module 2 discharges, and the MS current is pulled down.

[0167] When the MS current drops to -30A, Q2 of module 2 is turned off, and the MS current rises.

[0168] When the MS current rises from -30A to 30A, Q2 of module 1 is turned on, C2 of module 1 discharges, and the MS current is pulled down.

[0169] The two modules' Q2 switches are turned on alternately, repeating the above steps to limit the subsequent MS current oscillation amplitude to [value missing]. When MS contact separation is detected, Q2 of both modules is turned off;

[0170] When the MS contact is completely separated, turn off Q3 of both modules;

[0171] After the MOV absorbs the fault current, it disconnects Q5 and Q8 of the two modules.

[0172] Simulation results are as follows Figures 24 to 30 As shown.

[0173] Simulation Result Analysis: In this simulation application, the maximum MS current frequency is 27kHz, the maximum turn-on and turn-off frequency of Q2 in both modules is 13.7kHz, and the maximum current is less than 600A, which greatly reduces the pressure on the power electronic device Q2. For operating conditions where the fault current rise rate does not exceed the limit that a single module can handle, the MS current frequency, the magnitude and frequency of the Q2 turn-on and turn-off currents can be reduced by using the inter-module alternating conduction control method.

[0174] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A variable amplitude oscillating mechanical switch DC circuit breaker with arc-free interruption, characterized in that, include: The main branch circuit is connected in series with a mechanical switch MS; The current control branch includes a converter module and a main power electronic module. The converter module and the main power electronic module are connected in series and then connected in parallel with the mechanical switch MS. The converter module includes a first capacitor C1, a second capacitor C2, a first inductor L1, and a second inductor L2. The current control branch is configured as follows: when the mechanical switch MS is tripped due to a fault, the first capacitor C1 and the second capacitor C2 are first controlled to discharge together through the first inductor L1, which quickly pulls the current flowing through the mechanical switch MS below zero; then the second capacitor C2 is controlled to discharge intermittently through the second inductor L2, so that the current of the mechanical switch MS oscillates at a high frequency with varying amplitude until the contacts of the mechanical switch MS separate without arcing; the main power electronic module bears the fault current until the contacts of the mechanical switch MS are completely separated, at which point the fault current is cut off.

2. The DC circuit breaker according to claim 1, characterized in that, The inductance value of the first inductor L1 is less than the inductance value of the second inductor L2.

3. The DC circuit breaker according to claim 2, characterized in that, The DC circuit breaker adopts a bidirectional topology to accommodate different current directions.

4. The DC circuit breaker according to claim 1, characterized in that, The converter module includes IGBTs Q1 and Q2; Q1 is configured to control whether the first capacitor C1 and the second capacitor C2 discharge together through the first inductor L1. Q2 is configured to control whether the second capacitor C2 discharges through the second inductor L2.

5. The DC circuit breaker according to claim 1, characterized in that, The converter module includes a direction control switch group consisting of IGBTs Q5, Q6, Q7 and Q8; The directional control switch group is configured to control the direction of capacitor discharge current injection into the main branch according to the polarity of the DC system voltage, so that the circuit breaker has bidirectional breaking capability.

6. The DC circuit breaker according to claim 1, characterized in that, The main power electronic module includes IGBTs Q3 and Q4 connected back-to-back, and a metal oxide varistor (MOV) connected in parallel with IGBTs Q3 and Q4.

7. The DC circuit breaker according to claim 1, characterized in that, During the fault disconnection process of the mechanical switch MS, a variable amplitude strategy is adopted for the current oscillation amplitude. As the number of oscillations increases, the current oscillation amplitude setpoint is gradually reduced.

8. The DC circuit breaker according to claim 1, characterized in that, The DC circuit breaker topology adopts a modular application. Combining the rise rate of the fault current in the DC system and the trigger current threshold of the fault current, dual DC circuit breaker modules are connected in parallel to the main branch.

9. The DC circuit breaker according to claim 8, characterized in that, When the fault current oscillates at a low amplitude, the dual DC circuit breaker module adopts alternating conduction control to reduce the conduction frequency of a single module Q2.

10. An application method, applied to the DC circuit breaker according to any one of claims 1 to 9, characterized in that, The application method includes: The fault current is detected. When the fault current reaches the set threshold, a disconnection signal is sent to the mechanical switch MS, and the current control branch is activated. The first capacitor C1 and the second capacitor C2 are controlled to discharge together through the first inductor L1, thereby pulling the current of the mechanical switch MS down to the first negative threshold. Stop the combined discharge of the first capacitor C1 and the second capacitor C2, causing the current of the mechanical switch MS to rise; When the current of the mechanical switch MS rises to the first positive threshold, the second capacitor C2 is controlled to discharge through the second inductor L2, pulling the current of the mechanical switch MS down to the second negative threshold. The current oscillation process is repeated, and the positive and negative current thresholds are gradually reduced during the oscillation process to reduce the amplitude oscillation of the mechanical switch MS current; After detecting the separation of the mechanical switch MS contacts and the resulting gap, the oscillation control stops; the main power electronic module bears the fault current, and after detecting that the mechanical switch MS contacts are completely separated and the gap is large enough, it completes the interruption of the fault current.

Images