一种增强结构的封装电路板及制备方法
By setting a polyimide material with a low coefficient of thermal expansion as an auxiliary structure on the substrate, the warping problem caused by the mismatch of the coefficient of thermal expansion of the Coreless ultrathin substrate is solved, thereby improving the bonding stability and lifespan of the substrate and the chip.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- QULIANG ELECTRONICS CO LTD
- Filing Date
- 2026-04-30
- Publication Date
- 2026-07-17
AI Technical Summary
In the manufacturing process of Coreless ultrathin substrates, substrate warping is caused by the mismatch of thermal expansion coefficients between materials. Existing technologies that optimize the thermal expansion coefficients of materials have the problems of large R&D investment and long cycle.
By setting auxiliary structures on the substrate and using polyimide material with a low coefficient of thermal expansion to replace the edge position of the solder resist layer, a constraint on the solder resist layer is formed. Combined with chemical bonding and physical anchoring technology, the stress on the substrate is released and the expansion is suppressed.
It significantly reduces substrate warpage, improves the bonding stability and overall lifespan of the substrate and chip, and reduces the risk of cracking.
Smart Images
Figure CN122138324B_ABST