A data processing method, chip and data processing device
By distinguishing message type or data volume in cache management operations, performing processing operations other than cache management operations first, and then performing cache management operations, the problem of high power consumption in chip cache management operations is solved, and power saving is achieved under light load conditions.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HUAWEI TECH CO LTD
- Filing Date
- 2024-12-04
- Publication Date
- 2026-06-05
AI Technical Summary
The chip's cache management operation has a high power consumption problem.
Before storing the second message in the cache, perform processing operations on the first message other than cache management operations, and perform cache management operations only after storing the second message in the cache. Cache management operations are only performed on a subset of messages to save power.
This approach significantly reduces the power consumption of cache management operations, especially under light cache load conditions, further saving power during cache management operations.
Smart Images
Figure CN122152203A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip technology, and in particular to a data processing method, a chip, and a data processing device. Background Technology
[0002] In chip design, a chip can include a processor and a cache. The chip can store messages in the cache, and when the processor is idle, it reads the messages from the cache for processing. The chip can also perform cache management operations on the data in the cache. For example, it can provide more cache space for high-priority queues. However, the cache management operations of a chip have the problem of high power consumption. Summary of the Invention
[0003] This application provides a data processing method, a chip, and a data processing device, which solves the problem of high power consumption in the cache management operation of chips in the prior art.
[0004] To achieve the above objectives, the embodiments of this application adopt the following technical solutions: Firstly, a data processing method is provided, comprising: storing a first message in a cache; storing a second message in the cache after storing the first message in the cache; performing a processing operation on the first message before storing the second message in the cache, the processing operation being an operation other than a cache management operation; and performing a cache management operation on the second message after storing the second message in the cache.
[0005] In the above technical solution, before storing the second message in the cache, all processing operations except for cache management operations are performed on the first message; no cache management operation is performed. After storing the second message in the cache, cache management operations are performed on the second message. When the cache does not contain the second message, no cache management operation is required. This saves power consumption associated with cache management operations.
[0006] In one possible implementation of the first aspect, before storing the second message in the cache, a processing operation is performed on the first message, including: determining that the data size of the first message is less than or equal to a preset value before storing the second message in the cache, and not performing a cache management operation on the first message. In the above possible implementation, the processing operation can be an operation to determine the data size of the first message. The data size of the first message is less than or equal to the preset value. When it is determined that the data size of the message in the cache is less than or equal to the preset value, the cache is in a light-load state. At this time, no cache management operation is performed. The power consumption of the operation to determine the data size of the message in the cache is less than the power consumption of the cache management operation. Therefore, when the data size of the message in the cache is small, the power consumption caused by the cache management operation can be saved. Furthermore, if the processor's processing speed is fast, the processor reads the message from the cache before the data size of the message in the cache reaches the preset value. The cache continuously stores messages, but never reaches the preset value. Then, during this process, there is no need to perform a cache management operation on the cache, which can save a significant amount of power consumption caused by the cache management operation.
[0007] In one possible implementation of the first aspect, after storing the second message in the cache, a cache management operation is performed on the second message, including: after storing the second message in the cache, performing cache management operations on the first message and the second message, where the data size of the first message and the data size of the second message are greater than a preset value. In the above possible implementation, when the data size of the message in the cache is greater than the preset value, cache management operations can be performed on both the first message and the second message. Since the first message and the second message are distinguished by their data size, the priority of the first message may not be as high as that of the second message. Performing cache management operations on both the first message and the second message can provide more cache space for the higher-priority message.
[0008] In one possible implementation of the first aspect, after storing the second message in the cache, a cache management operation is performed on the second message, including: after storing the second message in the cache, performing a cache management operation on the second message, where the data size of the first message and the data size of the second message are greater than a preset value. In the above possible implementation, even if the data size of the messages in the cache is greater than the preset value, a cache management operation can be performed on the second message, but not on the first message. When the second message is stored in the cache, there is no need to perform a cache management operation on the first message, which can significantly save the power consumption caused by the cache management operation.
[0009] In one possible implementation of the first aspect, the cache management operation includes: obtaining the identifier of the message corresponding to the cache management operation, the identifier including at least one of the following: port information or queue information. The port information indicates the input and output ports of the message corresponding to the cache management operation, and the port information corresponds to the management mechanism of the cache management operation. The queue information indicates the length of the queue corresponding to the cache management operation, and the queue information corresponds to the management mechanism of the cache management operation. In the above possible implementations, the cache management operation may include obtaining the identifier of the message and determining the corresponding management mechanism through the identifier. These operations all require logical inversion. These operations do not need to be performed before the second message is stored in the cache, which can save power consumption.
[0010] In one possible implementation of the first aspect, the management mechanism for cache management operations includes at least one of the following: priority-based flow control (PFC), tail drop, weighted random early detection (WRED), and explicit congestion notification (ECN). The execution of these management mechanisms in the above possible implementations consumes significant power. By eliminating the need to execute these management mechanisms before the second packet is stored in the cache, power consumption can be saved.
[0011] In one possible implementation of the first aspect, the second message resides in the cache management space, which includes one or more of a header space, a shared space, or a reserved space. In the above possible implementations, the second message can be stored in the header space, the shared space, or the reserved space, thereby enabling better cache management operations on the second message.
[0012] In a second aspect, a chip is provided, the chip including a cache and a cache manager, the cache manager being used to control the cache to perform the data processing method provided by the first aspect or any possible implementation thereof.
[0013] In one possible implementation of the second aspect, the chip is a switching chip.
[0014] Thirdly, a data processing apparatus is provided, comprising a circuit board and a chip provided in the second aspect or any possible implementation thereof, the chip being disposed on the circuit board.
[0015] In another aspect, this application provides a computer-readable storage medium storing program code that can be invoked to perform the data processing method provided by the first aspect or any possible implementation thereof.
[0016] In another aspect, this application provides a computer program product that, when run on a computer, causes the computer to perform the data processing method provided by the first aspect or any possible implementation thereof.
[0017] Understandably, the apparatus, chip, computer storage medium, or computer program product of any of the data processing methods provided above are used to execute the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can be referred to the beneficial effects of the corresponding methods provided above, and will not be repeated here. Attached Figure Description
[0018] Figure 1 A schematic diagram of a data processing apparatus provided in an embodiment of this application; Figure 2 A schematic diagram of a cache provided for an embodiment of this application; Figure 3 A schematic diagram illustrating a cache space partitioning method provided in an embodiment of this application; Figure 4 A schematic diagram of a chip provided in an embodiment of this application; Figure 5 A schematic diagram illustrating the management of cache space provided in an embodiment of this application; Figure 6 A flowchart illustrating a data processing method provided in this application embodiment. Figure 1 ; Figure 7 An illustration of a message caching method provided in this application embodiment. Figure 1 ; Figure 8 An illustration of a message caching method provided in this application embodiment. Figure 2 ; Figure 9 An illustration of a message caching method provided in this application embodiment. Figure 3 ; Figure 10 A flowchart illustrating a data processing method provided in this application embodiment. Figure 2 ; Figure 11 A flowchart illustrating a data processing method provided in this application embodiment. Figure 3 . Detailed Implementation
[0019] It should be noted that the terms "first" and "second" used in the embodiments of this application are only used to distinguish features of the same type and should not be construed as indicating relative importance, quantity, order, etc.
[0020] The terms "exemplary" or "for example" used in the embodiments of this application are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.
[0021] The terms "coupling" and "connection" used in the embodiments of this application should be interpreted broadly. For example, they can refer to a physical direct connection or an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.
[0022] First, the application scenarios of the embodiments of this application are introduced. The embodiments of this application can be applied to data processing devices with caching functions. The data processing device can be an electronic device, or a device or component of that electronic device. The data processing device includes, but is not limited to: switches, data center network (DCN) equipment, mobile phones, tablets, computers, laptops, cameras, wearable devices, vehicle-mounted devices, or terminal devices, etc.
[0023] In one possible implementation, such as Figure 1 As shown, the data processing device 10000 includes a circuit board ( Figure 1 (Not shown in the diagram) and chip 1000, which can be mounted on a circuit board. Chip 1000 may include a coupled cache manager 100 and cache 200. Chip 1000 may also include a processor ( Figure 1 (Not shown in the image), the processor is coupled to cache 200.
[0024] For example, a message to be processed can be stored in cache 200. The processor can check whether a message to be processed is stored in cache 200. If a message to be processed is stored in cache 200, the processor can read the message from cache 200. Cache 200 is closer to the processor than memory. Storing the message to be processed in cache 200 allows for faster read speeds by the processor.
[0025] For example, chip 1000 can be a switching chip. The switching chip can be used to transmit parallel messages. For instance, the switching chip can receive message 0 and message n in parallel. Buffer manager 100 can control buffer 200 to store message 0 and message n. Buffer manager 100 can obtain the data volume of message 0 and message n input to buffer 200, i.e., input flow 0 and input flow n. Buffer manager 100 can control the reading of message 0 and message n from buffer 200. Buffer manager 100 can obtain the data volume of message 0 and message n output from buffer 200, i.e., output flow 0 and output flow n.
[0026] Typically, cache 200 has a small cache space. To achieve better quality of service (QoS), cache manager 100 needs to perform cache management operations on the packets in cache 200.
[0027] In one possible implementation, when a message is stored in cache 200, cache manager 100 performs cache management operations on the message. The cache management operations may include: obtaining message information; determining, based on the message information, whether a corresponding management mechanism needs to be executed on the message; and executing the corresponding management mechanism on the message when necessary.
[0028] In some examples, such as Figure 2 As shown, cache 200 can be divided into headroom space 211, shared space 212, and reserved space 213. These three spaces are virtual cache spaces. Dividing the cache into these three spaces allows for differentiation of the types of packets stored in cache 200 (such as importance), thereby enabling the execution of corresponding management mechanisms for the packets. Figure 3 As shown, messages in header space 211, shared space 212, and reserved space 213 are stored in queues. Cache manager 100 can store the queue length of each of these three cache spaces. Cache manager 100 can also store the total amount of data in cache 200. In this example, the total amount of data in cache 200 can be the sum of the data amounts in the queue lengths of these three cache spaces. Header space 211 is used for temporary storage of messages in emergency situations. The cache size of header space 211 can be set relatively small. Messages are not stored in header space 211 for extended periods, therefore the queue length (Qlen) in header space 211 is short. Shared space 212 is used to store most messages. Reserved space 213 is used for important or latency-sensitive messages.
[0029] After storing packets in the header space 211, shared space 212, or reserved space 213, the cache manager 100 can execute corresponding management mechanisms on the packets. These management mechanisms may include priority-based flow control (PFC), tail drop, weighted random early detection (WRED), and explicit congestion notification (ECN).
[0030] PFC (Pre-Flow Control) can be used to enable forward flow control. For example, when the network is congested, the sending rate is gradually reduced to avoid service interruptions caused by sudden traffic surges. TAIL DROP can be used to drop the oldest or lowest priority packets when the buffer space in reserved space 213 and shared space 212 is exhausted. This method is suitable for applications with high real-time requirements. WRED (Write-Redirect) is a dynamic drop policy. This method can be used to assign different drop probabilities to packets based on their importance, maintaining network stability by sacrificing some bandwidth for high-priority packets. ECN (Enhanced Communication Control) can be used to mark packets to indicate to upstream routers that the network is starting to congest, rather than directly dropping packets. This method provides better network early warning capabilities.
[0031] The cache management operations provided in this application embodiment are merely illustrative. In practice, there may be more or fewer types of cache space partitioning, and other management mechanisms may also exist. This application embodiment does not impose any limitations on this.
[0032] The following example illustrates one possible workflow for cache management operations.
[0033] IF (Message Input) *If there is a message input in buffer 200* Qlen_reserved / shared / headroom++; *Increases the queue length in reserved space 213, shared space 212, or headroom 211.* If (Qlen_shared > pfc / tail_drop / wred / ecn_threshold) *If the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism* Q_pfc / tail_drop / wred / ecn=1;\*Execute PFC, TAIL DROP, WRED, or ECN management mechanism*\ Else Q_pfc tail_drop / wred / ecn=0; *Do not execute PFC, TAIL DROP, WRED, or ECN management mechanisms* Else If (Message Output) \*If there is a message output in buffer 200*\ Qlen_reserved / shared / headroom --; *Reduces the queue length in reserved space 213, shared space 212, or headspace 211* If (Qlen_shared > pfc / tail_drop / wred / ecn_threshold) \*If the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism*\ Q_pfc / tail_drop / wred / ecn=1; *Executes PFC, TAIL DROP, WRED, or ECN management mechanisms* Else Q_pfc tail_drop / wred / ecn=0; *Do not execute PFC, TAIL DROP, WRED, or ECN management mechanisms* When a message is input to buffer 200, the queue length in the reserved space 213, shared space 212, or header space 211 of buffer manager 100 increases. Taking the increase in queue length in shared space 212 as an example, if the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism needs to be executed, and performs the corresponding management mechanism on the message. If the queue length in shared space 212 is less than or equal to the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism does not need to be executed.
[0034] When a message is output to buffer 200, the queue length in the reserved space 213, shared space 212, or header space 211 of buffer manager 100 is reduced. Taking the reduction of the queue length in shared space 212 as an example, if the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism needs to be executed, and performs the corresponding management mechanism on the message. If the queue length in shared space 212 is less than or equal to the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism does not need to be executed.
[0035] In this implementation, a relatively large logic circuit is required to implement cache management operations. Every time a message is stored or read from cache 200, cache manager 100 performs cache management operations, causing numerous logic circuit flips and resulting in significant power consumption. In some cases, chip 1000 operates in a non-congested state, and cache 200's occupancy is very small. However, in these situations, cache manager 100 still needs to perform cache management operations, such as determining whether a corresponding management mechanism needs to be executed. This wastes considerable power.
[0036] In another possible implementation, when a message is stored in cache 200, cache manager 100 can perform cache management operations on a portion of the messages and perform processing operations other than cache management operations on another portion of the messages.
[0037] In some examples, such as Figure 4 As shown, cache 200 can also be divided into a management cache space 210 and a free cache space 220. The management cache space 210 and the free cache space 220 are virtual cache spaces. Dividing the cache into these two types of spaces allows for differentiation on whether cache management operations are needed for the packets stored in cache 200. For example... Figure 5 As shown, the management cache space 210 can be divided into a header space 211, a shared space 212, and a reserved space 213. The cache manager 100 can store the queue length of each of these three cache spaces. The cache manager 100 can also store the total amount of data in cache 200. In this example, the total amount of data in cache 200 can be the sum of the data amount of the queue lengths of the three cache spaces and the data amount of the free cache space 220.
[0038] If a message is stored in the header space 211, shared space 212, or reserved space 213 of the management cache space 210, the cache manager 100 can perform the corresponding management mechanism (such as PFC, TAIL DROP, WRED, or ECN management mechanism) on the message. If a message is stored in the free cache space 220, the cache manager 100 performs processing operations on the message other than cache management operations.
[0039] In this implementation, cache management operations are performed only on a portion of the packets, while no cache management operations are required on the other portion. This saves power consumption associated with cache management operations.
[0040] based on Figure 4 and Figure 5 The provided chip 1000, in this application embodiment, provides a data processing method. For example... Figure 6 As shown, this data processing method includes at least the following steps: S100: Cache manager 100 stores the first message in cache 200, and after storing the first message in cache 200, stores the second message in cache 200.
[0041] S200: Before storing the second message in the cache 200, the cache manager 100 performs a processing operation on the first message. The processing operation is an operation other than the cache management operation.
[0042] For example, the first message is stored in the free buffer space 220. The cache manager 100 performs processing operations on the first message, which may include: the cache manager 100 does not perform cache management operations on the first message, or the cache manager 100 performs processing operations on the first message. The processing operations may be: read operations, delete operations, or operations such as obtaining the data volume of the first message. The power consumption of the processing operations is less than the power consumption of the cache management operations.
[0043] S300: After storing the second message in the cache 200, the cache manager 100 performs cache management operations on the second message.
[0044] For example, the second message is stored in the management cache space 210. The cache manager 100 performs cache management operations on the second message, which may be as follows: the cache manager 100 obtains the information of the second message; the cache manager 100 determines whether the corresponding management mechanism needs to be executed on the second message based on the information of the second message; and the cache manager 100 executes the corresponding management mechanism on the second message when necessary.
[0045] In this embodiment, before storing the second message in the cache 200, the cache manager 100 performs processing operations on the first message other than cache management operations, and does not perform cache management operations. After storing the second message in the cache 200, the cache manager 100 performs cache management operations on the second message. When the cache 200 does not contain the second message, the cache manager 100 does not need to perform cache management operations. This saves power consumption associated with cache management operations.
[0046] In one possible implementation, the first message and the second message can be distinguished by message type. The first message can be a message of a first specified type. The second message can be a message of a second specified type.
[0047] For example, the first message can be a text message. The second message can be a message of any other type besides text. A text message can be called a text message or plain text data. Text messages can be used to transmit information such as emails and text messages.
[0048] For example, the second message could be a video message. The first message could be any type of message other than video. A video message could be a message carrying video data during video communication or streaming media transmission.
[0049] The following example illustrates a scenario where the first message is a text-type message, and the second message is a message of a different type than text. If cache 200 stores text-type messages but not messages of other types, cache manager 100 does not perform cache management operations. If cache 200 stores both text-type messages and messages of other types, cache manager 100 performs cache management operations.
[0050] In another possible implementation, the first message and the second message can be distinguished by the amount of data in the messages in cache 200. When the total amount of data in the messages in cache 200 is less than or equal to a preset value, the first message can be a message in cache 200. When the total amount of data in the messages in cache 200 is greater than the preset value, the first message is the message stored in cache 200 before the second message, and the amount of data in the first message is less than or equal to the preset value. The second message can be any message in cache 200 other than the first message.
[0051] For example, such as Figure 7 As shown in Figure (a), the buffer manager 100 sequentially inputs messages into the buffer 200. For example, message A is stored in buffer 200 first, followed by message B. The data size of messages A and B is less than a preset value, and messages A and B are the first messages.
[0052] For example, such as Figure 8 As shown in Figure (a), the buffer manager 100 sequentially inputs messages into the buffer 200. For example, message A is stored in buffer 200 first, then message B, and then message C. The data size of messages A and B is less than a preset value, while the data size of messages A, B, and C is greater than a preset value. Messages A and B are the first messages. Message C is the second message.
[0053] For example, such as Figure 9 As shown in Figure (a), the buffer manager 100 sequentially inputs messages into the buffer 200. For example, message A is stored in buffer 200 first, then message B, then message C, and finally message D. The data size of messages A and B is less than a preset value, while the data size of messages A, B, C, and D is greater than a preset value. Messages A and B are the first messages. Messages C and D are the second messages.
[0054] In some examples, such as Figure 10 As shown, S200 may specifically include S210: Before storing the second message in the cache 200, the cache manager 100 determines that the data volume of the first message is less than or equal to a preset value, and does not perform cache management operation on the first message.
[0055] For example, such as Figure 7 As shown in Figure (b), before storing message C in cache 200, cache manager 100 determines that the data volume of messages A and B is less than a preset value. Messages A and B are stored in free cache space 220. Cache manager 100 does not perform cache management operations on messages A and B.
[0056] S300 may specifically include S310: After storing the second message in the cache 200, the cache manager 100 performs a cache management operation on the second message, and the data volume of the first message and the data volume of the second message are greater than a preset value.
[0057] For example, the cache manager 100 may perform cache management operations on the second message by performing cache management operations on all messages in the second message.
[0058] like Figure 8 As shown in Figure (b), message C is stored in management buffer space 210. Messages A and B are located in free buffer space 220. Buffer manager 100 performs buffer management operations on message C. Buffer manager 100 does not perform buffer management operations on messages A and B. Figure 9As shown in Figure (b), message D is stored in management cache space 210. Messages A and B are located in free cache space 220, and message C is located in management cache space 210. Cache manager 100 performs cache management operations on message D. Cache manager 100 does not perform cache management operations on messages A and B. Since message C has already undergone cache management operations, cache manager 100 does not perform cache management operations on message C again.
[0059] For example, the cache manager 100 may perform cache management operations on the second message by performing cache management operations on a portion of the second message.
[0060] like Figure 8 As shown in Figure (c), message C is stored in free buffer space 220. Messages A and B are also located in free buffer space 220. Buffer manager 100 does not perform buffer management operations on messages A, B, and C.
[0061] like Figure 9 As shown in Figure (c), message D is stored in management cache space 210. Messages A, B, and C are located in free cache space 220. Cache manager 100 performs cache management operations on message D. Cache manager 100 does not perform cache management operations on messages A, B, and C.
[0062] In this example, the processing operation could be determining the data size of a first message. The data size of the first message is less than or equal to a preset value. When the cache manager 100 determines that the data size of the message in the cache 200 is less than or equal to the preset value, the cache 200 is in a light-load state. At this time, the cache manager 100 does not perform cache management operations. The power consumption of the operation to determine the data size of the message in the cache 200 is less than the power consumption of the cache management operation. Therefore, when the data size of the message in the cache 200 is small, the power consumption of the cache management operation can be saved.
[0063] Furthermore, if the processor's processing speed is fast, the processor reads the packets from cache 200 before the data volume in cache 200 reaches a preset value. Cache 200 continuously stores packets, but the preset value is never reached. Therefore, cache manager 100 does not need to perform cache management operations on the packets in cache 200, which can significantly save power consumption associated with cache management operations.
[0064] Furthermore, even if the amount of data in the message in cache 200 exceeds a preset value, cache manager 100 can perform cache management operations on the second message but not on the first message. When the second message is stored in cache 200, cache manager 100 does not need to perform cache management operations on the first message, which can save a significant amount of power consumption caused by cache management operations.
[0065] Furthermore, when the amount of data in the message in cache 200 exceeds a preset value, cache manager 100 can perform cache management operations on a portion of the second message, but not on the other portion. This significantly reduces the power consumption associated with cache management operations.
[0066] In other examples, such as Figure 11 As shown, S200 may specifically include S210: Before storing the second message in the cache 200, the cache manager 100 determines that the data volume of the first message is less than or equal to a preset value, and does not perform cache management operation on the first message.
[0067] For example, such as Figure 7 As shown in Figure (b), before storing message C in cache 200, cache manager 100 determines that the data volume of messages A and B is less than a preset value. Messages A and B are stored in free cache space 220. Cache manager 100 does not perform cache management operations on messages A and B.
[0068] S300 may specifically include S320: After storing the second message in the cache 200, the cache manager 100 performs cache management operations on the first message and the second message, where the data volume of the first message and the data volume of the second message are greater than a preset value.
[0069] For example, the cache manager 100 performs cache management operations on the first message and the second message, which may be: the cache manager 100 performs cache management operations on all messages in the first message and the second message.
[0070] like Figure 8 As shown in Figure (d), messages A, B, and C are stored in the management cache space 210. The cache manager 100 performs cache management operations on messages A, B, and C. Figure 9 As shown in Figure (d), message D is stored in management cache space 210. Messages A, B, and C are located in management cache space 210. Cache manager 100 performs cache management operations on message D. Since cache management operations have already been performed on messages A, B, and C, cache manager 100 does not perform cache management operations on messages A, B, and C again.
[0071] In this example, the processing operation could be determining the data size of a first message. The data size of the first message is less than or equal to a preset value. When the cache manager 100 determines that the data size of the message in the cache 200 is less than or equal to the preset value, the cache 200 is in a light-load state. At this time, the cache manager 100 does not perform cache management operations. The power consumption of the operation to determine the data size of the message in the cache 200 is less than the power consumption of the cache management operation. Therefore, when the data size of the message in the cache 200 is small, the power consumption of the cache management operation can be saved.
[0072] Furthermore, if the processor's processing speed is fast, the processor reads the packets from cache 200 before the data volume in cache 200 reaches a preset value. Cache 200 continuously stores packets, but the preset value is never reached. In this case, cache manager 100 does not need to perform cache management operations on cache 200, which can significantly save power consumption associated with cache management operations.
[0073] Furthermore, when the data volume of a message in cache 200 exceeds a preset value, cache manager 100 can perform cache management operations on both the first and second messages. Since the first and second messages are distinguished by data volume, the priority of the first message may not be as high as that of the second message. By performing cache management operations on both the first and second messages, cache manager 100 can provide more cache space for higher-priority messages.
[0074] In one possible implementation, the cache management operation may include: obtaining the identifier of the message corresponding to the cache management operation, wherein the identifier includes at least one of the following: port information or queue information.
[0075] For example, port information is used to indicate the input and output ports of the message corresponding to the cache management operation, and the port information corresponds to the management mechanism of the cache management operation. Port information can be used to indicate whether a management mechanism needs to be executed, and can also be used to indicate the type of management mechanism to be executed. Queue information is used to indicate the length of the queue corresponding to the cache management operation, and queue information corresponds to the management mechanism of the cache management operation. Queue information can be used to indicate whether a management mechanism needs to be executed, and can also be used to indicate the type of management mechanism to be executed.
[0076] In this example, cache management operations may include retrieving the packet's identifier and using that identifier to determine the corresponding management mechanism. These operations all require logical inversion. Since these operations are not performed before the second packet is stored in cache 200, power consumption can be saved.
[0077] In one possible implementation, the management mechanism for cache management operations includes at least one of the following: PFC mode, TAIL DROP mode, WRED mode, and ECN mode.
[0078] In this example, the execution of these management mechanisms consumes significant power. By eliminating the need for these mechanisms before the second message is stored in cache 200, power consumption can be saved.
[0079] In one possible implementation, the second message is located in the management space of the cache 200, which includes one or more of the header space 211, the shared space 212, or the reserved space 213.
[0080] In this example, the second message can be stored in the header space 211, the shared space 212, or the reserved space 213, thereby enabling better cache management operations on the second message.
[0081] The following example illustrates a possible flow of the data processing method according to an embodiment of this application.
[0082] If (total_buffer_cnt ≤ free_space_threshold && message input or output) \* If the total data volume of messages in buffer 200 is less than or equal to the capacity threshold of free buffer space 220, and there is message input or output in buffer 200*\ total_buffer_cn++(message input) / --(message output); Calculates the total data volume of the message after message input or output. Qlen_reserved / shared / headroom = 0; *The queue length for reserved space 213, shared space 212, or headroom 211 does not increase.* Q_pfc / tail_drop / wred / ecn=0; *Do not execute PFC, TAIL DROP, WRED, or ECN management mechanisms* Else if (total_buffer_cnt > free_space_threshold) \*Otherwise, if the total data volume of the buffered packets (200) exceeds the free buffer space capacity threshold (220)*\ IF (Message Input) *If there is a message input in buffer 200* total_buffer_cn++; *Increases the total data volume of buffered packets of size 200.* Qlen_reserved / shared / headroom++; *Increases the queue length in reserved space 213, shared space 212, or headroom 211.* If (Qlen_shared > pfc / tail_drop / wred / ecn_threshold) \*If the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism*\ Q_pfc / tail_drop / wred / ecn=1; *Executes PFC, TAIL DROP, WRED, or ECN management mechanisms* Else Q_pfc tail_drop / wred / ecn=0; *Do not execute PFC, TAIL DROP, WRED, or ECN management mechanisms* Else If (Message Output) \*If there is a message output in buffer 200*\ total_buffer_cn --; *The total data volume of buffered 200 packets is reduced* Qlen_reserved / shared / headroom --; *Reduces the queue length in reserved space 213, shared space 212, or headspace 211* If (Qlen_shared > pfc / tail_drop / wred / ecn_threshold) \*If the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism*\ Q_pfc / tail_drop / wred / ecn=1; *Executes PFC, TAIL DROP, WRED, or ECN management mechanisms* Else Q_pfc tail_drop / wred / ecn=0; *Do not execute PFC, TAIL DROP, WRED, or ECN management mechanisms* If the total data volume of the packets in cache 200 is less than or equal to a preset value (e.g., the capacity threshold of free cache space 220), cache manager 100 determines the packets in cache 200 as the first packets. The first packets are stored in free cache space 220. Cache manager 100 does not need to store the first packets in reserved space 213, shared space 212, or header space 211, therefore the queue length of reserved space 213, shared space 212, or header space 211 will not increase. Cache manager 100 does not need to perform PFC, TAIL DROP, WRED, or ECN management mechanisms on the first packets.
[0083] If the total data volume of the messages in cache 200 is greater than the preset value, the cache manager 100 determines that the messages in cache 200 include the first message and the second message.
[0084] When a second message is input to buffer 200, the queue length in the reserved space 213, shared space 212, or header space 211 of buffer manager 100 increases. Taking the increase in queue length in shared space 212 as an example, if the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism needs to be executed, and executes the corresponding management mechanism for the second message. If the queue length in shared space 212 is less than or equal to the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism does not need to be executed.
[0085] When a second message is output from buffer 200, the queue length in the reserved space 213, shared space 212, or header space 211 of buffer manager 100 is reduced. Taking the reduction of the queue length in shared space 212 as an example, if the queue length in shared space 212 is greater than the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism needs to be executed, and performs the corresponding management mechanism on the second message. If the queue length in shared space 212 is less than or equal to the threshold of the PFC, TAIL DROP, WRED, or ECN management mechanism, buffer manager 100 determines that the PFC, TAIL DROP, WRED, or ECN management mechanism does not need to be executed.
[0086] In this embodiment, packets in cache 200 can be preferentially stored in free cache space 220. When the occupancy of cache 200 is less than or equal to a preset value, cache manager 100 determines that cache 200 is in a light-load state. At this time, cache manager 100 does not need to perform cache management operations on packets in cache 200. For example, cache manager 100 may not perform the operation of obtaining packet port information, cache manager 100 may not perform the operation of obtaining queue length, and cache manager 100 may not determine whether the state of cache 200 is congested. Cache management-related logic does not need to be flipped, which can save a lot of power consumption.
[0087] The technical solution adopted in this application requires very little area because the area occupied by the counting and judgment logic of the free cache space 220 is negligible. However, it is possible to obtain almost all the dynamic power consumption benefits of the entire cache management function with a small area cost. For example, setting 10% of the total cache as free cache space 220 for line-rate scenarios can achieve a power consumption benefit of 120mW / Tbps.
[0088] This application also provides a computer-readable storage medium storing program code. When the program code is run on a device (e.g., a microcontroller, chip 1000, computer, or processor), it can be invoked to execute one or more steps in the above method embodiments.
[0089] Based on this understanding, this application also provides a computer program product containing instructions. The technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) or its circuitry to execute all or part of the steps of the methods described in the various embodiments of this application.
[0090] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0091] Those skilled in the art will recognize that the modules and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0092] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the data processing device 10000 and the chip 1000 described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0093] In the several embodiments provided in this application, it should be understood that the disclosed data processing device 10000 and chip 1000 can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or modules may be electrical, mechanical, or other forms.
[0094] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located on one device or distributed across multiple devices. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0095] In addition, the functional modules in the various embodiments of this application can be integrated into one device, or each module can exist physically separately, or two or more modules can be integrated into one device.
[0096] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).
[0097] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A data processing method, characterized in that, The data processing method includes: The first message is stored in the cache, and after the first message is stored in the cache, the second message is stored in the cache. Before storing the second message into the cache, a processing operation is performed on the first message, the processing operation being an operation other than the cache management operation; After storing the second message in the cache, a cache management operation is performed on the second message.
2. The data processing method according to claim 1, characterized in that, The step of performing processing operations on the first message before storing the second message in the cache includes: Before storing the second message in the cache, it is determined that the data volume of the first message is less than or equal to a preset value, and the cache management operation is not performed on the first message.
3. The data processing method according to claim 1 or 2, characterized in that, After storing the second message in the cache, performing cache management operations on the second message includes: After storing the second message in the cache, a cache management operation is performed on the first message and the second message, wherein the data volume of the first message and the data volume of the second message are greater than the preset value.
4. The data processing method according to claim 1 or 2, characterized in that, After storing the second message in the cache, performing cache management operations on the second message includes: After storing the second message in the cache, the cache management operation is performed on the second message, and the data volume of the first message and the data volume of the second message are greater than a preset value.
5. The data processing method according to any one of claims 1-4, characterized in that, The cache management operations include: Obtain the identifier of the message corresponding to the cache management operation, wherein the identifier includes at least one of the following: port information or queue information; The port information is used to indicate the input and output ports of the message corresponding to the cache management operation, and the port information corresponds to the management mechanism of the cache management operation; the queue information is used to indicate the length of the queue corresponding to the cache management operation, and the queue information corresponds to the management mechanism of the cache management operation.
6. The data processing method according to any one of claims 1-5, characterized in that, The management mechanism for the cache management operation includes at least one of the following: priority-based flow control (PFC), tail drop (TAIL DROP), weighted random early detection (WRED), and explicit congestion notification (ECN).
7. The data processing method according to any one of claims 1-6, characterized in that, The second message is located in the management space of the cache, which includes one or more of the following: header space, shared space, or reserved space.
8. A chip, characterized in that, The chip includes a cache and a cache manager, the cache manager being used to control the cache to perform the method as described in any one of claims 1-7.
9. The chip according to claim 8, characterized in that, The chip in question is a switching chip.
10. A data processing apparatus, characterized in that, The data processing device includes a circuit board and a chip as described in claim 8 or 9, the chip being disposed on the circuit board.