A multi-serial port communication method, system and program product based on a real-time operating system

Abstract

A multi-serial port communication method, system and program product based on a real-time operating system belong to the technical field of embedded real-time communication and are used to solve the problems of poor real-time performance, flexibility and management complexity of the traditional serial port communication scheme of the existing embedded real-time system. The method comprises the following steps: enumerating a PCI device to obtain a base address of a multi-serial port board card of a target device, and converting the base address to obtain a virtual address base pointer of the multi-serial port board card; based on the virtual address base pointer, calculating the virtual addresses of all registers of each serial port in the multi-serial port board card, and configuring the communication parameters of each serial port; configuring a data parser for each serial port, and based on the virtual addresses and the data parser, completing the multi-serial port communication of the target device according to business requirements.

Description

Technical Field

[0001] This invention relates to the field of embedded real-time communication technology, and in particular to a multi-serial-port communication method, system, and program product based on a real-time operating system. Background Technology

[0002] Currently, the mainstream technical solutions for implementing serial communication can be divided into the following two categories: serial communication interface APIs provided by the operating system and dedicated drivers and SDKs provided by serial port hardware manufacturers.

[0003] The serial communication interface API provided by the operating system is the most common method. The operating system shields the underlying hardware differences through a hardware abstraction layer, providing a unified programming interface for applications. However, application development and use are limited by the specific operating system, and the communication rate is usually limited by the operating system's scheduling and the data exchange overhead between kernel mode and user mode.

[0004] For example, in the Windows operating system, the Win32 API for C / C++ provides a series of functions, such as CreateFile for opening a serial port, and ReadFile and WriteFile for synchronous or asynchronous read / write. Developers need to handle the complex synchronous / asynchronous mechanisms, timeout control, and error handling themselves, making the programming model relatively complex.

[0005] One common approach is to use dedicated drivers and SDKs provided by serial port hardware manufacturers. Some manufacturers of specialized hardware devices or boards (such as multi-serial port cards) provide customized drivers and secondary development toolkits along with the hardware. This solution is directly optimized for specific hardware, providing a more direct access interface. Hardware manufacturers provide pre-packaged dynamic link libraries and API header files. Developers can relatively easily implement serial port read and write operations by calling these dedicated API functions, without needing to deeply understand the interface details of the underlying operating system.

[0006] Although the above solutions are widely adopted, they all have some inherent limitations and cannot meet the application requirements of high performance, high flexibility, and cross-platform compatibility. They suffer from the following drawbacks: Performance and efficiency bottlenecks: Because the operating system API solution is in user mode, it needs to go through multiple context switches and data copies to access the hardware, resulting in large data transmission latency and making it difficult to achieve high real-time performance and low latency high-speed communication.

[0007] Poor flexibility and controllability: Both solutions deeply encapsulate the underlying hardware (such as the working mode of the serial port controller, FIFO depth, interrupt triggering conditions, etc.), leaving developers with a lack of fine control over the communication process and making it impossible to perform in-depth optimization according to specific application scenarios.

[0008] Poor platform dependence and portability: Operating system APIs are heavily dependent on specific platforms (such as Windows and Linux), making it difficult to port applications across different operating systems. Hardware vendor SDKs are tied to specific hardware; changing the hardware platform requires rewriting the communication code, resulting in high maintenance costs.

[0009] High development complexity: Developing robust serial communication using operating system APIs (such as Win32 API) is extremely cumbersome. Developers must be proficient in complex synchronous / asynchronous I / O models, timeout mechanisms, and multithreaded programming techniques. The learning curve is steep, and the development and debugging cycle is long. Summary of the Invention

[0010] Based on the above analysis, the present invention aims to provide a multi-serial port communication method, system, and program product based on a real-time operating system, in order to solve the problems of low hardware resource management efficiency of multi-serial port cards, poor compatibility of multiple devices, and inability of manufacturer drivers to meet real-time and customization requirements in embedded real-time systems, especially in systems with high real-time requirements such as RTX.

[0011] In a first aspect, embodiments of the present invention provide a multi-serial port communication method based on a real-time operating system, the method comprising the following steps: Enumerate PCI devices to obtain the base address of the target device's multi-serial port board, and convert the base address to obtain the virtual address base pointer of the multi-serial port board; Based on the virtual address base pointer, calculate the virtual address of all registers of each serial port in the multi-serial port board, and configure the communication parameters of each serial port; Configure a data parser for each serial port, and based on the virtual address and the data parser, complete the multi-serial port communication of the target device according to the business requirements.

[0012] Based on the above solution, the present invention also makes the following improvements: Furthermore, the step of completing multi-serial port communication of the target device based on the virtual address and the data parser according to business requirements includes: When the serial port receives data, the hardware registers in each serial port are read directly through the virtual address, and the raw byte stream is sent to the data parser for protocol parsing. After parsing, the structured data packet is pushed to the business layer through a preset callback function. When the service layer sends a request, the data parser encapsulates the service data into a format that conforms to the serial port requirements, stores the encapsulated data into the transmit FIFO of the serial port controller through the virtual address, and automatically starts physical transmission after the serial port detects that there is data in the register and feeds back to the service layer.

[0013] Furthermore, configuring a data parser for each serial port includes: Configure parser parameters; Configure a corresponding parser instance for each serial port. Each parser instance has its own data buffer, real-time thread, synchronization mechanism and protocol parsing engine.

[0014] Furthermore, the configuration of communication parameters for each serial port includes: Configure the serial port working mode and enable the first-in-first-out (FIFO) hardware buffer queue; configure the communication baud rate; configure the data frame format; configure interrupt enable and hardware flow control.

[0015] Furthermore, the configured communication baud rate includes: Select the baud rate clock source; Configure the frequency division parameters, including the value of the sampling clock register SCR, the values ​​of the low-order DLL and high-order DLH of the frequency divider latch, and the value of the clock prescaler register CPR; Set the divisor latch access bit of the line control register LCR; The obtained frequency division parameters are sequentially written into SCR, DLL, DLH and CPR; Clear the divisor latch access bit of the LCR to zero.

[0016] Furthermore, obtaining the virtual address base pointer of the multi-serial port board includes: Enumerate PCI bus devices and obtain the standard header information for each PCI configuration space; Based on the standard header information of each PCI configuration space, identify the multi-serial port cards of the target device; Based on the identified multi-serial port cards, the base address of the multi-serial port cards is parsed; Based on the base address, address translation and memory mapping are performed to obtain the virtual address base pointer of the multi-serial port board.

[0017] Furthermore, resolving the base address of the multi-serial port board includes: For the identified target device, call the function to read the specified base address register; Parse the BAR value of the base address register and determine its least significant bit. If it is 0, it indicates that the device uses memory space mapping; if it is 1, it indicates that the device uses I / O port mapping. Extract the starting address and size information of the device register space in the PCI address field from the base address register, and use the starting address as the base address of the multi-serial port board.

[0018] Furthermore, the identification of the target device's multi-serial port board based on the standard header information of each PCI configuration space includes: Extract the vendor ID and device ID from the standard header information of each PCI configuration space, and compare the extracted ID with the pre-stored target hardware identifier; If the comparison is successful, the bus number, device number, and function number of the device are recorded to complete the precise location of the target device.

[0019] Secondly, embodiments of the present invention provide a multi-serial port communication system based on a real-time operating system, the system comprising: The serial port group management module is used to enumerate PCI devices to obtain the base address of the target device's multi-serial port board, and convert the base address to obtain the virtual address base pointer of the multi-serial port board; The serial port driver module is used to calculate the virtual address of all registers of each serial port in the multi-serial port board based on the virtual address base pointer, and to configure the communication parameters of each serial port. The codec module is used to configure a data parser for each serial port and, based on the virtual address and the data parser, complete multi-serial port communication of the target device according to business requirements.

[0020] Thirdly, embodiments of the present invention provide a computer program product, the computer program product including a stored computer program, which, when run by a processor, implements the multi-serial port communication method based on a real-time operating system as described in any embodiment of the first aspect of the present invention.

[0021] The beneficial effects of this technical solution are: 1. Achieved efficient management of peripheral hardware resources. The base address in the PCI configuration space is obtained by using the bus data acquisition function, and the physical address is mapped to a virtual address through the address translation mechanism. The chip's registers (such as the link control register and interrupt enable register) are then directly manipulated to precisely control parameters such as baud rate, data bits, and parity bits.

[0022] 2. Improved multi-device compatibility and system reliability Complex systems require multiple similar expansion cards, which can easily lead to address conflicts or driver incompatibility in general system environments. By uniformly enumerating bus devices (verifying vendor ID / device ID) and dynamically allocating resources, the problem of multi-serial port collaboration is solved.

[0023] 3. It breaks through the limitations of manufacturer-driven development and customization requirements. Many hardware manufacturers do not provide open-source drivers for real-time environments, preventing users from optimizing performance for specific scenarios. By developing our own drivers, we can customize protocols for special scenarios, support dynamic adjustment of frame length and message intervals, and transmit custom-encapsulated message structure parameters, achieving millisecond-level multi-channel communication.

[0024] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description

[0025] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0026] Figure 1 This is a flowchart of a multi-serial port communication method based on a real-time operating system provided in Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of the structure of a multi-serial-port communication system based on a real-time operating system provided in Embodiment 2 of the present invention. Detailed Implementation

[0027] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0028] Specific embodiment 1 of the present invention discloses a multi-serial port communication method based on a real-time operating system, the method flow is as follows: Figure 1 As shown, the specific steps include: Step S1: Enumerate PCI devices to obtain the base address of the target device's multi-serial port board, and convert the base address to obtain the virtual address base pointer of the multi-serial port board.

[0029] This step is fundamental to accessing hardware resources. After the RTX real-time subsystem starts, it aims to bypass the driver layer of the general operating system and establish a direct, deterministic hardware access path.

[0030] Step S11: Enumerate PCI bus devices and obtain the standard header information for each PCI configuration space.

[0031] In the specific implementation process, firstly, using a three-level loop structure of bus number, device number, and function number, after the RTX real-time subsystem is initialized, the PCI bus scanning program is started to systematically scan the entire PCI bus topology, traversing all possible PCI / PCIe device locations to obtain the location information of all mounted devices. For each valid location, the RtGetBusDataByOffset function is called to read the standard header information of each PCI configuration space.

[0032] Step S12: Identify the multi-serial port board of the target device based on the standard header information of each PCI configuration space.

[0033] In the specific implementation process, the Vendor ID and Device ID are extracted from the standard header information of each PCI configuration space, and the extracted IDs are compared with the pre-stored target hardware identifiers.

[0034] For example, a pre-stored target hardware identifier, such as the ID of a specific MOXA serial port card model.

[0035] If the extracted supplier ID and device ID are successfully matched with the pre-stored target hardware identifier, the bus number, device number, and function number of the device are recorded as unique identifiers for subsequent operations, thereby accurately filtering out the multi-serial port board of the target device and completing the precise location of the target device.

[0036] Step S13: Based on the identified multi-serial port board, parse the base address of the multi-serial port board.

[0037] Specifically, for the identified target device, the RtGetBusDataByOffset function is called again to read the base address register specified by the function.

[0038] Generally, the specified base address register is usually BAR0 or BAR1.

[0039] Furthermore, the BAR value of the base address register is parsed, and its least significant bit is determined. If it is 0, it indicates that the device uses memory space mapping; if it is 1, it indicates that the device uses I / O port mapping. At the same time, the starting address and size information of the device register space in the PCI address field are extracted from the base address register, and the starting address is used as the base address of the multi-serial port board.

[0040] Step S14: Based on the base address, perform address translation and memory mapping to obtain the virtual address base pointer of the multi-serial port board.

[0041] In the specific implementation, the `RtTranslateBusAddress` function is called to convert the base address into a global physical address of the host computer system. Then, the `RtMapMemory` function is called to map this physical address from the register space to the virtual address space of the current real-time process. This function returns a virtual address base pointer that can be directly accessed within the process; this pointer serves as the entry point for subsequent direct operations on hardware registers.

[0042] Step S2: Based on the virtual address base pointer, calculate the virtual address of all registers of each serial port in the multi-serial port board, and configure the communication parameters of each serial port.

[0043] This step bypasses any intermediate driver layer and directly reads and writes the serial port controller (UART) registers through the mapped virtual address base pointer, achieving low-level, precise control over communication behavior. This is key to ensuring high performance and high determinism.

[0044] Step S21: Based on the virtual address base pointer and the logical number of each serial port, calculate the virtual address of all registers of each serial port in the multi-serial port board.

[0045] In the specific implementation process, based on the virtual address base pointer and the logical number of each serial port, the starting address of each serial port register is calculated according to the hardware manual. Each serial port usually occupies a fixed address block. According to the standard memory offset of each serial port register, the virtual address of all registers of each serial port is calculated, thereby accessing all registers of the serial port controller.

[0046] For example, the virtual base address pointer is like bar1, and the logical number of a serial port is like Port ID; the serial port occupies an address block of 0x200 bytes; the starting address of the serial port register can be calculated as follows: The standard memory offset for the Line Control Register (LCR) is... The virtual address of the Line Control Register (LCR) of this serial port is then... .

[0047] Step S22: Configure the communication parameters of each serial port by performing memory read and write operations on the virtual address.

[0048] In the specific implementation process, the serial communication parameters include the serial port working mode, enabling the first-in-first-out (FIFO) hardware buffer queue, the communication baud rate, the data frame format, and interrupt enable and hardware flow control. By performing memory read and write operations on the virtual address, the following configurations are executed sequentially for each serial port on the multi-serial port board: (1) Configure serial port working mode and enable FIFO By writing specific values ​​to the Special Function Register (SFR) and Enhanced Function Register (EFR), the serial port chip is set to Enhanced 550 mode to enable a large-capacity FIFO. Subsequently, the FIFO Control Register (FCR) is configured to enable FIFO mode, and the trigger thresholds for the transmit (Tx) and receive (Rx) FIFOs are set respectively.

[0049] For example, specific values ​​are written, such as SFR[5]=0 and EFR[4]=1. Configure the FIFO control register, for example, by setting bit 0 to 1 to enable FIFO mode; then configure bits [5:4] and bits [7:6] to set the trigger thresholds for the transmit (Tx) and receive (Rx) FIFOs, respectively.

[0050] (2) Configure the communication baud rate To select the baud rate clock source, write a specific bit to the Sampling Clock Register (SCR) to select the SCR as the reference clock for the baud rate generator.

[0051] Configure the frequency division parameters. Based on the target baud rate, the frequency division parameters are obtained by looking up a table or calculating, including the SCR value, the values ​​of the low-order (DLL) and high-order (DLH) bits of the frequency divider latch, and the value of the clock prescaler register (CPR).

[0052] The divider bits are set by configuring the divider latch access bit in the line control register (LCR) to allow access to the low-order (DLL) and high-order (DLH) bits of the divider latch.

[0053] For example, the divisor latch access bit DLAB of the line control register (LCR) is set to 1.

[0054] Configure the clock prescaler and write the obtained division parameters sequentially into the sampling clock register (SCR), the low bit (DLL) and high bit (DLH) of the divider latch, and the clock prescaler register (CPR).

[0055] Restore the line control register by clearing the DLAB bit of the LCR to restore the register mapping to normal.

[0056] (3) Configure the data frame format Write the configuration word to the Line Control Register (LCR), including: Set the data bit length; for example, 0b11 corresponds to 8 bits of data.

[0057] Set the stop bit length; for example, 0b0 corresponds to 1 stop bit.

[0058] Set the checksum type; for example, 0b000 corresponds to no checksum.

[0059] (4) Configure interrupt enable and hardware flow control Write a configuration word to the Interrupt Enable Register (IER) to enable the required interrupt sources. Automatic hardware flow control is performed by writing a configuration word to the corresponding bit in the Configuration Enhancement Register (EFR), ensuring that transmission from the peer is automatically paused via a hardware signal when the buffer is full.

[0060] Step S3: Configure a data parser for each serial port, and complete multi-serial port communication of the target device according to the business requirements based on the virtual address and the data parser.

[0061] This step builds a stable and efficient data channel on top of the driver layer, achieving decoupling between the raw byte stream and business logic.

[0062] Step S31: Configure a data parser for each serial port.

[0063] In practical implementation, the data parser is a software framework or class template for processing serial communication protocols. It defines common logic such as data parsing, encapsulation, and verification. It is middleware between the hardware driver layer and the business application layer, directly interfacing with the driver layer that accesses the hardware through virtual addresses. It is responsible for protocol processing, data buffering, thread management, and interface standardization.

[0064] Step S311: Configure parser parameters.

[0065] In the specific implementation process, the parser parameters are configured, including parser ID, buffer size, protocol type, etc., and the frame start / end flag, maximum frame length, verification method are defined, as well as the callback function pointer is set, and the current parser status (idle, receiving, verifying, completed) is set.

[0066] Step S312: Configure a corresponding parser instance for each serial port.

[0067] In practice, the parser instance is a specific implementation object of the parser for a particular serial port. Each physical serial port corresponds to an independent instance, which has its own data buffer, real-time thread, synchronization mechanism and protocol parsing engine.

[0068] For example, a configured parser instance can perform the following functions: The data buffer temporarily stores the raw byte stream received from the serial port and the encapsulated data to be sent. The real-time receiving thread reads the raw data from the buffer and triggers the parsing process, while the sending thread writes the encapsulation result into the buffer and starts hardware transmission. A synchronization mechanism ensures safe access and orderly cooperation between threads to the buffer. When a hardware interrupt occurs and data is filled in, a semaphore notifies the receiving thread. The parsing process protects the buffer consistency through a mutex lock. The protocol parsing engine is called in the receiving thread to convert the raw data into structured frames according to predetermined rules, or conversely, to encapsulate the business data into a transmission format.

[0069] Step S32: Based on the virtual address and the data parser, complete the multi-serial port communication of the target device according to the business requirements.

[0070] In practice, the parser instance acts as a bidirectional data channel between the serial port and the business layer. On one hand, it interacts with the serial port to exchange raw data through a data service interface; on the other hand, it communicates with the business layer through callback functions. The callback functions are processing routines preset by the business layer to the parser instance. When the instance completes data parsing, it calls the corresponding callback function to pass the structured data to the business layer to complete the communication. The specific communication process is as follows: (1) When the serial port hardware receives data, the transceiver thread in the data parser is started to listen for hardware data. The hardware data is stored in the receive FIFO of the serial port controller. The hardware registers in each serial port are read directly through the virtual address, and the raw byte stream is then sent to the parser instance. The data parser starts its protocol parsing engine and reassembles the byte stream into a complete data frame according to the predetermined protocol format (such as frame header recognition, length parsing, and verification). After parsing is completed, the parser pushes the structured data packet (with metadata such as timestamp and port ID) directly to the business layer through a preset callback function.

[0071] (2) When the business layer submits a sending request to the parser through the unified API, the data parser encapsulates the business data into a format that meets the hardware requirements (adding frame header, address, checksum, etc.) according to the serial port protocol. After performing flow control and scheduling optimization, the data parser sends the encapsulated data to the multi-serial port board and stores it directly into the send FIFO of the corresponding serial port controller through the virtual address. After the hardware detects that there is data in the register, it automatically starts physical transmission. The transmission result is fed back to the business layer through synchronous return or asynchronous callback.

[0072] Specific embodiment 2 of the present invention discloses a multi-serial port communication system based on a real-time operating system. The system structure diagram is shown below. Figure 2 As shown, the system includes: The serial port group management module is used to enumerate PCI devices to obtain the base address of the target device's multi-serial port board, and convert the base address to obtain the virtual address base pointer of the multi-serial port board; The serial port driver module is used to calculate the virtual address of all registers of each serial port in the multi-serial port board based on the virtual address base pointer, and to configure the communication parameters of each serial port. The codec module is used to configure a data parser for each serial port and, based on the virtual address and the data parser, complete multi-serial port communication of the target device according to business requirements.

[0073] The present invention also provides a program product including program code instructions, which, when executed by a computing device, cause the computing device to perform at least one of the methods described in Specific Embodiment 1 of the present invention.

[0074] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A multi-serial port communication method based on a real-time operating system, characterized in that, The method includes: Enumerate PCI devices to obtain the base address of the target device's multi-serial port board, and convert the base address to obtain the virtual address base pointer of the multi-serial port board; Based on the virtual address base pointer, calculate the virtual address of all registers of each serial port in the multi-serial port board, and configure the communication parameters of each serial port; Configure a data parser for each serial port, and based on the virtual address and the data parser, complete the multi-serial port communication of the target device according to the business requirements.

2. The method according to claim 1, characterized in that, The process of completing multi-serial port communication of the target device based on the virtual address and the data parser, according to business requirements, includes: When the serial port receives data, the hardware registers in each serial port are read directly through the virtual address, and the raw byte stream is sent to the data parser for protocol parsing. After parsing, the structured data packet is pushed to the business layer through a preset callback function. When the service layer sends a request, the data parser encapsulates the service data into a format that conforms to the serial port requirements, stores the encapsulated data into the transmit FIFO of the serial port controller through the virtual address, and automatically starts physical transmission after the serial port detects that there is data in the register and feeds back to the service layer.

3. The method according to claim 1, characterized in that, The configuration of data parsers for each serial port includes: Configure parser parameters; Configure a corresponding parser instance for each serial port. Each parser instance has its own data buffer, real-time thread, synchronization mechanism and protocol parsing engine.

4. The method according to claim 1, characterized in that, The communication parameters configured for each serial port include: Configure the serial port working mode and enable the first-in-first-out hardware buffer queue; configure the communication baud rate; configure the data frame format; configure interrupt enable and hardware flow control.

5. The method according to claim 4, characterized in that, The configured communication baud rate includes: Select the baud rate clock source; Configure the frequency division parameters, including the value of the sampling clock register SCR, the values ​​of the low-order DLL and high-order DLH of the frequency divider latch, and the value of the clock prescaler register CPR; Set the divisor latch access bit of the line control register LCR; The obtained frequency division parameters are sequentially written into SCR, DLL, DLH and CPR; Clear the divisor latch access bit of the LCR to zero.

6. The method according to claim 1, characterized in that, The step of obtaining the virtual address base pointer of the multi-serial port board includes: Enumerate PCI bus devices and obtain the standard header information for each PCI configuration space; Based on the standard header information of each PCI configuration space, identify the multi-serial port cards of the target device; Based on the identified multi-serial port cards, the base address of the multi-serial port cards is parsed; Based on the base address, address translation and memory mapping are performed to obtain the virtual address base pointer of the multi-serial port board.

7. The method according to claim 6, characterized in that, The process of resolving the base address of the multi-serial port board includes: For the identified target device, call the function to read the specified base address register; Parse the BAR value of the base address register and determine its least significant bit. If it is 0, it indicates that the device uses memory space mapping; if it is 1, it indicates that the device uses I / O port mapping. Extract the starting address and size information of the device register space in the PCI address field from the base address register, and use the starting address as the base address of the multi-serial port board.

8. The method according to claim 6, characterized in that, The identification of multi-serial port cards of the target device based on the standard header information of each PCI configuration space includes: Extract the vendor ID and device ID from the standard header information of each PCI configuration space, and compare the extracted ID with the pre-stored target hardware identifier; If the comparison is successful, the bus number, device number, and function number of the device are recorded to complete the precise location of the target device.

9. A multi-serial-port communication system based on a real-time operating system, characterized in that, The system includes: The serial port group management module is used to enumerate PCI devices to obtain the base address of the target device's multi-serial port board, and convert the base address to obtain the virtual address base pointer of the multi-serial port board; The serial port driver module is used to calculate the virtual address of all registers of each serial port in the multi-serial port board based on the virtual address base pointer, and to configure the communication parameters of each serial port. The codec module is used to configure a data parser for each serial port and, based on the virtual address and the data parser, complete multi-serial port communication of the target device according to business requirements.

10. A computer program product, characterized in that, The computer program product includes a stored computer program that, when executed by a processor, implements the multi-serial port communication method based on a real-time operating system as described in any one of claims 1-8.

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