Processor, scheduling method, electronic device, and storage medium

Abstract

The present disclosure provides a processor, a scheduling method, an electronic device and a storage medium, and relates to the technical field of computers. The processor comprises: a front-end processing unit configured to perform front-end processing in response to a front-end start instruction, and generate front-end processing state information during the execution of the front-end processing; a hardware scheduling unit configured to generate a back-end scheduling request based on the front-end processing state information; and a back-end processing unit configured to perform back-end processing in response to the back-end scheduling request. The present disclosure sets a hardware scheduling unit in the processor, controls the scheduling timing between the front-end processing unit and the back-end processing unit at the hardware level, reduces the dependence on software during the scheduling process, thereby reducing the scheduling overhead, improving the execution efficiency of the processor, and further improving the overall performance of the processor.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and more specifically, to a processor, scheduling method, electronic device, and storage medium. Background Technology

[0002] In existing processors, taking graphics processing units (GPUs) as an example, the graphics rendering process is typically completed collaboratively by front-end processing units (FPUs) and back-end processing units (UPUs). The FPUs handle preliminary operations such as geometry processing, while the UPUs handle subsequent operations such as rasterization and rendering. To achieve collaboration between FPUs and UPUs, related technologies commonly employ software-based scheduling and control of the two units, using software logic to coordinate their execution order and processing relationships.

[0003] For example, after receiving a rendering task, the software first calls the front-end processing unit to execute the corresponding task, and then starts the back-end processing unit to execute the rendering process by receiving interrupt or status information reported by the front-end processing unit. This scheduling method makes the scheduling control between the front-end and back-end processing units dependent on software participation, introducing an additional control link between the front-end and back-end processing, thereby reducing the processor's execution efficiency and affecting the processor's rendering performance.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this disclosure is to provide a processor, scheduling method, electronic device, and storage medium to overcome, to some extent, the problem in the related art where the scheduling process between the front-end processing unit and the back-end processing unit relies on software participation, thereby reducing the processor's execution efficiency and affecting its rendering performance.

[0006] According to a first aspect of this disclosure, a processor is provided, the processor including a front-end processing unit, a back-end processing unit, and a hardware scheduling unit disposed between the front-end processing unit and the back-end processing unit, wherein the hardware scheduling unit is a hardware unit integrated into the processor, wherein: The front-end processing unit is used to execute front-end processing in response to the front-end start command, and to send the generated front-end processing status information to the hardware scheduling unit during the execution of front-end processing. The hardware scheduling unit is used to generate backend scheduling requests based on frontend processing status information. The backend processing unit is used to execute backend processing in response to backend scheduling requests.

[0007] In one exemplary embodiment of this disclosure, the front-end processing status information includes first status information for characterizing storage usage and / or second status information for characterizing front-end processing progress.

[0008] In one exemplary embodiment of this disclosure, the hardware scheduling unit includes: A state machine is used to generate backend scheduling requests based on first or second state information.

[0009] In one exemplary embodiment of this disclosure, the processor further includes a storage unit; The front-end processing unit includes: The storage management unit is used to monitor the usage capacity of the storage unit during the execution of front-end processing; and to generate first state information and send the first state information to the state machine when the usage capacity meets the preset waterline conditions.

[0010] In one exemplary embodiment of this disclosure, the state machine is further used for: Based on the received first status information, when the front-end processing unit is in the process of task execution and the storage unit's usage capacity meets the preset waterline condition, a first control operation is executed to start the back-end processing in advance, and a back-end scheduling request is generated after the first control operation is completed.

[0011] In an exemplary embodiment of this disclosure, when the front-end processing unit is in the process of task execution and the usage capacity of the storage unit meets a preset waterline condition, the state machine is further configured to: Send a control request to the front-end processing unit to trigger the front-end processing unit to complete the writing of the target data to the storage unit; After receiving feedback information from the front-end processing unit, it jumps from the current state to the scheduling preparation state, and after the scheduling preparation state is completed, it jumps to the scheduling backend state, and generates a backend scheduling request while in the scheduling backend state. The feedback information is returned by the front-end processing unit in response to the control request, and is used to indicate that the target data writing is complete.

[0012] In one exemplary embodiment of this disclosure, the state machine is further used for: Based on the received second status information, when the front-end processing unit is in the state of task execution completion, a second control operation is performed to start the back-end processing normally, and a back-end scheduling request is generated after the second control operation is completed.

[0013] In one exemplary embodiment of this disclosure, when the front-end processing unit is in the state of task execution completion, the state machine is further configured to: The system transitions from the current state to the scheduling preparation state, and after completing the scheduling preparation state, it transitions to the scheduling backend state, and generates a backend scheduling request while in the scheduling backend state.

[0014] According to a second aspect of this disclosure, a scheduling method is provided, applied to a processor, comprising: In response to a front-end startup command, front-end processing is executed, and during the execution of front-end processing, front-end processing status information is generated; wherein, the front-end processing status information includes first status information for characterizing storage usage and / or second status information for characterizing front-end processing progress; Generate backend scheduling requests based on frontend processing status information; Execute backend processing in response to backend scheduling requests.

[0015] According to a third aspect of this disclosure, an electronic device is provided, comprising: A processor; and a storage module for storing executable instructions of the processor; wherein the processor is configured to execute the above scheduling method by executing the executable instructions.

[0016] According to a fourth aspect of this disclosure, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the above-described scheduling method.

[0017] The exemplary embodiments disclosed herein may have some or all of the following beneficial effects: The processor provided in this exemplary embodiment of the present disclosure, by setting up a hardware scheduling unit located between the front-end processing unit and the back-end processing unit, and having the hardware scheduling unit generate back-end scheduling requests based on the front-end processing status information, eliminates the complete reliance on software for scheduling judgment and control between the front-end and back-end processing units. Since the back-end scheduling requests are directly generated by the processor's internal hardware unit, there is no need for frequent traversal of software control paths between the front-end and back-end processing, reducing additional control steps introduced during scheduling, lowering scheduling overhead, improving processor execution efficiency, and ultimately enhancing the overall performance of the processor.

[0018] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0020] Figure 1 A schematic diagram of the architecture of a processor according to an embodiment of this disclosure is shown.

[0021] Figure 2 A schematic diagram of the architecture of another processor in an embodiment of this disclosure is shown.

[0022] Figure 3 A schematic diagram illustrating the principle of processor internal scheduling in an embodiment of this disclosure is shown.

[0023] Figure 4 A flowchart illustrating a scheduling method according to an embodiment of this disclosure is shown.

[0024] Figure 5 A schematic diagram of the structure of an electronic device suitable for implementing embodiments of the present disclosure is shown.

[0025] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts. Detailed Implementation

[0026] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this disclosure more comprehensive and complete, and to fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a full understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced with one or more of the specific details omitted, or other methods, components, apparatus, steps, etc., can be employed. In other instances, well-known technical solutions are not shown or described in detail to avoid obscuring various aspects of this disclosure.

[0027] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0028] It is understood that the processor can be a graphics processing unit (GPU) supporting general-purpose computing capabilities. Besides executing traditional graphics rendering tasks, it can also utilize the parallel computing capabilities of the GPU to compute non-graphics tasks that are highly regular, simple, and numerous. In some embodiments, the processor can also be a dedicated processor for artificial intelligence computing scenarios, such as a neural processing unit (NPU). In this case, the front-end processing unit, hardware scheduling unit, and back-end processing unit in the processor can be correspondingly configured in the data processing flow of the artificial intelligence computing task to implement front-end task processing, task scheduling, and back-end task processing. That is, the processor in this disclosure is not limited to graphics processing units used in graphics rendering scenarios, and can be extended to other types of processors with front-end and back-end processing flows and intermediate scheduling requirements; this disclosure does not limit this.

[0029] refer to Figure 1 The diagram illustrates an architecture schematic of a processor according to an embodiment of this disclosure. Figure 1 The processor includes a front-end processing unit 110, a back-end processing unit 130, and a hardware scheduling unit 120.

[0030] This embodiment uses a graphics rendering task as an example to illustrate the collaborative relationship between various functional units within the processor. Specifically, the front-end processing unit 110 is a processing unit in the processor used to execute front-end processing tasks. It is used to execute front-end processing in response to a front-end start command, and during the execution of front-end processing, it sends the generated front-end processing status information to the hardware scheduling unit 120. Accordingly, the front-end processing tasks include front-end processing operations such as geometric correlation processing of graphics data, primitive generation or assembly, clipping or culling, and data preparation for subsequent rendering processing, to generate intermediate data for subsequent rendering processing by the back-end processing unit 130.

[0031] The front-end start instruction is a control instruction used to instruct the front-end processing unit 110 to start executing the front-end processing task. It can be generated and sent by the processor-related software module when submitting the task to the processor, and is used to trigger the start of the front-end processing flow.

[0032] The front-end processing status information is used to characterize the processing status of the front-end processing unit 110 during the execution of front-end processing operations. This may include information reflecting the current processing progress or processing stage of the front-end processing unit 110. It is understood that the front-end processing status information does not directly participate in graphics data processing, but is output as scheduling-related information for subsequent scheduling control.

[0033] The hardware scheduling unit 120 is a hardware unit integrated inside the processor and located between the front-end processing unit 110 and the back-end processing unit 130. It receives front-end processing status information sent by the front-end processing unit 110 and generates a back-end scheduling request based on the front-end processing status information, which is then sent to the back-end processing unit 130. In some embodiments, the control logic inside the hardware scheduling unit 120 can be implemented using a state machine. In digital integrated circuits, state machines are typically used to implement control logic, performing state transitions based on received input signals and the current state, and outputting corresponding control signals.

[0034] Accordingly, embodiments of this disclosure can use a state machine to perform corresponding state control and scheduling processing based on the received front-end processing state information. For example, the state machine can judge the received front-end processing state information and generate a back-end scheduling request based on the judgment result. This judgment is used to determine whether the current processing state of the front-end processing unit 110 meets the conditions for triggering the subsequent processing stage. If it is determined that the processing state of the front-end processing unit 110 meets the conditions for entering the subsequent processing stage, the hardware scheduling unit 120 generates a back-end scheduling request; if it is determined that the processing state of the front-end processing unit 110 does not meet the conditions for entering the subsequent processing stage, the hardware scheduling unit 120 does not generate a back-end scheduling request and continues to receive front-end processing state information.

[0035] The backend scheduling request is control information used to instruct the backend processing unit 130 to start subsequent processing operations. It notifies the backend processing unit 130 to begin subsequent processing of the intermediate data already generated by the frontend processing unit 110. For example, for a graphics rendering task, the backend scheduling request may carry a task start identifier indicating the starting position of the backend processing, and a data range identifier indicating the data range corresponding to this backend processing, such as a task batch identifier, data segment start offset, or number of primitives. This allows the backend processing unit 130 to determine the starting point and processing range of subsequent processing based on the backend scheduling request and execute the corresponding processing operations.

[0036] In this example, the backend processing unit 130 is a processing unit in the processor used to execute subsequent rendering processing tasks. It is used to receive a backend scheduling request sent by the hardware scheduling unit 120 and to start the backend processing flow for subsequent processing in response to the backend scheduling request.

[0037] For example, after receiving a backend scheduling request, the backend processing unit 130 determines the processing start point and processing range corresponding to this backend processing based on the control information carried in the backend scheduling request, and retrieves the intermediate data generated by the frontend processing unit 110 from the storage accordingly. After retrieving the intermediate data, the backend processing unit 130 performs backend processing operations based on the intermediate data. The backend processing operations include rendering-related processing tasks in the graphics processing flow that are located after the frontend processing, such as rasterization processing, pixel processing, etc., thereby completing the backend processing flow corresponding to the graphics rendering task.

[0038] In this embodiment, the front-end processing unit 110 interacts with the hardware scheduling unit 120, and the hardware scheduling unit 120 generates a back-end scheduling request to start the back-end processing unit 130, so that the startup of the back-end processing unit 130 does not rely on software. Since the scheduling control between the front-end processing unit 110 and the back-end processing unit 130 is completed inside the processor, the scheduling time involving software is greatly shortened, thereby reducing scheduling overhead and making the processor's processing more efficient.

[0039] In some example implementations, the front-end processing status information includes first status information characterizing storage usage and / or second status information characterizing front-end processing progress. For example, the front-end processing status information can take the form of a type field + a load field. The type field distinguishes between the first and second status information, and the load field carries specific parameters corresponding to that type. Accordingly, the first status information can include at least one of the following: current storage usage, available storage, preset watermark identifier, and watermark-related trigger flags, indicating whether storage usage has reached the preset watermark condition. The second status information can include at least one of the following: processing stage identifier, task batch identifier, batch completion flag, and task end flag, indicating whether the front-end processing is in progress, has completed a specified stage, or has ended.

[0040] Furthermore, during the execution of geometry processing tasks, the front-end processing unit 110 typically writes the generated data continuously to storage for the back-end processing unit 130 to read and use during the rendering phase. In software scheduling mode, the back-end processing unit 130 often only starts working after the front-end processing unit 110 has completed all its tasks and is triggered by software. When the start-up of the back-end processing unit 130 lags behind the front-end data writing process, it may lead to a continuous accumulation of data in storage, increasing the risk of storage resource strain and further affecting the processor's rendering performance.

[0041] To address this technical problem, the exemplary embodiments of this disclosure include a hardware scheduling unit between the front-end processing unit and the back-end processing unit, which is used to perform scheduling control between the front-end and back-end processing through hardware within the processor.

[0042] When the processor executes a graphics rendering task, the front-end processing unit first initiates the front-end processing flow, performing front-end processing operations such as geometry processing on the scene to be rendered. During the front-end processing, the front-end processing unit writes most of the data generated by geometry processing to the storage unit for subsequent reading and use by the back-end processing unit. At the same time, the front-end processing unit sends a small amount of scheduling-related status information to the hardware scheduling unit, which instructs the hardware scheduling unit to determine whether to enter the back-end scheduling flow and generate a back-end scheduling request accordingly, which is then sent to the back-end processing unit.

[0043] In one scenario, after the front-end processing unit completes all front-end processing tasks within the scene to be rendered, it sends a task completion marker to the hardware scheduling unit. Upon receiving the task completion marker, the hardware scheduling unit initiates the back-end scheduling process, generates a back-end scheduling request after completing necessary internal preparations, and sends the back-end scheduling request to the back-end processing unit, thereby triggering the back-end processing unit to begin executing the corresponding rendering process.

[0044] In another scenario, the front-end processing unit continuously writes processing results to the storage unit during the execution of front-end processing tasks, and the storage management unit within the front-end processing unit monitors the usage status of the storage unit. By setting a storage usage watermark, the storage management unit generates a corresponding flag and sends it to the hardware scheduling unit when it detects that the usage capacity of the storage unit has reached the preset watermark condition. Upon receiving this flag, the hardware scheduling unit no longer waits for the front-end processing task completion flag, but instead initiates the back-end scheduling process in advance. After completing the necessary coordination and preparation, it generates a back-end scheduling request and sends it to the back-end processing unit, enabling the back-end processing unit to intervene early and read and process the data already written to the storage unit by the front end.

[0045] It can be seen that when the storage usage pressure is high, the backend processing unit can start in time before the frontend processing is finished, and consume the data generated by the frontend, thereby avoiding the data accumulation problem caused by the frontend processing continuously writing while the backend has not started, and reducing the risk of storage overflow; when the storage management unit does not send the waterline trigger flag, it indicates that the storage resources are in a relatively balanced state, and the hardware scheduling unit continues to trigger the backend scheduling process based on the frontend processing task completion flag.

[0046] refer to Figure 2 The diagram illustrates an architecture schematic of another processor according to an embodiment of this disclosure. Figure 2In the hardware scheduling unit 120, there is a state machine 1201. The state machine 1201 monitors, judges, controls and generates scheduling requests based on two types of state information: first state information and second state information, thereby realizing the timing connection control between the front end and the back end.

[0047] For example, state machine 1201 is used to generate a backend scheduling request based on first state information or second state information. For instance, it can judge the received first state information or second state information, execute the control operation corresponding to the first state information or second state information based on the judgment result, and generate a backend scheduling request after completing the control operation.

[0048] Specifically, state machine 1201 operates in an event-driven manner, and its input events come from first state information and second state information. Upon receiving any input event, state machine 1201 first parses the type field of the first or second state information to determine the event type, then reads the load field to obtain the parameter value corresponding to the event type, and finally performs a judgment according to the preset state switching rules.

[0049] State transition rules specify the processing logic to be executed and the corresponding state transition paths when different types of input events are received in different states. For ease of understanding, state machine 1201 may include states such as waiting state, scheduling preparation state, and scheduling backend state. Referring to Table 1, an example of a state transition is shown to illustrate the state transition rules of state machine 1201 under different input conditions: Table 1 State Transition Table

[0050] As shown in Table 1, the waiting state is used to continuously receive and monitor the first or second state information. The scheduling preparation state is used to complete necessary internal preparation actions before generating a backend scheduling request. The scheduling backend state is used to generate and output the backend scheduling request. It is understood that the above state names are only examples, and in the specific implementation, they can be merged, split, or replaced according to the hardware design needs, as long as the processing chain of monitoring-judgment-control-request generation can be reflected.

[0051] Specifically, when state machine 1201 receives the first state information while in a waiting state, it determines whether the preset waterline condition is met based on the storage usage parameters indicated in the first state information. If the preset waterline condition is not met, state machine 1201 remains in the waiting state to continue receiving subsequent front-end processing state information. When state machine 1201 receives the second state information while in a waiting state, it determines whether the front-end processing has reached the stage boundary or the task completion state based on the processing progress parameters indicated in the second state information. If the front-end processing has not reached the stage boundary or the task completion state, state machine 1201 also remains in the waiting state.

[0052] When preset triggering conditions are met, state machine 1201 switches from the waiting state to the scheduling preparation state and enters the scheduling preparation process. After completing the corresponding internal processing in the scheduling preparation state, state machine 1201 switches from the scheduling preparation state to the scheduling backend state to generate and output a backend scheduling request. Upon receiving the backend scheduling request, the backend processing unit can start the corresponding backend processing process.

[0053] After the backend scheduling request is completed, state machine 1201 can return from the backend scheduling state to the waiting state to continue receiving new frontend processing status information, thus forming a cyclical state control process. Therefore, the hardware scheduling unit can perform corresponding state switching and scheduling control based on different types of frontend processing status information during frontend processing, generating backend scheduling requests at appropriate times to achieve seamless connection between frontend and backend processing.

[0054] This example provides an implementation of a hardware scheduling unit 120 that includes a state machine 1201. By using the first state information and the second state information as input event sources, the state machine 1201 can perform joint monitoring of the front-end processing progress and storage usage on the hardware side, and execute corresponding control operations based on different judgment results, and then generate and output back-end scheduling requests, thereby achieving controllable connection between the front-end and the back-end.

[0055] exist Figure 2 The processor also includes a storage unit 140, which is used to write intermediate data generated by the front-end processing unit 110 into storage during the execution of front-end processing tasks, and to provide an access interface for the intermediate data to the back-end processing unit 130 during the back-end processing stage, so that the back-end processing unit 130 can read data from the storage unit 140 to obtain the data access space required for subsequent processing. The storage unit 140 can be on-chip memory, off-chip memory, or a combination of both, and this disclosure does not limit the specific form of the storage unit 140.

[0056] The front-end processing unit 110 includes a storage management unit 1101. The storage management unit 1101 is used to monitor the usage status of the storage unit 140 during the execution of front-end processing, such as monitoring the usage capacity of the storage unit 140, and generating first status information when the usage capacity meets the preset waterline conditions, and sending the first status information to the state machine 1201.

[0057] The preset waterline condition is used to indicate that storage usage has reached a state that requires scheduling attention. This preset waterline condition can be configured according to the capacity of storage unit 140 or system design requirements. Of course, it can also monitor the remaining available capacity of storage unit 140, etc., but this disclosure does not limit this.

[0058] The first state information is used to characterize the state in which the usage of storage unit 140 has reached the preset waterline condition. After generating the first state information, storage management unit 1101 sends the first state information to state machine 1201, so that state machine 1201 can judge the current system operating state based on the first state information and participate in the subsequent scheduling and control process accordingly.

[0059] By setting a storage management unit 1101 in the front-end processing unit 110, and having the storage management unit 1101 continuously monitor the usage capacity of the storage unit 140 during the front-end processing, the first status information is actively generated and reported when the storage usage reaches the preset waterline condition, so that the hardware scheduling side can promptly perceive the changes in storage usage status, thereby providing a status basis for subsequent scheduling control.

[0060] In some example implementations, the control operation includes a first control operation, which is used to control the timing of backend processing startup based on changes in storage usage status when frontend processing has not yet ended, thereby achieving coordinated connection between frontend processing and backend processing.

[0061] For example, state machine 1201 is used to determine, based on the received first state information, that the current state of front-end processing unit 110 meets the conditions for early triggering of back-end processing when front-end processing unit 110 is in the process of task execution and the usage capacity of storage unit 140 meets the preset waterline conditions, execute a first control operation for early start of back-end processing, and generate a back-end scheduling request after completing the first control operation.

[0062] When the front-end processing unit 110 is in the process of executing a task and the usage capacity of the storage unit 140 meets the preset waterline condition, that is, during the execution of the first control operation, the state machine 1201 is specifically used to send a control request to the front-end processing unit 110 to trigger the front-end processing unit 110 to complete the writing of the target data to the storage unit 140.

[0063] The control request triggers the front-end processing unit 110 to complete the writing of target data to the storage unit 140, enabling the front-end processing unit 110 to push the target data that has been generated but not yet fully written to the storage unit 140 into the storage unit 140 while continuing to execute front-end processing tasks. For example, the control request can be a flush request to prompt the front-end processing unit 110 to complete the data writing. In other implementations, a control request with equivalent functionality can also be used to coordinate the front-end data writing, and this disclosure does not limit this approach.

[0064] After receiving a control request, the front-end processing unit 110 performs a data writing operation corresponding to the control request and returns feedback information to the state machine 1201 after the target data is written. That is, the feedback information is returned by the front-end processing unit 110 in response to the control request and is used to indicate that the target data has been written to the storage unit 140.

[0065] After receiving feedback information from the front-end processing unit 110, the system transitions from the current state, such as the waiting state, to the scheduling preparation state. The scheduling preparation state is used to complete necessary internal preparation operations before generating the back-end scheduling request. These internal preparation operations include loading parameters related to the generation of the back-end scheduling request, configuring request fields, or confirming task identifiers.

[0066] After the scheduling preparation state is completed, it jumps to the scheduling backend state and generates a backend scheduling request while in the scheduling backend state, so that the backend processing unit 130 can start to execute backend processing operations based on the target data that has been written to the storage unit 140.

[0067] In this operating mode, by monitoring the storage usage status during the front-end processing, and by controlling the back-end processing unit 130 to intervene when the storage resources are close to the occupancy threshold, the data generated by the front-end processing unit 110 can be read and processed in a timely manner, thereby avoiding the continuous accumulation of data in the storage unit 140, reducing the risk of data overflow caused by the growth of storage resource occupancy, and thus reducing rendering errors caused by data anomalies.

[0068] Meanwhile, as the front-end processing unit 110 continuously generates and processes data and writes it to the storage unit 140, the hardware scheduling unit 120 completes the scheduling control between the front-end processing and the back-end processing, enabling the back-end processing unit 130 to start the back-end processing operation at the appropriate time. This avoids the data accumulation problem caused by the asynchronous processing of the front-end and back-end due to scheduling delays, thereby mitigating the adverse effects of continuous occupation of storage resources.

[0069] refer to Figure 3The diagram illustrates the principle of internal processor scheduling. Figure 3 In this context, the front-end processing unit 110 is used to execute front-end processing tasks. During the execution of these tasks, the front-end processing unit 110 continuously sends data to the storage unit 140 (…). Figure 3 (Not shown) The front-end processing unit 110 writes the generated data and monitors the storage usage status. When the storage usage capacity reaches the preset waterline condition, the front-end processing unit 110 generates a waterline arrival flag, such as a status flag indicating that the storage usage has reached the waterline condition, and sends the waterline arrival flag to the hardware scheduling unit 120.

[0070] Upon receiving the arrival watermark, the hardware scheduling unit 120 treats it as an input event and passes it to its internal state machine 1201 for processing. Based on the arrival watermark, the state machine 1201 determines that the front-end processing unit 110 is still executing a task and that the storage usage status has reached the point where scheduling intervention is required. Based on this determination, the state machine 1201 sends a refresh request to the front-end processing unit 110. The refresh request triggers the front-end processing unit 110 to push the generated but not yet fully written data into the storage unit 140, ensuring that subsequent back-end processing can read continuous and complete data content.

[0071] Upon receiving a refresh request, the front-end processing unit 110 executes the data write operation corresponding to the refresh request and generates a refresh end marker after the data writing is complete. The refresh end marker indicates that the front-end processing unit 110 has completed the data write operation corresponding to the refresh request. Finally, the front-end processing unit 110 sends the refresh end marker to the hardware scheduling unit 120.

[0072] After receiving the refresh end marker, state machine 1201 switches from its current state to the scheduling preparation state. In the scheduling preparation state, state machine 1201 completes internal preparatory operations before generating the backend scheduling request, including configuring relevant parameters for the scheduling request and confirming the scheduling process. After completing the internal operations corresponding to the scheduling preparation state, state machine 1201 switches to the scheduling backend state.

[0073] In the backend scheduling state, the hardware scheduling unit 120 generates a backend scheduling request and sends it to the backend processing unit 130. The backend scheduling request is used to instruct the backend processing unit 130 to start the backend processing flow, so that the backend processing unit 130 can begin to perform subsequent processing operations on the data that has been written to the storage unit 140.

[0074] pass Figure 3The scheduling principle shown is that when storage usage reaches the preset waterline condition and the front-end processing task is still in progress, the hardware scheduling unit 120 can control the scheduling timing between the front-end and the back-end within the processor, so that the back-end processing unit 130 can intervene in the data processing process in time before the front-end processing is finished, thereby realizing the coordinated operation between the front-end processing and the back-end processing.

[0075] In some example implementations, the control operation includes a second control operation, which is used to start the backend processing unit 130 to enter the backend processing flow according to the normal processing flow after the frontend processing task is completed, so as to realize the subsequent processing start after the frontend processing is completed.

[0076] For example, the state machine 1201 is used to perform a second control operation to start the backend processing normally based on the received second state information, which is used to characterize the execution state of the front-end processing unit 110 after the current task has been completed. That is, when the front-end processing unit 110 is in the case of task execution completion, it generates a backend scheduling request after the second control operation is completed.

[0077] Specifically, when the front-end processing unit 110 is in the state of task execution completion, the state machine 1201 transitions from the current state, such as the waiting state, to the scheduling preparation state. The scheduling preparation state is used to complete necessary internal preparation operations before generating a back-end scheduling request. These internal preparation operations include loading parameters related to the generation of the back-end scheduling request, configuring request fields, or confirming task identifiers. After completing the internal operations corresponding to the scheduling preparation state, the state machine 1201 switches to the scheduling back-end state.

[0078] In the backend scheduling state, state machine 1201 generates a backend scheduling request and outputs the backend scheduling request to backend processing unit 130. The backend scheduling request is used to instruct backend processing unit 130 to start the backend processing flow, so that backend processing unit 130 performs backend processing operations based on the data that frontend processing unit 110 has generated and written to storage unit 140.

[0079] Through the above process, after the front-end processing task is completed, the state machine 1201 can trigger the normal back-end scheduling process based on the second state information, so that the back-end processing unit 130 enters the working state in the order of front-end processing completion, thereby completing the subsequent processing corresponding to the front-end processing task.

[0080] In this exemplary embodiment, the generation of the backend scheduling request follows a logic of judgment result - control operation - request output. The judgment result determines whether to enter the scheduling process and which type of control operation to use; the control operation completes the necessary preparations before request generation; and the request output stage completes the encoding and transmission of the backend scheduling request. The backend scheduling request may carry control parameters such as task batch identifier, data segment start offset, and number of primitives, which are used by the backend processing unit 130 to determine the starting point and processing range of the subsequent processing. After completing the request output, the state machine 1201 can return to a waiting state to continue receiving subsequent first or second state information to achieve cyclic scheduling of multiple task batches.

[0081] In the exemplary embodiments disclosed herein, a scheduling method is also provided, which can be applied to, for example... Figure 1 or Figure 2 The processor shown. (Reference) Figure 4 As shown, the method may include the following steps S410 to S430: Step S410: In response to the front-end start command, front-end processing is executed, and front-end processing status information is generated during the execution of front-end processing; wherein, the front-end processing status information includes first status information for characterizing storage usage and / or second status information for characterizing front-end processing progress.

[0082] In the example implementation of this disclosure, the front-end processing flow is triggered by a front-end startup instruction. The front-end startup instruction can be generated by the processor after receiving the task to be processed, and sent to the front-end processing unit through the processor's internal control interface to complete the parameter configuration and task initialization related to front-end processing, and trigger the front-end processing pipeline to start running.

[0083] After the front-end processing flow starts, the front-end processing unit performs front-end processing operations on the input graphic data according to task batches. During processing, the front-end processing unit continuously writes the generated intermediate data to the storage unit, and simultaneously generates status information related to the processing process.

[0084] Specifically, during front-end processing, the front-end processing unit monitors the usage of storage units. When the monitoring results indicate that the storage unit usage has reached a preset watermark, it generates first status information to characterize the storage usage. Simultaneously, the front-end processing unit records task batch boundaries, processing stage boundaries, or task end positions during task progression, and generates second status information to characterize the front-end processing progress when the corresponding position is reached.

[0085] The first and second state information are sent to the hardware scheduling unit via the processor's internal interface, enabling the hardware scheduling unit to obtain the state input corresponding to the current processing state while front-end processing continues.

[0086] Step S420: Generate a backend scheduling request based on the frontend processing status information.

[0087] The hardware scheduling unit receives front-end processing status information from the front-end processing unit and parses and judges the status information. When judging based on the first status information, the hardware scheduling unit determines whether the front-end processing unit is still in the process of task execution and whether the usage of the storage unit meets the preset waterline condition; when judging based on the second status information, the hardware scheduling unit determines whether the front-end processing unit has completed the execution of the current task.

[0088] Based on different judgment results, the hardware scheduling unit executes the corresponding control operation. The control operation is used to coordinate the connection between front-end processing and back-end processing. After the control operation is completed, a back-end scheduling request is generated to instruct the back-end processing unit to start the back-end processing process.

[0089] Step S430: Execute backend processing in response to a backend scheduling request.

[0090] After receiving a backend scheduling request, the backend processing unit determines the data start point and processing range corresponding to this backend processing based on the control fields carried in the backend scheduling request, and reads the intermediate data written by the frontend processing from the storage unit accordingly.

[0091] After acquiring the data, the backend processing unit enters the backend processing flow, performs subsequent processing on the intermediate data according to the predetermined processing order, and outputs the processing results corresponding to the task. After completing the backend processing of the current batch, the backend processing unit waits for the next backend scheduling request to support the continuous processing of multiple batches of tasks.

[0092] The scheduling method provided in this embodiment generates and utilizes front-end processing status information during front-end processing to control the scheduling timing between front-end and back-end processing. This allows the initiation of back-end processing to no longer depend solely on the completion status of the front-end processing task, but can be determined by combining storage usage and processing progress. If front-end processing has not yet finished and storage usage has reached a preset condition, a back-end scheduling request is triggered through a control operation, enabling the back-end processing unit to participate in the subsequent processing of data already generated by the front-end in advance. This achieves synchronous data consumption while the front-end processing continuously outputs data.

[0093] In this way, the data generated during the front-end processing can be read and processed by the back-end in a timely manner when the storage resources are close to the occupancy threshold, avoiding the continuous accumulation of data in the storage unit, and forming a closer processing connection between the front-end processing and the back-end processing, thereby mitigating the adverse effects of the continuous growth of storage resource occupancy and reducing the risk of data overflow.

[0094] Meanwhile, by placing the scheduling judgment and scheduling request generation process between the front-end and back-end processing inside the processor, the additional processing steps introduced by scheduling control between the front-end and back-end processing are reduced, making the switching between the front-end and back-end processing flows more efficient and improving the overall processing efficiency.

[0095] This disclosure selects a graphics rendering scene as the test object to compare and test the processor using the scheduling method of the present disclosure embodiment with the existing scheduling scheme that starts the backend processing after the frontend processing task is completed. During the test, the hardware configuration of the frontend processing unit, the backend processing unit and the storage unit are kept consistent. The frontend processing tasks all use rendering tasks with the same resolution, the same primitive size and the same rendering parameters. In addition, the two schemes use the same storage capacity configuration and the same task input data.

[0096] In existing scheduling schemes, the backend processing unit only starts subsequent processing after all frontend processing tasks are completed. In this disclosed scheme, frontend processing status information is generated during frontend processing, and when storage usage reaches a preset watermark, the backend processing unit is controlled to start early to perform subsequent processing on the data already generated by the frontend.

[0097] Under the above test conditions, compared with the existing scheduling scheme, the scheduling latency of the disclosed scheme is reduced from 10.0ms to 7.0ms, a reduction of approximately 30%, while the rendering frame rate is increased from 80fps to 100fps, resulting in a rendering performance improvement of approximately 25%. Therefore, the disclosed scheme is beneficial for improving the efficiency of front-end and back-end processing and overall rendering performance.

[0098] Exemplary embodiments of this disclosure also provide a computer-readable storage medium having a program product stored thereon capable of implementing the methods described above in this specification. In some possible embodiments, various aspects of this disclosure may also be implemented as a program product including program code that, when run on an electronic device, causes the electronic device to perform the steps described in the "Exemplary Methods" section of this specification according to the various exemplary embodiments of this disclosure. This program product may be a portable compact disc read-only memory (CD-ROM) including program code and may run on an electronic device, such as a personal computer. However, the program product of this disclosure is not limited thereto. In this document, the readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0099] The program product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0100] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium, capable of sending, propagating, or transmitting programs for use by or in conjunction with an instruction execution system, apparatus, or device.

[0101] The program code contained on the readable medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0102] Program code for performing the operations of this disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C#, and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0103] Exemplary embodiments of this disclosure also provide an electronic device capable of implementing the above-described method. Referring below... Figure 5 To describe an electronic device 500 according to such an exemplary embodiment of the present disclosure. Figure 5 The electronic device 500 shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments disclosed herein.

[0104] like Figure 5 As shown, the electronic device 500 can be represented in the form of a general-purpose computing device. The components of the electronic device 500 may include, but are not limited to: at least one processor 510, at least one storage module 520, a bus 530 connecting different system components (including storage module 520 and processor 510), and a display unit 540.

[0105] The storage module 520 stores program code that can be executed by the processor 510, causing the processor 510 to perform the steps described in the "Exemplary Methods" section above, according to various exemplary embodiments of this disclosure. For example, the processor 510 can execute... Figure 4 The methods and steps in the text.

[0106] Storage module 520 may include readable media in the form of volatile storage cells, such as random access memory (RAM) 521 and / or cache 522, and may further include read-only memory (ROM) 523.

[0107] The storage module 520 may also include a program / utility 524 having a set (at least one) of program modules 525, including but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.

[0108] Bus 530 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0109] Electronic device 500 can also communicate with one or more external devices 600 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with electronic device 500, and / or with any device that enables electronic device 500 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 550. Furthermore, electronic device 500 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 560. As shown, network adapter 560 communicates with other modules of electronic device 500 via bus 530. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 500, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0110] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, terminal device, or network device, etc.) to execute the method according to the exemplary embodiments of this disclosure.

[0111] Furthermore, the above figures are merely illustrative representations of the processes included in the methods according to exemplary embodiments of this disclosure, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0112] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0113] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.

[0114] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A processor, characterized in that, The processor includes a front-end processing unit, a back-end processing unit, and a hardware scheduling unit disposed between the front-end processing unit and the back-end processing unit. The hardware scheduling unit is a hardware unit integrated into the processor. The front-end processing unit is used to execute front-end processing in response to the front-end start command, and to send the generated front-end processing status information to the hardware scheduling unit during the execution of the front-end processing. The hardware scheduling unit is used to generate a backend scheduling request based on the frontend processing status information. The backend processing unit is used to perform backend processing in response to the backend scheduling request.

2. The processor according to claim 1, characterized in that, The front-end processing status information includes first status information for characterizing storage usage and / or second status information for characterizing front-end processing progress.

3. The processor according to claim 2, characterized in that, The hardware scheduling unit includes: A state machine is used to generate the backend scheduling request based on the first state information or the second state information.

4. The processor according to claim 3, characterized in that, The processor also includes a storage unit; The front-end processing unit includes: The storage management unit is used to monitor the usage capacity of the storage unit during the execution of the front-end processing; and to generate the first state information and send the first state information to the state machine when the usage capacity meets the preset waterline condition.

5. The processor according to claim 4, characterized in that, The state machine is also used for: Based on the received first status information, when the front-end processing unit is in the process of task execution and the storage unit's usage capacity meets the preset waterline condition, a first control operation for early start of back-end processing is executed, and the back-end scheduling request is generated after the first control operation is completed.

6. The processor according to claim 5, characterized in that, When the front-end processing unit is executing a task and the storage unit's capacity meets the preset waterline condition, the state machine is further configured to: Send a control request to the front-end processing unit to trigger the front-end processing unit to complete the writing of the target data to the storage unit; After receiving feedback information from the front-end processing unit, the system transitions from the current state to the scheduling preparation state. Once the scheduling preparation state is complete, the system transitions to the scheduling backend state and generates the backend scheduling request while in the scheduling backend state. The feedback information is returned by the front-end processing unit in response to the control request, and is used to indicate that the target data writing is complete.

7. The processor according to claim 3, characterized in that, The state machine is also used for: Based on the received second status information, when the front-end processing unit is in the state of task execution completion, a second control operation for normal start of back-end processing is executed, and the back-end scheduling request is generated after the second control operation is completed.

8. The processor according to claim 7, characterized in that, When the front-end processing unit has completed its task execution, the state machine is further configured to: The system transitions from the current state to the scheduling preparation state, and after the scheduling preparation state is completed, it transitions to the scheduling backend state, and generates the backend scheduling request while in the scheduling backend state.

9. A scheduling method, characterized in that, Applied to a processor, the processor including a front-end processing unit, a back-end processing unit, and a hardware scheduling unit disposed between the front-end processing unit and the back-end processing unit, the hardware scheduling unit being a hardware unit integrated into the processor, the method comprising: The front-end processing unit responds to the front-end start command to perform front-end processing, and generates front-end processing status information during the execution of the front-end processing; wherein, the front-end processing status information includes first status information for characterizing storage usage and / or second status information for characterizing front-end processing progress; The hardware scheduling unit generates a backend scheduling request based on the frontend processing status information. The backend processing unit performs backend processing in response to the backend scheduling request.

10. An electronic device, characterized in that, include: processor; And a storage module for storing executable instructions of the processor; wherein the processor is configured to execute the scheduling method of claim 9 by executing the executable instructions.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the scheduling method described in claim 9.

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