A high-stability light storage and charging control method and system

Abstract

The application discloses a high-stability light storage charging control method and system, and belongs to the field of new energy micro-grid control. The method comprises the following steps: collecting the running state data of a light storage charging system in real time; performing high-speed boundary sliding window difference operation on real-time load power to obtain a robust power change rate, and generating a first power feedforward compensation instruction; generating a second inertia compensation instruction based on a virtual capacitance coefficient and a bus voltage transient change rate, and generating a basic voltage closed-loop instruction; performing algebraic superposition on the first power feedforward compensation instruction, the second inertia compensation instruction and the basic voltage closed-loop instruction; and outputting a driving signal to an energy storage converter based on a comprehensive current reference value, so as to suppress the transient fluctuation of the DC bus voltage within a preset voltage safety boundary. The application eliminates the restriction of communication protocol delay on the real-time control.

Description

Technical Field

[0001] This invention relates to the field of new energy microgrid control, and in particular to a highly stable photovoltaic-storage-charging control method and system. Background Technology

[0002] With the rapid growth of electric vehicle ownership and the large-scale promotion of distributed photovoltaic power generation, integrated photovoltaic, energy storage, and electric vehicle charging facilities on the same DC bus have become an important direction for new energy infrastructure construction. This type of system interconnects photovoltaic power generation units, energy storage battery units, and multiple electric vehicle charging terminals via a DC bus, enabling local consumption of renewable energy and flexible charging of electric vehicles. However, due to the random fluctuations in photovoltaic output and the high uncertainty of vehicle plugging and unplugging behavior, the power supply and demand balance on the DC bus faces severe challenges, and stable control of the bus voltage has become a core technical bottleneck restricting the safe operation of such systems.

[0003] On the load side, the plugging and unplugging behavior of electric vehicle charging terminals is highly random and sudden. When a high-power electric vehicle suddenly connects to the charger, the power on its corresponding feeder can jump from zero to tens or even hundreds of kilowatts within milliseconds; conversely, when the vehicle is suddenly unplugged, the power drops instantly to zero. In a topology where multiple charging terminals share the same DC bus, such drastic load changes directly cause transient instability in the DC bus voltage. This can range from a decrease in charging quality for other vehicles to triggering system protection and causing a complete shutdown. On the source side, the output power of the photovoltaic array is significantly intermittent and random due to environmental factors such as cloud cover and sunlight angle. This power fluctuation further exacerbates the difficulty of controlling the bus voltage.

[0004] Existing technologies have systemic deficiencies in addressing the transient instability of DC bus voltage caused by load changes and photovoltaic fluctuations in photovoltaic charging systems. These deficiencies include noise resistance and adaptive capability for change detection, zero-delay response capability for feedforward compensation, full-condition adaptive capability for virtual inertia, nonlinear accuracy of feedback correction, and priority protection capability under hardware limits. Consequently, these technologies cannot guarantee stable operation of the system under typical disturbance conditions such as frequent plugging and unplugging of charging vehicles and severe fluctuations in photovoltaic output. Summary of the Invention

[0005] One of the objectives of this invention is to provide a highly stable photovoltaic energy storage charging control method and system to solve the problems of false triggering and missed triggering in the detection of sudden load changes with fixed threshold in the prior art, insufficient transient response speed due to integral lag in PI closed-loop feedback, and insufficient inertia and sluggish response faced by fixed virtual capacitor values ​​under different operating conditions.

[0006] This invention is achieved through the following technical solution: a high-stability photovoltaic-storage-charging control method, comprising the following steps: real-time acquisition of the operating status data of the photovoltaic-storage-charging system, including DC bus voltage, photovoltaic array output power, and real-time load power of each charging terminal; performing high-speed boundary sliding window differential operation on the real-time load power to obtain the effective load power change rate, and dynamically determining an adaptive power change rate trigger threshold based on the current system power margin; when the effective load power change rate exceeds the adaptive power change rate trigger threshold, triggering load mutation feedforward control logic, generating a first power feedforward compensation command based on the ratio of the total load mutation increment to the rated voltage of the DC bus; constructing a virtual inertia control model, designing the virtual capacitance coefficient as... The absolute value of the transient rate of change of the DC bus voltage is obtained as a superlinear increasing function and dynamically solved. Based on the solved virtual capacitance coefficient and the transient rate of change of the bus voltage, a second inertia compensation command is generated. At the same time, a variable step size droop mapping function is constructed, and the dynamic droop coefficient is designed as a nonlinear piecewise function of the bus voltage deviation to generate a base voltage closed-loop command. The first power feedforward compensation command, the second inertia compensation command, and the base voltage closed-loop command are algebraically superimposed. When the superposition result exceeds the thermal limit current of the energy storage converter, the transient protection current composed of the first power feedforward compensation command and the second inertia compensation command is output in full to perform current limiting processing on the base voltage closed-loop command. When current limiting processing occurs, the current cumulative value of the PI controller integral term is kept from increasing, and a comprehensive current reference value is generated. Based on the comprehensive current reference value, a drive signal is output to the energy storage converter to suppress the transient fluctuation of the DC bus voltage within the preset voltage safety boundary.

[0007] Furthermore, the real-time load power of each charging terminal is obtained by direct measurement at the physical link layer, including: deploying Hall current sensors at each charging feeder branch of the DC bus, extracting the analog voltage signal output by the Hall current sensors; sending the analog voltage signal into the FPGA for high-speed analog-to-digital conversion; and using hardware multiplier resources within the FPGA to directly multiply the transient current sampling data after analog-to-digital conversion with the synchronously acquired DC bus voltage within the same clock cycle to obtain the real-time load power.

[0008] Furthermore, the signal link that obtains the real-time load power by directly measuring at the physical link layer bypasses the communication protocol stack between the controller of the charging terminal and the system main controller. The delay of the signal link depends on the analog-to-digital conversion clock cycle and the propagation delay of the hardware multiplier.

[0009] Furthermore, the control method also includes: real-time monitoring of the state of charge of the energy storage battery unit and the minimum drop extreme value of the DC bus voltage; when the first power feedforward compensation command requires the output of maximum power and the state of charge is lower than the preset safe discharge depth limit, determining that the photovoltaic-energy storage charging system has entered an extreme boundary condition and triggering degraded load shedding control; in response to the degraded load shedding control, freezing the virtual capacitance coefficient in the virtual inertia control model to stop its continued growth, and simultaneously sending a power derating message to the specific charging terminal that caused the power jump, forcing the specific charging terminal to reduce its charging power.

[0010] Furthermore, the power derating message is broadcast to the specific charging terminal via the CAN bus in a deterministic transmission manner.

[0011] Further, a high-speed boundary sliding window differential operation is performed on the real-time load power, including: constructing a time-series sliding queue of fixed length in the hardware controller, and pushing the real-time load power point by point into the time-series sliding queue at a preset sampling period; performing an extreme value removal operation on the time-series sliding queue in each calculation period to remove the maximum and minimum values ​​in the time-series sliding queue to obtain an effective sequence; calculating the arithmetic mean of a preset number of sampling points at the tail and the arithmetic mean of a preset number of sampling points at the head of the effective sequence, respectively, as the head local mean and the tail local mean; dividing the difference between the tail local mean and the head local mean by the effective time span after removing the head and tail calculation segments to obtain the effective load power change rate; the head local mean and the tail local mean are both calculated from m sampling points, and the effective time span is the time obtained by multiplying the total length N of the time-series sliding queue by 2m and then by the sampling period.

[0012] Further, the adaptive power change rate trigger threshold is dynamically determined based on the current system power margin, including: calculating the difference between the current output power of the photovoltaic array and the total load power of the system, deducting the reserved safety power margin, and obtaining the system power margin; inputting the system power margin into a rectifier linear activation function, where the output is equal to the system power margin itself when the system power margin is non-negative, and the output is truncated to zero when the system power margin is negative; multiplying the output of the rectifier linear activation function by a sensitivity scaling factor, and taking the larger of it and a preset minimum trigger threshold, as the adaptive power change rate trigger threshold; when the photovoltaic power generation unit is at high power output and the total load of the charging terminal is in a light load state, making the system power margin positive, the adaptive power change rate trigger threshold increases with the increase of the system power margin; when the output power of the photovoltaic array decreases or the total load of the charging terminal increases, making the system power margin negative, the output of the rectifier linear activation function is zero, and the adaptive power change rate trigger threshold decreases to the preset minimum trigger threshold.

[0013] Further, generating the first power feedforward compensation command includes the following steps: comparing the effective load power change rate with the adaptive power change rate trigger threshold; when the effective load power change rate is greater than the adaptive power change rate trigger threshold, generating a feedforward enable value to enable the feedforward channel; when the effective load power change rate is less than or equal to the adaptive power change rate trigger threshold, generating a feedforward enable value to disable the feedforward channel; determining the current compensation amount based on the ratio of the total load mutation increment to the DC bus rated voltage; multiplying the current compensation amount by the feedforward gain coefficient to obtain the gain-corrected current compensation amount; selecting the gain-corrected current compensation amount based on the feedforward enable value to obtain the first power feedforward compensation command; wherein, the feedforward gain coefficient is less than 1, so that the first power feedforward compensation command undertakes the main part of the load mutation compensation amount, and the remaining compensation amount is adjusted by the base voltage closed-loop command.

[0014] Furthermore, the dynamic calculation of the virtual capacitance coefficient includes: extracting the transient rate of change of the DC bus voltage; exponentiating the absolute value of the transient rate of change, where the exponent is greater than 1, to obtain the voltage rate of change exponent value; multiplying the voltage rate of change exponent value by the virtual capacitance adjustment coefficient, and adding it to the basic inertia constant to obtain the virtual capacitance coefficient at the current moment.

[0015] Furthermore, the power exponent ranges from 1.5 to 2.0.

[0016] Further, after dynamic calculation, a second inertia compensation command is generated, including: multiplying the virtual capacitance coefficient by the transient rate of change of the bus voltage to obtain the virtual capacitor charging and discharging current component; multiplying the virtual damping coefficient by the bus voltage deviation to obtain the virtual damping current component; and adding the virtual capacitor charging and discharging current component to the virtual damping current component to obtain the second inertia compensation command.

[0017] Further, generating a base voltage closed-loop command includes: determining a voltage error based on the difference between the rated DC bus voltage and the current DC bus voltage; determining a DC bus voltage deviation value based on the absolute value of the voltage error; determining a dynamic droop coefficient as a base droop constant when the DC bus voltage deviation value is less than or equal to a steady-state dead zone threshold; and calculating the difference between the DC bus voltage deviation value and the steady-state dead zone threshold when the DC bus voltage deviation value is greater than the steady-state dead zone threshold but less than a danger threshold, and performing a specific operation on the difference. The difference is squared to obtain the squared value; the quadratic penalty coefficient is multiplied by the squared difference to obtain the quadratic gain term; the base droop constant is added to the quadratic gain term to obtain the dynamic droop coefficient; when the DC bus voltage deviation is greater than or equal to the danger threshold, the dynamic droop coefficient is determined as the upper limit of droop coefficient saturation; the dynamic droop coefficient is multiplied by the voltage error to obtain the droop control current correction value; the time domain output of the PI controller is added to the droop control current correction value to obtain the base voltage closed-loop command.

[0018] Furthermore, the base voltage closed-loop command is subjected to current limiting processing, including: when the absolute value of the algebraic superposition of the first power feedforward compensation command, the second inertia compensation command, and the base voltage closed-loop command does not exceed the thermal limit current, the algebraic superposition value is used as the comprehensive current reference value; when the absolute value of the algebraic superposition value exceeds the thermal limit current, the transient protection current is retained in full output, the remaining margin obtained by subtracting the absolute value of the transient protection current from the thermal limit current is allocated to the base voltage closed-loop command, and when the remaining margin is negative, it is truncated to zero.

[0019] Furthermore, the step of preventing the current accumulated value of the PI controller's integral term from increasing during current limiting includes: when the absolute value of the algebraic superposition value exceeds the thermal limit current and triggers the hardware limiting cutoff, simultaneously freezing the accumulated value of the PI controller's integral term to prevent the integral term from continuing to increase due to continuous error input during the limiting period; and when the absolute value of the algebraic superposition value falls back to within the thermal limit current, releasing the freeze on the integral term, allowing the PI controller to resume normal operation from the accumulated value of the integral term at the time of freezing.

[0020] Further, outputting a drive signal to the energy storage converter based on the comprehensive current reference value includes: sending the comprehensive current reference value to a pulse width modulation generation module to generate a PWM control waveform for driving the power switching transistor of the energy storage converter, and having the energy storage converter adjust its output current according to the PWM control waveform so that the actual output current of the energy storage converter approaches the comprehensive current reference value.

[0021] Another aspect of the present invention provides a high-stability photovoltaic energy storage and charging control system, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements any of the high-stability photovoltaic energy storage and charging control methods described above.

[0022] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0023] 1. This invention eliminates the contradiction between false triggering and missed triggering in the fixed threshold scheme by constructing an adaptive detection mechanism that combines high-speed boundary sliding window differential operation with adaptive power change rate trigger threshold. On the one hand, the high-speed boundary sliding window differential operation effectively filters out sensor thermal noise and high-frequency glitches while retaining the true power step characteristics by performing extreme value elimination and local mean difference on the time-series sliding queue, thereby improving the detection signal-to-noise ratio from the signal processing level. On the other hand, the adaptive power change rate trigger threshold is adaptively scheduled based on the real-time power margin of the system through the rectified linear activation function. Under the ample photovoltaic surplus, the trigger threshold is automatically raised to avoid false triggering, and under the heavy load condition where the system power margin is insufficient, the trigger threshold is automatically lowered to the preset minimum trigger threshold to prevent missed triggering, thus realizing adaptive dynamic matching.

[0024] 2. This invention effectively overcomes the inherent integral lag problem of traditional PI closed-loop feedback by constructing a zero-delay feedforward compensation channel parallel to the voltage feedback loop. When a load mutation event is detected, the feedforward channel is instantly activated by a step enable function and directly calculates the required compensation current based on the algebraic division of the total load mutation increment and the rated voltage. It skips the voltage feedback loop and directly injects the current into the underlying current reference calculation node of the energy storage converter. This deterministic algebraic operation, replacing the slow integral approximation, allows the compensation response to occur before the bus voltage experiences a significant physical drop, improving the transient response speed by several orders of magnitude compared to the traditional PI feedback scheme. Simultaneously, the design of the feedforward gain coefficient being slightly less than 1 allows the feedforward channel to bear the majority of the compensation amount, while the remaining residual is finely adjusted by the feedback closed loop, achieving a synergistic effect between fast feedforward response and precise feedback convergence.

[0025] 3. This invention solves the fundamental contradiction of insufficient inertia and sluggish response faced by fixed virtual capacitance values ​​under different operating conditions by designing the virtual capacitance coefficient as a superlinear increasing function of the absolute value of the transient rate of change of the bus voltage. Due to the superlinear amplification effect brought about by the nonlinear adjustment index being greater than 1, when the voltage is running smoothly, the transient rate of change of the bus voltage is close to zero, and the virtual capacitance coefficient is basically equal to the basic inertia constant. The system behaves as a small capacitor and will not slow down the dynamic response speed under normal operating conditions. However, once an extreme load jump occurs and the voltage change rate increases sharply, the virtual capacitance coefficient expands rapidly in a superlinear manner to a level much greater than the basic value. In terms of physical mechanism, it provides a strong inertial buffer for the energy storage converter and effectively suppresses the further deterioration of the voltage change rate. At the same time, the introduction of the virtual damping term consumes the excess oscillation energy in the system, ensuring that the system can smoothly converge to the steady state after the transient without introducing continuous oscillation.

[0026] 4. This invention constructs a hardware limiting and cutoff mechanism with deterministic priority. Under extreme conditions where the energy storage converter reaches its thermal limit current, it prioritizes ensuring the full output of the transient protection current composed of the first power feedforward compensation command and the second inertia compensation command, while only compressing the low-priority base voltage closed-loop command. This avoids the problem of weakening transient protection capability at the most critical moment by the traditional proportional reduction strategy. At the same time, the anti-integral saturation interlocking mechanism freezes the cumulative value of the integral term of the PI controller when limiting occurs, fundamentally eliminating the hidden danger of integral saturation and over-tuning oscillation caused after the extreme condition ends, ensuring the stability of the system's smooth transition from extreme conditions to normal conditions. Furthermore, it provides degraded load shedding control under extreme boundary conditions as the last line of defense for the system. When the feedforward compensation, virtual inertia support, and variable step size droop feedback control have all reached their respective limits, the virtual capacitance coefficient is frozen and a power derating message is actively sent to the specific charging terminal that caused the disturbance, reducing the power demand from the load side source and ensuring that the entire DC bus system does not experience a complete loss of voltage and collapse. Attached Figure Description

[0027] The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and form part of this application, do not constitute a limitation thereof. In the drawings:

[0028] Figure 1 This is a flowchart of the overall method provided in Embodiment 1 of the present invention;

[0029] Figure 2 This is a noise suppression comparison diagram provided in Embodiment 1 of the present invention;

[0030] Figure 3 This is a schematic diagram illustrating the impact of different numbers of data points on robustness and latency, provided in Embodiment 1 of the present invention.

[0031] Figure 4 This is a schematic diagram of the adaptive change characteristics provided in Embodiment 1 of the present invention;

[0032] Figure 5 This is a comparison diagram of bus voltage response provided in Embodiment 1 of the present invention;

[0033] Figure 6 This is a schematic diagram illustrating the influence of the feedforward gain coefficient on the steady-state accuracy and transient performance of the system, provided in Embodiment 1 of the present invention.

[0034] Figure 7 This is a diagram of nonlinear expansion characteristics provided in Embodiment 1 of the present invention;

[0035] Figure 8 This is a segmented mapping characteristic curve provided in Embodiment 1 of the present invention;

[0036] Figure 9 This is a comparison chart of bus voltage large deviation recovery provided in Embodiment 1 of the present invention;

[0037] Figure 10 This is a comparison diagram of the transient response of bus voltage provided in Embodiment 1 of the present invention;

[0038] Figure 11 This is a timing diagram of the amplitude limiting and truncation process provided in Embodiment 1 of the present invention;

[0039] Figure 12 This is a comparison chart of the PI integral term and voltage recovery provided in Embodiment 1 of the present invention;

[0040] Figure 13 This is a panoramic temporal response diagram provided in Embodiment 1 of the present invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0042] Example 1

[0043] This embodiment discloses a highly stable photovoltaic-storage charging control method. The core objective of the method is to suppress transient fluctuations in the DC bus voltage within a preset voltage safety boundary by constructing an integrated control model with asymmetric dual-channel and nonlinear state transition, under typical disturbance conditions such as frequent plugging and unplugging of charging vehicles and severe fluctuations in photovoltaic output. Figure 1 The overall method flowchart of this embodiment is shown. As can be seen from the figure, this embodiment includes the following steps:

[0044] Step 1: Collect real-time operating status data of the photovoltaic-storage charging system. The operating status data includes DC bus voltage, photovoltaic array output power, and real-time load power of each charging terminal.

[0045] The photovoltaic-storage-charging system refers to an integrated energy system consisting of photovoltaic power generation units, energy storage battery units, and multiple electric vehicle charging terminals interconnected via a DC bus. In this system, the photovoltaic power generation units inject power into the DC bus through DC / DC converters, the energy storage battery units exchange energy bidirectionally with the DC bus through bidirectional DC / DC converters, and the multiple charging terminals draw power from the DC bus to supply electricity to the electric vehicles through their respective feeders.

[0046] DC bus voltage refers to the real-time voltage value on the DC power bus connecting the photovoltaic power generation unit, energy storage converter, and various charging terminals, denoted as . The DC bus voltage is a core physical quantity characterizing the power balance of a photovoltaic-storage-charging system. When the injected power exceeds the consumed power, the bus voltage increases; when the injected power is less than the consumed power, the bus voltage decreases. Therefore, the stability of the bus voltage directly reflects the overall power supply and demand balance quality of the system.

[0047] The output power of a photovoltaic array refers to the total active power actually injected into the DC bus by the photovoltaic power generation unit under the current illumination and temperature conditions, denoted as Because photovoltaic output is affected by environmental factors such as cloud cover and the angle of sunlight, its power output is random and intermittent.

[0048] The real-time load power of each charging terminal refers to the instantaneous active power drawn from the DC bus by each charging feeder. In a photovoltaic-storage charging system, the plugging and unplugging behavior of charging vehicles is highly random—when a high-power electric vehicle suddenly connects to the charger, the power on its corresponding feeder can jump from zero to tens or even hundreds of kilowatts within milliseconds; conversely, when the vehicle is suddenly unplugged, the power drops instantly to zero. This drastic change in load is the primary cause of transient instability in the DC bus voltage.

[0049] In this embodiment, the real-time load power of each charging terminal is not obtained through slow telemetry data transmitted back from the charging pile controller, but rather through direct measurement at the physical link layer. Specifically, Hall current sensors can be deployed at each charging feeder branch of the DC bus. The analog voltage signal output by the Hall current sensor is extracted and sent to the FPGA for high-speed analog-to-digital (AD) conversion. Inside the FPGA, using its native hardware multiplier resources, the transient current sampling data after AD conversion is directly multiplied with the synchronously acquired bus voltage data within the same clock cycle, thereby obtaining ultra-high-speed real-time load power data at the physical layer.

[0050] Understandably, this physical layer power calculation method based on hardware multipliers completely bypasses the communication protocol stack between the charging pile controller and the system master controller in the signal link. Traditional solutions rely on the charging pile controller to transmit power telemetry data back to the system master controller via CAN bus or Ethernet. This signal needs to go through multiple stages such as protocol encapsulation, queuing, bus arbitration, and protocol parsing, with signal handshake delays typically on the order of several milliseconds to tens of milliseconds. In contrast, the FPGA hardware direct measurement scheme in this embodiment, from the output of the Hall sensor to the completion of the power value calculation, has a signal link delay that depends only on the AD conversion clock cycle and the propagation delay of the hardware multiplier, typically within the order of microseconds. This physical link layer measurement method provides a very low-latency raw data source for subsequent load change detection, eliminating the constraints on control real-time performance caused by the signal handshake delay of the communication protocol.

[0051] Step 2: Perform high-speed boundary sliding window differential calculation and dynamic threshold adaptive detection on the real-time load power data. When the calculated effective load power change rate exceeds the adaptive power change rate trigger threshold, the load mutation feedforward control logic is triggered, and the first power feedforward compensation command is directly generated based on the algebraic difference of the mutation amount. Specifically, when generating the first power feedforward compensation command, the controller first determines whether the effective load power change rate is greater than the adaptive power change rate trigger threshold; if the determination result is yes, the feedforward channel is turned on; if the determination result is no, the feedforward channel is turned off. When the feedforward channel is turned on, the controller first divides the total load mutation increment by the DC bus rated voltage to obtain the current compensation amount, and then multiplies the current compensation amount by the feedforward gain coefficient to obtain the first power feedforward compensation command; when the feedforward channel is turned off, the first power feedforward compensation command is zero.

[0052] Among them, high-speed boundary sliding window differential operation refers to a time-series differential algorithm with extreme value elimination and local mean smoothing functions built in the hardware controller, which is used to extract the true power mutation rate from power sampling data containing sensor noise.

[0053] The adaptive power change rate trigger threshold is a threshold determined based on the real-time power supply and demand status of the photovoltaic-storage-charging system. It is used to determine whether the effective load power change rate constitutes a load abrupt change event. This adaptive power change rate trigger threshold is not a fixed threshold but is adjusted according to the system power margin. The system power margin is determined by the photovoltaic array output power, the total system load power, and the reserved safety power margin. When the system power margin is large, the adaptive power change rate trigger threshold is increased to reduce the probability of false triggering caused by minor power disturbances. When the system power margin is small or negative, the adaptive power change rate trigger threshold is decreased to improve the detection sensitivity to load abrupt change events. The adaptive power change rate trigger threshold has the same comparison benchmark as the effective load power change rate and is used to form the trigger condition for the load abrupt change feedforward control logic in the controller.

[0054] In DC microgrid systems, sudden load connection or disconnection can trigger drastic power changes. If not detected in time, this can lead to severe voltage drops or overshoots on the bus. However, existing technologies often suffer from a contradiction between false triggering and missed triggering: if the sensitivity is set too high, sensor noise will frequently trigger false alarms; if the sensitivity is set too low, genuine load surges will be missed. Therefore, the goal of this step is to construct a detection model that can filter high-frequency noise within an extremely short sampling period and whose trigger sensitivity can be dynamically adjusted according to the overall power margin of the system. Based on this, once a valid surge is detected, a feedforward compensation command is immediately generated through algebraic mapping.

[0055] The following sections provide detailed explanations of the high-speed boundary sliding window differential operation, dynamic threshold adaptive detection, and the generation of feedforward compensation instructions.

[0056] High-speed boundary sliding window difference operation:

[0057] The first problem to solve is how to extract the true power mutation rate from noisy power sampling data. Specifically, a fixed-length array can be built on the FPGA hardware. A time-series sliding queue is used to push real-time load power data point by point into the queue at a preset microsecond clock cycle. Within each calculation cycle, a deterministic boundary removal operation is first performed on the queue, that is, extreme outliers are removed from the queue. Then, local means are taken at the beginning and end of the queue respectively. Finally, the slope between the two local means is calculated as the robust effective load power change rate.

[0058] The core of this design lies in eliminating extreme readings caused by sensor thermal noise and transient interference by truncating both ends, while suppressing high-frequency glitches by smoothing the local mean at both ends, thereby obtaining a robust power change rate that is not affected by noise while preserving the true physical characteristics of the step.

[0059] For example, in this embodiment, the effective load power change rate can be calculated as follows:

[0060] Assuming the sampling period Inside, the construction length is Time-sequence sliding queue First, remove the maximum value from the queue. and minimum value To obtain the effective sequence Its length is Then, take the tail of the valid sequence. The arithmetic mean of each sampling point and the head The difference of the arithmetic means of the sampling points, divided by the effective time span after removing the first and last calculation segments, yields the effective load power change rate at the current moment after smoothing and extreme value removal. Its mathematical expression is:

[0061] ;

[0062] in, This represents the rate of change of effective load power at the current moment after smoothing and de-extreme value removal. The first effective sequence after removing extrema. One power sample value; The number of data points used to calculate the local average at the beginning and end of the queue is a value much smaller than 1. Positive integers; This represents the total length of the sliding queue. This is the basic sampling period for FPGA hardware. Figure 2 The following diagram shows a comparison of noise suppression between the sliding window boundary culling differential method and the direct difference method in this embodiment. Figure 2 It contains two sub-images, among which, Figure 2 (a) is the load power curve. Figure 2 (b) shows the power change rate curves of this scheme and the traditional scheme. Figure 3 The X-axis represents time, and the Y-axis represents the estimated power change rate. This shows the trade-off between the smoothness of the change rate estimation curve and the response delay when different values ​​of the number of data points are used. It can be seen that the larger the number of data points, the smoother the curve but the greater the delay, while the smaller the number of data points, the more sensitive the curve is but the more noise remains.

[0063] It should be noted that in the above expression, the numerator calculates the tail of the sliding queue. The mean of each sampling point and the head The difference between the means of the sampling points represents the net change in power within the effective observation window. (Denominator part) This represents the effective time span after removing the first and last calculation segments. This local mean difference method replaces the traditional direct point-to-point difference. It can effectively filter out high-frequency glitches mathematically while retaining the true power step characteristics, ensuring that the microsecond-level response is not interfered with by sensor noise.

[0064] Understandably, the parameters The selection of determines the window width for smoothing the local mean at the beginning and end: The larger the value, the better the noise suppression effect, but the temporal resolution of the true abrupt change edge will be reduced accordingly; The smaller the value, the higher the temporal resolution, but the weaker the noise immunity. In practical engineering, The value of is usually tuned based on the sensor noise level and the desired shortest abrupt change response time.

[0065] Dynamic threshold adaptive detection:

[0066] After obtaining the robust power change rate, it is necessary to determine an appropriate trigger threshold to identify whether a load surge event requiring a response has occurred. Existing technologies typically use a fixed threshold for this purpose. However, the performance of a fixed threshold varies greatly under different operating conditions. Under light load and with ample photovoltaic surplus, the system power margin is large, and minor power fluctuations do not require a response. In this case, setting the fixed threshold too low can easily lead to false triggering. Conversely, under heavy load and insufficient system margin, even small load changes can cause bus voltage collapse. In this case, setting the fixed threshold too high can result in missed triggering. Therefore, the steady-state power threshold in this embodiment is not a fixed value, but a variable dynamically adjusted based on the net difference between the current photovoltaic array output power and the current total load power.

[0067] Specifically, the current available power surplus of the system can be obtained by calculating the difference between the current photovoltaic injection power and the total system load power, and deducting the reserved safety margin. When the surplus is positive and large, it indicates that the system is operating with ample power. In this case, the trigger threshold should be appropriately increased to reduce unnecessary responses. That is, when the photovoltaic array is at high power output and the total load is at a light load, the steady-state power threshold is increased by the controller to reduce the sensitivity of feedforward triggering and reduce false alarms. When the surplus is zero or negative, it indicates that the system is under heavy load or critical state. In this case, the trigger threshold should be immediately reduced to the minimum value. That is, when the photovoltaic output drops sharply due to cloud cover and the load is close to full load, the steady-state power threshold is reduced to a minimum value by the controller, so that any slight plugging or unplugging behavior of a charging vehicle can instantly trigger the load change feedforward control logic.

[0068] To achieve the adaptive effect of proportionally increasing the threshold when the surplus is positive and resetting the threshold to zero when the surplus is negative, a rectified linear activation function can be introduced to truncate the negative margin to zero, thus ensuring that the threshold will not become negative and can instantly drop to the bottom line when the margin is exhausted. Simultaneously, a preset minimum trigger threshold is set as a hard bottom line to ensure that the system has basic detection capabilities under any operating condition.

[0069] For example, in this embodiment, the dynamic trigger threshold can be calculated in the following way:

[0070] ;

[0071] in, For a moment The dynamic trigger threshold; The preset minimum trigger threshold of the system represents the minimum detection sensitivity that must be maintained regardless of changes in operating conditions; This is the sensitivity scaling factor, used to adjust the degree to which the power margin affects the threshold. This represents the total power injected into the photovoltaic system at the current moment. This represents the total power consumed by all loads in the system at the current moment. The system has a safety power margin reserved for future use; For rectified linear activation functions, when hour ,when hour . Figure 4 This diagram illustrates the adaptive variation characteristics of the dynamic trigger threshold with system power margin in this embodiment.

[0072] It should be noted that in the above expression, The function plays a crucial adaptive adjustment role. When the photovoltaic surplus is sufficient, that is... hour, Output the positive surplus, scaled by a factor. The adjustment raises the trigger threshold, preventing the system from triggering falsely due to minor disturbances under ample operating conditions. However, when the system is under heavy load, i.e., when the power margin is insufficient and the value in parentheses is negative, The output is zero, and the entire expression degenerates into... The threshold drops instantly to a minimum, allowing even extremely small load fluctuations to be captured immediately. Through The function takes the larger of the two values, ensuring that the threshold never falls below the absolute bottom line. This mathematically eliminates the contradiction between false triggering and missed triggering in the fixed threshold scheme.

[0073] Generation of the first power feedforward compensation command:

[0074] After accurately detecting load power surge events, in order to implement energy offset compensation before the bus voltage experiences a significant physical drop, this step constructs a zero-delay feedforward compensation channel that runs parallel to the voltage feedback loop.

[0075] Traditional closed-loop feedback control follows a causal chain: voltage drop → error generation → PI integral accumulation → converter output adjustment. Each link in this chain introduces a time delay. In particular, the PI controller's integral term requires a certain amount of time to accumulate error before generating sufficient output. This can lead to unacceptable transient voltage drops on the bus when the load experiences a sharp step change. To overcome this limitation, this embodiment constructs a feedforward compensation channel. This channel is used when the effective load power change rate at the current moment is smoothed and de-extreme-valued. Exceeding the dynamic trigger threshold At that moment, the feedforward channel immediately calculates the required compensation current directly through algebraic division based on the step change in load power, and injects it directly into the underlying current reference calculation node of the energy storage converter, bypassing the voltage feedback loop. This method replaces the slow integral approximation with deterministic algebraic operations, thereby improving the response speed by several orders of magnitude.

[0076] For example, in this embodiment, the first power feedforward compensation command, i.e., the feedforward compensation current command, can be calculated in the following manner:

[0077] ;

[0078] in, This is the feedforward compensation current command, i.e., the first power feedforward compensation command; For the Heaviside step function, when hour Otherwise Its function is as a hardware-level interrupt switch, which only activates the feedforward channel when the power change rate actually exceeds the dynamic threshold. The load power change rate is obtained from the aforementioned high-speed boundary sliding window differential operation; For dynamic trigger thresholds; This is the feedforward gain coefficient, also known as the system feedforward gain coefficient. This represents the transient step change in load power, i.e., the sudden increase in total load. This is the rated voltage of the DC bus. Figure 5 The diagram shows a comparison of the bus voltage response of traditional PI feedback and feedforward compensation under load abrupt change in this embodiment. It can be seen that the feedforward channel directly injects compensation current through zero-delay algebraic mapping, reducing the voltage drop depth by more than 50% and shortening the recovery time by several orders of magnitude, thus verifying the effectiveness of the Heaviside step function gated feedforward model. Figure 6 This diagram illustrates the impact of the feedforward gain coefficient on the steady-state accuracy and transient performance of the system in this embodiment. Figure 6 The X-axis represents time, and the Y-axis represents the bus voltage, showing the transient response of the bus voltage when the feedforward gain coefficient takes different values.

[0079] It should be noted that in the above expression, The function mathematically constructs a zero-latency bypass mapping channel. When the detection model determines that no effective mutation has occurred, i.e., the rate of change has not exceeded the threshold, The feedforward channel is completely silent and will not cause any interference to the system; once a valid mutation is detected, Instantly switch to Feedforward compensation current Inject immediately. The physical meaning of this term is: based on the fundamental relationship that power equals voltage multiplied by current (… The power deficit is directly converted into the required current compensation.

[0080] Understandably, the feedforward gain coefficient The value is usually taken from The design, which is slightly less than 1, ensures that the feedforward channel only undertakes most of the compensation task (e.g., 85% to 95%), while the remaining small portion of the residual is finely adjusted by the feedback closed loop. This achieves a coordinated approach between fast feedforward response and precise feedback convergence, avoiding oscillations caused by overcompensation.

[0081] Step 3: Construct a virtual inertia control model based on virtual capacitor characteristics, extract the real-time deviation value and transient rate of change of DC bus voltage, dynamically calculate the virtual capacitor coefficient value with time-varying characteristics, and then generate the second inertia compensation command; at the same time, construct a variable step size droop mapping function to realize the nonlinear correction of the feedback channel.

[0082] Among them, the virtual inertia control model refers to an affine nonlinear control model constructed in a digital controller through pure software algorithms, which simulates the inertial buffering effect of a physical large capacitor at the control level. The variable step-size droop mapping function refers to designing the droop coefficient as a nonlinear piecewise function of the bus voltage deviation, so that the feedback channel has different correction strengths in different deviation ranges.

[0083] After the feedforward channel solves the transient response speed problem, the feedback channel still bears the important responsibility of ensuring steady-state accuracy and eliminating residual deviations. Meanwhile, in rigid DC microgrids, due to the limited physical capacitance, the rate of change of the bus voltage is significant when extreme load fluctuations occur. The voltage spikes can occur instantaneously, and feedforward compensation alone may not be able to completely suppress sharp overshoots or drop spikes. Therefore, this step requires the simultaneous construction of two cooperative control sub-models: a virtual inertia control model (to physically suppress the deterioration of the voltage change rate) and a variable step size droop feedback model (to achieve an adaptive balance between steady-state accuracy and transient recovery speed).

[0084] The following sections provide detailed explanations of the construction of the virtual inertia control model, the dynamic calculation of the virtual capacitance coefficient, and the operation of the variable step size droop mapping function.

[0085] Construction of the virtual inertia control model:

[0086] The core of the virtual inertia control model is that if a virtual capacitor can be introduced into the control algorithm of the energy storage converter, so that it behaves as a small capacitor when the voltage is stable so as not to slow down the dynamic response speed of the system, and automatically expands into a large capacitor when the voltage changes drastically to provide a strong inertia buffer, then the deterioration of the voltage change rate can be suppressed by physical mechanism.

[0087] Specifically, the affine equations of mechanical motion for a virtual DC motor are constructed in a digital microcontroller. These equations establish the virtual capacitance coefficient. DC bus voltage Photovoltaic storage injection power Charging load power and line loss power The physical relationship between them can be expressed mathematically as follows:

[0088] ;

[0089] in, Let be the virtual capacitance coefficient to be solved; This is the DC bus voltage; The total power injected into the DC bus by both the photovoltaic power generation unit and the energy storage battery unit; The total load power drawn by all charging terminals from the DC bus; This refers to the power loss of the DC bus and lines.

[0090] It should be noted that the physical meaning of the above equation is: when the system experiences power imbalance (i.e., When ), virtual capacitance The charging and discharging behavior of a large-capacity physical capacitor was simulated. The left side of the equation... This represents the rate of change of energy throughput of the virtual capacitor per unit time—when there is a power surplus ( The virtual capacitor absorbs excess energy and suppresses voltage overshoot; when power is insufficient ( The virtual capacitor releases stored energy and suppresses voltage drops. The larger the value, the greater the rate of voltage change caused by the same power imbalance. The smaller the value, the stronger the inertial buffering characteristics of the system.

[0091] In this embodiment, to make the above continuous-time model applicable to the discrete operation of the digital controller, the equations are discretized into difference equations. After discretization, the energy storage converter is forced to supply power to the DC bus equal to the power required during the first switching cycle when a power imbalance occurs. The transient energy throughput, of which This represents the discrete change in bus voltage within one switching cycle. This discretization ensures that virtual inertia control can be executed precisely within each calculation step of the digital controller.

[0092] Dynamic calculation of virtual capacitance coefficient:

[0093] Traditional virtual inertia control schemes typically employ a fixed virtual capacitance value. However, a fixed capacitance value presents a fundamental contradiction: if the value is set too small, the inertia support will be insufficient under extreme and sudden operating conditions; if the value is set too large, it will slow down the system's dynamic response speed under normal operating conditions. Therefore, this embodiment designs the virtual capacitance coefficient as a nonlinear increasing function of the absolute value of the transient rate of change of the bus voltage, and dynamically calculates the virtual capacitance coefficient value at the current moment through variable step-size logic.

[0094] Specifically, the virtual capacitance value is designed as a nonlinear increasing function of the absolute value of the voltage change rate, where the nonlinear exponent is greater than 1. This ensures that the larger the voltage change rate, the more drastically the virtual capacitance expands. Its mathematical mapping rule can be expressed as follows:

[0095] ;

[0096] in, The virtual capacitance coefficient is obtained through dynamic calculation; It is the basic inertia constant, representing the sum of the system's physical capacitance and the control basic inertia, that is, the minimum value of the virtual capacitance when the voltage is stable. The damping amplification factor, also known as the inertia surge amplification factor, is a pre-tuned factor that controls the sensitivity of the virtual capacitance to expand with the rate of voltage change. The non-linear adjustment index is usually set at... between. Figure 7 The diagram shows the nonlinear expansion characteristic of the nonlinear adjustment index as a function of the voltage change rate in this embodiment. It can be seen that when the voltage is stable, the nonlinear adjustment index maintains the small capacitance without slowing down the response. When the voltage changes drastically, the exponential expansion provides a strong inertia buffer, and the larger the nonlinear adjustment index, the more significant the nonlinear enhancement effect.

[0097] It should be noted that the nonlinear term It played a decisive adaptive adjustment role. Because This term exhibits superlinear amplification characteristics. During stable voltage operation, Approaching zero, at this time The value is extremely small. Basically equal to the base value The system exhibits a small capacitance, which will not slow down the dynamic response speed under normal operating conditions. However, in the event of an extreme load surge... When it increases sharply, due to the exponent The superlinear amplification effect It will expand exponentially to a level far exceeding the base value. In terms of macroscopic external characteristics, the energy storage converter provides a strong inertial buffer to the DC bus, effectively suppressing further deterioration of the voltage change rate from a physical mechanism, and providing extremely strong dynamic voltage drop damping.

[0098] After obtaining the dynamic virtual capacitance coefficient, the second inertia compensation command can be generated. Simultaneously, to dissipate excess oscillatory energy in the system and ensure smooth convergence to steady state after the transient state, a virtual damping term is introduced. The mathematical expression for the second inertia compensation command can be:

[0099] ;

[0100] in, This is the second inertia compensation command, namely the inertia compensation current command; The virtual capacitance coefficient obtained from the aforementioned dynamic calculation; The transient rate of change of the real-time bus voltage; This is a virtual damping coefficient used to suppress system oscillations and promote convergence; This refers to the bus voltage deviation.

[0101] It should be noted that the first term in the above formula... The charging and discharging current of a virtual capacitor was simulated—when the bus voltage was decreasing ( When the voltage is rising ( ), this item is negative, indicating that the virtual capacitor is releasing current to the bus to prevent the voltage from continuing to drop; when the bus voltage is rising ( When this value is positive, it indicates that the virtual capacitor draws current from the bus to prevent the voltage from rising further. (Second term) The function is similar to a physical damper. By using a damping force proportional to the voltage deviation to dissipate the oscillation energy in the system, it ensures that the virtual capacitor provides inertia support without introducing continuous oscillations, so that the system can smoothly return to steady state after the transient.

[0102] Running the variable step size droop mapping function:

[0103] In the feedback channel, traditional linear droop control faces an inherent contradiction between voltage regulation range and voltage regulation accuracy: if the droop coefficient is set too large, a large correction output will be generated even when the deviation is small, affecting steady-state accuracy; if the droop coefficient is set too small, the correction force will be insufficient when the deviation is large, and it will be unable to quickly pull the voltage back to the safe range. Therefore, this embodiment adopts a variable step size droop feedback strategy with nonlinear characteristics.

[0104] Specifically, first calculate the absolute deviation between the current DC bus voltage and the rated voltage:

[0105] ;

[0106] Then, establish the droop coefficient. and The piecewise mapping table, based on the magnitude of the bus voltage deviation, designs the droop coefficient as a piecewise function:

[0107] when Within the first dead zone (i.e. )hour, Keep it as a small fundamental constant At this time, the system maintains a steady-state voltage with high precision and will not over-respond to small fluctuations;

[0108] when Exceeding the first dead zone but below the danger boundary value (i.e. )hour, Follow It increases in a quadratic polynomial relationship, generating increasingly stronger nonlinear feedback pull to accelerate the transient recovery speed;

[0109] when Reaching or exceeding the danger boundary value (i.e. )hour, Saturation to maximum value To pull the bus voltage back to a safe area with maximum force.

[0110] For example, in this embodiment, the dynamic droop coefficient and its corresponding feedback compensation current can be calculated as follows:

[0111] ;

[0112] ;

[0113] in, This is the dynamic droop coefficient; The basic droop constant corresponds to the small gain during steady-state operation; This is the steady-state dead zone range, within which voltage deviations are considered normal fluctuations; This is a secondary penalty coefficient, used to control the growth rate of the droop coefficient in the middle section; This is the dangerous threshold for voltage deviation; This represents the upper limit of the saturation value for the droop coefficient; This is the time-domain output of the PI controller, which is the sum of the proportional and integral terms. It is a closed-loop instruction based on the base voltage. Figure 8 The piecewise mapping characteristic curve of the variable step size droop mapping function in this embodiment is shown. It can be seen that the piecewise nonlinear droop mapping achieves the adaptive characteristics of high precision with small deviation and strong correction with large deviation, and solves the inherent contradiction between voltage regulation accuracy and voltage regulation range in traditional linear droop control. Figure 9 The diagram shows a comparison of bus voltage large deviation recovery under variable step size droop and linear droop control in this embodiment. Figure 9 In the diagram, the X-axis represents time and the Y-axis represents bus voltage. Under a large load change, the voltage recovery process of linear droop control (slow recovery, possible steady-state deviation) and nonlinear droop control (rapid recovery, high steady-state accuracy) is compared. It can be seen that variable step size droop provides a much stronger recovery force than linear droop in large deviation scenarios, while maintaining the same or even better steady-state accuracy in small deviation regions. Figure 10 The diagram shows a comparison of the bus voltage transient response between feedforward-feedback control and traditional pure PI feedback control in this embodiment. Figure 10 In the diagram, the X-axis represents time (milliseconds) and the Y-axis represents the DC bus voltage. Under the same load step disturbance, the voltage response under traditional pure PI control has the characteristics of large drop and slow recovery. However, the voltage response under the feedforward + PI control of this scheme has the characteristics of minimal drop and fast recovery. It can be seen that by using zero-delay bypass mapping, the voltage drop depth and recovery time are significantly improved at the same time, breaking through the causal chain delay bottleneck of traditional PI closed loop.

[0114] It should be noted that in the above formula, the quadratic term... It plays a crucial role in nonlinear regulation. When the deviation is small, the value of the quadratic term is extremely small, the droop coefficient is almost constant, and the system maintains high steady-state accuracy. However, once the deviation crosses the dead zone, the quadratic term increases rapidly in a parabolic manner with the increase of the deviation, causing the droop coefficient to rise rapidly and generating a strong feedback correction force, effectively pulling the bus voltage back to the safe area quickly.

[0115] Step 4: Algebraically superimpose the first power feedforward compensation command, the second inertia compensation command, and the system base voltage closed-loop command, execute hardware limiting cutoff and anti-integral saturation interlock with deterministic priority, generate a comprehensive current reference value, and output a pulse width modulation (PWM) drive signal to the power switch of the energy storage converter based on the comprehensive current reference value, so as to suppress the transient fluctuation of the DC bus voltage within the preset voltage safety boundary.

[0116] Algebraic superposition refers to the closed-loop command of the base voltage. First power feedforward compensation command With the second inertia compensation command Arithmetic summation is performed in the summation register of the digital signal processor. Hardware clipping refers to the deterministic reduction of the current in each channel according to a preset priority rule when the total current command after superposition exceeds the thermal limit current of the power devices in the energy storage converter. Anti-integral saturation interlocking refers to the synchronous freezing of the accumulated value of the integral term of the PI controller when clipping occurs to prevent integral saturation.

[0117] After constructing the three control channels—feedforward compensation, feedback correction, and virtual inertia support—the final key issue to address is how to rationally allocate the limited current output capacity when the energy storage converter hardware reaches its physical limits. Under extreme conditions, the sum of the current commands generated by the three channels may exceed the thermal limit current of the converter's power devices. Simply scaling down all commands proportionally would weaken the compensation effect of the transient suppression channel, causing the bus voltage to lose sufficient support at the moment when protection is most needed. Therefore, this step constructs a hardware limiting and command truncation model with deterministic priorities.

[0118] Specifically, the current commands generated by the three channels can be divided into two priority levels: high-priority transient protection current (including the first power feedforward compensation command). Second inertia compensation command ), and low-priority steady-state regulation current (i.e., base voltage closed-loop command). Under normal operating conditions, when the sum of the three does not exceed the hardware limit, all instructions are superimposed and output normally; however, once the total number of instructions exceeds the hardware limit, priority is given to ensuring that the transient protection current passes through in full, and the remaining current margin in the hardware limit is allocated to the PI feedback output; if the transient protection current itself has reached or exceeded the hardware limit, the PI feedback output is completely compressed to zero.

[0119] For example, in this embodiment, the priority control law output and the anti-integral saturation interlocking mechanism can be described as follows:

[0120] The basic superimposed current of the three channels is defined as:

[0121] ;

[0122] Define the thermal limiting current of the power devices in the energy storage converter as: The transient protection current is defined as:

[0123] ;

[0124] ;

[0125] in, This is the final output current command of the converter, i.e., the comprehensive current reference value; The basic superimposed current for the three channels; This refers to the thermal limiting current of the power devices in the energy storage converter. For transient protection current, it represents a high-priority instruction for transient protection; This is the sign function, used to extract the direction of the PI feedback current command; The boundary truncation operator ensures that the current margin allocated to the PI feedback is not negative; This is the accumulated value of the integral term in the PI controller.

[0126] Additionally, the above formula also includes synchronous execution of anti-integral saturation interlocking action, which is achieved by first calculating the basic superimposed current of the three channels. If the original superposition value The maximum thermal limit current was not exceeded. Then all current channels will be superimposed and output normally, proportional-integral controller. Normal integration; if the original superposition value exceeds the maximum thermal limiting current. The system simultaneously performs two actions: first, it allocates current limiting based on priority, prioritizing the transient protection current formed by feedforward compensation and virtual inertia compensation, while the proportional-integral feedback current only occupies the remaining current margin; second, it freezes the integral term of the proportional-integral controller to prevent it from accumulating and causing integral saturation. The essence of this interlocking action is: transient support takes priority, steady-state feedback yields, hardware current is limited, and integral accumulation is frozen. This prioritizes the system's rapid response to transient impacts when the energy storage converter's current capacity is limited, while simultaneously preventing integral saturation of the proportional-integral controller due to output limiting, thus balancing bus voltage stability, dynamic disturbance rejection capability, and converter hardware safety.

[0127] It should be noted that in the above formula, when At this time, the system is in normal operating condition, and the current commands from the three channels are superimposed and output normally. At this point, the control system fully utilizes its three-channel coordinated capability. However, when… At that time, the formula enforces priority truncation: transient protection current. Unconditional full retention ensures the full output of the feedforward and virtual inertia compensation channels to maintain physical drop protection capability for extremely short periods; while the PI feedback current can only obtain the remaining portion after deducting the transient protection current from the hardware limits, i.e. If the transient protection current itself is close to or exceeds... ,but The operator cuts off the PI feedback current quota to zero, ensuring that the full current capacity of the converter is used to resist transient impacts.

[0128] Understandably, the anti-integral saturation interlocking mechanism immediately freezes the integral accumulation value of the PI controller when a limiting condition is detected, preventing the integral term from accumulating and becoming saturated due to the output being truncated. Without this freezing operation, the integral term of the PI controller would continuously increase due to persistent error input during the limiting period, leading to the so-called integral saturation phenomenon. When the extreme condition ends and the hardware is no longer overloaded, the saturated integral term would suddenly release excessive control output, causing severe overshoot and oscillations in the system. By freezing the integral term, it ensures that once the extreme condition ends, the PI controller's integral term returns to normal operation from the frozen value, allowing the system to smoothly and oscillate back to steady state.

[0129] Obtain the comprehensive current reference value Then, it is sent to the pulse width modulation (PWM) generation module and converted into a PWM control waveform to drive the power switch of the energy storage converter, thereby controlling the actual output current of the energy storage converter to track the comprehensive current reference value and suppressing the transient fluctuation of the DC bus voltage within the preset voltage safety boundary. Figure 11 The timing diagram of the three-channel current command superposition and priority limiting cutoff process in this embodiment is shown. It can be seen that the deterministic priority cutoff mechanism in this embodiment ensures that when the hardware is overloaded, each ampere current is given priority for transient protection, and the limited current capability of the converter is optimally allocated. Figure 12 This embodiment shows a comparison chart of the PI integral term with and without anti-integral saturation interlock and voltage recovery. Figure 12 This is a dual Y-axis graph. The X-axis represents time (ms), the left Y-axis represents the accumulated value of the PI integral term, and the right Y-axis represents the bus voltage (V). The light red shaded area represents the range of hardware limiting cutoff and anti-integral saturation interlocking. Within this range, the original current command formed by the superposition of the first power feedforward compensation command, the second inertia compensation command, and the base voltage closed-loop command exceeds the thermal limit current of the energy storage converter. The controller triggers a deterministic priority limiting interlocking, prioritizing the transient protection current output and limiting the base voltage closed-loop command. Simultaneously, the controller freezes the accumulated value of the PI controller's integral term, preventing the PI integral term from continuously accumulating with voltage errors. By comparing the accumulation behavior of the PI integral term and the corresponding voltage recovery process under the two conditions of interlocking freezing and non-interlocking freezing, it can be seen that during interlocking, the integral term remains saturated during the limiting period, resulting in severe overshoot oscillations after the crisis is resolved; with interlocking, the integral term is frozen to a reasonable value, and the system recovers smoothly without oscillations after the crisis is resolved.

[0130] Step 5: Monitor the state of charge (SOC) of the energy storage battery pack and the minimum drop value of the DC bus in real time, and implement degraded load shedding control to adapt to extreme boundary conditions.

[0131] Among them, State of Charge (SOC) refers to the percentage of the energy storage battery pack's current remaining capacity relative to its rated total capacity, and is used to characterize the remaining discharge capability of the energy storage battery pack. Minimum voltage drop refers to the lowest safe limit that the DC bus voltage can withstand during a sudden load change.

[0132] In this embodiment, when the aforementioned three-channel coordinated control still cannot fully compensate for extreme power imbalances—for example, when multiple high-power electric vehicles suddenly connect to charging simultaneously, causing a sudden surge in load power, and the remaining charge of the energy storage battery pack is nearly depleted—the system needs to initiate degraded load shedding control to ensure uninterrupted power supply to the DC bus. Specifically, degraded load shedding control may include the following steps:

[0133] First, the state of charge (SOC) of the energy storage battery pack and the minimum drop value of the DC bus are monitored in real time.

[0134] Then, when the first power feedforward compensation command is detected to require the output of maximum power (i.e., the feedforward channel is running at full load), and at the same time the SOC of the energy storage battery pack is lower than the preset safe discharge depth limit, the controller determines that the system has entered an unsustainable extreme boundary condition and immediately triggers a hardware-level interrupt signal.

[0135] In response to the interrupt signal, the controller performs the following two synchronization actions: First, it freezes the virtual capacitance coefficient in the aforementioned virtual inertia control model. First, it stops the power surge to prevent the converter from continuing to output compensation current beyond its actual capacity when the energy storage battery pack no longer has sufficient energy support. Second, it synchronously broadcasts a deterministic power derating message to the specific charging terminal that caused the power surge via the CAN bus, forcing the charging terminal to reduce its charging power within microseconds.

[0136] Understandably, this degrading load shedding control logic constitutes the system's last line of defense. With feedforward compensation, virtual inertia support, and variable step-size droop feedback all reaching their respective limits, it proactively reduces the power demand at the load end that causes disturbances, thereby minimizing power loss at its source and preventing a complete power outage and collapse of the entire DC bus system. The deterministic transmission characteristics of CAN bus messages ensure that the derating command reaches the target charging terminal within a predictable time window, achieving a microsecond-level load end power peak-shaving response. Figure 13 This embodiment shows a panoramic timing response diagram under the extreme condition of simultaneous plugging and unplugging of multiple vehicles. Figure 13 It contains four sub-images, among which, Figure 13 (a) is the load power step waveform. Figure 13 (b) represents the dynamic trigger threshold and power change rate. Figure 13 (c) represents the three-channel current components of feedforward / inertia / PI. Figure 13 (d) shows the bus voltage response. The X-axis of the four sub-graphs is unified as time (ms), which shows the entire process of two load change events and presents the complete working process of the entire control scheme under typical extreme conditions from a panoramic perspective.

[0137] Example 2

[0138] This embodiment discloses a high-stability photovoltaic-energy storage-charging control system. Specifically, this system can be deployed in the central controller of the photovoltaic-energy storage-charging system to execute the high-stability photovoltaic-energy storage-charging control method as described in Embodiment 1. The central controller can be a digital signal processor (DSP), a field-programmable gate array (FPGA), or a collaborative control platform of DSP and FPGA, etc. The DSP can be a TMS320F28379D series or an equivalent industrial-grade digital control chip; the FPGA can be a Xilinx Artix-7 series or Intel Cyclone series programmable logic device suitable for high-speed real-time control scenarios.

[0139] In this embodiment, the high-stability photovoltaic energy storage and charging control method can also be deployed in a distributed control architecture. For example, the high-stability photovoltaic energy storage and charging control method of Embodiment 1 of this application can be completed by the local controllers deployed at each charging terminal and the centralized energy management controller deployed on the system side.

[0140] In this embodiment, the computational core of the high-stability photovoltaic energy storage and charging control method in Embodiment 1 can also be implemented in the form of an embedded industrial control computer or an edge computing gateway.

[0141] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A highly stable photovoltaic-storage charging control method, applied to a photovoltaic-storage charging system, wherein the photovoltaic-storage charging system includes photovoltaic power generation units, energy storage battery units, and multiple charging terminals interconnected via a DC bus, characterized in that, The control method includes: The operating status data of the photovoltaic-storage-charging system is collected in real time, including DC bus voltage, photovoltaic array output power, and real-time load power of each charging terminal. A high-speed boundary sliding window differential operation is performed on the real-time load power to obtain the effective load power change rate, and an adaptive power change rate trigger threshold is determined based on the current system power margin. When the effective load power change rate exceeds the adaptive power change rate trigger threshold, the load mutation feedforward control logic is triggered, and a first power feedforward compensation command is generated based on the ratio of the total load mutation increment to the rated voltage of the DC bus. A virtual inertia control model is constructed, and the virtual capacitance coefficient is designed as a superlinear increasing function of the absolute value of the transient rate of change of the DC bus voltage. Dynamic calculation is performed, and a second inertia compensation command is generated based on the calculated virtual capacitance coefficient and the transient rate of change of the bus voltage. At the same time, a variable step size droop mapping function is constructed, and the dynamic droop coefficient is designed as a nonlinear piecewise function of the bus voltage deviation to generate a base voltage closed-loop command. The first power feedforward compensation command, the second inertia compensation command, and the base voltage closed-loop command are algebraically superimposed. When the superposition result exceeds the thermal limit current of the energy storage converter, the transient protection current composed of the first power feedforward compensation command and the second inertia compensation command is output in full. Based on the thermal limit current of the energy storage converter, the base voltage closed-loop command is subjected to current limiting processing in the hardware controller. When current limiting processing occurs, the current accumulated value of the PI controller integral term is kept from increasing, and a comprehensive current reference value is generated. Based on the comprehensive current reference value, a drive signal is output to the energy storage converter to suppress the transient fluctuation of the DC bus voltage within the preset voltage safety boundary.

2. The high-stability photovoltaic energy storage charging control method according to claim 1, characterized in that, The step of performing high-speed boundary sliding window differential calculation on the real-time load power includes: A time-series sliding queue of fixed length is constructed in the hardware controller, and the real-time load power is pushed into the time-series sliding queue point by point at a preset sampling period. In each calculation cycle, an extreme value removal operation is performed on the time-series sliding queue to remove the maximum and minimum values ​​in the time-series sliding queue and obtain an effective sequence. The arithmetic mean of a preset number of sampling points at the tail and the arithmetic mean of a preset number of sampling points at the head of the effective sequence are calculated respectively, and used as the local mean at the head and the local mean at the tail. The effective load power change rate is obtained by dividing the difference between the local mean at the tail end and the local mean at the head end by the effective time span after removing the calculation segments at the head and tail. The local mean at the beginning and the local mean at the end are both calculated from m sampling points. The effective time span is the time obtained by subtracting 2m from the total length N of the time-series sliding queue and then multiplying it by the sampling period.

3. The high-stability photovoltaic energy storage charging control method according to claim 1, characterized in that, Determining the adaptive power change rate trigger threshold includes: Calculate the difference between the current output power of the photovoltaic array and the total load power of the system, and subtract the reserved safety power margin to obtain the system power margin; The system power margin is input into the rectifier linear activation function. When the system power margin is non-negative, the output is equal to the system power margin itself. When the system power margin is negative, the output is truncated to zero. The output of the rectified linear activation function is multiplied by the sensitivity scaling factor, and the larger of the output and the preset minimum trigger threshold is taken as the adaptive power change rate trigger threshold. When the photovoltaic power generation unit is at high power output and the total load of the charging terminal is in a light load state, making the system power margin positive, the adaptive power change rate trigger threshold increases as the system power margin increases; When the output power of the photovoltaic array decreases or the total load of the charging terminal increases, making the system power margin negative, the output of the rectifier linear activation function is zero, and the adaptive power change rate trigger threshold drops to the preset minimum trigger threshold.

4. The high-stability photovoltaic energy storage charging control method according to claim 1, characterized in that, The generation of the first power feedforward compensation command includes the following steps: Compare the effective load power change rate with the adaptive power change rate trigger threshold; When the effective load power change rate is greater than the adaptive power change rate trigger threshold, a feedforward enable value is generated to enable the feedforward channel. When the effective load power change rate is less than or equal to the adaptive power change rate trigger threshold, a feedforward enable value is generated to disable the feedforward channel. The current compensation amount is determined based on the ratio of the total load surge increment to the rated voltage of the DC bus. Multiply the current compensation amount by the feedforward gain coefficient to obtain the current compensation amount after gain correction; Based on the feedforward enable value, the current compensation amount after gain correction is selected to obtain the first power feedforward compensation command. Wherein, the feedforward gain coefficient is less than 1, so that the first power feedforward compensation command undertakes the main part of the load change compensation amount, and the remaining compensation amount is adjusted by the base voltage closed-loop command.

5. The high-stability photovoltaic energy storage charging control method according to claim 1, characterized in that, The dynamic calculation of the virtual capacitance coefficient includes: Extract the transient rate of change of the DC bus voltage; The absolute value of the transient rate of change is raised to a power, where the exponent is greater than 1, to obtain the exponent value of the voltage rate of change. Multiplying the voltage change rate by the virtual capacitance adjustment coefficient and then adding it to the basic inertia constant yields the virtual capacitance coefficient at the current moment.

6. The high-stability photovoltaic energy storage charging control method according to claim 5, characterized in that, After the dynamic calculation, a second inertia compensation command is generated, including: Multiplying the virtual capacitance coefficient by the transient rate of change of the bus voltage yields the virtual capacitance charging and discharging current components. Multiply the virtual damping coefficient by the bus voltage deviation to obtain the virtual damping current component; The virtual capacitor charging and discharging current component is added to the virtual damping current component to obtain the second inertia compensation command.

7. The high-stability photovoltaic energy storage charging control method according to claim 1, characterized in that, The command to generate the base voltage closed loop includes: The voltage error is determined based on the difference between the rated voltage of the DC bus and the current DC bus voltage. The DC bus voltage deviation value is determined based on the absolute value of the voltage error. When the DC bus voltage deviation is less than or equal to the steady-state dead zone threshold, the dynamic droop coefficient is determined as the basic droop constant. When the DC bus voltage deviation is greater than the steady-state dead zone threshold but less than the danger threshold, the difference between the DC bus voltage deviation and the steady-state dead zone threshold is calculated, and the difference is squared to obtain the squared difference; the quadratic penalty coefficient is multiplied by the squared difference to obtain the quadratic gain term; the basic droop constant is added to the quadratic gain term to obtain the dynamic droop coefficient. When the DC bus voltage deviation is greater than or equal to the danger threshold, the dynamic droop coefficient is determined as the upper limit of droop coefficient saturation. Multiply the dynamic droop coefficient by the voltage error to obtain the droop control current correction value; The time-domain output of the PI controller is added to the droop control current correction value to obtain the base voltage closed-loop command.

8. The high-stability photovoltaic energy storage charging control method according to claim 1, characterized in that, Based on the thermal limiting current of the energy storage converter, the hardware controller performs current limiting processing on the base voltage closed-loop command, including: When the absolute value of the algebraic superposition of the first power feedforward compensation command, the second inertia compensation command, and the base voltage closed-loop command does not exceed the thermal limit current, the algebraic superposition value is used as the comprehensive current reference value. When the absolute value of the algebraic superposition exceeds the thermal limit current, the transient protection current is retained in full output, and the remaining margin obtained by subtracting the absolute value of the transient protection current from the thermal limit current is allocated to the base voltage closed-loop command. When the remaining margin is less than zero, the remaining margin is set to zero.

9. The high-stability photovoltaic energy storage charging control method according to claim 1, characterized in that, The step of outputting a drive signal to the energy storage converter based on the comprehensive current reference value includes: The comprehensive current reference value is sent to the pulse width modulation generation module to generate a PWM control waveform for driving the power switch of the energy storage converter. The energy storage converter adjusts its output current according to the PWM control waveform so that the actual output current of the energy storage converter approaches the comprehensive current reference value.

10. A highly stable photovoltaic energy storage and charging control system, characterized in that, The control system includes: processor; The memory stores a computer program, which, when executed by a processor, implements the high-stability photoelectric storage and charging control method as described in any one of claims 1 to 9.

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